[mirror_ubuntu-bionic-kernel.git] / include / linux / msi.h

#ifndef LINUX_MSI_H
#define LINUX_MSI_H

#include <linux/kobject.h>
#include <linux/list.h>

struct msi_msg {
	u32	address_lo;	/* low 32 bits of msi message address */
	u32	address_hi;	/* high 32 bits of msi message address */
	u32	data;		/* 16 bits of msi message data */
};

extern int pci_msi_ignore_mask;
/* Helper functions */
struct irq_data;
struct msi_desc;
struct pci_dev;
void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);

/**
 * struct msi_desc - Descriptor structure for MSI based interrupts
 * @list:	List head for management
 * @irq:	The base interrupt number
 * @nvec_used:	The number of vectors used
 * @dev:	Pointer to the device which uses this descriptor
 * @msg:	The last set MSI message cached for reuse
 *
 * @masked:	[PCI MSI/X] Mask bits
 * @is_msix:	[PCI MSI/X] True if MSI-X
 * @multiple:	[PCI MSI/X] log2 num of messages allocated
 * @multi_cap:	[PCI MSI/X] log2 num of messages supported
 * @maskbit:	[PCI MSI/X] Mask-Pending bit supported?
 * @is_64:	[PCI MSI/X] Address size: 0=32bit 1=64bit
 * @entry_nr:	[PCI MSI/X] Entry which is described by this descriptor
 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
 * @mask_pos:	[PCI MSI]   Mask register position
 * @mask_base:	[PCI MSI-X] Mask register base address
 */
struct msi_desc {
	/* Shared device/bus type independent data */
	struct list_head		list;
	unsigned int			irq;
	unsigned int			nvec_used;
	struct device			*dev;
	struct msi_msg			msg;

	union {
		/* PCI MSI/X specific data */
		struct {
			u32 masked;
			struct {
				__u8	is_msix		: 1;
				__u8	multiple	: 3;
				__u8	multi_cap	: 3;
				__u8	maskbit		: 1;
				__u8	is_64		: 1;
				__u16	entry_nr;
				unsigned default_irq;
			} msi_attrib;
			union {
				u8	mask_pos;
				void __iomem *mask_base;
			};
		};

		/*
		 * Non PCI variants add their data structure here. New
		 * entries need to use a named structure. We want
		 * proper name spaces for this. The PCI part is
		 * anonymous for now as it would require an immediate
		 * tree wide cleanup.
		 */
	};
};

/* Helpers to hide struct msi_desc implementation details */
#define msi_desc_to_dev(desc)		((desc)->dev)
#define dev_to_msi_list(dev)		(&(dev)->msi_list)
#define first_msi_entry(dev)		\
	list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
#define for_each_msi_entry(desc, dev)	\
	list_for_each_entry((desc), dev_to_msi_list((dev)), list)

#ifdef CONFIG_PCI_MSI
#define first_pci_msi_entry(pdev)	first_msi_entry(&(pdev)->dev)
#define for_each_pci_msi_entry(desc, pdev)	\
	for_each_msi_entry((desc), &(pdev)->dev)

struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
#else /* CONFIG_PCI_MSI */
static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
{
	return NULL;
}
#endif /* CONFIG_PCI_MSI */

void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);

u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
void pci_msi_mask_irq(struct irq_data *data);
void pci_msi_unmask_irq(struct irq_data *data);

/* Conversion helpers. Should be removed after merging */
static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
{
	__pci_write_msi_msg(entry, msg);
}
static inline void write_msi_msg(int irq, struct msi_msg *msg)
{
	pci_write_msi_msg(irq, msg);
}
static inline void mask_msi_irq(struct irq_data *data)
{
	pci_msi_mask_irq(data);
}
static inline void unmask_msi_irq(struct irq_data *data)
{
	pci_msi_unmask_irq(data);
}

/*
 * The arch hooks to setup up msi irqs. Those functions are
 * implemented as weak symbols so that they /can/ be overriden by
 * architecture specific code if needed.
 */
int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
void arch_teardown_msi_irq(unsigned int irq);
int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
void arch_teardown_msi_irqs(struct pci_dev *dev);
void arch_restore_msi_irqs(struct pci_dev *dev);

void default_teardown_msi_irqs(struct pci_dev *dev);
void default_restore_msi_irqs(struct pci_dev *dev);

struct msi_controller {
	struct module *owner;
	struct device *dev;
	struct device_node *of_node;
	struct list_head list;
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
	struct irq_domain *domain;
#endif

	int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
			 struct msi_desc *desc);
	void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
};

#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN

#include <linux/irqhandler.h>
#include <asm/msi.h>

struct irq_domain;
struct irq_chip;
struct device_node;
struct msi_domain_info;

/**
 * struct msi_domain_ops - MSI interrupt domain callbacks
 * @get_hwirq:		Retrieve the resulting hw irq number
 * @msi_init:		Domain specific init function for MSI interrupts
 * @msi_free:		Domain specific function to free a MSI interrupts
 * @msi_check:		Callback for verification of the domain/info/dev data
 * @msi_prepare:	Prepare the allocation of the interrupts in the domain
 * @msi_finish:		Optional callbacl to finalize the allocation
 * @set_desc:		Set the msi descriptor for an interrupt
 * @handle_error:	Optional error handler if the allocation fails
 *
 * @get_hwirq, @msi_init and @msi_free are callbacks used by
 * msi_create_irq_domain() and related interfaces
 *
 * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
 * are callbacks used by msi_irq_domain_alloc_irqs() and related
 * interfaces which are based on msi_desc.
 */
struct msi_domain_ops {
	irq_hw_number_t	(*get_hwirq)(struct msi_domain_info *info,
				     msi_alloc_info_t *arg);
	int		(*msi_init)(struct irq_domain *domain,
				    struct msi_domain_info *info,
				    unsigned int virq, irq_hw_number_t hwirq,
				    msi_alloc_info_t *arg);
	void		(*msi_free)(struct irq_domain *domain,
				    struct msi_domain_info *info,
				    unsigned int virq);
	int		(*msi_check)(struct irq_domain *domain,
				     struct msi_domain_info *info,
				     struct device *dev);
	int		(*msi_prepare)(struct irq_domain *domain,
				       struct device *dev, int nvec,
				       msi_alloc_info_t *arg);
	void		(*msi_finish)(msi_alloc_info_t *arg, int retval);
	void		(*set_desc)(msi_alloc_info_t *arg,
				    struct msi_desc *desc);
	int		(*handle_error)(struct irq_domain *domain,
					struct msi_desc *desc, int error);
};

/**
 * struct msi_domain_info - MSI interrupt domain data
 * @flags:		Flags to decribe features and capabilities
 * @ops:		The callback data structure
 * @chip:		Optional: associated interrupt chip
 * @chip_data:		Optional: associated interrupt chip data
 * @handler:		Optional: associated interrupt flow handler
 * @handler_data:	Optional: associated interrupt flow handler data
 * @handler_name:	Optional: associated interrupt flow handler name
 * @data:		Optional: domain specific data
 */
struct msi_domain_info {
	u32			flags;
	struct msi_domain_ops	*ops;
	struct irq_chip		*chip;
	void			*chip_data;
	irq_flow_handler_t	handler;
	void			*handler_data;
	const char		*handler_name;
	void			*data;
};

/* Flags for msi_domain_info */
enum {
	/*
	 * Init non implemented ops callbacks with default MSI domain
	 * callbacks.
	 */
	MSI_FLAG_USE_DEF_DOM_OPS	= (1 << 0),
	/*
	 * Init non implemented chip callbacks with default MSI chip
	 * callbacks.
	 */
	MSI_FLAG_USE_DEF_CHIP_OPS	= (1 << 1),
	/* Build identity map between hwirq and irq */
	MSI_FLAG_IDENTITY_MAP		= (1 << 2),
	/* Support multiple PCI MSI interrupts */
	MSI_FLAG_MULTI_PCI_MSI		= (1 << 3),
	/* Support PCI MSIX interrupts */
	MSI_FLAG_PCI_MSIX		= (1 << 4),
};

int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
			    bool force);

struct irq_domain *msi_create_irq_domain(struct device_node *of_node,
					 struct msi_domain_info *info,
					 struct irq_domain *parent);
int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
			  int nvec);
void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);

#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */

#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
struct irq_domain *pci_msi_create_irq_domain(struct device_node *node,
					     struct msi_domain_info *info,
					     struct irq_domain *parent);
int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
			      int nvec, int type);
void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev);
struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node,
		 struct msi_domain_info *info, struct irq_domain *parent);

irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
					  struct msi_desc *desc);
int pci_msi_domain_check_cap(struct irq_domain *domain,
			     struct msi_domain_info *info, struct device *dev);
#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */

#endif /* LINUX_MSI_H */
Commit	Line	Data
3b7d1921 EB	1	#ifndef LINUX_MSI_H
	2	#define LINUX_MSI_H
	3
b50cac55	4	#include <linux/kobject.h>
4aa9bc95 ME	5	#include <linux/list.h>
4aa9bc95 ME	6
3b7d1921 EB	7	struct msi_msg {
	8	u32 address_lo; /* low 32 bits of msi message address */
	9	u32 address_hi; /* high 32 bits of msi message address */
	10	u32 data; /* 16 bits of msi message data */
	11	};
	12
38737d82	13	extern int pci_msi_ignore_mask;
c54c1879	14	/* Helper functions */
1c9db525	15	struct irq_data;
39431acb	16	struct msi_desc;
25a98bd4	17	struct pci_dev;
2366d06e	18	void __get_cached_msi_msg(struct msi_desc entry, struct msi_msg msg);
2366d06e	19	void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
891d4a48	20
fc88419c JL	21	/**
	22	* struct msi_desc - Descriptor structure for MSI based interrupts
	23	* @list: List head for management
	24	* @irq: The base interrupt number
	25	* @nvec_used: The number of vectors used
	26	* @dev: Pointer to the device which uses this descriptor
	27	* @msg: The last set MSI message cached for reuse
	28	*
	29	* @masked: [PCI MSI/X] Mask bits
	30	* @is_msix: [PCI MSI/X] True if MSI-X
	31	* @multiple: [PCI MSI/X] log2 num of messages allocated
	32	* @multi_cap: [PCI MSI/X] log2 num of messages supported
	33	* @maskbit: [PCI MSI/X] Mask-Pending bit supported?
	34	* @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
	35	* @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
	36	* @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
	37	* @mask_pos: [PCI MSI] Mask register position
	38	* @mask_base: [PCI MSI-X] Mask register base address
	39	*/
3b7d1921	40	struct msi_desc {
fc88419c JL	41	/* Shared device/bus type independent data */
	42	struct list_head list;
	43	unsigned int irq;
	44	unsigned int nvec_used;
	45	struct device *dev;
	46	struct msi_msg msg;
3b7d1921	47
264d9caa	48	union {
fc88419c JL	49	/* PCI MSI/X specific data */
	50	struct {
	51	u32 masked;
	52	struct {
	53	__u8 is_msix : 1;
	54	__u8 multiple : 3;
	55	__u8 multi_cap : 3;
	56	__u8 maskbit : 1;
	57	__u8 is_64 : 1;
	58	__u16 entry_nr;
	59	unsigned default_irq;
	60	} msi_attrib;
	61	union {
	62	u8 mask_pos;
	63	void __iomem *mask_base;
	64	};
	65	};
3b7d1921	66
fc88419c JL	67	/*
	68	* Non PCI variants add their data structure here. New
	69	* entries need to use a named structure. We want
	70	* proper name spaces for this. The PCI part is
	71	* anonymous for now as it would require an immediate
	72	* tree wide cleanup.
	73	*/
	74	};
3b7d1921 EB	75	};
3b7d1921 EB	76
d31eb342	77	/* Helpers to hide struct msi_desc implementation details */
25a98bd4	78	#define msi_desc_to_dev(desc) ((desc)->dev)
4a7cc831	79	#define dev_to_msi_list(dev) (&(dev)->msi_list)
d31eb342 JL	80	#define first_msi_entry(dev) \
	81	list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
	82	#define for_each_msi_entry(desc, dev) \
	83	list_for_each_entry((desc), dev_to_msi_list((dev)), list)
	84
	85	#ifdef CONFIG_PCI_MSI
	86	#define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
	87	#define for_each_pci_msi_entry(desc, pdev) \
	88	for_each_msi_entry((desc), &(pdev)->dev)
	89
25a98bd4	90	struct pci_dev msi_desc_to_pci_dev(struct msi_desc desc);
c179c9b9 JL	91	void msi_desc_to_pci_sysdata(struct msi_desc desc);
	92	#else /* CONFIG_PCI_MSI */
	93	static inline void msi_desc_to_pci_sysdata(struct msi_desc desc)
	94	{
	95	return NULL;
	96	}
d31eb342 JL	97	#endif /* CONFIG_PCI_MSI */
d31eb342 JL	98
891d4a48	99	void __pci_read_msi_msg(struct msi_desc entry, struct msi_msg msg);
83a18912 JL	100	void __pci_write_msi_msg(struct msi_desc entry, struct msi_msg msg);
	101	void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
	102
23ed8d57 TG	103	u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
	104	u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
	105	void pci_msi_mask_irq(struct irq_data *data);
	106	void pci_msi_unmask_irq(struct irq_data *data);
	107
83a18912 JL	108	/* Conversion helpers. Should be removed after merging */
	109	static inline void __write_msi_msg(struct msi_desc entry, struct msi_msg msg)
	110	{
	111	__pci_write_msi_msg(entry, msg);
	112	}
	113	static inline void write_msi_msg(int irq, struct msi_msg *msg)
	114	{
	115	pci_write_msi_msg(irq, msg);
	116	}
23ed8d57 TG	117	static inline void mask_msi_irq(struct irq_data *data)
	118	{
	119	pci_msi_mask_irq(data);
	120	}
	121	static inline void unmask_msi_irq(struct irq_data *data)
	122	{
	123	pci_msi_unmask_irq(data);
	124	}
891d4a48	125
3b7d1921	126	/*
4287d824 TP	127	* The arch hooks to setup up msi irqs. Those functions are
	128	* implemented as weak symbols so that they /can/ be overriden by
	129	* architecture specific code if needed.
3b7d1921	130	*/
f7feaca7	131	int arch_setup_msi_irq(struct pci_dev dev, struct msi_desc desc);
3b7d1921	132	void arch_teardown_msi_irq(unsigned int irq);
2366d06e BH	133	int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
2366d06e BH	134	void arch_teardown_msi_irqs(struct pci_dev *dev);
ac8344c4	135	void arch_restore_msi_irqs(struct pci_dev *dev);
4287d824 TP	136
4287d824 TP	137	void default_teardown_msi_irqs(struct pci_dev *dev);
ac8344c4	138	void default_restore_msi_irqs(struct pci_dev *dev);
3b7d1921	139
c2791b80	140	struct msi_controller {
0cbdcfcf TR	141	struct module *owner;
0cbdcfcf TR	142	struct device *dev;
0d5a6db3 TP	143	struct device_node *of_node;
0d5a6db3 TP	144	struct list_head list;
020c3126 MZ	145	#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
	146	struct irq_domain *domain;
	147	#endif
0cbdcfcf	148
c2791b80	149	int (setup_irq)(struct msi_controller chip, struct pci_dev *dev,
0cbdcfcf	150	struct msi_desc *desc);
c2791b80	151	void (teardown_irq)(struct msi_controller chip, unsigned int irq);
0cbdcfcf TR	152	};
0cbdcfcf TR	153
f3cf8bb0	154	#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
d9109698	155
aeeb5965	156	#include <linux/irqhandler.h>
d9109698 JL	157	#include <asm/msi.h>
d9109698 JL	158
f3cf8bb0 JL	159	struct irq_domain;
	160	struct irq_chip;
	161	struct device_node;
	162	struct msi_domain_info;
	163
	164	/**
	165	* struct msi_domain_ops - MSI interrupt domain callbacks
	166	* @get_hwirq: Retrieve the resulting hw irq number
	167	* @msi_init: Domain specific init function for MSI interrupts
	168	* @msi_free: Domain specific function to free a MSI interrupts
d9109698 JL	169	* @msi_check: Callback for verification of the domain/info/dev data
	170	* @msi_prepare: Prepare the allocation of the interrupts in the domain
	171	* @msi_finish: Optional callbacl to finalize the allocation
	172	* @set_desc: Set the msi descriptor for an interrupt
	173	* @handle_error: Optional error handler if the allocation fails
	174	*
	175	* @get_hwirq, @msi_init and @msi_free are callbacks used by
	176	* msi_create_irq_domain() and related interfaces
	177	*
	178	* @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
	179	* are callbacks used by msi_irq_domain_alloc_irqs() and related
	180	* interfaces which are based on msi_desc.
f3cf8bb0 JL	181	*/
f3cf8bb0 JL	182	struct msi_domain_ops {
aeeb5965 JL	183	irq_hw_number_t (get_hwirq)(struct msi_domain_info info,
aeeb5965 JL	184	msi_alloc_info_t *arg);
f3cf8bb0 JL	185	int (msi_init)(struct irq_domain domain,
	186	struct msi_domain_info *info,
	187	unsigned int virq, irq_hw_number_t hwirq,
aeeb5965	188	msi_alloc_info_t *arg);
f3cf8bb0 JL	189	void (msi_free)(struct irq_domain domain,
	190	struct msi_domain_info *info,
	191	unsigned int virq);
d9109698 JL	192	int (msi_check)(struct irq_domain domain,
	193	struct msi_domain_info *info,
	194	struct device *dev);
	195	int (msi_prepare)(struct irq_domain domain,
	196	struct device *dev, int nvec,
	197	msi_alloc_info_t *arg);
	198	void (msi_finish)(msi_alloc_info_t arg, int retval);
	199	void (set_desc)(msi_alloc_info_t arg,
	200	struct msi_desc *desc);
	201	int (handle_error)(struct irq_domain domain,
	202	struct msi_desc *desc, int error);
f3cf8bb0 JL	203	};
	204
	205	/**
	206	* struct msi_domain_info - MSI interrupt domain data
aeeb5965 JL	207	* @flags: Flags to decribe features and capabilities
	208	* @ops: The callback data structure
	209	* @chip: Optional: associated interrupt chip
	210	* @chip_data: Optional: associated interrupt chip data
	211	* @handler: Optional: associated interrupt flow handler
	212	* @handler_data: Optional: associated interrupt flow handler data
	213	* @handler_name: Optional: associated interrupt flow handler name
	214	* @data: Optional: domain specific data
f3cf8bb0 JL	215	*/
f3cf8bb0 JL	216	struct msi_domain_info {
aeeb5965	217	u32 flags;
f3cf8bb0 JL	218	struct msi_domain_ops *ops;
f3cf8bb0 JL	219	struct irq_chip *chip;
aeeb5965 JL	220	void *chip_data;
	221	irq_flow_handler_t handler;
	222	void *handler_data;
	223	const char *handler_name;
f3cf8bb0 JL	224	void *data;
	225	};
	226
aeeb5965 JL	227	/* Flags for msi_domain_info */
	228	enum {
	229	/*
	230	* Init non implemented ops callbacks with default MSI domain
	231	* callbacks.
	232	*/
	233	MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
	234	/*
	235	* Init non implemented chip callbacks with default MSI chip
	236	* callbacks.
	237	*/
	238	MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
	239	/* Build identity map between hwirq and irq */
	240	MSI_FLAG_IDENTITY_MAP = (1 << 2),
	241	/* Support multiple PCI MSI interrupts */
	242	MSI_FLAG_MULTI_PCI_MSI = (1 << 3),
	243	/* Support PCI MSIX interrupts */
	244	MSI_FLAG_PCI_MSIX = (1 << 4),
	245	};
	246
f3cf8bb0 JL	247	int msi_domain_set_affinity(struct irq_data data, const struct cpumask mask,
	248	bool force);
	249
	250	struct irq_domain msi_create_irq_domain(struct device_node of_node,
	251	struct msi_domain_info *info,
	252	struct irq_domain *parent);
d9109698 JL	253	int msi_domain_alloc_irqs(struct irq_domain domain, struct device dev,
	254	int nvec);
	255	void msi_domain_free_irqs(struct irq_domain domain, struct device dev);
f3cf8bb0 JL	256	struct msi_domain_info msi_get_domain_info(struct irq_domain domain);
	257
	258	#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
	259
3878eaef JL	260	#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
	261	void pci_msi_domain_write_msg(struct irq_data irq_data, struct msi_msg msg);
	262	struct irq_domain pci_msi_create_irq_domain(struct device_node node,
	263	struct msi_domain_info *info,
	264	struct irq_domain *parent);
	265	int pci_msi_domain_alloc_irqs(struct irq_domain domain, struct pci_dev dev,
	266	int nvec, int type);
	267	void pci_msi_domain_free_irqs(struct irq_domain domain, struct pci_dev dev);
8e047ada JL	268	struct irq_domain pci_msi_create_default_irq_domain(struct device_node node,
	269	struct msi_domain_info info, struct irq_domain parent);
	270
3878eaef JL	271	irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
	272	struct msi_desc *desc);
	273	int pci_msi_domain_check_cap(struct irq_domain *domain,
	274	struct msi_domain_info info, struct device dev);
	275	#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
	276
3b7d1921	277	#endif /* LINUX_MSI_H */