]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - include/linux/pci.h
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] PCI: Allow MSI to work on kexec kernel
[mirror_ubuntu-artful-kernel.git] / include / linux / pci.h
CommitLineData
1da177e4
LT		 1/*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17#ifndef LINUX_PCI_H
18#define LINUX_PCI_H
19
4352dfd5
GKH		 20/* Include the pci register defines */
21#include <linux/pci_regs.h>
1da177e4
LT		 22
23/* Include the ID list */
1da177e4
LT		 24#include <linux/pci_ids.h>
25
26/*
27 * The PCI interface treats multi-function devices as independent
28 * devices. The slot/function address of each device is encoded
29 * in a single byte as follows:
30 *
31 * 7:3 = slot
32 * 2:0 = function
33 */
34#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
35#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
36#define PCI_FUNC(devfn) ((devfn) & 0x07)
37
38/* Ioctls for /proc/bus/pci/X/Y nodes. */
39#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
40#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
41#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
42#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
43#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
44
45#ifdef __KERNEL__
46
778382e0
DW		 47#include <linux/mod_devicetable.h>
48
1da177e4 49#include <linux/types.h>
1da177e4
LT		 50#include <linux/ioport.h>
51#include <linux/list.h>
52#include <linux/errno.h>
53#include <linux/device.h>
54
55/* File state for mmap()s on /proc/bus/pci/X/Y */
56enum pci_mmap_state {
57 pci_mmap_io,
58 pci_mmap_mem
59};
60
61/* This defines the direction arg to the DMA mapping routines. */
62#define PCI_DMA_BIDIRECTIONAL 0
63#define PCI_DMA_TODEVICE 1
64#define PCI_DMA_FROMDEVICE 2
65#define PCI_DMA_NONE 3
66
67#define DEVICE_COUNT_COMPATIBLE 4
68#define DEVICE_COUNT_RESOURCE 12
69
70typedef int __bitwise pci_power_t;
71
4352dfd5
GKH		 72#define PCI_D0 ((pci_power_t __force) 0)
73#define PCI_D1 ((pci_power_t __force) 1)
74#define PCI_D2 ((pci_power_t __force) 2)
1da177e4
LT		 75#define PCI_D3hot ((pci_power_t __force) 3)
76#define PCI_D3cold ((pci_power_t __force) 4)
3fe9d19f 77#define PCI_UNKNOWN ((pci_power_t __force) 5)
438510f6 78#define PCI_POWER_ERROR ((pci_power_t __force) -1)
1da177e4 79
392a1ce7
LV		 80/** The pci_channel state describes connectivity between the CPU and
81 * the pci device. If some PCI bus between here and the pci device
82 * has crashed or locked up, this info is reflected here.
83 */
84typedef unsigned int __bitwise pci_channel_state_t;
85
86enum pci_channel_state {
87 /* I/O channel is in normal state */
88 pci_channel_io_normal = (__force pci_channel_state_t) 1,
89
90 /* I/O to channel is blocked */
91 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
92
93 /* PCI card is dead */
94 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
95};
96
6e325a62
MT		 97typedef unsigned short __bitwise pci_bus_flags_t;
98enum pci_bus_flags {
e778272d 99 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
6e325a62
MT		 100};
101
41017f0c
SL		 102struct pci_cap_saved_state {
103 struct hlist_node next;
104 char cap_nr;
105 u32 data[0];
106};
107
1da177e4
LT		 108/*
109 * The pci_dev structure is used to describe PCI devices.
110 */
111struct pci_dev {
112 struct list_head global_list; /* node in list of all PCI devices */
113 struct list_head bus_list; /* node in per-bus list */
114 struct pci_bus *bus; /* bus this device is on */
115 struct pci_bus *subordinate; /* bus this device bridges to */
116
117 void *sysdata; /* hook for sys-specific extension */
118 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
119
120 unsigned int devfn; /* encoded device & function index */
121 unsigned short vendor;
122 unsigned short device;
123 unsigned short subsystem_vendor;
124 unsigned short subsystem_device;
125 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
126 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
127 u8 rom_base_reg; /* which config register controls the ROM */
ffeff788 128 u8 pin; /* which interrupt pin this device uses */
1da177e4
LT		 129
130 struct pci_driver *driver; /* which driver has allocated this device */
131 u64 dma_mask; /* Mask of the bits of bus address this
132 device implements. Normally this is
133 0xffffffff. You only need to change
134 this if your device has broken DMA
135 or supports 64-bit transfers. */
136
137 pci_power_t current_state; /* Current operating state. In ACPI-speak,
138 this is D0-D3, D0 being fully functional,
139 and D3 being off. */
140
392a1ce7 141 pci_channel_state_t error_state; /* current connectivity state */
1da177e4
LT		 142 struct device dev; /* Generic device interface */
143
144 /* device is compatible with these IDs */
145 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
146 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
147
148 int cfg_size; /* Size of configuration space */
149
150 /*
151 * Instead of touching interrupt line and base address registers
152 * directly, use the values stored here. They might be different!
153 */
154 unsigned int irq;
155 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
156
157 /* These fields are used by common fixups */
158 unsigned int transparent:1; /* Transparent PCI bridge */
159 unsigned int multifunction:1;/* Part of multi-function device */
160 /* keep track of device state */
161 unsigned int is_enabled:1; /* pci_enable_device has been called */
162 unsigned int is_busmaster:1; /* device is busmaster */
4602b88d 163 unsigned int no_msi:1; /* device may not use msi */
e04b0ea2 164 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
bd8481e1 165 unsigned int broken_parity_status:1; /* Device generates false positive parity */
4602b88d 166
1da177e4 167 u32 saved_config_space[16]; /* config space saved at suspend time */
41017f0c 168 struct hlist_head saved_cap_space;
1da177e4
LT		 169 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
170 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
171 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
1da177e4
LT		 172};
173
174#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
175#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
176#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
177#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
178
41017f0c
SL		 179static inline struct pci_cap_saved_state *pci_find_saved_cap(
180 struct pci_dev *pci_dev,char cap)
181{
182 struct pci_cap_saved_state *tmp;
183 struct hlist_node *pos;
184
185 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
186 if (tmp->cap_nr == cap)
187 return tmp;
188 }
189 return NULL;
190}
191
192static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
193 struct pci_cap_saved_state *new_cap)
194{
195 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
196}
197
198static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
199{
200 hlist_del(&cap->next);
201}
202
1da177e4
LT		 203/*
204 * For PCI devices, the region numbers are assigned this way:
205 *
206 * 0-5 standard PCI regions
207 * 6 expansion ROM
208 * 7-10 bridges: address space assigned to buses behind the bridge
209 */
210
4352dfd5
GKH		 211#define PCI_ROM_RESOURCE 6
212#define PCI_BRIDGE_RESOURCES 7
213#define PCI_NUM_RESOURCES 11
1da177e4
LT		 214
215#ifndef PCI_BUS_NUM_RESOURCES
4352dfd5 216#define PCI_BUS_NUM_RESOURCES 8
1da177e4 217#endif
4352dfd5
GKH		 218
219#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
1da177e4
LT		 220
221struct pci_bus {
222 struct list_head node; /* node in list of buses */
223 struct pci_bus *parent; /* parent bus this bridge is on */
224 struct list_head children; /* list of child buses */
225 struct list_head devices; /* list of devices on this bus */
226 struct pci_dev *self; /* bridge device as seen by parent */
227 struct resource *resource[PCI_BUS_NUM_RESOURCES];
228 /* address space routed to this bus */
229
230 struct pci_ops *ops; /* configuration access functions */
231 void *sysdata; /* hook for sys-specific extension */
232 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
233
234 unsigned char number; /* bus number */
235 unsigned char primary; /* number of primary bridge */
236 unsigned char secondary; /* number of secondary bridge */
237 unsigned char subordinate; /* max number of subordinate buses */
238
239 char name[48];
240
241 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
6e325a62 242 pci_bus_flags_t bus_flags; /* Inherited by child busses */
1da177e4
LT		 243 struct device *bridge;
244 struct class_device class_dev;
245 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
246 struct bin_attribute *legacy_mem; /* legacy mem */
247};
248
249#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
250#define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
251
252/*
253 * Error values that may be returned by PCI functions.
254 */
255#define PCIBIOS_SUCCESSFUL 0x00
256#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
257#define PCIBIOS_BAD_VENDOR_ID 0x83
258#define PCIBIOS_DEVICE_NOT_FOUND 0x86
259#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
260#define PCIBIOS_SET_FAILED 0x88
261#define PCIBIOS_BUFFER_TOO_SMALL 0x89
262
263/* Low-level architecture-dependent routines */
264
265struct pci_ops {
266 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
267 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
268};
269
270struct pci_raw_ops {
271 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
272 int reg, int len, u32 *val);
273 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
274 int reg, int len, u32 val);
275};
276
277extern struct pci_raw_ops *raw_pci_ops;
278
279struct pci_bus_region {
280 unsigned long start;
281 unsigned long end;
282};
283
284struct pci_dynids {
285 spinlock_t lock; /* protects list, index */
286 struct list_head list; /* for IDs added at runtime */
287 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
288};
289
392a1ce7
LV		 290/* ---------------------------------------------------------------- */
291/** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
292 * a set fof callbacks in struct pci_error_handlers, then that device driver
293 * will be notified of PCI bus errors, and will be driven to recovery
294 * when an error occurs.
295 */
296
297typedef unsigned int __bitwise pci_ers_result_t;
298
299enum pci_ers_result {
300 /* no result/none/not supported in device driver */
301 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
302
303 /* Device driver can recover without slot reset */
304 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
305
306 /* Device driver wants slot to be reset. */
307 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
308
309 /* Device has completely failed, is unrecoverable */
310 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
311
312 /* Device driver is fully recovered and operational */
313 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
314};
315
316/* PCI bus error event callbacks */
317struct pci_error_handlers
318{
319 /* PCI bus error detected on this device */
320 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
321 enum pci_channel_state error);
322
323 /* MMIO has been re-enabled, but not DMA */
324 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
325
326 /* PCI Express link has been reset */
327 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
328
329 /* PCI slot has been reset */
330 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
331
332 /* Device driver may resume normal operations */
333 void (*resume)(struct pci_dev *dev);
334};
335
336/* ---------------------------------------------------------------- */
337
1da177e4
LT		 338struct module;
339struct pci_driver {
340 struct list_head node;
341 char *name;
1da177e4
LT		 342 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
343 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
344 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
345 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
346 int (*resume) (struct pci_dev *dev); /* Device woken up */
438510f6 347 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
c8958177 348 void (*shutdown) (struct pci_dev *dev);
1da177e4 349
392a1ce7 350 struct pci_error_handlers *err_handler;
1da177e4
LT		 351 struct device_driver driver;
352 struct pci_dynids dynids;
353};
354
355#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
356
357/**
358 * PCI_DEVICE - macro used to describe a specific pci device
359 * @vend: the 16 bit PCI Vendor ID
360 * @dev: the 16 bit PCI Device ID
361 *
362 * This macro is used to create a struct pci_device_id that matches a
363 * specific device. The subvendor and subdevice fields will be set to
364 * PCI_ANY_ID.
365 */
366#define PCI_DEVICE(vend,dev) \
367 .vendor = (vend), .device = (dev), \
368 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
369
370/**
371 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
372 * @dev_class: the class, subclass, prog-if triple for this device
373 * @dev_class_mask: the class mask for this device
374 *
375 * This macro is used to create a struct pci_device_id that matches a
4352dfd5 376 * specific PCI class. The vendor, device, subvendor, and subdevice
1da177e4
LT		 377 * fields will be set to PCI_ANY_ID.
378 */
379#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
380 .class = (dev_class), .class_mask = (dev_class_mask), \
381 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
382 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
383
4352dfd5 384/*
1da177e4
LT		 385 * pci_module_init is obsolete, this stays here till we fix up all usages of it
386 * in the tree.
387 */
388#define pci_module_init pci_register_driver
389
390/* these external functions are only available when PCI support is enabled */
391#ifdef CONFIG_PCI
392
393extern struct bus_type pci_bus_type;
394
395/* Do NOT directly access these two variables, unless you are arch specific pci
396 * code, or pci core code. */
397extern struct list_head pci_root_buses; /* list of all known PCI buses */
398extern struct list_head pci_devices; /* list of all devices */
399
400void pcibios_fixup_bus(struct pci_bus *);
401int pcibios_enable_device(struct pci_dev *, int mask);
402char *pcibios_setup (char *str);
403
404/* Used only when drivers/pci/setup.c is used */
405void pcibios_align_resource(void *, struct resource *,
406 unsigned long, unsigned long);
407void pcibios_update_irq(struct pci_dev *, int irq);
408
409/* Generic PCI functions used internally */
410
411extern struct pci_bus *pci_find_bus(int domain, int busnr);
c431ada4 412void pci_bus_add_devices(struct pci_bus *bus);
1da177e4
LT		 413struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
414static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
415{
c431ada4
RS		 416 struct pci_bus *root_bus;
417 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
418 if (root_bus)
419 pci_bus_add_devices(root_bus);
420 return root_bus;
1da177e4 421}
cdb9b9f7
PM		 422struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
423struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
1da177e4
LT		 424int pci_scan_slot(struct pci_bus *bus, int devfn);
425struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
cdb9b9f7 426void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
1da177e4
LT		 427unsigned int pci_scan_child_bus(struct pci_bus *bus);
428void pci_bus_add_device(struct pci_dev *dev);
1da177e4
LT		 429void pci_read_bridge_bases(struct pci_bus *child);
430struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
431int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
432extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
433extern void pci_dev_put(struct pci_dev *dev);
434extern void pci_remove_bus(struct pci_bus *b);
435extern void pci_remove_bus_device(struct pci_dev *dev);
b3743fa4 436void pci_setup_cardbus(struct pci_bus *bus);
1da177e4
LT		 437
438/* Generic PCI functions exported to card drivers */
439
440struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
441struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
442struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
443int pci_find_capability (struct pci_dev *dev, int cap);
24a4e377 444int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
3a720d72 445int pci_find_ext_capability (struct pci_dev *dev, int cap);
1da177e4
LT		 446struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
447
448struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
449struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
450 unsigned int ss_vendor, unsigned int ss_device,
451 struct pci_dev *from);
452struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
453struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
454int pci_dev_present(const struct pci_device_id *ids);
455
456int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
457int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
458int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
459int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
460int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
461int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
462
463static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
464{
465 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
466}
467static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
468{
469 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
470}
471static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
472{
473 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
474}
475static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
476{
477 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
478}
479static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
480{
481 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
482}
483static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
484{
485 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
486}
487
9c8550ee
LT		 488int pci_enable_device(struct pci_dev *dev);
489int pci_enable_device_bars(struct pci_dev *dev, int mask);
1da177e4
LT		 490void pci_disable_device(struct pci_dev *dev);
491void pci_set_master(struct pci_dev *dev);
492#define HAVE_PCI_SET_MWI
9c8550ee 493int pci_set_mwi(struct pci_dev *dev);
1da177e4 494void pci_clear_mwi(struct pci_dev *dev);
a04ce0ff 495void pci_intx(struct pci_dev *dev, int enable);
9c8550ee
LT		 496int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
497int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
064b53db 498void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
1da177e4 499int pci_assign_resource(struct pci_dev *dev, int i);
75acfeca 500int pci_assign_resource_fixed(struct pci_dev *dev, int i);
064b53db 501void pci_restore_bars(struct pci_dev *dev);
1da177e4
LT		 502
503/* ROM control related routines */
144a50ea
DJ		 504void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
505void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
1da177e4
LT		 506void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
507void pci_remove_rom(struct pci_dev *pdev);
508
509/* Power management related routines */
510int pci_save_state(struct pci_dev *dev);
511int pci_restore_state(struct pci_dev *dev);
9c8550ee
LT		 512int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
513pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
514int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
1da177e4
LT		 515
516/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
517void pci_bus_assign_resources(struct pci_bus *bus);
518void pci_bus_size_bridges(struct pci_bus *bus);
519int pci_claim_resource(struct pci_dev *, int);
520void pci_assign_unassigned_resources(void);
521void pdev_enable_device(struct pci_dev *);
522void pdev_sort_resources(struct pci_dev *, struct resource_list *);
523void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
524 int (*)(struct pci_dev *, u8, u8));
525#define HAVE_PCI_REQ_REGIONS 2
3c990e92 526int pci_request_regions(struct pci_dev *, const char *);
1da177e4 527void pci_release_regions(struct pci_dev *);
3c990e92 528int pci_request_region(struct pci_dev *, int, const char *);
1da177e4
LT		 529void pci_release_region(struct pci_dev *, int);
530
531/* drivers/pci/bus.c */
532int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
533 unsigned long size, unsigned long align,
534 unsigned long min, unsigned int type_mask,
535 void (*alignf)(void *, struct resource *,
536 unsigned long, unsigned long),
537 void *alignf_data);
538void pci_enable_bridges(struct pci_bus *bus);
539
863b18f4
L		 540/* Proper probing supporting hot-pluggable devices */
541int __pci_register_driver(struct pci_driver *, struct module *);
542static inline int pci_register_driver(struct pci_driver *driver)
543{
544 return __pci_register_driver(driver, THIS_MODULE);
545}
546
1da177e4
LT		 547void pci_unregister_driver(struct pci_driver *);
548void pci_remove_behind_bridge(struct pci_dev *);
549struct pci_driver *pci_dev_driver(const struct pci_dev *);
75865858
GKH		 550const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
551const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
1da177e4
LT		 552int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
553
cecf4864
PM		 554void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
555 void *userdata);
ac7dc65a 556int pci_cfg_space_size(struct pci_dev *dev);
b82db5ce 557unsigned char pci_bus_max_busnr(struct pci_bus* bus);
cecf4864 558
1da177e4
LT		 559/* kmem_cache style wrapper around pci_alloc_consistent() */
560
561#include <linux/dmapool.h>
562
563#define pci_pool dma_pool
564#define pci_pool_create(name, pdev, size, align, allocation) \
565 dma_pool_create(name, &pdev->dev, size, align, allocation)
566#define pci_pool_destroy(pool) dma_pool_destroy(pool)
567#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
568#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
569
e24c2d96
DM		 570enum pci_dma_burst_strategy {
571 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
572 strategy_parameter is N/A */
573 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
574 byte boundaries */
575 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
576 strategy_parameter byte boundaries */
577};
578
1da177e4
LT		 579#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
580extern struct pci_dev *isa_bridge;
581#endif
582
583struct msix_entry {
584 u16 vector; /* kernel uses to write allocated vector */
585 u16 entry; /* driver uses to specify entry, OS writes */
586};
587
588#ifndef CONFIG_PCI_MSI
589static inline void pci_scan_msi_device(struct pci_dev *dev) {}
590static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
591static inline void pci_disable_msi(struct pci_dev *dev) {}
592static inline int pci_enable_msix(struct pci_dev* dev,
593 struct msix_entry *entries, int nvec) {return -1;}
594static inline void pci_disable_msix(struct pci_dev *dev) {}
595static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
596#else
597extern void pci_scan_msi_device(struct pci_dev *dev);
598extern int pci_enable_msi(struct pci_dev *dev);
599extern void pci_disable_msi(struct pci_dev *dev);
600extern int pci_enable_msix(struct pci_dev* dev,
601 struct msix_entry *entries, int nvec);
602extern void pci_disable_msix(struct pci_dev *dev);
603extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
604#endif
605
e04b0ea2
BK		 606extern void pci_block_user_cfg_access(struct pci_dev *dev);
607extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
608
4352dfd5
GKH		 609/*
610 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
611 * a PCI domain is defined to be a set of PCI busses which share
612 * configuration space.
613 */
614#ifndef CONFIG_PCI_DOMAINS
615static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
616static inline int pci_proc_domain(struct pci_bus *bus)
617{
618 return 0;
619}
620#endif
1da177e4 621
4352dfd5 622#else /* CONFIG_PCI is not enabled */
1da177e4
LT		 623
624/*
625 * If the system does not have PCI, clearly these return errors. Define
626 * these as simple inline functions to avoid hair in drivers.
627 */
628
1da177e4
LT		 629#define _PCI_NOP(o,s,t) \
630 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
631 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
632#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
633 _PCI_NOP(o,word,u16 x) \
634 _PCI_NOP(o,dword,u32 x)
635_PCI_NOP_ALL(read, *)
636_PCI_NOP_ALL(write,)
637
638static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
639{ return NULL; }
640
641static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
642{ return NULL; }
643
644static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
645{ return NULL; }
646
647static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
648unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
649{ return NULL; }
650
651static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
652{ return NULL; }
653
654#define pci_dev_present(ids) (0)
655#define pci_dev_put(dev) do { } while (0)
656
657static inline void pci_set_master(struct pci_dev *dev) { }
658static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
659static inline void pci_disable_device(struct pci_dev *dev) { }
660static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
1da177e4 661static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
863b18f4 662static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
1da177e4
LT		 663static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
664static inline void pci_unregister_driver(struct pci_driver *drv) { }
665static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
24a4e377 666static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
3a720d72 667static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
1da177e4
LT		 668static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
669
670/* Power management related routines */
671static inline int pci_save_state(struct pci_dev *dev) { return 0; }
672static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
673static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
438510f6 674static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
1da177e4
LT		 675static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
676
677#define isa_bridge ((struct pci_dev *)NULL)
678
a46e8126
KG		 679#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
680
e04b0ea2
BK		 681static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
682static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
683
4352dfd5 684#endif /* CONFIG_PCI */
1da177e4 685
4352dfd5
GKH		 686/* Include architecture-dependent settings and functions */
687
688#include <asm/pci.h>
1da177e4
LT		 689
690/* these helpers provide future and backwards compatibility
691 * for accessing popular PCI BAR info */
692#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
693#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
694#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
695#define pci_resource_len(dev,bar) \
696 ((pci_resource_start((dev),(bar)) == 0 && \
697 pci_resource_end((dev),(bar)) == \
698 pci_resource_start((dev),(bar))) ? 0 : \
699 \
700 (pci_resource_end((dev),(bar)) - \
701 pci_resource_start((dev),(bar)) + 1))
702
703/* Similar to the helpers above, these manipulate per-pci_dev
704 * driver-specific data. They are really just a wrapper around
705 * the generic device structure functions of these calls.
706 */
707static inline void *pci_get_drvdata (struct pci_dev *pdev)
708{
709 return dev_get_drvdata(&pdev->dev);
710}
711
712static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
713{
714 dev_set_drvdata(&pdev->dev, data);
715}
716
717/* If you want to know what to call your pci_dev, ask this function.
718 * Again, it's a wrapper around the generic device.
719 */
720static inline char *pci_name(struct pci_dev *pdev)
721{
722 return pdev->dev.bus_id;
723}
724
2311b1f2
ME		 725
726/* Some archs don't want to expose struct resource to userland as-is
727 * in sysfs and /proc
728 */
729#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
730static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
731 const struct resource *rsrc, u64 *start, u64 *end)
732{
733 *start = rsrc->start;
734 *end = rsrc->end;
735}
736#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
737
738
1da177e4
LT		 739/*
740 * The world is not perfect and supplies us with broken PCI devices.
741 * For at least a part of these bugs we need a work-around, so both
742 * generic (drivers/pci/quirks.c) and per-architecture code can define
743 * fixup hooks to be called for particular buggy devices.
744 */
745
746struct pci_fixup {
747 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
748 void (*hook)(struct pci_dev *dev);
749};
750
751enum pci_fixup_pass {
752 pci_fixup_early, /* Before probing BARs */
753 pci_fixup_header, /* After reading configuration header */
754 pci_fixup_final, /* Final phase of device fixups */
755 pci_fixup_enable, /* pci_enable_device() time */
756};
757
758/* Anonymous variables would be nice... */
759#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
74d863ee 760 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
1da177e4
LT		 761 __attribute__((__section__(#section))) = { vendor, device, hook };
762#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
763 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
764 vendor##device##hook, vendor, device, hook)
765#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
766 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
767 vendor##device##hook, vendor, device, hook)
768#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
769 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
770 vendor##device##hook, vendor, device, hook)
771#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
772 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
773 vendor##device##hook, vendor, device, hook)
774
775
776void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
777
778extern int pci_pci_problems;
779#define PCIPCI_FAIL 1
780#define PCIPCI_TRITON 2
781#define PCIPCI_NATOMA 4
782#define PCIPCI_VIAETBF 8
783#define PCIPCI_VSFX 16
784#define PCIPCI_ALIMAGIK 32
785
786#endif /* __KERNEL__ */
787#endif /* LINUX_PCI_H */
Ubuntu Artful kernel mirror