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1da177e4 LT |
1 | #ifndef __LINUX_PERCPU_H |
2 | #define __LINUX_PERCPU_H | |
7ff6f082 | 3 | |
309381fe | 4 | #include <linux/mmdebug.h> |
0a3021f4 | 5 | #include <linux/preempt.h> |
1da177e4 | 6 | #include <linux/smp.h> |
7ff6f082 | 7 | #include <linux/cpumask.h> |
6a242909 | 8 | #include <linux/pfn.h> |
de380b55 | 9 | #include <linux/init.h> |
7ff6f082 | 10 | |
1da177e4 LT |
11 | #include <asm/percpu.h> |
12 | ||
6a242909 | 13 | /* enough to cover all DEFINE_PER_CPUs in modules */ |
b00742d3 | 14 | #ifdef CONFIG_MODULES |
6a242909 | 15 | #define PERCPU_MODULE_RESERVE (8 << 10) |
b00742d3 | 16 | #else |
6a242909 | 17 | #define PERCPU_MODULE_RESERVE 0 |
1da177e4 LT |
18 | #endif |
19 | ||
6a242909 | 20 | #ifndef PERCPU_ENOUGH_ROOM |
b00742d3 | 21 | #define PERCPU_ENOUGH_ROOM \ |
6a242909 TH |
22 | (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \ |
23 | PERCPU_MODULE_RESERVE) | |
24 | #endif | |
b00742d3 | 25 | |
632bbfee JB |
26 | /* |
27 | * Must be an lvalue. Since @var must be a simple identifier, | |
28 | * we force a syntax error here if it isn't. | |
29 | */ | |
30 | #define get_cpu_var(var) (*({ \ | |
632bbfee JB |
31 | preempt_disable(); \ |
32 | &__get_cpu_var(var); })) | |
f7b64fe8 | 33 | |
e0fdb0e0 RR |
34 | /* |
35 | * The weird & is necessary because sparse considers (void)(var) to be | |
36 | * a direct dereference of percpu variable (var). | |
37 | */ | |
f7b64fe8 | 38 | #define put_cpu_var(var) do { \ |
e0fdb0e0 | 39 | (void)&(var); \ |
f7b64fe8 TH |
40 | preempt_enable(); \ |
41 | } while (0) | |
1da177e4 | 42 | |
8b8e2ec1 PZ |
43 | #define get_cpu_ptr(var) ({ \ |
44 | preempt_disable(); \ | |
45 | this_cpu_ptr(var); }) | |
46 | ||
47 | #define put_cpu_ptr(var) do { \ | |
48 | (void)(var); \ | |
49 | preempt_enable(); \ | |
50 | } while (0) | |
51 | ||
8d408b4b | 52 | /* minimum unit size, also is the maximum supported allocation size */ |
6abad5ac | 53 | #define PCPU_MIN_UNIT_SIZE PFN_ALIGN(32 << 10) |
8d408b4b | 54 | |
099a19d9 TH |
55 | /* |
56 | * Percpu allocator can serve percpu allocations before slab is | |
57 | * initialized which allows slab to depend on the percpu allocator. | |
58 | * The following two parameters decide how much resource to | |
59 | * preallocate for this. Keep PERCPU_DYNAMIC_RESERVE equal to or | |
60 | * larger than PERCPU_DYNAMIC_EARLY_SIZE. | |
61 | */ | |
62 | #define PERCPU_DYNAMIC_EARLY_SLOTS 128 | |
63 | #define PERCPU_DYNAMIC_EARLY_SIZE (12 << 10) | |
64 | ||
8d408b4b TH |
65 | /* |
66 | * PERCPU_DYNAMIC_RESERVE indicates the amount of free area to piggy | |
6b19b0c2 TH |
67 | * back on the first chunk for dynamic percpu allocation if arch is |
68 | * manually allocating and mapping it for faster access (as a part of | |
69 | * large page mapping for example). | |
8d408b4b | 70 | * |
6b19b0c2 TH |
71 | * The following values give between one and two pages of free space |
72 | * after typical minimal boot (2-way SMP, single disk and NIC) with | |
73 | * both defconfig and a distro config on x86_64 and 32. More | |
74 | * intelligent way to determine this would be nice. | |
8d408b4b | 75 | */ |
6b19b0c2 TH |
76 | #if BITS_PER_LONG > 32 |
77 | #define PERCPU_DYNAMIC_RESERVE (20 << 10) | |
78 | #else | |
79 | #define PERCPU_DYNAMIC_RESERVE (12 << 10) | |
80 | #endif | |
8d408b4b | 81 | |
fbf59bc9 | 82 | extern void *pcpu_base_addr; |
fb435d52 | 83 | extern const unsigned long *pcpu_unit_offsets; |
1da177e4 | 84 | |
fd1e8a1f TH |
85 | struct pcpu_group_info { |
86 | int nr_units; /* aligned # of units */ | |
87 | unsigned long base_offset; /* base address offset */ | |
88 | unsigned int *cpu_map; /* unit->cpu map, empty | |
89 | * entries contain NR_CPUS */ | |
90 | }; | |
91 | ||
92 | struct pcpu_alloc_info { | |
93 | size_t static_size; | |
94 | size_t reserved_size; | |
95 | size_t dyn_size; | |
96 | size_t unit_size; | |
97 | size_t atom_size; | |
98 | size_t alloc_size; | |
99 | size_t __ai_size; /* internal, don't use */ | |
100 | int nr_groups; /* 0 if grouping unnecessary */ | |
101 | struct pcpu_group_info groups[]; | |
102 | }; | |
103 | ||
f58dc01b TH |
104 | enum pcpu_fc { |
105 | PCPU_FC_AUTO, | |
106 | PCPU_FC_EMBED, | |
107 | PCPU_FC_PAGE, | |
f58dc01b TH |
108 | |
109 | PCPU_FC_NR, | |
110 | }; | |
17f3609c | 111 | extern const char * const pcpu_fc_names[PCPU_FC_NR]; |
f58dc01b TH |
112 | |
113 | extern enum pcpu_fc pcpu_chosen_fc; | |
114 | ||
3cbc8565 TH |
115 | typedef void * (*pcpu_fc_alloc_fn_t)(unsigned int cpu, size_t size, |
116 | size_t align); | |
d4b95f80 TH |
117 | typedef void (*pcpu_fc_free_fn_t)(void *ptr, size_t size); |
118 | typedef void (*pcpu_fc_populate_pte_fn_t)(unsigned long addr); | |
a530b795 | 119 | typedef int (pcpu_fc_cpu_distance_fn_t)(unsigned int from, unsigned int to); |
fbf59bc9 | 120 | |
fd1e8a1f TH |
121 | extern struct pcpu_alloc_info * __init pcpu_alloc_alloc_info(int nr_groups, |
122 | int nr_units); | |
123 | extern void __init pcpu_free_alloc_info(struct pcpu_alloc_info *ai); | |
124 | ||
fb435d52 TH |
125 | extern int __init pcpu_setup_first_chunk(const struct pcpu_alloc_info *ai, |
126 | void *base_addr); | |
8d408b4b | 127 | |
08fc4580 | 128 | #ifdef CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK |
4ba6ce25 | 129 | extern int __init pcpu_embed_first_chunk(size_t reserved_size, size_t dyn_size, |
c8826dd5 TH |
130 | size_t atom_size, |
131 | pcpu_fc_cpu_distance_fn_t cpu_distance_fn, | |
132 | pcpu_fc_alloc_fn_t alloc_fn, | |
133 | pcpu_fc_free_fn_t free_fn); | |
08fc4580 | 134 | #endif |
66c3a757 | 135 | |
08fc4580 | 136 | #ifdef CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK |
fb435d52 | 137 | extern int __init pcpu_page_first_chunk(size_t reserved_size, |
d4b95f80 TH |
138 | pcpu_fc_alloc_fn_t alloc_fn, |
139 | pcpu_fc_free_fn_t free_fn, | |
140 | pcpu_fc_populate_pte_fn_t populate_pte_fn); | |
08fc4580 | 141 | #endif |
d4b95f80 | 142 | |
f2a8205c TH |
143 | /* |
144 | * Use this to get to a cpu's version of the per-cpu object | |
145 | * dynamically allocated. Non-atomic access to the current CPU's | |
146 | * version should probably be combined with get_cpu()/put_cpu(). | |
147 | */ | |
bbddff05 | 148 | #ifdef CONFIG_SMP |
fbf59bc9 | 149 | #define per_cpu_ptr(ptr, cpu) SHIFT_PERCPU_PTR((ptr), per_cpu_offset((cpu))) |
bbddff05 TH |
150 | #else |
151 | #define per_cpu_ptr(ptr, cpu) ({ (void)(cpu); VERIFY_PERCPU_PTR((ptr)); }) | |
152 | #endif | |
fbf59bc9 | 153 | |
e0fdb0e0 | 154 | extern void __percpu *__alloc_reserved_percpu(size_t size, size_t align); |
10fad5e4 | 155 | extern bool is_kernel_percpu_address(unsigned long addr); |
1da177e4 | 156 | |
bbddff05 | 157 | #if !defined(CONFIG_SMP) || !defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) |
e74e3962 TH |
158 | extern void __init setup_per_cpu_areas(void); |
159 | #endif | |
099a19d9 | 160 | extern void __init percpu_init_late(void); |
e74e3962 | 161 | |
de380b55 TH |
162 | extern void __percpu *__alloc_percpu(size_t size, size_t align); |
163 | extern void free_percpu(void __percpu *__pdata); | |
164 | extern phys_addr_t per_cpu_ptr_to_phys(void *addr); | |
165 | ||
64ef291f | 166 | #define alloc_percpu(type) \ |
e0fdb0e0 | 167 | (typeof(type) __percpu *)__alloc_percpu(sizeof(type), __alignof__(type)) |
1da177e4 | 168 | |
7340a0b1 CL |
169 | /* |
170 | * Branching function to split up a function into a set of functions that | |
171 | * are called for different scalar sizes of the objects handled. | |
172 | */ | |
173 | ||
174 | extern void __bad_size_call_parameter(void); | |
175 | ||
0f5e4816 TH |
176 | #define __pcpu_size_call_return(stem, variable) \ |
177 | ({ typeof(variable) pscr_ret__; \ | |
545695fb | 178 | __verify_pcpu_ptr(&(variable)); \ |
7340a0b1 | 179 | switch(sizeof(variable)) { \ |
0f5e4816 TH |
180 | case 1: pscr_ret__ = stem##1(variable);break; \ |
181 | case 2: pscr_ret__ = stem##2(variable);break; \ | |
182 | case 4: pscr_ret__ = stem##4(variable);break; \ | |
183 | case 8: pscr_ret__ = stem##8(variable);break; \ | |
7340a0b1 CL |
184 | default: \ |
185 | __bad_size_call_parameter();break; \ | |
186 | } \ | |
0f5e4816 | 187 | pscr_ret__; \ |
7340a0b1 CL |
188 | }) |
189 | ||
a663ffff CL |
190 | #define __pcpu_size_call_return2(stem, variable, ...) \ |
191 | ({ \ | |
192 | typeof(variable) pscr2_ret__; \ | |
193 | __verify_pcpu_ptr(&(variable)); \ | |
194 | switch(sizeof(variable)) { \ | |
195 | case 1: pscr2_ret__ = stem##1(variable, __VA_ARGS__); break; \ | |
196 | case 2: pscr2_ret__ = stem##2(variable, __VA_ARGS__); break; \ | |
197 | case 4: pscr2_ret__ = stem##4(variable, __VA_ARGS__); break; \ | |
198 | case 8: pscr2_ret__ = stem##8(variable, __VA_ARGS__); break; \ | |
199 | default: \ | |
200 | __bad_size_call_parameter(); break; \ | |
201 | } \ | |
202 | pscr2_ret__; \ | |
203 | }) | |
204 | ||
7c334339 CL |
205 | /* |
206 | * Special handling for cmpxchg_double. cmpxchg_double is passed two | |
207 | * percpu variables. The first has to be aligned to a double word | |
208 | * boundary and the second has to follow directly thereafter. | |
d4d84fef CM |
209 | * We enforce this on all architectures even if they don't support |
210 | * a double cmpxchg instruction, since it's a cheap requirement, and it | |
211 | * avoids breaking the requirement for architectures with the instruction. | |
7c334339 CL |
212 | */ |
213 | #define __pcpu_double_call_return_bool(stem, pcp1, pcp2, ...) \ | |
214 | ({ \ | |
215 | bool pdcrb_ret__; \ | |
216 | __verify_pcpu_ptr(&pcp1); \ | |
217 | BUILD_BUG_ON(sizeof(pcp1) != sizeof(pcp2)); \ | |
218 | VM_BUG_ON((unsigned long)(&pcp1) % (2 * sizeof(pcp1))); \ | |
219 | VM_BUG_ON((unsigned long)(&pcp2) != \ | |
220 | (unsigned long)(&pcp1) + sizeof(pcp1)); \ | |
221 | switch(sizeof(pcp1)) { \ | |
222 | case 1: pdcrb_ret__ = stem##1(pcp1, pcp2, __VA_ARGS__); break; \ | |
223 | case 2: pdcrb_ret__ = stem##2(pcp1, pcp2, __VA_ARGS__); break; \ | |
224 | case 4: pdcrb_ret__ = stem##4(pcp1, pcp2, __VA_ARGS__); break; \ | |
225 | case 8: pdcrb_ret__ = stem##8(pcp1, pcp2, __VA_ARGS__); break; \ | |
226 | default: \ | |
227 | __bad_size_call_parameter(); break; \ | |
228 | } \ | |
229 | pdcrb_ret__; \ | |
230 | }) | |
231 | ||
0f5e4816 | 232 | #define __pcpu_size_call(stem, variable, ...) \ |
7340a0b1 | 233 | do { \ |
545695fb | 234 | __verify_pcpu_ptr(&(variable)); \ |
7340a0b1 CL |
235 | switch(sizeof(variable)) { \ |
236 | case 1: stem##1(variable, __VA_ARGS__);break; \ | |
237 | case 2: stem##2(variable, __VA_ARGS__);break; \ | |
238 | case 4: stem##4(variable, __VA_ARGS__);break; \ | |
239 | case 8: stem##8(variable, __VA_ARGS__);break; \ | |
240 | default: \ | |
241 | __bad_size_call_parameter();break; \ | |
242 | } \ | |
243 | } while (0) | |
244 | ||
245 | /* | |
b3ca1c10 CL |
246 | * this_cpu operations (C) 2008-2013 Christoph Lameter <cl@linux.com> |
247 | * | |
7340a0b1 | 248 | * Optimized manipulation for memory allocated through the per cpu |
dd17c8f7 | 249 | * allocator or for addresses of per cpu variables. |
7340a0b1 CL |
250 | * |
251 | * These operation guarantee exclusivity of access for other operations | |
252 | * on the *same* processor. The assumption is that per cpu data is only | |
253 | * accessed by a single processor instance (the current one). | |
254 | * | |
255 | * The first group is used for accesses that must be done in a | |
256 | * preemption safe way since we know that the context is not preempt | |
257 | * safe. Interrupts may occur. If the interrupt modifies the variable | |
258 | * too then RMW actions will not be reliable. | |
259 | * | |
260 | * The arch code can provide optimized functions in two ways: | |
261 | * | |
262 | * 1. Override the function completely. F.e. define this_cpu_add(). | |
263 | * The arch must then ensure that the various scalar format passed | |
264 | * are handled correctly. | |
265 | * | |
266 | * 2. Provide functions for certain scalar sizes. F.e. provide | |
267 | * this_cpu_add_2() to provide per cpu atomic operations for 2 byte | |
268 | * sized RMW actions. If arch code does not provide operations for | |
269 | * a scalar size then the fallback in the generic code will be | |
270 | * used. | |
271 | */ | |
272 | ||
273 | #define _this_cpu_generic_read(pcp) \ | |
274 | ({ typeof(pcp) ret__; \ | |
275 | preempt_disable(); \ | |
276 | ret__ = *this_cpu_ptr(&(pcp)); \ | |
277 | preempt_enable(); \ | |
278 | ret__; \ | |
279 | }) | |
280 | ||
281 | #ifndef this_cpu_read | |
282 | # ifndef this_cpu_read_1 | |
283 | # define this_cpu_read_1(pcp) _this_cpu_generic_read(pcp) | |
284 | # endif | |
285 | # ifndef this_cpu_read_2 | |
286 | # define this_cpu_read_2(pcp) _this_cpu_generic_read(pcp) | |
287 | # endif | |
288 | # ifndef this_cpu_read_4 | |
289 | # define this_cpu_read_4(pcp) _this_cpu_generic_read(pcp) | |
290 | # endif | |
291 | # ifndef this_cpu_read_8 | |
292 | # define this_cpu_read_8(pcp) _this_cpu_generic_read(pcp) | |
293 | # endif | |
0f5e4816 | 294 | # define this_cpu_read(pcp) __pcpu_size_call_return(this_cpu_read_, (pcp)) |
7340a0b1 CL |
295 | #endif |
296 | ||
297 | #define _this_cpu_generic_to_op(pcp, val, op) \ | |
298 | do { \ | |
933393f5 | 299 | unsigned long flags; \ |
e920d597 | 300 | raw_local_irq_save(flags); \ |
b3ca1c10 | 301 | *raw_cpu_ptr(&(pcp)) op val; \ |
e920d597 | 302 | raw_local_irq_restore(flags); \ |
7340a0b1 CL |
303 | } while (0) |
304 | ||
305 | #ifndef this_cpu_write | |
306 | # ifndef this_cpu_write_1 | |
307 | # define this_cpu_write_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), =) | |
308 | # endif | |
309 | # ifndef this_cpu_write_2 | |
310 | # define this_cpu_write_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), =) | |
311 | # endif | |
312 | # ifndef this_cpu_write_4 | |
313 | # define this_cpu_write_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), =) | |
314 | # endif | |
315 | # ifndef this_cpu_write_8 | |
316 | # define this_cpu_write_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), =) | |
317 | # endif | |
0f5e4816 | 318 | # define this_cpu_write(pcp, val) __pcpu_size_call(this_cpu_write_, (pcp), (val)) |
7340a0b1 CL |
319 | #endif |
320 | ||
321 | #ifndef this_cpu_add | |
322 | # ifndef this_cpu_add_1 | |
323 | # define this_cpu_add_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=) | |
324 | # endif | |
325 | # ifndef this_cpu_add_2 | |
326 | # define this_cpu_add_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=) | |
327 | # endif | |
328 | # ifndef this_cpu_add_4 | |
329 | # define this_cpu_add_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=) | |
330 | # endif | |
331 | # ifndef this_cpu_add_8 | |
332 | # define this_cpu_add_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=) | |
333 | # endif | |
0f5e4816 | 334 | # define this_cpu_add(pcp, val) __pcpu_size_call(this_cpu_add_, (pcp), (val)) |
7340a0b1 CL |
335 | #endif |
336 | ||
337 | #ifndef this_cpu_sub | |
bd09d9a3 | 338 | # define this_cpu_sub(pcp, val) this_cpu_add((pcp), -(typeof(pcp))(val)) |
7340a0b1 CL |
339 | #endif |
340 | ||
341 | #ifndef this_cpu_inc | |
342 | # define this_cpu_inc(pcp) this_cpu_add((pcp), 1) | |
343 | #endif | |
344 | ||
345 | #ifndef this_cpu_dec | |
346 | # define this_cpu_dec(pcp) this_cpu_sub((pcp), 1) | |
347 | #endif | |
348 | ||
349 | #ifndef this_cpu_and | |
350 | # ifndef this_cpu_and_1 | |
351 | # define this_cpu_and_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=) | |
352 | # endif | |
353 | # ifndef this_cpu_and_2 | |
354 | # define this_cpu_and_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=) | |
355 | # endif | |
356 | # ifndef this_cpu_and_4 | |
357 | # define this_cpu_and_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=) | |
358 | # endif | |
359 | # ifndef this_cpu_and_8 | |
360 | # define this_cpu_and_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=) | |
361 | # endif | |
0f5e4816 | 362 | # define this_cpu_and(pcp, val) __pcpu_size_call(this_cpu_and_, (pcp), (val)) |
7340a0b1 CL |
363 | #endif |
364 | ||
365 | #ifndef this_cpu_or | |
366 | # ifndef this_cpu_or_1 | |
367 | # define this_cpu_or_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=) | |
368 | # endif | |
369 | # ifndef this_cpu_or_2 | |
370 | # define this_cpu_or_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=) | |
371 | # endif | |
372 | # ifndef this_cpu_or_4 | |
373 | # define this_cpu_or_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=) | |
374 | # endif | |
375 | # ifndef this_cpu_or_8 | |
376 | # define this_cpu_or_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=) | |
377 | # endif | |
0f5e4816 | 378 | # define this_cpu_or(pcp, val) __pcpu_size_call(this_cpu_or_, (pcp), (val)) |
7340a0b1 CL |
379 | #endif |
380 | ||
40304775 TH |
381 | #define _this_cpu_generic_add_return(pcp, val) \ |
382 | ({ \ | |
383 | typeof(pcp) ret__; \ | |
933393f5 | 384 | unsigned long flags; \ |
e920d597 | 385 | raw_local_irq_save(flags); \ |
b3ca1c10 CL |
386 | raw_cpu_add(pcp, val); \ |
387 | ret__ = raw_cpu_read(pcp); \ | |
e920d597 | 388 | raw_local_irq_restore(flags); \ |
40304775 TH |
389 | ret__; \ |
390 | }) | |
391 | ||
392 | #ifndef this_cpu_add_return | |
393 | # ifndef this_cpu_add_return_1 | |
394 | # define this_cpu_add_return_1(pcp, val) _this_cpu_generic_add_return(pcp, val) | |
395 | # endif | |
396 | # ifndef this_cpu_add_return_2 | |
397 | # define this_cpu_add_return_2(pcp, val) _this_cpu_generic_add_return(pcp, val) | |
398 | # endif | |
399 | # ifndef this_cpu_add_return_4 | |
400 | # define this_cpu_add_return_4(pcp, val) _this_cpu_generic_add_return(pcp, val) | |
401 | # endif | |
402 | # ifndef this_cpu_add_return_8 | |
403 | # define this_cpu_add_return_8(pcp, val) _this_cpu_generic_add_return(pcp, val) | |
404 | # endif | |
405 | # define this_cpu_add_return(pcp, val) __pcpu_size_call_return2(this_cpu_add_return_, pcp, val) | |
406 | #endif | |
407 | ||
bd09d9a3 | 408 | #define this_cpu_sub_return(pcp, val) this_cpu_add_return(pcp, -(typeof(pcp))(val)) |
40304775 TH |
409 | #define this_cpu_inc_return(pcp) this_cpu_add_return(pcp, 1) |
410 | #define this_cpu_dec_return(pcp) this_cpu_add_return(pcp, -1) | |
411 | ||
2b712442 CL |
412 | #define _this_cpu_generic_xchg(pcp, nval) \ |
413 | ({ typeof(pcp) ret__; \ | |
933393f5 | 414 | unsigned long flags; \ |
e920d597 | 415 | raw_local_irq_save(flags); \ |
b3ca1c10 CL |
416 | ret__ = raw_cpu_read(pcp); \ |
417 | raw_cpu_write(pcp, nval); \ | |
e920d597 | 418 | raw_local_irq_restore(flags); \ |
2b712442 CL |
419 | ret__; \ |
420 | }) | |
421 | ||
422 | #ifndef this_cpu_xchg | |
423 | # ifndef this_cpu_xchg_1 | |
424 | # define this_cpu_xchg_1(pcp, nval) _this_cpu_generic_xchg(pcp, nval) | |
425 | # endif | |
426 | # ifndef this_cpu_xchg_2 | |
427 | # define this_cpu_xchg_2(pcp, nval) _this_cpu_generic_xchg(pcp, nval) | |
428 | # endif | |
429 | # ifndef this_cpu_xchg_4 | |
430 | # define this_cpu_xchg_4(pcp, nval) _this_cpu_generic_xchg(pcp, nval) | |
431 | # endif | |
432 | # ifndef this_cpu_xchg_8 | |
433 | # define this_cpu_xchg_8(pcp, nval) _this_cpu_generic_xchg(pcp, nval) | |
434 | # endif | |
435 | # define this_cpu_xchg(pcp, nval) \ | |
436 | __pcpu_size_call_return2(this_cpu_xchg_, (pcp), nval) | |
437 | #endif | |
438 | ||
439 | #define _this_cpu_generic_cmpxchg(pcp, oval, nval) \ | |
933393f5 CL |
440 | ({ \ |
441 | typeof(pcp) ret__; \ | |
442 | unsigned long flags; \ | |
e920d597 | 443 | raw_local_irq_save(flags); \ |
b3ca1c10 | 444 | ret__ = raw_cpu_read(pcp); \ |
2b712442 | 445 | if (ret__ == (oval)) \ |
b3ca1c10 | 446 | raw_cpu_write(pcp, nval); \ |
e920d597 | 447 | raw_local_irq_restore(flags); \ |
2b712442 CL |
448 | ret__; \ |
449 | }) | |
450 | ||
451 | #ifndef this_cpu_cmpxchg | |
452 | # ifndef this_cpu_cmpxchg_1 | |
453 | # define this_cpu_cmpxchg_1(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval) | |
454 | # endif | |
455 | # ifndef this_cpu_cmpxchg_2 | |
456 | # define this_cpu_cmpxchg_2(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval) | |
457 | # endif | |
458 | # ifndef this_cpu_cmpxchg_4 | |
459 | # define this_cpu_cmpxchg_4(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval) | |
460 | # endif | |
461 | # ifndef this_cpu_cmpxchg_8 | |
462 | # define this_cpu_cmpxchg_8(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval) | |
463 | # endif | |
464 | # define this_cpu_cmpxchg(pcp, oval, nval) \ | |
465 | __pcpu_size_call_return2(this_cpu_cmpxchg_, pcp, oval, nval) | |
466 | #endif | |
467 | ||
7c334339 CL |
468 | /* |
469 | * cmpxchg_double replaces two adjacent scalars at once. The first | |
470 | * two parameters are per cpu variables which have to be of the same | |
471 | * size. A truth value is returned to indicate success or failure | |
472 | * (since a double register result is difficult to handle). There is | |
473 | * very limited hardware support for these operations, so only certain | |
474 | * sizes may work. | |
475 | */ | |
476 | #define _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
477 | ({ \ | |
478 | int ret__; \ | |
933393f5 | 479 | unsigned long flags; \ |
e920d597 | 480 | raw_local_irq_save(flags); \ |
b3ca1c10 | 481 | ret__ = raw_cpu_generic_cmpxchg_double(pcp1, pcp2, \ |
7c334339 | 482 | oval1, oval2, nval1, nval2); \ |
e920d597 | 483 | raw_local_irq_restore(flags); \ |
7c334339 CL |
484 | ret__; \ |
485 | }) | |
486 | ||
487 | #ifndef this_cpu_cmpxchg_double | |
488 | # ifndef this_cpu_cmpxchg_double_1 | |
489 | # define this_cpu_cmpxchg_double_1(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
490 | _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) | |
491 | # endif | |
492 | # ifndef this_cpu_cmpxchg_double_2 | |
493 | # define this_cpu_cmpxchg_double_2(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
494 | _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) | |
495 | # endif | |
496 | # ifndef this_cpu_cmpxchg_double_4 | |
497 | # define this_cpu_cmpxchg_double_4(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
498 | _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) | |
499 | # endif | |
500 | # ifndef this_cpu_cmpxchg_double_8 | |
501 | # define this_cpu_cmpxchg_double_8(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
502 | _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) | |
503 | # endif | |
504 | # define this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
505 | __pcpu_double_call_return_bool(this_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2)) | |
506 | #endif | |
507 | ||
7340a0b1 | 508 | /* |
b3ca1c10 CL |
509 | * Generic percpu operations for contexts where we do not want to do |
510 | * any checks for preemptiosn. | |
7340a0b1 CL |
511 | * |
512 | * If there is no other protection through preempt disable and/or | |
513 | * disabling interupts then one of these RMW operations can show unexpected | |
514 | * behavior because the execution thread was rescheduled on another processor | |
515 | * or an interrupt occurred and the same percpu variable was modified from | |
516 | * the interrupt context. | |
517 | */ | |
b3ca1c10 CL |
518 | #ifndef raw_cpu_read |
519 | # ifndef raw_cpu_read_1 | |
520 | # define raw_cpu_read_1(pcp) (*raw_cpu_ptr(&(pcp))) | |
7340a0b1 | 521 | # endif |
b3ca1c10 CL |
522 | # ifndef raw_cpu_read_2 |
523 | # define raw_cpu_read_2(pcp) (*raw_cpu_ptr(&(pcp))) | |
7340a0b1 | 524 | # endif |
b3ca1c10 CL |
525 | # ifndef raw_cpu_read_4 |
526 | # define raw_cpu_read_4(pcp) (*raw_cpu_ptr(&(pcp))) | |
7340a0b1 | 527 | # endif |
b3ca1c10 CL |
528 | # ifndef raw_cpu_read_8 |
529 | # define raw_cpu_read_8(pcp) (*raw_cpu_ptr(&(pcp))) | |
7340a0b1 | 530 | # endif |
b3ca1c10 | 531 | # define raw_cpu_read(pcp) __pcpu_size_call_return(raw_cpu_read_, (pcp)) |
7340a0b1 CL |
532 | #endif |
533 | ||
b3ca1c10 | 534 | #define raw_cpu_generic_to_op(pcp, val, op) \ |
7340a0b1 | 535 | do { \ |
b3ca1c10 | 536 | *raw_cpu_ptr(&(pcp)) op val; \ |
7340a0b1 CL |
537 | } while (0) |
538 | ||
b3ca1c10 CL |
539 | |
540 | #ifndef raw_cpu_write | |
541 | # ifndef raw_cpu_write_1 | |
542 | # define raw_cpu_write_1(pcp, val) raw_cpu_generic_to_op((pcp), (val), =) | |
7340a0b1 | 543 | # endif |
b3ca1c10 CL |
544 | # ifndef raw_cpu_write_2 |
545 | # define raw_cpu_write_2(pcp, val) raw_cpu_generic_to_op((pcp), (val), =) | |
7340a0b1 | 546 | # endif |
b3ca1c10 CL |
547 | # ifndef raw_cpu_write_4 |
548 | # define raw_cpu_write_4(pcp, val) raw_cpu_generic_to_op((pcp), (val), =) | |
7340a0b1 | 549 | # endif |
b3ca1c10 CL |
550 | # ifndef raw_cpu_write_8 |
551 | # define raw_cpu_write_8(pcp, val) raw_cpu_generic_to_op((pcp), (val), =) | |
7340a0b1 | 552 | # endif |
b3ca1c10 | 553 | # define raw_cpu_write(pcp, val) __pcpu_size_call(raw_cpu_write_, (pcp), (val)) |
7340a0b1 CL |
554 | #endif |
555 | ||
b3ca1c10 CL |
556 | #ifndef raw_cpu_add |
557 | # ifndef raw_cpu_add_1 | |
558 | # define raw_cpu_add_1(pcp, val) raw_cpu_generic_to_op((pcp), (val), +=) | |
7340a0b1 | 559 | # endif |
b3ca1c10 CL |
560 | # ifndef raw_cpu_add_2 |
561 | # define raw_cpu_add_2(pcp, val) raw_cpu_generic_to_op((pcp), (val), +=) | |
7340a0b1 | 562 | # endif |
b3ca1c10 CL |
563 | # ifndef raw_cpu_add_4 |
564 | # define raw_cpu_add_4(pcp, val) raw_cpu_generic_to_op((pcp), (val), +=) | |
7340a0b1 | 565 | # endif |
b3ca1c10 CL |
566 | # ifndef raw_cpu_add_8 |
567 | # define raw_cpu_add_8(pcp, val) raw_cpu_generic_to_op((pcp), (val), +=) | |
7340a0b1 | 568 | # endif |
b3ca1c10 | 569 | # define raw_cpu_add(pcp, val) __pcpu_size_call(raw_cpu_add_, (pcp), (val)) |
7340a0b1 CL |
570 | #endif |
571 | ||
b3ca1c10 CL |
572 | #ifndef raw_cpu_sub |
573 | # define raw_cpu_sub(pcp, val) raw_cpu_add((pcp), -(val)) | |
7340a0b1 CL |
574 | #endif |
575 | ||
b3ca1c10 CL |
576 | #ifndef raw_cpu_inc |
577 | # define raw_cpu_inc(pcp) raw_cpu_add((pcp), 1) | |
7340a0b1 CL |
578 | #endif |
579 | ||
b3ca1c10 CL |
580 | #ifndef raw_cpu_dec |
581 | # define raw_cpu_dec(pcp) raw_cpu_sub((pcp), 1) | |
7340a0b1 CL |
582 | #endif |
583 | ||
b3ca1c10 CL |
584 | #ifndef raw_cpu_and |
585 | # ifndef raw_cpu_and_1 | |
586 | # define raw_cpu_and_1(pcp, val) raw_cpu_generic_to_op((pcp), (val), &=) | |
7340a0b1 | 587 | # endif |
b3ca1c10 CL |
588 | # ifndef raw_cpu_and_2 |
589 | # define raw_cpu_and_2(pcp, val) raw_cpu_generic_to_op((pcp), (val), &=) | |
7340a0b1 | 590 | # endif |
b3ca1c10 CL |
591 | # ifndef raw_cpu_and_4 |
592 | # define raw_cpu_and_4(pcp, val) raw_cpu_generic_to_op((pcp), (val), &=) | |
7340a0b1 | 593 | # endif |
b3ca1c10 CL |
594 | # ifndef raw_cpu_and_8 |
595 | # define raw_cpu_and_8(pcp, val) raw_cpu_generic_to_op((pcp), (val), &=) | |
7340a0b1 | 596 | # endif |
b3ca1c10 | 597 | # define raw_cpu_and(pcp, val) __pcpu_size_call(raw_cpu_and_, (pcp), (val)) |
7340a0b1 CL |
598 | #endif |
599 | ||
b3ca1c10 CL |
600 | #ifndef raw_cpu_or |
601 | # ifndef raw_cpu_or_1 | |
602 | # define raw_cpu_or_1(pcp, val) raw_cpu_generic_to_op((pcp), (val), |=) | |
7340a0b1 | 603 | # endif |
b3ca1c10 CL |
604 | # ifndef raw_cpu_or_2 |
605 | # define raw_cpu_or_2(pcp, val) raw_cpu_generic_to_op((pcp), (val), |=) | |
7340a0b1 | 606 | # endif |
b3ca1c10 CL |
607 | # ifndef raw_cpu_or_4 |
608 | # define raw_cpu_or_4(pcp, val) raw_cpu_generic_to_op((pcp), (val), |=) | |
7340a0b1 | 609 | # endif |
b3ca1c10 CL |
610 | # ifndef raw_cpu_or_8 |
611 | # define raw_cpu_or_8(pcp, val) raw_cpu_generic_to_op((pcp), (val), |=) | |
7340a0b1 | 612 | # endif |
b3ca1c10 | 613 | # define raw_cpu_or(pcp, val) __pcpu_size_call(raw_cpu_or_, (pcp), (val)) |
7340a0b1 CL |
614 | #endif |
615 | ||
b3ca1c10 | 616 | #define raw_cpu_generic_add_return(pcp, val) \ |
a663ffff | 617 | ({ \ |
b3ca1c10 CL |
618 | raw_cpu_add(pcp, val); \ |
619 | raw_cpu_read(pcp); \ | |
a663ffff CL |
620 | }) |
621 | ||
b3ca1c10 CL |
622 | #ifndef raw_cpu_add_return |
623 | # ifndef raw_cpu_add_return_1 | |
624 | # define raw_cpu_add_return_1(pcp, val) raw_cpu_generic_add_return(pcp, val) | |
a663ffff | 625 | # endif |
b3ca1c10 CL |
626 | # ifndef raw_cpu_add_return_2 |
627 | # define raw_cpu_add_return_2(pcp, val) raw_cpu_generic_add_return(pcp, val) | |
a663ffff | 628 | # endif |
b3ca1c10 CL |
629 | # ifndef raw_cpu_add_return_4 |
630 | # define raw_cpu_add_return_4(pcp, val) raw_cpu_generic_add_return(pcp, val) | |
a663ffff | 631 | # endif |
b3ca1c10 CL |
632 | # ifndef raw_cpu_add_return_8 |
633 | # define raw_cpu_add_return_8(pcp, val) raw_cpu_generic_add_return(pcp, val) | |
a663ffff | 634 | # endif |
b3ca1c10 CL |
635 | # define raw_cpu_add_return(pcp, val) \ |
636 | __pcpu_size_call_return2(raw_add_return_, pcp, val) | |
a663ffff CL |
637 | #endif |
638 | ||
b3ca1c10 CL |
639 | #define raw_cpu_sub_return(pcp, val) raw_cpu_add_return(pcp, -(typeof(pcp))(val)) |
640 | #define raw_cpu_inc_return(pcp) raw_cpu_add_return(pcp, 1) | |
641 | #define raw_cpu_dec_return(pcp) raw_cpu_add_return(pcp, -1) | |
a663ffff | 642 | |
b3ca1c10 | 643 | #define raw_cpu_generic_xchg(pcp, nval) \ |
2b712442 | 644 | ({ typeof(pcp) ret__; \ |
b3ca1c10 CL |
645 | ret__ = raw_cpu_read(pcp); \ |
646 | raw_cpu_write(pcp, nval); \ | |
2b712442 CL |
647 | ret__; \ |
648 | }) | |
649 | ||
b3ca1c10 CL |
650 | #ifndef raw_cpu_xchg |
651 | # ifndef raw_cpu_xchg_1 | |
652 | # define raw_cpu_xchg_1(pcp, nval) raw_cpu_generic_xchg(pcp, nval) | |
2b712442 | 653 | # endif |
b3ca1c10 CL |
654 | # ifndef raw_cpu_xchg_2 |
655 | # define raw_cpu_xchg_2(pcp, nval) raw_cpu_generic_xchg(pcp, nval) | |
2b712442 | 656 | # endif |
b3ca1c10 CL |
657 | # ifndef raw_cpu_xchg_4 |
658 | # define raw_cpu_xchg_4(pcp, nval) raw_cpu_generic_xchg(pcp, nval) | |
2b712442 | 659 | # endif |
b3ca1c10 CL |
660 | # ifndef raw_cpu_xchg_8 |
661 | # define raw_cpu_xchg_8(pcp, nval) raw_cpu_generic_xchg(pcp, nval) | |
2b712442 | 662 | # endif |
b3ca1c10 CL |
663 | # define raw_cpu_xchg(pcp, nval) \ |
664 | __pcpu_size_call_return2(raw_cpu_xchg_, (pcp), nval) | |
2b712442 CL |
665 | #endif |
666 | ||
b3ca1c10 | 667 | #define raw_cpu_generic_cmpxchg(pcp, oval, nval) \ |
2b712442 CL |
668 | ({ \ |
669 | typeof(pcp) ret__; \ | |
b3ca1c10 | 670 | ret__ = raw_cpu_read(pcp); \ |
2b712442 | 671 | if (ret__ == (oval)) \ |
b3ca1c10 | 672 | raw_cpu_write(pcp, nval); \ |
2b712442 CL |
673 | ret__; \ |
674 | }) | |
675 | ||
b3ca1c10 CL |
676 | #ifndef raw_cpu_cmpxchg |
677 | # ifndef raw_cpu_cmpxchg_1 | |
678 | # define raw_cpu_cmpxchg_1(pcp, oval, nval) raw_cpu_generic_cmpxchg(pcp, oval, nval) | |
2b712442 | 679 | # endif |
b3ca1c10 CL |
680 | # ifndef raw_cpu_cmpxchg_2 |
681 | # define raw_cpu_cmpxchg_2(pcp, oval, nval) raw_cpu_generic_cmpxchg(pcp, oval, nval) | |
2b712442 | 682 | # endif |
b3ca1c10 CL |
683 | # ifndef raw_cpu_cmpxchg_4 |
684 | # define raw_cpu_cmpxchg_4(pcp, oval, nval) raw_cpu_generic_cmpxchg(pcp, oval, nval) | |
2b712442 | 685 | # endif |
b3ca1c10 CL |
686 | # ifndef raw_cpu_cmpxchg_8 |
687 | # define raw_cpu_cmpxchg_8(pcp, oval, nval) raw_cpu_generic_cmpxchg(pcp, oval, nval) | |
2b712442 | 688 | # endif |
b3ca1c10 CL |
689 | # define raw_cpu_cmpxchg(pcp, oval, nval) \ |
690 | __pcpu_size_call_return2(raw_cpu_cmpxchg_, pcp, oval, nval) | |
2b712442 CL |
691 | #endif |
692 | ||
b3ca1c10 | 693 | #define raw_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ |
7c334339 CL |
694 | ({ \ |
695 | int __ret = 0; \ | |
b3ca1c10 CL |
696 | if (raw_cpu_read(pcp1) == (oval1) && \ |
697 | raw_cpu_read(pcp2) == (oval2)) { \ | |
698 | raw_cpu_write(pcp1, (nval1)); \ | |
699 | raw_cpu_write(pcp2, (nval2)); \ | |
7c334339 CL |
700 | __ret = 1; \ |
701 | } \ | |
702 | (__ret); \ | |
703 | }) | |
704 | ||
b3ca1c10 CL |
705 | #ifndef raw_cpu_cmpxchg_double |
706 | # ifndef raw_cpu_cmpxchg_double_1 | |
707 | # define raw_cpu_cmpxchg_double_1(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
708 | raw_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) | |
7c334339 | 709 | # endif |
b3ca1c10 CL |
710 | # ifndef raw_cpu_cmpxchg_double_2 |
711 | # define raw_cpu_cmpxchg_double_2(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
712 | raw_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) | |
7c334339 | 713 | # endif |
b3ca1c10 CL |
714 | # ifndef raw_cpu_cmpxchg_double_4 |
715 | # define raw_cpu_cmpxchg_double_4(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
716 | raw_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) | |
7c334339 | 717 | # endif |
b3ca1c10 CL |
718 | # ifndef raw_cpu_cmpxchg_double_8 |
719 | # define raw_cpu_cmpxchg_double_8(pcp1, pcp2, oval1, oval2, nval1, nval2) \ | |
720 | raw_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) | |
7c334339 | 721 | # endif |
b3ca1c10 CL |
722 | # define raw_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ |
723 | __pcpu_double_call_return_bool(raw_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2)) | |
724 | #endif | |
725 | ||
726 | /* | |
727 | * Generic percpu operations for context that are safe from preemption/interrupts. | |
728 | * Checks will be added here soon. | |
729 | */ | |
730 | #ifndef __this_cpu_read | |
731 | # define __this_cpu_read(pcp) __pcpu_size_call_return(raw_cpu_read_, (pcp)) | |
732 | #endif | |
733 | ||
734 | #ifndef __this_cpu_write | |
735 | # define __this_cpu_write(pcp, val) __pcpu_size_call(raw_cpu_write_, (pcp), (val)) | |
736 | #endif | |
737 | ||
738 | #ifndef __this_cpu_add | |
739 | # define __this_cpu_add(pcp, val) __pcpu_size_call(raw_cpu_add_, (pcp), (val)) | |
740 | #endif | |
741 | ||
742 | #ifndef __this_cpu_sub | |
743 | # define __this_cpu_sub(pcp, val) __this_cpu_add((pcp), -(typeof(pcp))(val)) | |
744 | #endif | |
745 | ||
746 | #ifndef __this_cpu_inc | |
747 | # define __this_cpu_inc(pcp) __this_cpu_add((pcp), 1) | |
748 | #endif | |
749 | ||
750 | #ifndef __this_cpu_dec | |
751 | # define __this_cpu_dec(pcp) __this_cpu_sub((pcp), 1) | |
752 | #endif | |
753 | ||
754 | #ifndef __this_cpu_and | |
755 | # define __this_cpu_and(pcp, val) __pcpu_size_call(raw_cpu_and_, (pcp), (val)) | |
756 | #endif | |
757 | ||
758 | #ifndef __this_cpu_or | |
759 | # define __this_cpu_or(pcp, val) __pcpu_size_call(raw_cpu_or_, (pcp), (val)) | |
760 | #endif | |
761 | ||
762 | #ifndef __this_cpu_add_return | |
763 | # define __this_cpu_add_return(pcp, val) \ | |
764 | __pcpu_size_call_return2(raw_cpu_add_return_, pcp, val) | |
765 | #endif | |
766 | ||
767 | #define __this_cpu_sub_return(pcp, val) __this_cpu_add_return(pcp, -(typeof(pcp))(val)) | |
768 | #define __this_cpu_inc_return(pcp) __this_cpu_add_return(pcp, 1) | |
769 | #define __this_cpu_dec_return(pcp) __this_cpu_add_return(pcp, -1) | |
770 | ||
771 | #ifndef __this_cpu_xchg | |
772 | # define __this_cpu_xchg(pcp, nval) \ | |
773 | __pcpu_size_call_return2(raw_cpu_xchg_, (pcp), nval) | |
774 | #endif | |
775 | ||
776 | #ifndef __this_cpu_cmpxchg | |
777 | # define __this_cpu_cmpxchg(pcp, oval, nval) \ | |
778 | __pcpu_size_call_return2(raw_cpu_cmpxchg_, pcp, oval, nval) | |
779 | #endif | |
780 | ||
781 | #ifndef __this_cpu_cmpxchg_double | |
7c334339 | 782 | # define __this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ |
b3ca1c10 | 783 | __pcpu_double_call_return_bool(raw_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2)) |
7c334339 CL |
784 | #endif |
785 | ||
1da177e4 | 786 | #endif /* __LINUX_PERCPU_H */ |