]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - include/linux/perf_counter.h
perf_counter: Add PERF_EVENT_READ
[mirror_ubuntu-bionic-kernel.git] / include / linux / perf_counter.h
CommitLineData
0793a61d
TG
1/*
2 * Performance counters:
3 *
a308444c
IM
4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
0793a61d
TG
7 *
8 * Data type definitions, declarations, prototypes.
9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
0793a61d
TG
11 *
12 * For licencing details see kernel-base/COPYING
13 */
14#ifndef _LINUX_PERF_COUNTER_H
15#define _LINUX_PERF_COUNTER_H
16
f3dfd265
PM
17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
0793a61d
TG
20
21/*
9f66a381
IM
22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
a308444c
IM
29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
b8e83514 34
a308444c 35 PERF_TYPE_MAX, /* non-ABI */
b8e83514 36};
6c594c21 37
b8e83514 38/*
a308444c
IM
39 * Generalized performance counter event types, used by the
40 * attr.event_id parameter of the sys_perf_counter_open()
41 * syscall:
b8e83514 42 */
1c432d89 43enum perf_hw_id {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
f4dbfa8f
PZ
47 PERF_COUNT_HW_CPU_CYCLES = 0,
48 PERF_COUNT_HW_INSTRUCTIONS = 1,
49 PERF_COUNT_HW_CACHE_REFERENCES = 2,
50 PERF_COUNT_HW_CACHE_MISSES = 3,
51 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_HW_BRANCH_MISSES = 5,
53 PERF_COUNT_HW_BUS_CYCLES = 6,
54
a308444c 55 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 56};
e077df4f 57
8326f44d
IM
58/*
59 * Generalized hardware cache counters:
60 *
8be6e8f3 61 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
8326f44d
IM
62 * { read, write, prefetch } x
63 * { accesses, misses }
64 */
1c432d89 65enum perf_hw_cache_id {
a308444c
IM
66 PERF_COUNT_HW_CACHE_L1D = 0,
67 PERF_COUNT_HW_CACHE_L1I = 1,
68 PERF_COUNT_HW_CACHE_LL = 2,
69 PERF_COUNT_HW_CACHE_DTLB = 3,
70 PERF_COUNT_HW_CACHE_ITLB = 4,
71 PERF_COUNT_HW_CACHE_BPU = 5,
72
73 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
8326f44d
IM
74};
75
1c432d89 76enum perf_hw_cache_op_id {
a308444c
IM
77 PERF_COUNT_HW_CACHE_OP_READ = 0,
78 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
79 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 80
a308444c 81 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
8326f44d
IM
82};
83
1c432d89
PZ
84enum perf_hw_cache_op_result_id {
85 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
86 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 87
a308444c 88 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
8326f44d
IM
89};
90
b8e83514
PZ
91/*
92 * Special "software" counters provided by the kernel, even if the hardware
93 * does not support performance counters. These counters measure various
94 * physical and sw events of the kernel (and allow the profiling of them as
95 * well):
96 */
1c432d89 97enum perf_sw_ids {
a308444c
IM
98 PERF_COUNT_SW_CPU_CLOCK = 0,
99 PERF_COUNT_SW_TASK_CLOCK = 1,
100 PERF_COUNT_SW_PAGE_FAULTS = 2,
101 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
102 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
103 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
104 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
105
106 PERF_COUNT_SW_MAX, /* non-ABI */
0793a61d
TG
107};
108
8a057d84 109/*
0d48696f 110 * Bits that can be set in attr.sample_type to request information
8a057d84
PZ
111 * in the overflow packets.
112 */
b23f3325 113enum perf_counter_sample_format {
a308444c
IM
114 PERF_SAMPLE_IP = 1U << 0,
115 PERF_SAMPLE_TID = 1U << 1,
116 PERF_SAMPLE_TIME = 1U << 2,
117 PERF_SAMPLE_ADDR = 1U << 3,
118 PERF_SAMPLE_GROUP = 1U << 4,
119 PERF_SAMPLE_CALLCHAIN = 1U << 5,
120 PERF_SAMPLE_ID = 1U << 6,
121 PERF_SAMPLE_CPU = 1U << 7,
122 PERF_SAMPLE_PERIOD = 1U << 8,
974802ea
PZ
123
124 PERF_SAMPLE_MAX = 1U << 9, /* non-ABI */
8a057d84
PZ
125};
126
53cfbf59 127/*
0d48696f 128 * Bits that can be set in attr.read_format to request that
53cfbf59
PM
129 * reads on the counter should return the indicated quantities,
130 * in increasing order of bit value, after the counter value.
131 */
132enum perf_counter_read_format {
a308444c
IM
133 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
134 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
135 PERF_FORMAT_ID = 1U << 2,
974802ea
PZ
136
137 PERF_FORMAT_MAX = 1U << 3, /* non-ABI */
53cfbf59
PM
138};
139
974802ea
PZ
140#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
141
9f66a381
IM
142/*
143 * Hardware event to monitor via a performance monitoring counter:
144 */
0d48696f 145struct perf_counter_attr {
974802ea 146
f4a2deb4 147 /*
a21ca2ca
IM
148 * Major type: hardware/software/tracepoint/etc.
149 */
150 __u32 type;
974802ea
PZ
151
152 /*
153 * Size of the attr structure, for fwd/bwd compat.
154 */
155 __u32 size;
a21ca2ca
IM
156
157 /*
158 * Type specific configuration information.
f4a2deb4
PZ
159 */
160 __u64 config;
9f66a381 161
60db5e09 162 union {
b23f3325
PZ
163 __u64 sample_period;
164 __u64 sample_freq;
60db5e09
PZ
165 };
166
b23f3325
PZ
167 __u64 sample_type;
168 __u64 read_format;
9f66a381 169
2743a5b0 170 __u64 disabled : 1, /* off by default */
0475f9ea
PM
171 inherit : 1, /* children inherit it */
172 pinned : 1, /* must always be on PMU */
173 exclusive : 1, /* only group on PMU */
174 exclude_user : 1, /* don't count user */
175 exclude_kernel : 1, /* ditto kernel */
176 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 177 exclude_idle : 1, /* don't count when idle */
0a4a9391 178 mmap : 1, /* include mmap data */
8d1b2d93 179 comm : 1, /* include comm data */
60db5e09 180 freq : 1, /* use freq, not period */
0475f9ea 181
974802ea 182 __reserved_1 : 53;
2743a5b0 183
c457810a 184 __u32 wakeup_events; /* wakeup every n events */
974802ea 185 __u32 __reserved_2;
9f66a381 186
974802ea 187 __u64 __reserved_3;
eab656ae
TG
188};
189
d859e29f
PM
190/*
191 * Ioctls that can be done on a perf counter fd:
192 */
08247e31
PZ
193#define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
194#define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
195#define PERF_COUNTER_IOC_REFRESH _IO ('$', 2)
196#define PERF_COUNTER_IOC_RESET _IO ('$', 3)
197#define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64)
3df5edad
PZ
198
199enum perf_counter_ioc_flags {
200 PERF_IOC_FLAG_GROUP = 1U << 0,
201};
d859e29f 202
37d81828
PM
203/*
204 * Structure of the page that can be mapped via mmap
205 */
206struct perf_counter_mmap_page {
207 __u32 version; /* version number of this structure */
208 __u32 compat_version; /* lowest version this is compat with */
38ff667b
PZ
209
210 /*
211 * Bits needed to read the hw counters in user-space.
212 *
92f22a38
PZ
213 * u32 seq;
214 * s64 count;
38ff667b 215 *
a2e87d06
PZ
216 * do {
217 * seq = pc->lock;
38ff667b 218 *
a2e87d06
PZ
219 * barrier()
220 * if (pc->index) {
221 * count = pmc_read(pc->index - 1);
222 * count += pc->offset;
223 * } else
224 * goto regular_read;
38ff667b 225 *
a2e87d06
PZ
226 * barrier();
227 * } while (pc->lock != seq);
38ff667b 228 *
92f22a38
PZ
229 * NOTE: for obvious reason this only works on self-monitoring
230 * processes.
38ff667b 231 */
37d81828
PM
232 __u32 lock; /* seqlock for synchronization */
233 __u32 index; /* hardware counter identifier */
234 __s64 offset; /* add to hardware counter value */
7f8b4e4e
PZ
235 __u64 time_enabled; /* time counter active */
236 __u64 time_running; /* time counter on cpu */
7b732a75 237
41f95331
PZ
238 /*
239 * Hole for extension of the self monitor capabilities
240 */
241
7f8b4e4e 242 __u64 __reserved[123]; /* align to 1k */
41f95331 243
38ff667b
PZ
244 /*
245 * Control data for the mmap() data buffer.
246 *
43a21ea8
PZ
247 * User-space reading the @data_head value should issue an rmb(), on
248 * SMP capable platforms, after reading this value -- see
249 * perf_counter_wakeup().
250 *
251 * When the mapping is PROT_WRITE the @data_tail value should be
252 * written by userspace to reflect the last read data. In this case
253 * the kernel will not over-write unread data.
38ff667b 254 */
8e3747c1 255 __u64 data_head; /* head in the data section */
43a21ea8 256 __u64 data_tail; /* user-space written tail */
37d81828
PM
257};
258
a308444c
IM
259#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
260#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
261#define PERF_EVENT_MISC_KERNEL (1 << 0)
262#define PERF_EVENT_MISC_USER (2 << 0)
263#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
264#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
6fab0192 265
5c148194
PZ
266struct perf_event_header {
267 __u32 type;
6fab0192
PZ
268 __u16 misc;
269 __u16 size;
5c148194
PZ
270};
271
272enum perf_event_type {
5ed00415 273
0c593b34
PZ
274 /*
275 * The MMAP events record the PROT_EXEC mappings so that we can
276 * correlate userspace IPs to code. They have the following structure:
277 *
278 * struct {
0127c3ea 279 * struct perf_event_header header;
0c593b34 280 *
0127c3ea
IM
281 * u32 pid, tid;
282 * u64 addr;
283 * u64 len;
284 * u64 pgoff;
285 * char filename[];
0c593b34
PZ
286 * };
287 */
8a057d84 288 PERF_EVENT_MMAP = 1,
0a4a9391 289
43a21ea8
PZ
290 /*
291 * struct {
292 * struct perf_event_header header;
293 * u64 id;
294 * u64 lost;
295 * };
296 */
297 PERF_EVENT_LOST = 2,
298
8d1b2d93
PZ
299 /*
300 * struct {
0127c3ea 301 * struct perf_event_header header;
8d1b2d93 302 *
0127c3ea
IM
303 * u32 pid, tid;
304 * char comm[];
8d1b2d93
PZ
305 * };
306 */
307 PERF_EVENT_COMM = 3,
308
26b119bc
PZ
309 /*
310 * struct {
0127c3ea
IM
311 * struct perf_event_header header;
312 * u64 time;
689802b2 313 * u64 id;
b23f3325 314 * u64 sample_period;
26b119bc
PZ
315 * };
316 */
317 PERF_EVENT_PERIOD = 4,
318
a78ac325
PZ
319 /*
320 * struct {
0127c3ea
IM
321 * struct perf_event_header header;
322 * u64 time;
cca3f454 323 * u64 id;
a78ac325
PZ
324 * };
325 */
326 PERF_EVENT_THROTTLE = 5,
327 PERF_EVENT_UNTHROTTLE = 6,
328
60313ebe
PZ
329 /*
330 * struct {
a21ca2ca
IM
331 * struct perf_event_header header;
332 * u32 pid, ppid;
60313ebe
PZ
333 * };
334 */
335 PERF_EVENT_FORK = 7,
336
38b200d6
PZ
337 /*
338 * struct {
339 * struct perf_event_header header;
340 * u32 pid, tid;
341 * u64 value;
342 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
343 * { u64 time_running; } && PERF_FORMAT_RUNNING
344 * { u64 parent_id; } && PERF_FORMAT_ID
345 * };
346 */
347 PERF_EVENT_READ = 8,
348
8a057d84 349 /*
6b6e5486 350 * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
43a21ea8 351 * will be PERF_SAMPLE_*
0c593b34
PZ
352 *
353 * struct {
0127c3ea 354 * struct perf_event_header header;
0c593b34 355 *
43a21ea8
PZ
356 * { u64 ip; } && PERF_SAMPLE_IP
357 * { u32 pid, tid; } && PERF_SAMPLE_TID
358 * { u64 time; } && PERF_SAMPLE_TIME
359 * { u64 addr; } && PERF_SAMPLE_ADDR
360 * { u64 config; } && PERF_SAMPLE_CONFIG
361 * { u32 cpu, res; } && PERF_SAMPLE_CPU
0c593b34 362 *
0127c3ea 363 * { u64 nr;
43a21ea8 364 * { u64 id, val; } cnt[nr]; } && PERF_SAMPLE_GROUP
0c593b34 365 *
f9188e02 366 * { u64 nr,
43a21ea8 367 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
0c593b34 368 * };
8a057d84 369 */
5c148194
PZ
370};
371
f9188e02
PZ
372enum perf_callchain_context {
373 PERF_CONTEXT_HV = (__u64)-32,
374 PERF_CONTEXT_KERNEL = (__u64)-128,
375 PERF_CONTEXT_USER = (__u64)-512,
7522060c 376
f9188e02
PZ
377 PERF_CONTEXT_GUEST = (__u64)-2048,
378 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
379 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
380
381 PERF_CONTEXT_MAX = (__u64)-4095,
7522060c
IM
382};
383
f3dfd265 384#ifdef __KERNEL__
9f66a381 385/*
f3dfd265 386 * Kernel-internal data types and definitions:
9f66a381
IM
387 */
388
f3dfd265
PM
389#ifdef CONFIG_PERF_COUNTERS
390# include <asm/perf_counter.h>
391#endif
392
393#include <linux/list.h>
394#include <linux/mutex.h>
395#include <linux/rculist.h>
396#include <linux/rcupdate.h>
397#include <linux/spinlock.h>
d6d020e9 398#include <linux/hrtimer.h>
3c446b3d 399#include <linux/fs.h>
709e50cf 400#include <linux/pid_namespace.h>
f3dfd265
PM
401#include <asm/atomic.h>
402
f9188e02
PZ
403#define PERF_MAX_STACK_DEPTH 255
404
405struct perf_callchain_entry {
406 __u64 nr;
407 __u64 ip[PERF_MAX_STACK_DEPTH];
408};
409
f3dfd265
PM
410struct task_struct;
411
0793a61d 412/**
9f66a381 413 * struct hw_perf_counter - performance counter hardware details:
0793a61d
TG
414 */
415struct hw_perf_counter {
ee06094f 416#ifdef CONFIG_PERF_COUNTERS
d6d020e9
PZ
417 union {
418 struct { /* hardware */
a308444c
IM
419 u64 config;
420 unsigned long config_base;
421 unsigned long counter_base;
422 int idx;
d6d020e9
PZ
423 };
424 union { /* software */
a308444c
IM
425 atomic64_t count;
426 struct hrtimer hrtimer;
d6d020e9
PZ
427 };
428 };
ee06094f 429 atomic64_t prev_count;
b23f3325 430 u64 sample_period;
9e350de3 431 u64 last_period;
ee06094f 432 atomic64_t period_left;
60db5e09 433 u64 interrupts;
6a24ed6c
PZ
434
435 u64 freq_count;
436 u64 freq_interrupts;
bd2b5b12 437 u64 freq_stamp;
ee06094f 438#endif
0793a61d
TG
439};
440
621a01ea
IM
441struct perf_counter;
442
443/**
4aeb0b42 444 * struct pmu - generic performance monitoring unit
621a01ea 445 */
4aeb0b42 446struct pmu {
95cdd2e7 447 int (*enable) (struct perf_counter *counter);
7671581f
IM
448 void (*disable) (struct perf_counter *counter);
449 void (*read) (struct perf_counter *counter);
a78ac325 450 void (*unthrottle) (struct perf_counter *counter);
621a01ea
IM
451};
452
6a930700
IM
453/**
454 * enum perf_counter_active_state - the states of a counter
455 */
456enum perf_counter_active_state {
3b6f9e5c 457 PERF_COUNTER_STATE_ERROR = -2,
6a930700
IM
458 PERF_COUNTER_STATE_OFF = -1,
459 PERF_COUNTER_STATE_INACTIVE = 0,
460 PERF_COUNTER_STATE_ACTIVE = 1,
461};
462
9b51f66d
IM
463struct file;
464
7b732a75
PZ
465struct perf_mmap_data {
466 struct rcu_head rcu_head;
8740f941 467 int nr_pages; /* nr of data pages */
43a21ea8 468 int writable; /* are we writable */
c5078f78 469 int nr_locked; /* nr pages mlocked */
8740f941 470
c33a0bc4 471 atomic_t poll; /* POLL_ for wakeups */
8740f941
PZ
472 atomic_t events; /* event limit */
473
8e3747c1
PZ
474 atomic_long_t head; /* write position */
475 atomic_long_t done_head; /* completed head */
476
c33a0bc4 477 atomic_t lock; /* concurrent writes */
c66de4a5 478 atomic_t wakeup; /* needs a wakeup */
43a21ea8 479 atomic_t lost; /* nr records lost */
c66de4a5 480
7b732a75 481 struct perf_counter_mmap_page *user_page;
0127c3ea 482 void *data_pages[0];
7b732a75
PZ
483};
484
671dec5d
PZ
485struct perf_pending_entry {
486 struct perf_pending_entry *next;
487 void (*func)(struct perf_pending_entry *);
925d519a
PZ
488};
489
0793a61d
TG
490/**
491 * struct perf_counter - performance counter kernel representation:
492 */
493struct perf_counter {
ee06094f 494#ifdef CONFIG_PERF_COUNTERS
04289bb9 495 struct list_head list_entry;
592903cd 496 struct list_head event_entry;
04289bb9 497 struct list_head sibling_list;
0127c3ea 498 int nr_siblings;
04289bb9 499 struct perf_counter *group_leader;
4aeb0b42 500 const struct pmu *pmu;
04289bb9 501
6a930700 502 enum perf_counter_active_state state;
0793a61d 503 atomic64_t count;
ee06094f 504
53cfbf59
PM
505 /*
506 * These are the total time in nanoseconds that the counter
507 * has been enabled (i.e. eligible to run, and the task has
508 * been scheduled in, if this is a per-task counter)
509 * and running (scheduled onto the CPU), respectively.
510 *
511 * They are computed from tstamp_enabled, tstamp_running and
512 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
513 */
514 u64 total_time_enabled;
515 u64 total_time_running;
516
517 /*
518 * These are timestamps used for computing total_time_enabled
519 * and total_time_running when the counter is in INACTIVE or
520 * ACTIVE state, measured in nanoseconds from an arbitrary point
521 * in time.
522 * tstamp_enabled: the notional time when the counter was enabled
523 * tstamp_running: the notional time when the counter was scheduled on
524 * tstamp_stopped: in INACTIVE state, the notional time when the
525 * counter was scheduled off.
526 */
527 u64 tstamp_enabled;
528 u64 tstamp_running;
529 u64 tstamp_stopped;
530
0d48696f 531 struct perf_counter_attr attr;
0793a61d
TG
532 struct hw_perf_counter hw;
533
534 struct perf_counter_context *ctx;
9b51f66d 535 struct file *filp;
0793a61d 536
53cfbf59
PM
537 /*
538 * These accumulate total time (in nanoseconds) that children
539 * counters have been enabled and running, respectively.
540 */
541 atomic64_t child_total_time_enabled;
542 atomic64_t child_total_time_running;
543
0793a61d 544 /*
d859e29f 545 * Protect attach/detach and child_list:
0793a61d 546 */
fccc714b
PZ
547 struct mutex child_mutex;
548 struct list_head child_list;
549 struct perf_counter *parent;
0793a61d
TG
550
551 int oncpu;
552 int cpu;
553
082ff5a2
PZ
554 struct list_head owner_entry;
555 struct task_struct *owner;
556
7b732a75
PZ
557 /* mmap bits */
558 struct mutex mmap_mutex;
559 atomic_t mmap_count;
560 struct perf_mmap_data *data;
37d81828 561
7b732a75 562 /* poll related */
0793a61d 563 wait_queue_head_t waitq;
3c446b3d 564 struct fasync_struct *fasync;
79f14641
PZ
565
566 /* delayed work for NMIs and such */
567 int pending_wakeup;
4c9e2542 568 int pending_kill;
79f14641 569 int pending_disable;
671dec5d 570 struct perf_pending_entry pending;
592903cd 571
79f14641
PZ
572 atomic_t event_limit;
573
e077df4f 574 void (*destroy)(struct perf_counter *);
592903cd 575 struct rcu_head rcu_head;
709e50cf
PZ
576
577 struct pid_namespace *ns;
8e5799b1 578 u64 id;
ee06094f 579#endif
0793a61d
TG
580};
581
582/**
583 * struct perf_counter_context - counter context structure
584 *
585 * Used as a container for task counters and CPU counters as well:
586 */
587struct perf_counter_context {
0793a61d 588 /*
d859e29f
PM
589 * Protect the states of the counters in the list,
590 * nr_active, and the list:
0793a61d 591 */
a308444c 592 spinlock_t lock;
d859e29f
PM
593 /*
594 * Protect the list of counters. Locking either mutex or lock
595 * is sufficient to ensure the list doesn't change; to change
596 * the list you need to lock both the mutex and the spinlock.
597 */
a308444c 598 struct mutex mutex;
04289bb9 599
a308444c
IM
600 struct list_head counter_list;
601 struct list_head event_list;
602 int nr_counters;
603 int nr_active;
604 int is_active;
605 atomic_t refcount;
606 struct task_struct *task;
53cfbf59
PM
607
608 /*
4af4998b 609 * Context clock, runs when context enabled.
53cfbf59 610 */
a308444c
IM
611 u64 time;
612 u64 timestamp;
564c2b21
PM
613
614 /*
615 * These fields let us detect when two contexts have both
616 * been cloned (inherited) from a common ancestor.
617 */
a308444c
IM
618 struct perf_counter_context *parent_ctx;
619 u64 parent_gen;
620 u64 generation;
621 int pin_count;
622 struct rcu_head rcu_head;
0793a61d
TG
623};
624
625/**
626 * struct perf_counter_cpu_context - per cpu counter context structure
627 */
628struct perf_cpu_context {
629 struct perf_counter_context ctx;
630 struct perf_counter_context *task_ctx;
631 int active_oncpu;
632 int max_pertask;
3b6f9e5c 633 int exclusive;
96f6d444
PZ
634
635 /*
636 * Recursion avoidance:
637 *
638 * task, softirq, irq, nmi context
639 */
22a4f650 640 int recursion[4];
0793a61d
TG
641};
642
829b42dd
RR
643#ifdef CONFIG_PERF_COUNTERS
644
0793a61d
TG
645/*
646 * Set by architecture code:
647 */
648extern int perf_max_counters;
649
4aeb0b42 650extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
621a01ea 651
0793a61d 652extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
564c2b21
PM
653extern void perf_counter_task_sched_out(struct task_struct *task,
654 struct task_struct *next, int cpu);
0793a61d 655extern void perf_counter_task_tick(struct task_struct *task, int cpu);
6ab423e0 656extern int perf_counter_init_task(struct task_struct *child);
9b51f66d 657extern void perf_counter_exit_task(struct task_struct *child);
bbbee908 658extern void perf_counter_free_task(struct task_struct *task);
9974458e 659extern void set_perf_counter_pending(void);
925d519a 660extern void perf_counter_do_pending(void);
0793a61d 661extern void perf_counter_print_debug(void);
9e35ad38
PZ
662extern void __perf_disable(void);
663extern bool __perf_enable(void);
664extern void perf_disable(void);
665extern void perf_enable(void);
1d1c7ddb
IM
666extern int perf_counter_task_disable(void);
667extern int perf_counter_task_enable(void);
3cbed429
PM
668extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
669 struct perf_cpu_context *cpuctx,
670 struct perf_counter_context *ctx, int cpu);
37d81828 671extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124 672
df1a132b 673struct perf_sample_data {
a308444c
IM
674 struct pt_regs *regs;
675 u64 addr;
676 u64 period;
df1a132b
PZ
677};
678
679extern int perf_counter_overflow(struct perf_counter *counter, int nmi,
680 struct perf_sample_data *data);
681
3b6f9e5c
PM
682/*
683 * Return 1 for a software counter, 0 for a hardware counter
684 */
685static inline int is_software_counter(struct perf_counter *counter)
686{
a21ca2ca 687 return (counter->attr.type != PERF_TYPE_RAW) &&
f1a3c979
PZ
688 (counter->attr.type != PERF_TYPE_HARDWARE) &&
689 (counter->attr.type != PERF_TYPE_HW_CACHE);
3b6f9e5c
PM
690}
691
f29ac756
PZ
692extern atomic_t perf_swcounter_enabled[PERF_COUNT_SW_MAX];
693
694extern void __perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
695
696static inline void
697perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs, u64 addr)
698{
699 if (atomic_read(&perf_swcounter_enabled[event]))
700 __perf_swcounter_event(event, nr, nmi, regs, addr);
701}
15dbf27c 702
089dd79d
PZ
703extern void __perf_counter_mmap(struct vm_area_struct *vma);
704
705static inline void perf_counter_mmap(struct vm_area_struct *vma)
706{
707 if (vma->vm_flags & VM_EXEC)
708 __perf_counter_mmap(vma);
709}
0a4a9391 710
8d1b2d93 711extern void perf_counter_comm(struct task_struct *tsk);
60313ebe 712extern void perf_counter_fork(struct task_struct *tsk);
8d1b2d93 713
394ee076
PZ
714extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
715
0764771d 716extern int sysctl_perf_counter_paranoid;
c5078f78 717extern int sysctl_perf_counter_mlock;
df58ab24 718extern int sysctl_perf_counter_sample_rate;
1ccd1549 719
0d905bca
IM
720extern void perf_counter_init(void);
721
9d23a90a
PM
722#ifndef perf_misc_flags
723#define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
724 PERF_EVENT_MISC_KERNEL)
725#define perf_instruction_pointer(regs) instruction_pointer(regs)
726#endif
727
0793a61d
TG
728#else
729static inline void
730perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
731static inline void
910431c7
IM
732perf_counter_task_sched_out(struct task_struct *task,
733 struct task_struct *next, int cpu) { }
0793a61d
TG
734static inline void
735perf_counter_task_tick(struct task_struct *task, int cpu) { }
d3e78ee3 736static inline int perf_counter_init_task(struct task_struct *child) { return 0; }
9b51f66d 737static inline void perf_counter_exit_task(struct task_struct *child) { }
bbbee908 738static inline void perf_counter_free_task(struct task_struct *task) { }
925d519a 739static inline void perf_counter_do_pending(void) { }
0793a61d 740static inline void perf_counter_print_debug(void) { }
9e35ad38
PZ
741static inline void perf_disable(void) { }
742static inline void perf_enable(void) { }
1d1c7ddb
IM
743static inline int perf_counter_task_disable(void) { return -EINVAL; }
744static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c 745
925d519a 746static inline void
78f13e95
PZ
747perf_swcounter_event(u32 event, u64 nr, int nmi,
748 struct pt_regs *regs, u64 addr) { }
0a4a9391 749
089dd79d 750static inline void perf_counter_mmap(struct vm_area_struct *vma) { }
8d1b2d93 751static inline void perf_counter_comm(struct task_struct *tsk) { }
60313ebe 752static inline void perf_counter_fork(struct task_struct *tsk) { }
0d905bca 753static inline void perf_counter_init(void) { }
0793a61d
TG
754#endif
755
f3dfd265 756#endif /* __KERNEL__ */
0793a61d 757#endif /* _LINUX_PERF_COUNTER_H */