[mirror_ubuntu-artful-kernel.git] / include / linux / perf_counter.h

/*
 *  Performance counters:
 *
 *   Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
 *   Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
 *
 *  Data type definitions, declarations, prototypes.
 *
 *  Started by: Thomas Gleixner and Ingo Molnar
 *
 *  For licencing details see kernel-base/COPYING
 */
#ifndef _LINUX_PERF_COUNTER_H
#define _LINUX_PERF_COUNTER_H

#include <linux/types.h>
#include <linux/ioctl.h>
#include <asm/byteorder.h>

/*
 * User-space ABI bits:
 */

/*
 * hw_event.type
 */
enum perf_event_types {
	PERF_TYPE_HARDWARE		= 0,
	PERF_TYPE_SOFTWARE		= 1,
	PERF_TYPE_TRACEPOINT		= 2,

	/*
	 * available TYPE space, raw is the max value.
	 */

	PERF_TYPE_RAW			= 128,
};

/*
 * Generalized performance counter event types, used by the hw_event.event_id
 * parameter of the sys_perf_counter_open() syscall:
 */
enum hw_event_ids {
	/*
	 * Common hardware events, generalized by the kernel:
	 */
	PERF_COUNT_CPU_CYCLES		= 0,
	PERF_COUNT_INSTRUCTIONS		= 1,
	PERF_COUNT_CACHE_REFERENCES	= 2,
	PERF_COUNT_CACHE_MISSES		= 3,
	PERF_COUNT_BRANCH_INSTRUCTIONS	= 4,
	PERF_COUNT_BRANCH_MISSES	= 5,
	PERF_COUNT_BUS_CYCLES		= 6,

	PERF_HW_EVENTS_MAX		= 7,
};

/*
 * Special "software" counters provided by the kernel, even if the hardware
 * does not support performance counters. These counters measure various
 * physical and sw events of the kernel (and allow the profiling of them as
 * well):
 */
enum sw_event_ids {
	PERF_COUNT_CPU_CLOCK		= 0,
	PERF_COUNT_TASK_CLOCK		= 1,
	PERF_COUNT_PAGE_FAULTS		= 2,
	PERF_COUNT_CONTEXT_SWITCHES	= 3,
	PERF_COUNT_CPU_MIGRATIONS	= 4,
	PERF_COUNT_PAGE_FAULTS_MIN	= 5,
	PERF_COUNT_PAGE_FAULTS_MAJ	= 6,

	PERF_SW_EVENTS_MAX		= 7,
};

#define __PERF_COUNTER_MASK(name) 			\
	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) <<	\
	 PERF_COUNTER_##name##_SHIFT)

#define PERF_COUNTER_RAW_BITS		1
#define PERF_COUNTER_RAW_SHIFT		63
#define PERF_COUNTER_RAW_MASK		__PERF_COUNTER_MASK(RAW)

#define PERF_COUNTER_CONFIG_BITS	63
#define PERF_COUNTER_CONFIG_SHIFT	0
#define PERF_COUNTER_CONFIG_MASK	__PERF_COUNTER_MASK(CONFIG)

#define PERF_COUNTER_TYPE_BITS		7
#define PERF_COUNTER_TYPE_SHIFT		56
#define PERF_COUNTER_TYPE_MASK		__PERF_COUNTER_MASK(TYPE)

#define PERF_COUNTER_EVENT_BITS		56
#define PERF_COUNTER_EVENT_SHIFT	0
#define PERF_COUNTER_EVENT_MASK		__PERF_COUNTER_MASK(EVENT)

/*
 * Bits that can be set in hw_event.record_type to request information
 * in the overflow packets.
 */
enum perf_counter_record_format {
	PERF_RECORD_IP		= 1U << 0,
	PERF_RECORD_TID		= 1U << 1,
	PERF_RECORD_TIME	= 1U << 2,
	PERF_RECORD_ADDR	= 1U << 3,
	PERF_RECORD_GROUP	= 1U << 4,
	PERF_RECORD_CALLCHAIN	= 1U << 5,
};

/*
 * Bits that can be set in hw_event.read_format to request that
 * reads on the counter should return the indicated quantities,
 * in increasing order of bit value, after the counter value.
 */
enum perf_counter_read_format {
	PERF_FORMAT_TOTAL_TIME_ENABLED	=  1,
	PERF_FORMAT_TOTAL_TIME_RUNNING	=  2,
};

/*
 * Hardware event to monitor via a performance monitoring counter:
 */
struct perf_counter_hw_event {
	/*
	 * The MSB of the config word signifies if the rest contains cpu
	 * specific (raw) counter configuration data, if unset, the next
	 * 7 bits are an event type and the rest of the bits are the event
	 * identifier.
	 */
	__u64			config;

	__u64			irq_period;
	__u32			record_type;
	__u32			read_format;

	__u64			disabled       :  1, /* off by default        */
				nmi	       :  1, /* NMI sampling          */
				inherit	       :  1, /* children inherit it   */
				pinned	       :  1, /* must always be on PMU */
				exclusive      :  1, /* only group on PMU     */
				exclude_user   :  1, /* don't count user      */
				exclude_kernel :  1, /* ditto kernel          */
				exclude_hv     :  1, /* ditto hypervisor      */
				exclude_idle   :  1, /* don't count when idle */
				mmap           :  1, /* include mmap data     */
				munmap         :  1, /* include munmap data   */
				comm	       :  1, /* include comm data     */

				__reserved_1   : 52;

	__u32			extra_config_len;
	__u32			wakeup_events;	/* wakeup every n events */

	__u64			__reserved_2;
	__u64			__reserved_3;
};

/*
 * Ioctls that can be done on a perf counter fd:
 */
#define PERF_COUNTER_IOC_ENABLE		_IOW('$', 0, u32)
#define PERF_COUNTER_IOC_DISABLE	_IOW('$', 1, u32)
#define PERF_COUNTER_IOC_REFRESH	_IOW('$', 2, u32)
#define PERF_COUNTER_IOC_RESET		_IOW('$', 3, u32)

enum perf_counter_ioc_flags {
	PERF_IOC_FLAG_GROUP		= 1U << 0,
};

/*
 * Structure of the page that can be mapped via mmap
 */
struct perf_counter_mmap_page {
	__u32	version;		/* version number of this structure */
	__u32	compat_version;		/* lowest version this is compat with */

	/*
	 * Bits needed to read the hw counters in user-space.
	 *
	 *   u32 seq;
	 *   s64 count;
	 *
	 *   do {
	 *     seq = pc->lock;
	 *
	 *     barrier()
	 *     if (pc->index) {
	 *       count = pmc_read(pc->index - 1);
	 *       count += pc->offset;
	 *     } else
	 *       goto regular_read;
	 *
	 *     barrier();
	 *   } while (pc->lock != seq);
	 *
	 * NOTE: for obvious reason this only works on self-monitoring
	 *       processes.
	 */
	__u32	lock;			/* seqlock for synchronization */
	__u32	index;			/* hardware counter identifier */
	__s64	offset;			/* add to hardware counter value */

	/*
	 * Control data for the mmap() data buffer.
	 *
	 * User-space reading this value should issue an rmb(), on SMP capable
	 * platforms, after reading this value -- see perf_counter_wakeup().
	 */
	__u32   data_head;		/* head in the data section */
};

#define PERF_EVENT_MISC_KERNEL		(1 << 0)
#define PERF_EVENT_MISC_USER		(1 << 1)
#define PERF_EVENT_MISC_OVERFLOW	(1 << 2)

struct perf_event_header {
	__u32	type;
	__u16	misc;
	__u16	size;
};

enum perf_event_type {

	/*
	 * The MMAP events record the PROT_EXEC mappings so that we can
	 * correlate userspace IPs to code. They have the following structure:
	 *
	 * struct {
	 * 	struct perf_event_header	header;
	 *
	 * 	u32				pid, tid;
	 * 	u64				addr;
	 * 	u64				len;
	 * 	u64				pgoff;
	 * 	char				filename[];
	 * };
	 */
	PERF_EVENT_MMAP			= 1,
	PERF_EVENT_MUNMAP		= 2,

	/*
	 * struct {
	 * 	struct perf_event_header	header;
	 *
	 * 	u32				pid, tid;
	 * 	char				comm[];
	 * };
	 */
	PERF_EVENT_COMM			= 3,

	/*
	 * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
	 * will be PERF_RECORD_*
	 *
	 * struct {
	 * 	struct perf_event_header	header;
	 *
	 * 	{ u64			ip;	  } && PERF_RECORD_IP
	 * 	{ u32			pid, tid; } && PERF_RECORD_TID
	 * 	{ u64			time;     } && PERF_RECORD_TIME
	 * 	{ u64			addr;     } && PERF_RECORD_ADDR
	 *
	 * 	{ u64			nr;
	 * 	  { u64 event, val; } 	cnt[nr];  } && PERF_RECORD_GROUP
	 *
	 * 	{ u16			nr,
	 * 				hv,
	 * 				kernel,
	 * 				user;
	 * 	  u64			ips[nr];  } && PERF_RECORD_CALLCHAIN
	 * };
	 */
};

#ifdef __KERNEL__
/*
 * Kernel-internal data types and definitions:
 */

#ifdef CONFIG_PERF_COUNTERS
# include <asm/perf_counter.h>
#endif

#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/rculist.h>
#include <linux/rcupdate.h>
#include <linux/spinlock.h>
#include <linux/hrtimer.h>
#include <linux/fs.h>
#include <asm/atomic.h>

struct task_struct;

static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_RAW_MASK;
}

static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
}

static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
{
	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
		PERF_COUNTER_TYPE_SHIFT;
}

static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_EVENT_MASK;
}

/**
 * struct hw_perf_counter - performance counter hardware details:
 */
struct hw_perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	union {
		struct { /* hardware */
			u64				config;
			unsigned long			config_base;
			unsigned long			counter_base;
			int				nmi;
			int				idx;
		};
		union { /* software */
			atomic64_t			count;
			struct hrtimer			hrtimer;
		};
	};
	atomic64_t			prev_count;
	u64				irq_period;
	atomic64_t			period_left;
#endif
};

struct perf_counter;

/**
 * struct pmu - generic performance monitoring unit
 */
struct pmu {
	int (*enable)			(struct perf_counter *counter);
	void (*disable)			(struct perf_counter *counter);
	void (*read)			(struct perf_counter *counter);
};

/**
 * enum perf_counter_active_state - the states of a counter
 */
enum perf_counter_active_state {
	PERF_COUNTER_STATE_ERROR	= -2,
	PERF_COUNTER_STATE_OFF		= -1,
	PERF_COUNTER_STATE_INACTIVE	=  0,
	PERF_COUNTER_STATE_ACTIVE	=  1,
};

struct file;

struct perf_mmap_data {
	struct rcu_head			rcu_head;
	int				nr_pages;	/* nr of data pages  */
	int				nr_locked;	/* nr pages mlocked  */

	atomic_t			poll;		/* POLL_ for wakeups */
	atomic_t			head;		/* write position    */
	atomic_t			events;		/* event limit       */

	atomic_t			done_head;	/* completed head    */
	atomic_t			lock;		/* concurrent writes */

	atomic_t			wakeup;		/* needs a wakeup    */

	struct perf_counter_mmap_page   *user_page;
	void 				*data_pages[0];
};

struct perf_pending_entry {
	struct perf_pending_entry *next;
	void (*func)(struct perf_pending_entry *);
};

/**
 * struct perf_counter - performance counter kernel representation:
 */
struct perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	struct list_head		list_entry;
	struct list_head		event_entry;
	struct list_head		sibling_list;
	int 				nr_siblings;
	struct perf_counter		*group_leader;
	const struct pmu		*pmu;

	enum perf_counter_active_state	state;
	enum perf_counter_active_state	prev_state;
	atomic64_t			count;

	/*
	 * These are the total time in nanoseconds that the counter
	 * has been enabled (i.e. eligible to run, and the task has
	 * been scheduled in, if this is a per-task counter)
	 * and running (scheduled onto the CPU), respectively.
	 *
	 * They are computed from tstamp_enabled, tstamp_running and
	 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
	 */
	u64				total_time_enabled;
	u64				total_time_running;

	/*
	 * These are timestamps used for computing total_time_enabled
	 * and total_time_running when the counter is in INACTIVE or
	 * ACTIVE state, measured in nanoseconds from an arbitrary point
	 * in time.
	 * tstamp_enabled: the notional time when the counter was enabled
	 * tstamp_running: the notional time when the counter was scheduled on
	 * tstamp_stopped: in INACTIVE state, the notional time when the
	 *	counter was scheduled off.
	 */
	u64				tstamp_enabled;
	u64				tstamp_running;
	u64				tstamp_stopped;

	struct perf_counter_hw_event	hw_event;
	struct hw_perf_counter		hw;

	struct perf_counter_context	*ctx;
	struct task_struct		*task;
	struct file			*filp;

	struct perf_counter		*parent;
	struct list_head		child_list;

	/*
	 * These accumulate total time (in nanoseconds) that children
	 * counters have been enabled and running, respectively.
	 */
	atomic64_t			child_total_time_enabled;
	atomic64_t			child_total_time_running;

	/*
	 * Protect attach/detach and child_list:
	 */
	struct mutex			mutex;

	int				oncpu;
	int				cpu;

	/* mmap bits */
	struct mutex			mmap_mutex;
	atomic_t			mmap_count;
	struct perf_mmap_data		*data;

	/* poll related */
	wait_queue_head_t		waitq;
	struct fasync_struct		*fasync;

	/* delayed work for NMIs and such */
	int				pending_wakeup;
	int				pending_kill;
	int				pending_disable;
	struct perf_pending_entry	pending;

	atomic_t			event_limit;

	void (*destroy)(struct perf_counter *);
	struct rcu_head			rcu_head;
#endif
};

/**
 * struct perf_counter_context - counter context structure
 *
 * Used as a container for task counters and CPU counters as well:
 */
struct perf_counter_context {
#ifdef CONFIG_PERF_COUNTERS
	/*
	 * Protect the states of the counters in the list,
	 * nr_active, and the list:
	 */
	spinlock_t		lock;
	/*
	 * Protect the list of counters.  Locking either mutex or lock
	 * is sufficient to ensure the list doesn't change; to change
	 * the list you need to lock both the mutex and the spinlock.
	 */
	struct mutex		mutex;

	struct list_head	counter_list;
	struct list_head	event_list;
	int			nr_counters;
	int			nr_active;
	int			is_active;
	struct task_struct	*task;

	/*
	 * Context clock, runs when context enabled.
	 */
	u64			time;
	u64			timestamp;
#endif
};

/**
 * struct perf_counter_cpu_context - per cpu counter context structure
 */
struct perf_cpu_context {
	struct perf_counter_context	ctx;
	struct perf_counter_context	*task_ctx;
	int				active_oncpu;
	int				max_pertask;
	int				exclusive;

	/*
	 * Recursion avoidance:
	 *
	 * task, softirq, irq, nmi context
	 */
	int			recursion[4];
};

#ifdef CONFIG_PERF_COUNTERS

/*
 * Set by architecture code:
 */
extern int perf_max_counters;

extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);

extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
extern void perf_counter_task_tick(struct task_struct *task, int cpu);
extern void perf_counter_init_task(struct task_struct *child);
extern void perf_counter_exit_task(struct task_struct *child);
extern void perf_counter_do_pending(void);
extern void perf_counter_print_debug(void);
extern void perf_counter_unthrottle(void);
extern u64 hw_perf_save_disable(void);
extern void hw_perf_restore(u64 ctrl);
extern int perf_counter_task_disable(void);
extern int perf_counter_task_enable(void);
extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	       struct perf_cpu_context *cpuctx,
	       struct perf_counter_context *ctx, int cpu);
extern void perf_counter_update_userpage(struct perf_counter *counter);

extern int perf_counter_overflow(struct perf_counter *counter,
				 int nmi, struct pt_regs *regs, u64 addr);
/*
 * Return 1 for a software counter, 0 for a hardware counter
 */
static inline int is_software_counter(struct perf_counter *counter)
{
	return !perf_event_raw(&counter->hw_event) &&
		perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
}

extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);

extern void perf_counter_mmap(unsigned long addr, unsigned long len,
			      unsigned long pgoff, struct file *file);

extern void perf_counter_munmap(unsigned long addr, unsigned long len,
				unsigned long pgoff, struct file *file);

extern void perf_counter_comm(struct task_struct *tsk);

#define MAX_STACK_DEPTH		255

struct perf_callchain_entry {
	u16	nr, hv, kernel, user;
	u64	ip[MAX_STACK_DEPTH];
};

extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);

extern int sysctl_perf_counter_priv;
extern int sysctl_perf_counter_mlock;

extern void perf_counter_init(void);

#else
static inline void
perf_counter_task_sched_in(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_sched_out(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_tick(struct task_struct *task, int cpu)		{ }
static inline void perf_counter_init_task(struct task_struct *child)	{ }
static inline void perf_counter_exit_task(struct task_struct *child)	{ }
static inline void perf_counter_do_pending(void)			{ }
static inline void perf_counter_print_debug(void)			{ }
static inline void perf_counter_unthrottle(void)			{ }
static inline void hw_perf_restore(u64 ctrl)				{ }
static inline u64 hw_perf_save_disable(void)		      { return 0; }
static inline int perf_counter_task_disable(void)	{ return -EINVAL; }
static inline int perf_counter_task_enable(void)	{ return -EINVAL; }

static inline void
perf_swcounter_event(u32 event, u64 nr, int nmi,
		     struct pt_regs *regs, u64 addr)			{ }

static inline void
perf_counter_mmap(unsigned long addr, unsigned long len,
		  unsigned long pgoff, struct file *file)		{ }

static inline void
perf_counter_munmap(unsigned long addr, unsigned long len,
		    unsigned long pgoff, struct file *file)		{ }

static inline void perf_counter_comm(struct task_struct *tsk)		{ }
static inline void perf_counter_init(void)				{ }
#endif

#endif /* __KERNEL__ */
#endif /* _LINUX_PERF_COUNTER_H */
Commit	Line	Data
0793a61d TG	1	/*
	2	* Performance counters:
	3	*
	4	* Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
	5	* Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
	6	*
	7	* Data type definitions, declarations, prototypes.
	8	*
	9	* Started by: Thomas Gleixner and Ingo Molnar
	10	*
	11	* For licencing details see kernel-base/COPYING
	12	*/
	13	#ifndef _LINUX_PERF_COUNTER_H
	14	#define _LINUX_PERF_COUNTER_H
	15
f3dfd265 PM	16	#include <linux/types.h>
f3dfd265 PM	17	#include <linux/ioctl.h>
9aaa131a	18	#include <asm/byteorder.h>
0793a61d TG	19
0793a61d TG	20	/*
9f66a381 IM	21	* User-space ABI bits:
	22	*/
	23
	24	/*
b8e83514	25	* hw_event.type
0793a61d	26	*/
b8e83514 PZ	27	enum perf_event_types {
	28	PERF_TYPE_HARDWARE = 0,
	29	PERF_TYPE_SOFTWARE = 1,
	30	PERF_TYPE_TRACEPOINT = 2,
	31
0793a61d	32	/*
b8e83514	33	* available TYPE space, raw is the max value.
0793a61d	34	*/
9f66a381	35
b8e83514 PZ	36	PERF_TYPE_RAW = 128,
b8e83514 PZ	37	};
6c594c21	38
b8e83514 PZ	39	/*
	40	* Generalized performance counter event types, used by the hw_event.event_id
	41	* parameter of the sys_perf_counter_open() syscall:
	42	*/
	43	enum hw_event_ids {
9f66a381	44	/*
b8e83514	45	* Common hardware events, generalized by the kernel:
9f66a381	46	*/
b8e83514 PZ	47	PERF_COUNT_CPU_CYCLES = 0,
	48	PERF_COUNT_INSTRUCTIONS = 1,
	49	PERF_COUNT_CACHE_REFERENCES = 2,
	50	PERF_COUNT_CACHE_MISSES = 3,
	51	PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
	52	PERF_COUNT_BRANCH_MISSES = 5,
	53	PERF_COUNT_BUS_CYCLES = 6,
	54
	55	PERF_HW_EVENTS_MAX = 7,
	56	};
e077df4f	57
b8e83514 PZ	58	/*
	59	* Special "software" counters provided by the kernel, even if the hardware
	60	* does not support performance counters. These counters measure various
	61	* physical and sw events of the kernel (and allow the profiling of them as
	62	* well):
	63	*/
	64	enum sw_event_ids {
	65	PERF_COUNT_CPU_CLOCK = 0,
	66	PERF_COUNT_TASK_CLOCK = 1,
	67	PERF_COUNT_PAGE_FAULTS = 2,
	68	PERF_COUNT_CONTEXT_SWITCHES = 3,
	69	PERF_COUNT_CPU_MIGRATIONS = 4,
	70	PERF_COUNT_PAGE_FAULTS_MIN = 5,
	71	PERF_COUNT_PAGE_FAULTS_MAJ = 6,
	72
	73	PERF_SW_EVENTS_MAX = 7,
0793a61d TG	74	};
0793a61d TG	75
f4a2deb4 PZ	76	#define __PERF_COUNTER_MASK(name) \
	77	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
	78	PERF_COUNTER_##name##_SHIFT)
	79
	80	#define PERF_COUNTER_RAW_BITS 1
	81	#define PERF_COUNTER_RAW_SHIFT 63
	82	#define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
	83
	84	#define PERF_COUNTER_CONFIG_BITS 63
	85	#define PERF_COUNTER_CONFIG_SHIFT 0
	86	#define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
	87
	88	#define PERF_COUNTER_TYPE_BITS 7
	89	#define PERF_COUNTER_TYPE_SHIFT 56
	90	#define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
	91
	92	#define PERF_COUNTER_EVENT_BITS 56
	93	#define PERF_COUNTER_EVENT_SHIFT 0
	94	#define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
	95
8a057d84 PZ	96	/*
	97	* Bits that can be set in hw_event.record_type to request information
	98	* in the overflow packets.
	99	*/
	100	enum perf_counter_record_format {
	101	PERF_RECORD_IP = 1U << 0,
	102	PERF_RECORD_TID = 1U << 1,
4d855457	103	PERF_RECORD_TIME = 1U << 2,
78f13e95 PZ	104	PERF_RECORD_ADDR = 1U << 3,
	105	PERF_RECORD_GROUP = 1U << 4,
	106	PERF_RECORD_CALLCHAIN = 1U << 5,
8a057d84 PZ	107	};
8a057d84 PZ	108
53cfbf59 PM	109	/*
	110	* Bits that can be set in hw_event.read_format to request that
	111	* reads on the counter should return the indicated quantities,
	112	* in increasing order of bit value, after the counter value.
	113	*/
	114	enum perf_counter_read_format {
	115	PERF_FORMAT_TOTAL_TIME_ENABLED = 1,
	116	PERF_FORMAT_TOTAL_TIME_RUNNING = 2,
	117	};
	118
9f66a381 IM	119	/*
	120	* Hardware event to monitor via a performance monitoring counter:
	121	*/
	122	struct perf_counter_hw_event {
f4a2deb4 PZ	123	/*
	124	* The MSB of the config word signifies if the rest contains cpu
	125	* specific (raw) counter configuration data, if unset, the next
	126	* 7 bits are an event type and the rest of the bits are the event
	127	* identifier.
	128	*/
	129	__u64 config;
9f66a381	130
f3dfd265	131	__u64 irq_period;
8a057d84 PZ	132	__u32 record_type;
8a057d84 PZ	133	__u32 read_format;
9f66a381	134
2743a5b0	135	__u64 disabled : 1, /* off by default */
0475f9ea	136	nmi : 1, /* NMI sampling */
0475f9ea PM	137	inherit : 1, /* children inherit it */
	138	pinned : 1, /* must always be on PMU */
	139	exclusive : 1, /* only group on PMU */
	140	exclude_user : 1, /* don't count user */
	141	exclude_kernel : 1, /* ditto kernel */
	142	exclude_hv : 1, /* ditto hypervisor */
2743a5b0	143	exclude_idle : 1, /* don't count when idle */
0a4a9391 PZ	144	mmap : 1, /* include mmap data */
0a4a9391 PZ	145	munmap : 1, /* include munmap data */
8d1b2d93	146	comm : 1, /* include comm data */
0475f9ea	147
8d1b2d93	148	__reserved_1 : 52;
2743a5b0 PM	149
2743a5b0 PM	150	__u32 extra_config_len;
c457810a	151	__u32 wakeup_events; /* wakeup every n events */
9f66a381	152
f3dfd265	153	__u64 __reserved_2;
2743a5b0	154	__u64 __reserved_3;
eab656ae TG	155	};
eab656ae TG	156
d859e29f PM	157	/*
	158	* Ioctls that can be done on a perf counter fd:
	159	*/
3df5edad PZ	160	#define PERF_COUNTER_IOC_ENABLE _IOW('$', 0, u32)
3df5edad PZ	161	#define PERF_COUNTER_IOC_DISABLE _IOW('$', 1, u32)
79f14641	162	#define PERF_COUNTER_IOC_REFRESH _IOW('$', 2, u32)
3df5edad PZ	163	#define PERF_COUNTER_IOC_RESET _IOW('$', 3, u32)
	164
	165	enum perf_counter_ioc_flags {
	166	PERF_IOC_FLAG_GROUP = 1U << 0,
	167	};
d859e29f	168
37d81828 PM	169	/*
	170	* Structure of the page that can be mapped via mmap
	171	*/
	172	struct perf_counter_mmap_page {
	173	__u32 version; /* version number of this structure */
	174	__u32 compat_version; /* lowest version this is compat with */
38ff667b PZ	175
	176	/*
	177	* Bits needed to read the hw counters in user-space.
	178	*
92f22a38 PZ	179	* u32 seq;
92f22a38 PZ	180	* s64 count;
38ff667b	181	*
a2e87d06 PZ	182	* do {
a2e87d06 PZ	183	* seq = pc->lock;
38ff667b	184	*
a2e87d06 PZ	185	* barrier()
	186	* if (pc->index) {
	187	* count = pmc_read(pc->index - 1);
	188	* count += pc->offset;
	189	* } else
	190	* goto regular_read;
38ff667b	191	*
a2e87d06 PZ	192	* barrier();
a2e87d06 PZ	193	* } while (pc->lock != seq);
38ff667b	194	*
92f22a38 PZ	195	* NOTE: for obvious reason this only works on self-monitoring
92f22a38 PZ	196	* processes.
38ff667b	197	*/
37d81828 PM	198	__u32 lock; /* seqlock for synchronization */
	199	__u32 index; /* hardware counter identifier */
	200	__s64 offset; /* add to hardware counter value */
7b732a75	201
38ff667b PZ	202	/*
	203	* Control data for the mmap() data buffer.
	204	*
	205	* User-space reading this value should issue an rmb(), on SMP capable
	206	* platforms, after reading this value -- see perf_counter_wakeup().
	207	*/
7b732a75	208	__u32 data_head; /* head in the data section */
37d81828 PM	209	};
37d81828 PM	210
6b6e5486 PZ	211	#define PERF_EVENT_MISC_KERNEL (1 << 0)
	212	#define PERF_EVENT_MISC_USER (1 << 1)
	213	#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
6fab0192	214
5c148194 PZ	215	struct perf_event_header {
5c148194 PZ	216	__u32 type;
6fab0192 PZ	217	__u16 misc;
6fab0192 PZ	218	__u16 size;
5c148194 PZ	219	};
	220
	221	enum perf_event_type {
5ed00415	222
0c593b34 PZ	223	/*
	224	* The MMAP events record the PROT_EXEC mappings so that we can
	225	* correlate userspace IPs to code. They have the following structure:
	226	*
	227	* struct {
	228	* struct perf_event_header header;
	229	*
	230	* u32 pid, tid;
	231	* u64 addr;
	232	* u64 len;
	233	* u64 pgoff;
	234	* char filename[];
	235	* };
	236	*/
8a057d84 PZ	237	PERF_EVENT_MMAP = 1,
8a057d84 PZ	238	PERF_EVENT_MUNMAP = 2,
0a4a9391	239
8d1b2d93 PZ	240	/*
	241	* struct {
	242	* struct perf_event_header header;
	243	*
	244	* u32 pid, tid;
	245	* char comm[];
	246	* };
	247	*/
	248	PERF_EVENT_COMM = 3,
	249
8a057d84	250	/*
6b6e5486 PZ	251	* When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
6b6e5486 PZ	252	* will be PERF_RECORD_*
0c593b34 PZ	253	*
	254	* struct {
	255	* struct perf_event_header header;
	256	*
6b6e5486 PZ	257	* { u64 ip; } && PERF_RECORD_IP
6b6e5486 PZ	258	* { u32 pid, tid; } && PERF_RECORD_TID
4d855457	259	* { u64 time; } && PERF_RECORD_TIME
78f13e95	260	* { u64 addr; } && PERF_RECORD_ADDR
0c593b34 PZ	261	*
0c593b34 PZ	262	* { u64 nr;
6b6e5486	263	* { u64 event, val; } cnt[nr]; } && PERF_RECORD_GROUP
0c593b34 PZ	264	*
	265	* { u16 nr,
	266	* hv,
	267	* kernel,
	268	* user;
6b6e5486	269	* u64 ips[nr]; } && PERF_RECORD_CALLCHAIN
0c593b34	270	* };
8a057d84	271	*/
5c148194 PZ	272	};
5c148194 PZ	273
f3dfd265	274	#ifdef __KERNEL__
9f66a381	275	/*
f3dfd265	276	* Kernel-internal data types and definitions:
9f66a381 IM	277	*/
9f66a381 IM	278
f3dfd265 PM	279	#ifdef CONFIG_PERF_COUNTERS
	280	# include <asm/perf_counter.h>
	281	#endif
	282
	283	#include <linux/list.h>
	284	#include <linux/mutex.h>
	285	#include <linux/rculist.h>
	286	#include <linux/rcupdate.h>
	287	#include <linux/spinlock.h>
d6d020e9	288	#include <linux/hrtimer.h>
3c446b3d	289	#include <linux/fs.h>
f3dfd265 PM	290	#include <asm/atomic.h>
	291
	292	struct task_struct;
	293
f4a2deb4 PZ	294	static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
	295	{
	296	return hw_event->config & PERF_COUNTER_RAW_MASK;
	297	}
	298
	299	static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
	300	{
	301	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
	302	}
	303
	304	static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
	305	{
	306	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
	307	PERF_COUNTER_TYPE_SHIFT;
	308	}
	309
	310	static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
	311	{
	312	return hw_event->config & PERF_COUNTER_EVENT_MASK;
	313	}
	314
0793a61d	315	/**
9f66a381	316	* struct hw_perf_counter - performance counter hardware details:
0793a61d TG	317	*/
0793a61d TG	318	struct hw_perf_counter {
ee06094f	319	#ifdef CONFIG_PERF_COUNTERS
d6d020e9 PZ	320	union {
	321	struct { /* hardware */
	322	u64 config;
	323	unsigned long config_base;
	324	unsigned long counter_base;
	325	int nmi;
6f00cada	326	int idx;
d6d020e9 PZ	327	};
	328	union { /* software */
	329	atomic64_t count;
	330	struct hrtimer hrtimer;
	331	};
	332	};
ee06094f	333	atomic64_t prev_count;
9f66a381	334	u64 irq_period;
ee06094f IM	335	atomic64_t period_left;
ee06094f IM	336	#endif
0793a61d TG	337	};
0793a61d TG	338
621a01ea IM	339	struct perf_counter;
	340
	341	/**
4aeb0b42	342	* struct pmu - generic performance monitoring unit
621a01ea	343	*/
4aeb0b42	344	struct pmu {
95cdd2e7	345	int (enable) (struct perf_counter counter);
7671581f IM	346	void (disable) (struct perf_counter counter);
7671581f IM	347	void (read) (struct perf_counter counter);
621a01ea IM	348	};
621a01ea IM	349
6a930700 IM	350	/**
	351	* enum perf_counter_active_state - the states of a counter
	352	*/
	353	enum perf_counter_active_state {
3b6f9e5c	354	PERF_COUNTER_STATE_ERROR = -2,
6a930700 IM	355	PERF_COUNTER_STATE_OFF = -1,
	356	PERF_COUNTER_STATE_INACTIVE = 0,
	357	PERF_COUNTER_STATE_ACTIVE = 1,
	358	};
	359
9b51f66d IM	360	struct file;
9b51f66d IM	361
7b732a75 PZ	362	struct perf_mmap_data {
7b732a75 PZ	363	struct rcu_head rcu_head;
8740f941	364	int nr_pages; /* nr of data pages */
c5078f78	365	int nr_locked; /* nr pages mlocked */
8740f941	366
c33a0bc4	367	atomic_t poll; /* POLL_ for wakeups */
8740f941 PZ	368	atomic_t head; /* write position */
	369	atomic_t events; /* event limit */
	370
c66de4a5	371	atomic_t done_head; /* completed head */
c33a0bc4 PZ	372	atomic_t lock; /* concurrent writes */
c33a0bc4 PZ	373
c66de4a5 PZ	374	atomic_t wakeup; /* needs a wakeup */
c66de4a5 PZ	375
7b732a75 PZ	376	struct perf_counter_mmap_page *user_page;
	377	void *data_pages[0];
	378	};
	379
671dec5d PZ	380	struct perf_pending_entry {
	381	struct perf_pending_entry *next;
	382	void (func)(struct perf_pending_entry );
925d519a PZ	383	};
925d519a PZ	384
0793a61d TG	385	/**
	386	* struct perf_counter - performance counter kernel representation:
	387	*/
	388	struct perf_counter {
ee06094f	389	#ifdef CONFIG_PERF_COUNTERS
04289bb9	390	struct list_head list_entry;
592903cd	391	struct list_head event_entry;
04289bb9	392	struct list_head sibling_list;
5c148194	393	int nr_siblings;
04289bb9	394	struct perf_counter *group_leader;
4aeb0b42	395	const struct pmu *pmu;
04289bb9	396
6a930700	397	enum perf_counter_active_state state;
c07c99b6	398	enum perf_counter_active_state prev_state;
0793a61d	399	atomic64_t count;
ee06094f	400
53cfbf59 PM	401	/*
	402	* These are the total time in nanoseconds that the counter
	403	* has been enabled (i.e. eligible to run, and the task has
	404	* been scheduled in, if this is a per-task counter)
	405	* and running (scheduled onto the CPU), respectively.
	406	*
	407	* They are computed from tstamp_enabled, tstamp_running and
	408	* tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
	409	*/
	410	u64 total_time_enabled;
	411	u64 total_time_running;
	412
	413	/*
	414	* These are timestamps used for computing total_time_enabled
	415	* and total_time_running when the counter is in INACTIVE or
	416	* ACTIVE state, measured in nanoseconds from an arbitrary point
	417	* in time.
	418	* tstamp_enabled: the notional time when the counter was enabled
	419	* tstamp_running: the notional time when the counter was scheduled on
	420	* tstamp_stopped: in INACTIVE state, the notional time when the
	421	* counter was scheduled off.
	422	*/
	423	u64 tstamp_enabled;
	424	u64 tstamp_running;
	425	u64 tstamp_stopped;
	426
9f66a381	427	struct perf_counter_hw_event hw_event;
0793a61d TG	428	struct hw_perf_counter hw;
	429
	430	struct perf_counter_context *ctx;
	431	struct task_struct *task;
9b51f66d	432	struct file *filp;
0793a61d	433
9b51f66d	434	struct perf_counter *parent;
d859e29f PM	435	struct list_head child_list;
d859e29f PM	436
53cfbf59 PM	437	/*
	438	* These accumulate total time (in nanoseconds) that children
	439	* counters have been enabled and running, respectively.
	440	*/
	441	atomic64_t child_total_time_enabled;
	442	atomic64_t child_total_time_running;
	443
0793a61d	444	/*
d859e29f	445	* Protect attach/detach and child_list:
0793a61d TG	446	*/
	447	struct mutex mutex;
	448
	449	int oncpu;
	450	int cpu;
	451
7b732a75 PZ	452	/* mmap bits */
	453	struct mutex mmap_mutex;
	454	atomic_t mmap_count;
	455	struct perf_mmap_data *data;
37d81828	456
7b732a75	457	/* poll related */
0793a61d	458	wait_queue_head_t waitq;
3c446b3d	459	struct fasync_struct *fasync;
79f14641 PZ	460
	461	/* delayed work for NMIs and such */
	462	int pending_wakeup;
4c9e2542	463	int pending_kill;
79f14641	464	int pending_disable;
671dec5d	465	struct perf_pending_entry pending;
592903cd	466
79f14641 PZ	467	atomic_t event_limit;
79f14641 PZ	468
e077df4f	469	void (destroy)(struct perf_counter );
592903cd	470	struct rcu_head rcu_head;
ee06094f	471	#endif
0793a61d TG	472	};
	473
	474	/**
	475	* struct perf_counter_context - counter context structure
	476	*
	477	* Used as a container for task counters and CPU counters as well:
	478	*/
	479	struct perf_counter_context {
	480	#ifdef CONFIG_PERF_COUNTERS
	481	/*
d859e29f PM	482	* Protect the states of the counters in the list,
d859e29f PM	483	* nr_active, and the list:
0793a61d TG	484	*/
0793a61d TG	485	spinlock_t lock;
d859e29f PM	486	/*
	487	* Protect the list of counters. Locking either mutex or lock
	488	* is sufficient to ensure the list doesn't change; to change
	489	* the list you need to lock both the mutex and the spinlock.
	490	*/
	491	struct mutex mutex;
04289bb9 IM	492
04289bb9 IM	493	struct list_head counter_list;
592903cd	494	struct list_head event_list;
0793a61d TG	495	int nr_counters;
0793a61d TG	496	int nr_active;
d859e29f	497	int is_active;
0793a61d	498	struct task_struct *task;
53cfbf59 PM	499
53cfbf59 PM	500	/*
4af4998b	501	* Context clock, runs when context enabled.
53cfbf59	502	*/
4af4998b PZ	503	u64 time;
4af4998b PZ	504	u64 timestamp;
0793a61d TG	505	#endif
	506	};
	507
	508	/**
	509	* struct perf_counter_cpu_context - per cpu counter context structure
	510	*/
	511	struct perf_cpu_context {
	512	struct perf_counter_context ctx;
	513	struct perf_counter_context *task_ctx;
	514	int active_oncpu;
	515	int max_pertask;
3b6f9e5c	516	int exclusive;
96f6d444 PZ	517
	518	/*
	519	* Recursion avoidance:
	520	*
	521	* task, softirq, irq, nmi context
	522	*/
	523	int recursion[4];
0793a61d TG	524	};
0793a61d TG	525
829b42dd RR	526	#ifdef CONFIG_PERF_COUNTERS
829b42dd RR	527
0793a61d TG	528	/*
	529	* Set by architecture code:
	530	*/
	531	extern int perf_max_counters;
	532
4aeb0b42	533	extern const struct pmu hw_perf_counter_init(struct perf_counter counter);
621a01ea	534
0793a61d TG	535	extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
	536	extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
	537	extern void perf_counter_task_tick(struct task_struct *task, int cpu);
9b51f66d IM	538	extern void perf_counter_init_task(struct task_struct *child);
9b51f66d IM	539	extern void perf_counter_exit_task(struct task_struct *child);
925d519a	540	extern void perf_counter_do_pending(void);
0793a61d	541	extern void perf_counter_print_debug(void);
1b023a96	542	extern void perf_counter_unthrottle(void);
01b2838c IM	543	extern u64 hw_perf_save_disable(void);
01b2838c IM	544	extern void hw_perf_restore(u64 ctrl);
1d1c7ddb IM	545	extern int perf_counter_task_disable(void);
1d1c7ddb IM	546	extern int perf_counter_task_enable(void);
3cbed429 PM	547	extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	548	struct perf_cpu_context *cpuctx,
	549	struct perf_counter_context *ctx, int cpu);
37d81828	550	extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124	551
f6c7d5fe	552	extern int perf_counter_overflow(struct perf_counter *counter,
78f13e95	553	int nmi, struct pt_regs *regs, u64 addr);
3b6f9e5c PM	554	/*
	555	* Return 1 for a software counter, 0 for a hardware counter
	556	*/
	557	static inline int is_software_counter(struct perf_counter *counter)
	558	{
f4a2deb4 PZ	559	return !perf_event_raw(&counter->hw_event) &&
f4a2deb4 PZ	560	perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
3b6f9e5c PM	561	}
3b6f9e5c PM	562
78f13e95	563	extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
15dbf27c	564
0a4a9391 PZ	565	extern void perf_counter_mmap(unsigned long addr, unsigned long len,
	566	unsigned long pgoff, struct file *file);
	567
	568	extern void perf_counter_munmap(unsigned long addr, unsigned long len,
	569	unsigned long pgoff, struct file *file);
	570
8d1b2d93 PZ	571	extern void perf_counter_comm(struct task_struct *tsk);
8d1b2d93 PZ	572
9c03d88e	573	#define MAX_STACK_DEPTH 255
394ee076 PZ	574
394ee076 PZ	575	struct perf_callchain_entry {
9c03d88e	576	u16 nr, hv, kernel, user;
394ee076 PZ	577	u64 ip[MAX_STACK_DEPTH];
	578	};
	579
	580	extern struct perf_callchain_entry perf_callchain(struct pt_regs regs);
	581
1ccd1549	582	extern int sysctl_perf_counter_priv;
c5078f78	583	extern int sysctl_perf_counter_mlock;
1ccd1549	584
0d905bca IM	585	extern void perf_counter_init(void);
0d905bca IM	586
0793a61d TG	587	#else
	588	static inline void
	589	perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
	590	static inline void
	591	perf_counter_task_sched_out(struct task_struct *task, int cpu) { }
	592	static inline void
	593	perf_counter_task_tick(struct task_struct *task, int cpu) { }
9b51f66d IM	594	static inline void perf_counter_init_task(struct task_struct *child) { }
9b51f66d IM	595	static inline void perf_counter_exit_task(struct task_struct *child) { }
925d519a	596	static inline void perf_counter_do_pending(void) { }
0793a61d	597	static inline void perf_counter_print_debug(void) { }
1b023a96	598	static inline void perf_counter_unthrottle(void) { }
15dbf27c	599	static inline void hw_perf_restore(u64 ctrl) { }
01b2838c	600	static inline u64 hw_perf_save_disable(void) { return 0; }
1d1c7ddb IM	601	static inline int perf_counter_task_disable(void) { return -EINVAL; }
1d1c7ddb IM	602	static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c	603
925d519a	604	static inline void
78f13e95 PZ	605	perf_swcounter_event(u32 event, u64 nr, int nmi,
78f13e95 PZ	606	struct pt_regs *regs, u64 addr) { }
0a4a9391 PZ	607
	608	static inline void
	609	perf_counter_mmap(unsigned long addr, unsigned long len,
	610	unsigned long pgoff, struct file *file) { }
	611
	612	static inline void
	613	perf_counter_munmap(unsigned long addr, unsigned long len,
0d905bca	614	unsigned long pgoff, struct file *file) { }
0a4a9391	615
8d1b2d93	616	static inline void perf_counter_comm(struct task_struct *tsk) { }
0d905bca	617	static inline void perf_counter_init(void) { }
0793a61d TG	618	#endif
0793a61d TG	619
f3dfd265	620	#endif /* __KERNEL__ */
0793a61d	621	#endif /* _LINUX_PERF_COUNTER_H */