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1/*
2 * Performance counters:
3 *
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4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
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7 *
8 * Data type definitions, declarations, prototypes.
9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
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11 *
12 * For licencing details see kernel-base/COPYING
13 */
14#ifndef _LINUX_PERF_COUNTER_H
15#define _LINUX_PERF_COUNTER_H
16
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17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
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20
21/*
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22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
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29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
b8e83514 34
a308444c 35 PERF_TYPE_MAX, /* non-ABI */
b8e83514 36};
6c594c21 37
b8e83514 38/*
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39 * Generalized performance counter event types, used by the
40 * attr.event_id parameter of the sys_perf_counter_open()
41 * syscall:
b8e83514 42 */
1c432d89 43enum perf_hw_id {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
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47 PERF_COUNT_HW_CPU_CYCLES = 0,
48 PERF_COUNT_HW_INSTRUCTIONS = 1,
49 PERF_COUNT_HW_CACHE_REFERENCES = 2,
50 PERF_COUNT_HW_CACHE_MISSES = 3,
51 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_HW_BRANCH_MISSES = 5,
53 PERF_COUNT_HW_BUS_CYCLES = 6,
54
a308444c 55 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 56};
e077df4f 57
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58/*
59 * Generalized hardware cache counters:
60 *
8be6e8f3 61 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
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62 * { read, write, prefetch } x
63 * { accesses, misses }
64 */
1c432d89 65enum perf_hw_cache_id {
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66 PERF_COUNT_HW_CACHE_L1D = 0,
67 PERF_COUNT_HW_CACHE_L1I = 1,
68 PERF_COUNT_HW_CACHE_LL = 2,
69 PERF_COUNT_HW_CACHE_DTLB = 3,
70 PERF_COUNT_HW_CACHE_ITLB = 4,
71 PERF_COUNT_HW_CACHE_BPU = 5,
72
73 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
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74};
75
1c432d89 76enum perf_hw_cache_op_id {
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77 PERF_COUNT_HW_CACHE_OP_READ = 0,
78 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
79 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 80
a308444c 81 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
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82};
83
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84enum perf_hw_cache_op_result_id {
85 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
86 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 87
a308444c 88 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
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89};
90
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91/*
92 * Special "software" counters provided by the kernel, even if the hardware
93 * does not support performance counters. These counters measure various
94 * physical and sw events of the kernel (and allow the profiling of them as
95 * well):
96 */
1c432d89 97enum perf_sw_ids {
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98 PERF_COUNT_SW_CPU_CLOCK = 0,
99 PERF_COUNT_SW_TASK_CLOCK = 1,
100 PERF_COUNT_SW_PAGE_FAULTS = 2,
101 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
102 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
103 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
104 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
105
106 PERF_COUNT_SW_MAX, /* non-ABI */
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107};
108
8a057d84 109/*
0d48696f 110 * Bits that can be set in attr.sample_type to request information
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111 * in the overflow packets.
112 */
b23f3325 113enum perf_counter_sample_format {
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114 PERF_SAMPLE_IP = 1U << 0,
115 PERF_SAMPLE_TID = 1U << 1,
116 PERF_SAMPLE_TIME = 1U << 2,
117 PERF_SAMPLE_ADDR = 1U << 3,
118 PERF_SAMPLE_GROUP = 1U << 4,
119 PERF_SAMPLE_CALLCHAIN = 1U << 5,
120 PERF_SAMPLE_ID = 1U << 6,
121 PERF_SAMPLE_CPU = 1U << 7,
122 PERF_SAMPLE_PERIOD = 1U << 8,
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123
124 PERF_SAMPLE_MAX = 1U << 9, /* non-ABI */
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125};
126
53cfbf59 127/*
0d48696f 128 * Bits that can be set in attr.read_format to request that
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129 * reads on the counter should return the indicated quantities,
130 * in increasing order of bit value, after the counter value.
131 */
132enum perf_counter_read_format {
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133 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
134 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
135 PERF_FORMAT_ID = 1U << 2,
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136
137 PERF_FORMAT_MAX = 1U << 3, /* non-ABI */
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138};
139
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140#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
141
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142/*
143 * Hardware event to monitor via a performance monitoring counter:
144 */
0d48696f 145struct perf_counter_attr {
974802ea 146
f4a2deb4 147 /*
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148 * Major type: hardware/software/tracepoint/etc.
149 */
150 __u32 type;
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151
152 /*
153 * Size of the attr structure, for fwd/bwd compat.
154 */
155 __u32 size;
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156
157 /*
158 * Type specific configuration information.
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159 */
160 __u64 config;
9f66a381 161
60db5e09 162 union {
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163 __u64 sample_period;
164 __u64 sample_freq;
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165 };
166
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167 __u64 sample_type;
168 __u64 read_format;
9f66a381 169
2743a5b0 170 __u64 disabled : 1, /* off by default */
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171 inherit : 1, /* children inherit it */
172 pinned : 1, /* must always be on PMU */
173 exclusive : 1, /* only group on PMU */
174 exclude_user : 1, /* don't count user */
175 exclude_kernel : 1, /* ditto kernel */
176 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 177 exclude_idle : 1, /* don't count when idle */
0a4a9391 178 mmap : 1, /* include mmap data */
8d1b2d93 179 comm : 1, /* include comm data */
60db5e09 180 freq : 1, /* use freq, not period */
bfbd3381 181 inherit_stat : 1, /* per task counts */
57e7986e 182 enable_on_exec : 1, /* next exec enables */
0475f9ea 183
57e7986e 184 __reserved_1 : 51;
2743a5b0 185
c457810a 186 __u32 wakeup_events; /* wakeup every n events */
974802ea 187 __u32 __reserved_2;
9f66a381 188
974802ea 189 __u64 __reserved_3;
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190};
191
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192/*
193 * Ioctls that can be done on a perf counter fd:
194 */
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195#define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
196#define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
197#define PERF_COUNTER_IOC_REFRESH _IO ('$', 2)
198#define PERF_COUNTER_IOC_RESET _IO ('$', 3)
199#define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64)
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200
201enum perf_counter_ioc_flags {
202 PERF_IOC_FLAG_GROUP = 1U << 0,
203};
d859e29f 204
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205/*
206 * Structure of the page that can be mapped via mmap
207 */
208struct perf_counter_mmap_page {
209 __u32 version; /* version number of this structure */
210 __u32 compat_version; /* lowest version this is compat with */
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211
212 /*
213 * Bits needed to read the hw counters in user-space.
214 *
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215 * u32 seq;
216 * s64 count;
38ff667b 217 *
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218 * do {
219 * seq = pc->lock;
38ff667b 220 *
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221 * barrier()
222 * if (pc->index) {
223 * count = pmc_read(pc->index - 1);
224 * count += pc->offset;
225 * } else
226 * goto regular_read;
38ff667b 227 *
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228 * barrier();
229 * } while (pc->lock != seq);
38ff667b 230 *
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231 * NOTE: for obvious reason this only works on self-monitoring
232 * processes.
38ff667b 233 */
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234 __u32 lock; /* seqlock for synchronization */
235 __u32 index; /* hardware counter identifier */
236 __s64 offset; /* add to hardware counter value */
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237 __u64 time_enabled; /* time counter active */
238 __u64 time_running; /* time counter on cpu */
7b732a75 239
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240 /*
241 * Hole for extension of the self monitor capabilities
242 */
243
7f8b4e4e 244 __u64 __reserved[123]; /* align to 1k */
41f95331 245
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246 /*
247 * Control data for the mmap() data buffer.
248 *
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249 * User-space reading the @data_head value should issue an rmb(), on
250 * SMP capable platforms, after reading this value -- see
251 * perf_counter_wakeup().
252 *
253 * When the mapping is PROT_WRITE the @data_tail value should be
254 * written by userspace to reflect the last read data. In this case
255 * the kernel will not over-write unread data.
38ff667b 256 */
8e3747c1 257 __u64 data_head; /* head in the data section */
43a21ea8 258 __u64 data_tail; /* user-space written tail */
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259};
260
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261#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
262#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
263#define PERF_EVENT_MISC_KERNEL (1 << 0)
264#define PERF_EVENT_MISC_USER (2 << 0)
265#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
6fab0192 266
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267struct perf_event_header {
268 __u32 type;
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269 __u16 misc;
270 __u16 size;
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271};
272
273enum perf_event_type {
5ed00415 274
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275 /*
276 * The MMAP events record the PROT_EXEC mappings so that we can
277 * correlate userspace IPs to code. They have the following structure:
278 *
279 * struct {
0127c3ea 280 * struct perf_event_header header;
0c593b34 281 *
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282 * u32 pid, tid;
283 * u64 addr;
284 * u64 len;
285 * u64 pgoff;
286 * char filename[];
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287 * };
288 */
8a057d84 289 PERF_EVENT_MMAP = 1,
0a4a9391 290
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291 /*
292 * struct {
293 * struct perf_event_header header;
294 * u64 id;
295 * u64 lost;
296 * };
297 */
298 PERF_EVENT_LOST = 2,
299
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300 /*
301 * struct {
0127c3ea 302 * struct perf_event_header header;
8d1b2d93 303 *
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304 * u32 pid, tid;
305 * char comm[];
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306 * };
307 */
308 PERF_EVENT_COMM = 3,
309
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310 /*
311 * struct {
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312 * struct perf_event_header header;
313 * u64 time;
689802b2 314 * u64 id;
b23f3325 315 * u64 sample_period;
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316 * };
317 */
318 PERF_EVENT_PERIOD = 4,
319
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320 /*
321 * struct {
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322 * struct perf_event_header header;
323 * u64 time;
cca3f454 324 * u64 id;
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325 * };
326 */
327 PERF_EVENT_THROTTLE = 5,
328 PERF_EVENT_UNTHROTTLE = 6,
329
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330 /*
331 * struct {
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332 * struct perf_event_header header;
333 * u32 pid, ppid;
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334 * };
335 */
336 PERF_EVENT_FORK = 7,
337
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338 /*
339 * struct {
340 * struct perf_event_header header;
341 * u32 pid, tid;
342 * u64 value;
343 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
344 * { u64 time_running; } && PERF_FORMAT_RUNNING
345 * { u64 parent_id; } && PERF_FORMAT_ID
346 * };
347 */
348 PERF_EVENT_READ = 8,
349
8a057d84 350 /*
0c593b34 351 * struct {
0127c3ea 352 * struct perf_event_header header;
0c593b34 353 *
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354 * { u64 ip; } && PERF_SAMPLE_IP
355 * { u32 pid, tid; } && PERF_SAMPLE_TID
356 * { u64 time; } && PERF_SAMPLE_TIME
357 * { u64 addr; } && PERF_SAMPLE_ADDR
e6e18ec7 358 * { u64 id; } && PERF_SAMPLE_ID
43a21ea8 359 * { u32 cpu, res; } && PERF_SAMPLE_CPU
e6e18ec7 360 * { u64 period; } && PERF_SAMPLE_PERIOD
0c593b34 361 *
0127c3ea 362 * { u64 nr;
43a21ea8 363 * { u64 id, val; } cnt[nr]; } && PERF_SAMPLE_GROUP
0c593b34 364 *
f9188e02 365 * { u64 nr,
43a21ea8 366 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
0c593b34 367 * };
8a057d84 368 */
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369 PERF_EVENT_SAMPLE = 9,
370
371 PERF_EVENT_MAX, /* non-ABI */
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372};
373
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374enum perf_callchain_context {
375 PERF_CONTEXT_HV = (__u64)-32,
376 PERF_CONTEXT_KERNEL = (__u64)-128,
377 PERF_CONTEXT_USER = (__u64)-512,
7522060c 378
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379 PERF_CONTEXT_GUEST = (__u64)-2048,
380 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
381 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
382
383 PERF_CONTEXT_MAX = (__u64)-4095,
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384};
385
f3dfd265 386#ifdef __KERNEL__
9f66a381 387/*
f3dfd265 388 * Kernel-internal data types and definitions:
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389 */
390
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391#ifdef CONFIG_PERF_COUNTERS
392# include <asm/perf_counter.h>
393#endif
394
395#include <linux/list.h>
396#include <linux/mutex.h>
397#include <linux/rculist.h>
398#include <linux/rcupdate.h>
399#include <linux/spinlock.h>
d6d020e9 400#include <linux/hrtimer.h>
3c446b3d 401#include <linux/fs.h>
709e50cf 402#include <linux/pid_namespace.h>
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403#include <asm/atomic.h>
404
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405#define PERF_MAX_STACK_DEPTH 255
406
407struct perf_callchain_entry {
408 __u64 nr;
409 __u64 ip[PERF_MAX_STACK_DEPTH];
410};
411
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412struct task_struct;
413
0793a61d 414/**
9f66a381 415 * struct hw_perf_counter - performance counter hardware details:
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416 */
417struct hw_perf_counter {
ee06094f 418#ifdef CONFIG_PERF_COUNTERS
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419 union {
420 struct { /* hardware */
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421 u64 config;
422 unsigned long config_base;
423 unsigned long counter_base;
424 int idx;
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425 };
426 union { /* software */
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427 atomic64_t count;
428 struct hrtimer hrtimer;
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429 };
430 };
ee06094f 431 atomic64_t prev_count;
b23f3325 432 u64 sample_period;
9e350de3 433 u64 last_period;
ee06094f 434 atomic64_t period_left;
60db5e09 435 u64 interrupts;
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436
437 u64 freq_count;
438 u64 freq_interrupts;
bd2b5b12 439 u64 freq_stamp;
ee06094f 440#endif
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441};
442
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443struct perf_counter;
444
445/**
4aeb0b42 446 * struct pmu - generic performance monitoring unit
621a01ea 447 */
4aeb0b42 448struct pmu {
95cdd2e7 449 int (*enable) (struct perf_counter *counter);
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450 void (*disable) (struct perf_counter *counter);
451 void (*read) (struct perf_counter *counter);
a78ac325 452 void (*unthrottle) (struct perf_counter *counter);
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453};
454
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455/**
456 * enum perf_counter_active_state - the states of a counter
457 */
458enum perf_counter_active_state {
3b6f9e5c 459 PERF_COUNTER_STATE_ERROR = -2,
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460 PERF_COUNTER_STATE_OFF = -1,
461 PERF_COUNTER_STATE_INACTIVE = 0,
462 PERF_COUNTER_STATE_ACTIVE = 1,
463};
464
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465struct file;
466
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467struct perf_mmap_data {
468 struct rcu_head rcu_head;
8740f941 469 int nr_pages; /* nr of data pages */
43a21ea8 470 int writable; /* are we writable */
c5078f78 471 int nr_locked; /* nr pages mlocked */
8740f941 472
c33a0bc4 473 atomic_t poll; /* POLL_ for wakeups */
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474 atomic_t events; /* event limit */
475
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476 atomic_long_t head; /* write position */
477 atomic_long_t done_head; /* completed head */
478
c33a0bc4 479 atomic_t lock; /* concurrent writes */
c66de4a5 480 atomic_t wakeup; /* needs a wakeup */
43a21ea8 481 atomic_t lost; /* nr records lost */
c66de4a5 482
7b732a75 483 struct perf_counter_mmap_page *user_page;
0127c3ea 484 void *data_pages[0];
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485};
486
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487struct perf_pending_entry {
488 struct perf_pending_entry *next;
489 void (*func)(struct perf_pending_entry *);
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490};
491
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492/**
493 * struct perf_counter - performance counter kernel representation:
494 */
495struct perf_counter {
ee06094f 496#ifdef CONFIG_PERF_COUNTERS
04289bb9 497 struct list_head list_entry;
592903cd 498 struct list_head event_entry;
04289bb9 499 struct list_head sibling_list;
0127c3ea 500 int nr_siblings;
04289bb9 501 struct perf_counter *group_leader;
4aeb0b42 502 const struct pmu *pmu;
04289bb9 503
6a930700 504 enum perf_counter_active_state state;
0793a61d 505 atomic64_t count;
ee06094f 506
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507 /*
508 * These are the total time in nanoseconds that the counter
509 * has been enabled (i.e. eligible to run, and the task has
510 * been scheduled in, if this is a per-task counter)
511 * and running (scheduled onto the CPU), respectively.
512 *
513 * They are computed from tstamp_enabled, tstamp_running and
514 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
515 */
516 u64 total_time_enabled;
517 u64 total_time_running;
518
519 /*
520 * These are timestamps used for computing total_time_enabled
521 * and total_time_running when the counter is in INACTIVE or
522 * ACTIVE state, measured in nanoseconds from an arbitrary point
523 * in time.
524 * tstamp_enabled: the notional time when the counter was enabled
525 * tstamp_running: the notional time when the counter was scheduled on
526 * tstamp_stopped: in INACTIVE state, the notional time when the
527 * counter was scheduled off.
528 */
529 u64 tstamp_enabled;
530 u64 tstamp_running;
531 u64 tstamp_stopped;
532
0d48696f 533 struct perf_counter_attr attr;
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534 struct hw_perf_counter hw;
535
536 struct perf_counter_context *ctx;
9b51f66d 537 struct file *filp;
0793a61d 538
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539 /*
540 * These accumulate total time (in nanoseconds) that children
541 * counters have been enabled and running, respectively.
542 */
543 atomic64_t child_total_time_enabled;
544 atomic64_t child_total_time_running;
545
0793a61d 546 /*
d859e29f 547 * Protect attach/detach and child_list:
0793a61d 548 */
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549 struct mutex child_mutex;
550 struct list_head child_list;
551 struct perf_counter *parent;
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552
553 int oncpu;
554 int cpu;
555
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556 struct list_head owner_entry;
557 struct task_struct *owner;
558
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559 /* mmap bits */
560 struct mutex mmap_mutex;
561 atomic_t mmap_count;
562 struct perf_mmap_data *data;
37d81828 563
7b732a75 564 /* poll related */
0793a61d 565 wait_queue_head_t waitq;
3c446b3d 566 struct fasync_struct *fasync;
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567
568 /* delayed work for NMIs and such */
569 int pending_wakeup;
4c9e2542 570 int pending_kill;
79f14641 571 int pending_disable;
671dec5d 572 struct perf_pending_entry pending;
592903cd 573
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574 atomic_t event_limit;
575
e077df4f 576 void (*destroy)(struct perf_counter *);
592903cd 577 struct rcu_head rcu_head;
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578
579 struct pid_namespace *ns;
8e5799b1 580 u64 id;
ee06094f 581#endif
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582};
583
584/**
585 * struct perf_counter_context - counter context structure
586 *
587 * Used as a container for task counters and CPU counters as well:
588 */
589struct perf_counter_context {
0793a61d 590 /*
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591 * Protect the states of the counters in the list,
592 * nr_active, and the list:
0793a61d 593 */
a308444c 594 spinlock_t lock;
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595 /*
596 * Protect the list of counters. Locking either mutex or lock
597 * is sufficient to ensure the list doesn't change; to change
598 * the list you need to lock both the mutex and the spinlock.
599 */
a308444c 600 struct mutex mutex;
04289bb9 601
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602 struct list_head counter_list;
603 struct list_head event_list;
604 int nr_counters;
605 int nr_active;
606 int is_active;
bfbd3381 607 int nr_stat;
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608 atomic_t refcount;
609 struct task_struct *task;
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610
611 /*
4af4998b 612 * Context clock, runs when context enabled.
53cfbf59 613 */
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614 u64 time;
615 u64 timestamp;
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616
617 /*
618 * These fields let us detect when two contexts have both
619 * been cloned (inherited) from a common ancestor.
620 */
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621 struct perf_counter_context *parent_ctx;
622 u64 parent_gen;
623 u64 generation;
624 int pin_count;
625 struct rcu_head rcu_head;
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626};
627
628/**
629 * struct perf_counter_cpu_context - per cpu counter context structure
630 */
631struct perf_cpu_context {
632 struct perf_counter_context ctx;
633 struct perf_counter_context *task_ctx;
634 int active_oncpu;
635 int max_pertask;
3b6f9e5c 636 int exclusive;
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637
638 /*
639 * Recursion avoidance:
640 *
641 * task, softirq, irq, nmi context
642 */
22a4f650 643 int recursion[4];
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644};
645
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646#ifdef CONFIG_PERF_COUNTERS
647
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648/*
649 * Set by architecture code:
650 */
651extern int perf_max_counters;
652
4aeb0b42 653extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
621a01ea 654
0793a61d 655extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
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656extern void perf_counter_task_sched_out(struct task_struct *task,
657 struct task_struct *next, int cpu);
0793a61d 658extern void perf_counter_task_tick(struct task_struct *task, int cpu);
6ab423e0 659extern int perf_counter_init_task(struct task_struct *child);
9b51f66d 660extern void perf_counter_exit_task(struct task_struct *child);
bbbee908 661extern void perf_counter_free_task(struct task_struct *task);
9974458e 662extern void set_perf_counter_pending(void);
925d519a 663extern void perf_counter_do_pending(void);
0793a61d 664extern void perf_counter_print_debug(void);
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665extern void __perf_disable(void);
666extern bool __perf_enable(void);
667extern void perf_disable(void);
668extern void perf_enable(void);
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669extern int perf_counter_task_disable(void);
670extern int perf_counter_task_enable(void);
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671extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
672 struct perf_cpu_context *cpuctx,
673 struct perf_counter_context *ctx, int cpu);
37d81828 674extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124 675
df1a132b 676struct perf_sample_data {
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677 struct pt_regs *regs;
678 u64 addr;
679 u64 period;
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680};
681
682extern int perf_counter_overflow(struct perf_counter *counter, int nmi,
683 struct perf_sample_data *data);
684
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685/*
686 * Return 1 for a software counter, 0 for a hardware counter
687 */
688static inline int is_software_counter(struct perf_counter *counter)
689{
a21ca2ca 690 return (counter->attr.type != PERF_TYPE_RAW) &&
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691 (counter->attr.type != PERF_TYPE_HARDWARE) &&
692 (counter->attr.type != PERF_TYPE_HW_CACHE);
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693}
694
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695extern atomic_t perf_swcounter_enabled[PERF_COUNT_SW_MAX];
696
697extern void __perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
698
699static inline void
700perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs, u64 addr)
701{
702 if (atomic_read(&perf_swcounter_enabled[event]))
703 __perf_swcounter_event(event, nr, nmi, regs, addr);
704}
15dbf27c 705
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706extern void __perf_counter_mmap(struct vm_area_struct *vma);
707
708static inline void perf_counter_mmap(struct vm_area_struct *vma)
709{
710 if (vma->vm_flags & VM_EXEC)
711 __perf_counter_mmap(vma);
712}
0a4a9391 713
8d1b2d93 714extern void perf_counter_comm(struct task_struct *tsk);
60313ebe 715extern void perf_counter_fork(struct task_struct *tsk);
8d1b2d93 716
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717extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
718
0764771d 719extern int sysctl_perf_counter_paranoid;
c5078f78 720extern int sysctl_perf_counter_mlock;
df58ab24 721extern int sysctl_perf_counter_sample_rate;
1ccd1549 722
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723extern void perf_counter_init(void);
724
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725#ifndef perf_misc_flags
726#define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
727 PERF_EVENT_MISC_KERNEL)
728#define perf_instruction_pointer(regs) instruction_pointer(regs)
729#endif
730
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731#else
732static inline void
733perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
734static inline void
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735perf_counter_task_sched_out(struct task_struct *task,
736 struct task_struct *next, int cpu) { }
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737static inline void
738perf_counter_task_tick(struct task_struct *task, int cpu) { }
d3e78ee3 739static inline int perf_counter_init_task(struct task_struct *child) { return 0; }
9b51f66d 740static inline void perf_counter_exit_task(struct task_struct *child) { }
bbbee908 741static inline void perf_counter_free_task(struct task_struct *task) { }
925d519a 742static inline void perf_counter_do_pending(void) { }
0793a61d 743static inline void perf_counter_print_debug(void) { }
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744static inline void perf_disable(void) { }
745static inline void perf_enable(void) { }
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746static inline int perf_counter_task_disable(void) { return -EINVAL; }
747static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c 748
925d519a 749static inline void
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750perf_swcounter_event(u32 event, u64 nr, int nmi,
751 struct pt_regs *regs, u64 addr) { }
0a4a9391 752
089dd79d 753static inline void perf_counter_mmap(struct vm_area_struct *vma) { }
8d1b2d93 754static inline void perf_counter_comm(struct task_struct *tsk) { }
60313ebe 755static inline void perf_counter_fork(struct task_struct *tsk) { }
0d905bca 756static inline void perf_counter_init(void) { }
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757#endif
758
f3dfd265 759#endif /* __KERNEL__ */
0793a61d 760#endif /* _LINUX_PERF_COUNTER_H */