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0793a61d TG |
1 | /* |
2 | * Performance counters: | |
3 | * | |
4 | * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar | |
6 | * | |
7 | * Data type definitions, declarations, prototypes. | |
8 | * | |
9 | * Started by: Thomas Gleixner and Ingo Molnar | |
10 | * | |
11 | * For licencing details see kernel-base/COPYING | |
12 | */ | |
13 | #ifndef _LINUX_PERF_COUNTER_H | |
14 | #define _LINUX_PERF_COUNTER_H | |
15 | ||
f3dfd265 PM |
16 | #include <linux/types.h> |
17 | #include <linux/ioctl.h> | |
9aaa131a | 18 | #include <asm/byteorder.h> |
0793a61d TG |
19 | |
20 | /* | |
9f66a381 IM |
21 | * User-space ABI bits: |
22 | */ | |
23 | ||
24 | /* | |
b8e83514 | 25 | * hw_event.type |
0793a61d | 26 | */ |
b8e83514 PZ |
27 | enum perf_event_types { |
28 | PERF_TYPE_HARDWARE = 0, | |
29 | PERF_TYPE_SOFTWARE = 1, | |
30 | PERF_TYPE_TRACEPOINT = 2, | |
31 | ||
0793a61d | 32 | /* |
b8e83514 | 33 | * available TYPE space, raw is the max value. |
0793a61d | 34 | */ |
9f66a381 | 35 | |
b8e83514 PZ |
36 | PERF_TYPE_RAW = 128, |
37 | }; | |
6c594c21 | 38 | |
b8e83514 PZ |
39 | /* |
40 | * Generalized performance counter event types, used by the hw_event.event_id | |
41 | * parameter of the sys_perf_counter_open() syscall: | |
42 | */ | |
43 | enum hw_event_ids { | |
9f66a381 | 44 | /* |
b8e83514 | 45 | * Common hardware events, generalized by the kernel: |
9f66a381 | 46 | */ |
b8e83514 PZ |
47 | PERF_COUNT_CPU_CYCLES = 0, |
48 | PERF_COUNT_INSTRUCTIONS = 1, | |
49 | PERF_COUNT_CACHE_REFERENCES = 2, | |
50 | PERF_COUNT_CACHE_MISSES = 3, | |
51 | PERF_COUNT_BRANCH_INSTRUCTIONS = 4, | |
52 | PERF_COUNT_BRANCH_MISSES = 5, | |
53 | PERF_COUNT_BUS_CYCLES = 6, | |
54 | ||
55 | PERF_HW_EVENTS_MAX = 7, | |
56 | }; | |
e077df4f | 57 | |
b8e83514 PZ |
58 | /* |
59 | * Special "software" counters provided by the kernel, even if the hardware | |
60 | * does not support performance counters. These counters measure various | |
61 | * physical and sw events of the kernel (and allow the profiling of them as | |
62 | * well): | |
63 | */ | |
64 | enum sw_event_ids { | |
65 | PERF_COUNT_CPU_CLOCK = 0, | |
66 | PERF_COUNT_TASK_CLOCK = 1, | |
67 | PERF_COUNT_PAGE_FAULTS = 2, | |
68 | PERF_COUNT_CONTEXT_SWITCHES = 3, | |
69 | PERF_COUNT_CPU_MIGRATIONS = 4, | |
70 | PERF_COUNT_PAGE_FAULTS_MIN = 5, | |
71 | PERF_COUNT_PAGE_FAULTS_MAJ = 6, | |
72 | ||
73 | PERF_SW_EVENTS_MAX = 7, | |
0793a61d TG |
74 | }; |
75 | ||
f4a2deb4 PZ |
76 | #define __PERF_COUNTER_MASK(name) \ |
77 | (((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \ | |
78 | PERF_COUNTER_##name##_SHIFT) | |
79 | ||
80 | #define PERF_COUNTER_RAW_BITS 1 | |
81 | #define PERF_COUNTER_RAW_SHIFT 63 | |
82 | #define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW) | |
83 | ||
84 | #define PERF_COUNTER_CONFIG_BITS 63 | |
85 | #define PERF_COUNTER_CONFIG_SHIFT 0 | |
86 | #define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG) | |
87 | ||
88 | #define PERF_COUNTER_TYPE_BITS 7 | |
89 | #define PERF_COUNTER_TYPE_SHIFT 56 | |
90 | #define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE) | |
91 | ||
92 | #define PERF_COUNTER_EVENT_BITS 56 | |
93 | #define PERF_COUNTER_EVENT_SHIFT 0 | |
94 | #define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT) | |
95 | ||
8a057d84 PZ |
96 | /* |
97 | * Bits that can be set in hw_event.record_type to request information | |
98 | * in the overflow packets. | |
99 | */ | |
100 | enum perf_counter_record_format { | |
101 | PERF_RECORD_IP = 1U << 0, | |
102 | PERF_RECORD_TID = 1U << 1, | |
4d855457 | 103 | PERF_RECORD_TIME = 1U << 2, |
78f13e95 PZ |
104 | PERF_RECORD_ADDR = 1U << 3, |
105 | PERF_RECORD_GROUP = 1U << 4, | |
106 | PERF_RECORD_CALLCHAIN = 1U << 5, | |
a85f61ab | 107 | PERF_RECORD_CONFIG = 1U << 6, |
f370e1e2 | 108 | PERF_RECORD_CPU = 1U << 7, |
8a057d84 PZ |
109 | }; |
110 | ||
53cfbf59 PM |
111 | /* |
112 | * Bits that can be set in hw_event.read_format to request that | |
113 | * reads on the counter should return the indicated quantities, | |
114 | * in increasing order of bit value, after the counter value. | |
115 | */ | |
116 | enum perf_counter_read_format { | |
117 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1, | |
118 | PERF_FORMAT_TOTAL_TIME_RUNNING = 2, | |
119 | }; | |
120 | ||
9f66a381 IM |
121 | /* |
122 | * Hardware event to monitor via a performance monitoring counter: | |
123 | */ | |
124 | struct perf_counter_hw_event { | |
f4a2deb4 PZ |
125 | /* |
126 | * The MSB of the config word signifies if the rest contains cpu | |
127 | * specific (raw) counter configuration data, if unset, the next | |
128 | * 7 bits are an event type and the rest of the bits are the event | |
129 | * identifier. | |
130 | */ | |
131 | __u64 config; | |
9f66a381 | 132 | |
f3dfd265 | 133 | __u64 irq_period; |
8a057d84 PZ |
134 | __u32 record_type; |
135 | __u32 read_format; | |
9f66a381 | 136 | |
2743a5b0 | 137 | __u64 disabled : 1, /* off by default */ |
0475f9ea | 138 | nmi : 1, /* NMI sampling */ |
0475f9ea PM |
139 | inherit : 1, /* children inherit it */ |
140 | pinned : 1, /* must always be on PMU */ | |
141 | exclusive : 1, /* only group on PMU */ | |
142 | exclude_user : 1, /* don't count user */ | |
143 | exclude_kernel : 1, /* ditto kernel */ | |
144 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 145 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 PZ |
146 | mmap : 1, /* include mmap data */ |
147 | munmap : 1, /* include munmap data */ | |
8d1b2d93 | 148 | comm : 1, /* include comm data */ |
0475f9ea | 149 | |
8d1b2d93 | 150 | __reserved_1 : 52; |
2743a5b0 PM |
151 | |
152 | __u32 extra_config_len; | |
c457810a | 153 | __u32 wakeup_events; /* wakeup every n events */ |
9f66a381 | 154 | |
f3dfd265 | 155 | __u64 __reserved_2; |
2743a5b0 | 156 | __u64 __reserved_3; |
eab656ae TG |
157 | }; |
158 | ||
d859e29f PM |
159 | /* |
160 | * Ioctls that can be done on a perf counter fd: | |
161 | */ | |
3df5edad PZ |
162 | #define PERF_COUNTER_IOC_ENABLE _IOW('$', 0, u32) |
163 | #define PERF_COUNTER_IOC_DISABLE _IOW('$', 1, u32) | |
79f14641 | 164 | #define PERF_COUNTER_IOC_REFRESH _IOW('$', 2, u32) |
3df5edad PZ |
165 | #define PERF_COUNTER_IOC_RESET _IOW('$', 3, u32) |
166 | ||
167 | enum perf_counter_ioc_flags { | |
168 | PERF_IOC_FLAG_GROUP = 1U << 0, | |
169 | }; | |
d859e29f | 170 | |
37d81828 PM |
171 | /* |
172 | * Structure of the page that can be mapped via mmap | |
173 | */ | |
174 | struct perf_counter_mmap_page { | |
175 | __u32 version; /* version number of this structure */ | |
176 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
177 | |
178 | /* | |
179 | * Bits needed to read the hw counters in user-space. | |
180 | * | |
92f22a38 PZ |
181 | * u32 seq; |
182 | * s64 count; | |
38ff667b | 183 | * |
a2e87d06 PZ |
184 | * do { |
185 | * seq = pc->lock; | |
38ff667b | 186 | * |
a2e87d06 PZ |
187 | * barrier() |
188 | * if (pc->index) { | |
189 | * count = pmc_read(pc->index - 1); | |
190 | * count += pc->offset; | |
191 | * } else | |
192 | * goto regular_read; | |
38ff667b | 193 | * |
a2e87d06 PZ |
194 | * barrier(); |
195 | * } while (pc->lock != seq); | |
38ff667b | 196 | * |
92f22a38 PZ |
197 | * NOTE: for obvious reason this only works on self-monitoring |
198 | * processes. | |
38ff667b | 199 | */ |
37d81828 PM |
200 | __u32 lock; /* seqlock for synchronization */ |
201 | __u32 index; /* hardware counter identifier */ | |
202 | __s64 offset; /* add to hardware counter value */ | |
7b732a75 | 203 | |
38ff667b PZ |
204 | /* |
205 | * Control data for the mmap() data buffer. | |
206 | * | |
207 | * User-space reading this value should issue an rmb(), on SMP capable | |
208 | * platforms, after reading this value -- see perf_counter_wakeup(). | |
209 | */ | |
7b732a75 | 210 | __u32 data_head; /* head in the data section */ |
37d81828 PM |
211 | }; |
212 | ||
6b6e5486 PZ |
213 | #define PERF_EVENT_MISC_KERNEL (1 << 0) |
214 | #define PERF_EVENT_MISC_USER (1 << 1) | |
215 | #define PERF_EVENT_MISC_OVERFLOW (1 << 2) | |
6fab0192 | 216 | |
5c148194 PZ |
217 | struct perf_event_header { |
218 | __u32 type; | |
6fab0192 PZ |
219 | __u16 misc; |
220 | __u16 size; | |
5c148194 PZ |
221 | }; |
222 | ||
223 | enum perf_event_type { | |
5ed00415 | 224 | |
0c593b34 PZ |
225 | /* |
226 | * The MMAP events record the PROT_EXEC mappings so that we can | |
227 | * correlate userspace IPs to code. They have the following structure: | |
228 | * | |
229 | * struct { | |
230 | * struct perf_event_header header; | |
231 | * | |
232 | * u32 pid, tid; | |
233 | * u64 addr; | |
234 | * u64 len; | |
235 | * u64 pgoff; | |
236 | * char filename[]; | |
237 | * }; | |
238 | */ | |
8a057d84 PZ |
239 | PERF_EVENT_MMAP = 1, |
240 | PERF_EVENT_MUNMAP = 2, | |
0a4a9391 | 241 | |
8d1b2d93 PZ |
242 | /* |
243 | * struct { | |
244 | * struct perf_event_header header; | |
245 | * | |
246 | * u32 pid, tid; | |
247 | * char comm[]; | |
248 | * }; | |
249 | */ | |
250 | PERF_EVENT_COMM = 3, | |
251 | ||
8a057d84 | 252 | /* |
6b6e5486 PZ |
253 | * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field |
254 | * will be PERF_RECORD_* | |
0c593b34 PZ |
255 | * |
256 | * struct { | |
257 | * struct perf_event_header header; | |
258 | * | |
6b6e5486 PZ |
259 | * { u64 ip; } && PERF_RECORD_IP |
260 | * { u32 pid, tid; } && PERF_RECORD_TID | |
4d855457 | 261 | * { u64 time; } && PERF_RECORD_TIME |
78f13e95 | 262 | * { u64 addr; } && PERF_RECORD_ADDR |
a85f61ab | 263 | * { u64 config; } && PERF_RECORD_CONFIG |
f370e1e2 | 264 | * { u32 cpu, res; } && PERF_RECORD_CPU |
0c593b34 PZ |
265 | * |
266 | * { u64 nr; | |
6b6e5486 | 267 | * { u64 event, val; } cnt[nr]; } && PERF_RECORD_GROUP |
0c593b34 PZ |
268 | * |
269 | * { u16 nr, | |
270 | * hv, | |
271 | * kernel, | |
272 | * user; | |
6b6e5486 | 273 | * u64 ips[nr]; } && PERF_RECORD_CALLCHAIN |
0c593b34 | 274 | * }; |
8a057d84 | 275 | */ |
5c148194 PZ |
276 | }; |
277 | ||
f3dfd265 | 278 | #ifdef __KERNEL__ |
9f66a381 | 279 | /* |
f3dfd265 | 280 | * Kernel-internal data types and definitions: |
9f66a381 IM |
281 | */ |
282 | ||
f3dfd265 PM |
283 | #ifdef CONFIG_PERF_COUNTERS |
284 | # include <asm/perf_counter.h> | |
285 | #endif | |
286 | ||
287 | #include <linux/list.h> | |
288 | #include <linux/mutex.h> | |
289 | #include <linux/rculist.h> | |
290 | #include <linux/rcupdate.h> | |
291 | #include <linux/spinlock.h> | |
d6d020e9 | 292 | #include <linux/hrtimer.h> |
3c446b3d | 293 | #include <linux/fs.h> |
f3dfd265 PM |
294 | #include <asm/atomic.h> |
295 | ||
296 | struct task_struct; | |
297 | ||
f4a2deb4 PZ |
298 | static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event) |
299 | { | |
300 | return hw_event->config & PERF_COUNTER_RAW_MASK; | |
301 | } | |
302 | ||
303 | static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event) | |
304 | { | |
305 | return hw_event->config & PERF_COUNTER_CONFIG_MASK; | |
306 | } | |
307 | ||
308 | static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event) | |
309 | { | |
310 | return (hw_event->config & PERF_COUNTER_TYPE_MASK) >> | |
311 | PERF_COUNTER_TYPE_SHIFT; | |
312 | } | |
313 | ||
314 | static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event) | |
315 | { | |
316 | return hw_event->config & PERF_COUNTER_EVENT_MASK; | |
317 | } | |
318 | ||
0793a61d | 319 | /** |
9f66a381 | 320 | * struct hw_perf_counter - performance counter hardware details: |
0793a61d TG |
321 | */ |
322 | struct hw_perf_counter { | |
ee06094f | 323 | #ifdef CONFIG_PERF_COUNTERS |
d6d020e9 PZ |
324 | union { |
325 | struct { /* hardware */ | |
326 | u64 config; | |
327 | unsigned long config_base; | |
328 | unsigned long counter_base; | |
329 | int nmi; | |
6f00cada | 330 | int idx; |
d6d020e9 PZ |
331 | }; |
332 | union { /* software */ | |
333 | atomic64_t count; | |
334 | struct hrtimer hrtimer; | |
335 | }; | |
336 | }; | |
ee06094f | 337 | atomic64_t prev_count; |
9f66a381 | 338 | u64 irq_period; |
ee06094f IM |
339 | atomic64_t period_left; |
340 | #endif | |
0793a61d TG |
341 | }; |
342 | ||
621a01ea IM |
343 | struct perf_counter; |
344 | ||
345 | /** | |
4aeb0b42 | 346 | * struct pmu - generic performance monitoring unit |
621a01ea | 347 | */ |
4aeb0b42 | 348 | struct pmu { |
95cdd2e7 | 349 | int (*enable) (struct perf_counter *counter); |
7671581f IM |
350 | void (*disable) (struct perf_counter *counter); |
351 | void (*read) (struct perf_counter *counter); | |
621a01ea IM |
352 | }; |
353 | ||
6a930700 IM |
354 | /** |
355 | * enum perf_counter_active_state - the states of a counter | |
356 | */ | |
357 | enum perf_counter_active_state { | |
3b6f9e5c | 358 | PERF_COUNTER_STATE_ERROR = -2, |
6a930700 IM |
359 | PERF_COUNTER_STATE_OFF = -1, |
360 | PERF_COUNTER_STATE_INACTIVE = 0, | |
361 | PERF_COUNTER_STATE_ACTIVE = 1, | |
362 | }; | |
363 | ||
9b51f66d IM |
364 | struct file; |
365 | ||
7b732a75 PZ |
366 | struct perf_mmap_data { |
367 | struct rcu_head rcu_head; | |
8740f941 | 368 | int nr_pages; /* nr of data pages */ |
c5078f78 | 369 | int nr_locked; /* nr pages mlocked */ |
8740f941 | 370 | |
c33a0bc4 | 371 | atomic_t poll; /* POLL_ for wakeups */ |
8740f941 PZ |
372 | atomic_t head; /* write position */ |
373 | atomic_t events; /* event limit */ | |
374 | ||
c66de4a5 | 375 | atomic_t done_head; /* completed head */ |
c33a0bc4 PZ |
376 | atomic_t lock; /* concurrent writes */ |
377 | ||
c66de4a5 PZ |
378 | atomic_t wakeup; /* needs a wakeup */ |
379 | ||
7b732a75 PZ |
380 | struct perf_counter_mmap_page *user_page; |
381 | void *data_pages[0]; | |
382 | }; | |
383 | ||
671dec5d PZ |
384 | struct perf_pending_entry { |
385 | struct perf_pending_entry *next; | |
386 | void (*func)(struct perf_pending_entry *); | |
925d519a PZ |
387 | }; |
388 | ||
0793a61d TG |
389 | /** |
390 | * struct perf_counter - performance counter kernel representation: | |
391 | */ | |
392 | struct perf_counter { | |
ee06094f | 393 | #ifdef CONFIG_PERF_COUNTERS |
04289bb9 | 394 | struct list_head list_entry; |
592903cd | 395 | struct list_head event_entry; |
04289bb9 | 396 | struct list_head sibling_list; |
5c148194 | 397 | int nr_siblings; |
04289bb9 | 398 | struct perf_counter *group_leader; |
4aeb0b42 | 399 | const struct pmu *pmu; |
04289bb9 | 400 | |
6a930700 | 401 | enum perf_counter_active_state state; |
c07c99b6 | 402 | enum perf_counter_active_state prev_state; |
0793a61d | 403 | atomic64_t count; |
ee06094f | 404 | |
53cfbf59 PM |
405 | /* |
406 | * These are the total time in nanoseconds that the counter | |
407 | * has been enabled (i.e. eligible to run, and the task has | |
408 | * been scheduled in, if this is a per-task counter) | |
409 | * and running (scheduled onto the CPU), respectively. | |
410 | * | |
411 | * They are computed from tstamp_enabled, tstamp_running and | |
412 | * tstamp_stopped when the counter is in INACTIVE or ACTIVE state. | |
413 | */ | |
414 | u64 total_time_enabled; | |
415 | u64 total_time_running; | |
416 | ||
417 | /* | |
418 | * These are timestamps used for computing total_time_enabled | |
419 | * and total_time_running when the counter is in INACTIVE or | |
420 | * ACTIVE state, measured in nanoseconds from an arbitrary point | |
421 | * in time. | |
422 | * tstamp_enabled: the notional time when the counter was enabled | |
423 | * tstamp_running: the notional time when the counter was scheduled on | |
424 | * tstamp_stopped: in INACTIVE state, the notional time when the | |
425 | * counter was scheduled off. | |
426 | */ | |
427 | u64 tstamp_enabled; | |
428 | u64 tstamp_running; | |
429 | u64 tstamp_stopped; | |
430 | ||
9f66a381 | 431 | struct perf_counter_hw_event hw_event; |
0793a61d TG |
432 | struct hw_perf_counter hw; |
433 | ||
434 | struct perf_counter_context *ctx; | |
435 | struct task_struct *task; | |
9b51f66d | 436 | struct file *filp; |
0793a61d | 437 | |
9b51f66d | 438 | struct perf_counter *parent; |
d859e29f PM |
439 | struct list_head child_list; |
440 | ||
53cfbf59 PM |
441 | /* |
442 | * These accumulate total time (in nanoseconds) that children | |
443 | * counters have been enabled and running, respectively. | |
444 | */ | |
445 | atomic64_t child_total_time_enabled; | |
446 | atomic64_t child_total_time_running; | |
447 | ||
0793a61d | 448 | /* |
d859e29f | 449 | * Protect attach/detach and child_list: |
0793a61d TG |
450 | */ |
451 | struct mutex mutex; | |
452 | ||
453 | int oncpu; | |
454 | int cpu; | |
455 | ||
7b732a75 PZ |
456 | /* mmap bits */ |
457 | struct mutex mmap_mutex; | |
458 | atomic_t mmap_count; | |
459 | struct perf_mmap_data *data; | |
37d81828 | 460 | |
7b732a75 | 461 | /* poll related */ |
0793a61d | 462 | wait_queue_head_t waitq; |
3c446b3d | 463 | struct fasync_struct *fasync; |
79f14641 PZ |
464 | |
465 | /* delayed work for NMIs and such */ | |
466 | int pending_wakeup; | |
4c9e2542 | 467 | int pending_kill; |
79f14641 | 468 | int pending_disable; |
671dec5d | 469 | struct perf_pending_entry pending; |
592903cd | 470 | |
79f14641 PZ |
471 | atomic_t event_limit; |
472 | ||
e077df4f | 473 | void (*destroy)(struct perf_counter *); |
592903cd | 474 | struct rcu_head rcu_head; |
ee06094f | 475 | #endif |
0793a61d TG |
476 | }; |
477 | ||
478 | /** | |
479 | * struct perf_counter_context - counter context structure | |
480 | * | |
481 | * Used as a container for task counters and CPU counters as well: | |
482 | */ | |
483 | struct perf_counter_context { | |
484 | #ifdef CONFIG_PERF_COUNTERS | |
485 | /* | |
d859e29f PM |
486 | * Protect the states of the counters in the list, |
487 | * nr_active, and the list: | |
0793a61d TG |
488 | */ |
489 | spinlock_t lock; | |
d859e29f PM |
490 | /* |
491 | * Protect the list of counters. Locking either mutex or lock | |
492 | * is sufficient to ensure the list doesn't change; to change | |
493 | * the list you need to lock both the mutex and the spinlock. | |
494 | */ | |
495 | struct mutex mutex; | |
04289bb9 IM |
496 | |
497 | struct list_head counter_list; | |
592903cd | 498 | struct list_head event_list; |
0793a61d TG |
499 | int nr_counters; |
500 | int nr_active; | |
d859e29f | 501 | int is_active; |
0793a61d | 502 | struct task_struct *task; |
53cfbf59 PM |
503 | |
504 | /* | |
4af4998b | 505 | * Context clock, runs when context enabled. |
53cfbf59 | 506 | */ |
4af4998b PZ |
507 | u64 time; |
508 | u64 timestamp; | |
0793a61d TG |
509 | #endif |
510 | }; | |
511 | ||
512 | /** | |
513 | * struct perf_counter_cpu_context - per cpu counter context structure | |
514 | */ | |
515 | struct perf_cpu_context { | |
516 | struct perf_counter_context ctx; | |
517 | struct perf_counter_context *task_ctx; | |
518 | int active_oncpu; | |
519 | int max_pertask; | |
3b6f9e5c | 520 | int exclusive; |
96f6d444 PZ |
521 | |
522 | /* | |
523 | * Recursion avoidance: | |
524 | * | |
525 | * task, softirq, irq, nmi context | |
526 | */ | |
527 | int recursion[4]; | |
0793a61d TG |
528 | }; |
529 | ||
829b42dd RR |
530 | #ifdef CONFIG_PERF_COUNTERS |
531 | ||
0793a61d TG |
532 | /* |
533 | * Set by architecture code: | |
534 | */ | |
535 | extern int perf_max_counters; | |
536 | ||
4aeb0b42 | 537 | extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter); |
621a01ea | 538 | |
0793a61d TG |
539 | extern void perf_counter_task_sched_in(struct task_struct *task, int cpu); |
540 | extern void perf_counter_task_sched_out(struct task_struct *task, int cpu); | |
541 | extern void perf_counter_task_tick(struct task_struct *task, int cpu); | |
9b51f66d IM |
542 | extern void perf_counter_init_task(struct task_struct *child); |
543 | extern void perf_counter_exit_task(struct task_struct *child); | |
925d519a | 544 | extern void perf_counter_do_pending(void); |
0793a61d | 545 | extern void perf_counter_print_debug(void); |
1b023a96 | 546 | extern void perf_counter_unthrottle(void); |
9e35ad38 PZ |
547 | extern void __perf_disable(void); |
548 | extern bool __perf_enable(void); | |
549 | extern void perf_disable(void); | |
550 | extern void perf_enable(void); | |
1d1c7ddb IM |
551 | extern int perf_counter_task_disable(void); |
552 | extern int perf_counter_task_enable(void); | |
3cbed429 PM |
553 | extern int hw_perf_group_sched_in(struct perf_counter *group_leader, |
554 | struct perf_cpu_context *cpuctx, | |
555 | struct perf_counter_context *ctx, int cpu); | |
37d81828 | 556 | extern void perf_counter_update_userpage(struct perf_counter *counter); |
5c92d124 | 557 | |
f6c7d5fe | 558 | extern int perf_counter_overflow(struct perf_counter *counter, |
78f13e95 | 559 | int nmi, struct pt_regs *regs, u64 addr); |
3b6f9e5c PM |
560 | /* |
561 | * Return 1 for a software counter, 0 for a hardware counter | |
562 | */ | |
563 | static inline int is_software_counter(struct perf_counter *counter) | |
564 | { | |
f4a2deb4 PZ |
565 | return !perf_event_raw(&counter->hw_event) && |
566 | perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE; | |
3b6f9e5c PM |
567 | } |
568 | ||
78f13e95 | 569 | extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64); |
15dbf27c | 570 | |
0a4a9391 PZ |
571 | extern void perf_counter_mmap(unsigned long addr, unsigned long len, |
572 | unsigned long pgoff, struct file *file); | |
573 | ||
574 | extern void perf_counter_munmap(unsigned long addr, unsigned long len, | |
575 | unsigned long pgoff, struct file *file); | |
576 | ||
8d1b2d93 PZ |
577 | extern void perf_counter_comm(struct task_struct *tsk); |
578 | ||
9c03d88e | 579 | #define MAX_STACK_DEPTH 255 |
394ee076 PZ |
580 | |
581 | struct perf_callchain_entry { | |
9c03d88e | 582 | u16 nr, hv, kernel, user; |
394ee076 PZ |
583 | u64 ip[MAX_STACK_DEPTH]; |
584 | }; | |
585 | ||
586 | extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs); | |
587 | ||
1ccd1549 | 588 | extern int sysctl_perf_counter_priv; |
c5078f78 | 589 | extern int sysctl_perf_counter_mlock; |
1ccd1549 | 590 | |
0d905bca IM |
591 | extern void perf_counter_init(void); |
592 | ||
0793a61d TG |
593 | #else |
594 | static inline void | |
595 | perf_counter_task_sched_in(struct task_struct *task, int cpu) { } | |
596 | static inline void | |
597 | perf_counter_task_sched_out(struct task_struct *task, int cpu) { } | |
598 | static inline void | |
599 | perf_counter_task_tick(struct task_struct *task, int cpu) { } | |
9b51f66d IM |
600 | static inline void perf_counter_init_task(struct task_struct *child) { } |
601 | static inline void perf_counter_exit_task(struct task_struct *child) { } | |
925d519a | 602 | static inline void perf_counter_do_pending(void) { } |
0793a61d | 603 | static inline void perf_counter_print_debug(void) { } |
1b023a96 | 604 | static inline void perf_counter_unthrottle(void) { } |
9e35ad38 PZ |
605 | static inline void perf_disable(void) { } |
606 | static inline void perf_enable(void) { } | |
1d1c7ddb IM |
607 | static inline int perf_counter_task_disable(void) { return -EINVAL; } |
608 | static inline int perf_counter_task_enable(void) { return -EINVAL; } | |
15dbf27c | 609 | |
925d519a | 610 | static inline void |
78f13e95 PZ |
611 | perf_swcounter_event(u32 event, u64 nr, int nmi, |
612 | struct pt_regs *regs, u64 addr) { } | |
0a4a9391 PZ |
613 | |
614 | static inline void | |
615 | perf_counter_mmap(unsigned long addr, unsigned long len, | |
616 | unsigned long pgoff, struct file *file) { } | |
617 | ||
618 | static inline void | |
619 | perf_counter_munmap(unsigned long addr, unsigned long len, | |
0d905bca | 620 | unsigned long pgoff, struct file *file) { } |
0a4a9391 | 621 | |
8d1b2d93 | 622 | static inline void perf_counter_comm(struct task_struct *tsk) { } |
0d905bca | 623 | static inline void perf_counter_init(void) { } |
0793a61d TG |
624 | #endif |
625 | ||
f3dfd265 | 626 | #endif /* __KERNEL__ */ |
0793a61d | 627 | #endif /* _LINUX_PERF_COUNTER_H */ |