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1/*
2 * Performance counters:
3 *
4 * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
6 *
7 * Data type definitions, declarations, prototypes.
8 *
9 * Started by: Thomas Gleixner and Ingo Molnar
10 *
11 * For licencing details see kernel-base/COPYING
12 */
13#ifndef _LINUX_PERF_COUNTER_H
14#define _LINUX_PERF_COUNTER_H
15
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16#include <linux/types.h>
17#include <linux/ioctl.h>
9aaa131a 18#include <asm/byteorder.h>
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19
20/*
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21 * User-space ABI bits:
22 */
23
24/*
b8e83514 25 * hw_event.type
0793a61d 26 */
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27enum perf_event_types {
28 PERF_TYPE_HARDWARE = 0,
29 PERF_TYPE_SOFTWARE = 1,
30 PERF_TYPE_TRACEPOINT = 2,
31
0793a61d 32 /*
b8e83514 33 * available TYPE space, raw is the max value.
0793a61d 34 */
9f66a381 35
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36 PERF_TYPE_RAW = 128,
37};
6c594c21 38
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39/*
40 * Generalized performance counter event types, used by the hw_event.event_id
41 * parameter of the sys_perf_counter_open() syscall:
42 */
43enum hw_event_ids {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
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47 PERF_COUNT_CPU_CYCLES = 0,
48 PERF_COUNT_INSTRUCTIONS = 1,
49 PERF_COUNT_CACHE_REFERENCES = 2,
50 PERF_COUNT_CACHE_MISSES = 3,
51 PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_BRANCH_MISSES = 5,
53 PERF_COUNT_BUS_CYCLES = 6,
54
55 PERF_HW_EVENTS_MAX = 7,
56};
e077df4f 57
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58/*
59 * Special "software" counters provided by the kernel, even if the hardware
60 * does not support performance counters. These counters measure various
61 * physical and sw events of the kernel (and allow the profiling of them as
62 * well):
63 */
64enum sw_event_ids {
65 PERF_COUNT_CPU_CLOCK = 0,
66 PERF_COUNT_TASK_CLOCK = 1,
67 PERF_COUNT_PAGE_FAULTS = 2,
68 PERF_COUNT_CONTEXT_SWITCHES = 3,
69 PERF_COUNT_CPU_MIGRATIONS = 4,
70 PERF_COUNT_PAGE_FAULTS_MIN = 5,
71 PERF_COUNT_PAGE_FAULTS_MAJ = 6,
72
73 PERF_SW_EVENTS_MAX = 7,
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74};
75
0127c3ea 76#define __PERF_COUNTER_MASK(name) \
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77 (((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
78 PERF_COUNTER_##name##_SHIFT)
79
80#define PERF_COUNTER_RAW_BITS 1
81#define PERF_COUNTER_RAW_SHIFT 63
82#define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
83
84#define PERF_COUNTER_CONFIG_BITS 63
85#define PERF_COUNTER_CONFIG_SHIFT 0
86#define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
87
88#define PERF_COUNTER_TYPE_BITS 7
89#define PERF_COUNTER_TYPE_SHIFT 56
90#define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
91
92#define PERF_COUNTER_EVENT_BITS 56
93#define PERF_COUNTER_EVENT_SHIFT 0
94#define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
95
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96/*
97 * Bits that can be set in hw_event.record_type to request information
98 * in the overflow packets.
99 */
100enum perf_counter_record_format {
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101 PERF_RECORD_IP = 1U << 0,
102 PERF_RECORD_TID = 1U << 1,
103 PERF_RECORD_TIME = 1U << 2,
104 PERF_RECORD_ADDR = 1U << 3,
105 PERF_RECORD_GROUP = 1U << 4,
106 PERF_RECORD_CALLCHAIN = 1U << 5,
107 PERF_RECORD_CONFIG = 1U << 6,
108 PERF_RECORD_CPU = 1U << 7,
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109};
110
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111/*
112 * Bits that can be set in hw_event.read_format to request that
113 * reads on the counter should return the indicated quantities,
114 * in increasing order of bit value, after the counter value.
115 */
116enum perf_counter_read_format {
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117 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
118 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
119 PERF_FORMAT_ID = 1U << 2,
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120};
121
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122/*
123 * Hardware event to monitor via a performance monitoring counter:
124 */
125struct perf_counter_hw_event {
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126 /*
127 * The MSB of the config word signifies if the rest contains cpu
128 * specific (raw) counter configuration data, if unset, the next
129 * 7 bits are an event type and the rest of the bits are the event
130 * identifier.
131 */
132 __u64 config;
9f66a381 133
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134 union {
135 __u64 irq_period;
136 __u64 irq_freq;
137 };
138
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139 __u32 record_type;
140 __u32 read_format;
9f66a381 141
2743a5b0 142 __u64 disabled : 1, /* off by default */
0475f9ea 143 nmi : 1, /* NMI sampling */
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144 inherit : 1, /* children inherit it */
145 pinned : 1, /* must always be on PMU */
146 exclusive : 1, /* only group on PMU */
147 exclude_user : 1, /* don't count user */
148 exclude_kernel : 1, /* ditto kernel */
149 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 150 exclude_idle : 1, /* don't count when idle */
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151 mmap : 1, /* include mmap data */
152 munmap : 1, /* include munmap data */
8d1b2d93 153 comm : 1, /* include comm data */
60db5e09 154 freq : 1, /* use freq, not period */
0475f9ea 155
60db5e09 156 __reserved_1 : 51;
2743a5b0 157
c457810a 158 __u32 wakeup_events; /* wakeup every n events */
e527ea31 159 __u32 __reserved_2;
9f66a381 160
2743a5b0 161 __u64 __reserved_3;
e527ea31 162 __u64 __reserved_4;
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163};
164
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165/*
166 * Ioctls that can be done on a perf counter fd:
167 */
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168#define PERF_COUNTER_IOC_ENABLE _IOW('$', 0, u32)
169#define PERF_COUNTER_IOC_DISABLE _IOW('$', 1, u32)
79f14641 170#define PERF_COUNTER_IOC_REFRESH _IOW('$', 2, u32)
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171#define PERF_COUNTER_IOC_RESET _IOW('$', 3, u32)
172
173enum perf_counter_ioc_flags {
174 PERF_IOC_FLAG_GROUP = 1U << 0,
175};
d859e29f 176
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177/*
178 * Structure of the page that can be mapped via mmap
179 */
180struct perf_counter_mmap_page {
181 __u32 version; /* version number of this structure */
182 __u32 compat_version; /* lowest version this is compat with */
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183
184 /*
185 * Bits needed to read the hw counters in user-space.
186 *
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187 * u32 seq;
188 * s64 count;
38ff667b 189 *
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190 * do {
191 * seq = pc->lock;
38ff667b 192 *
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193 * barrier()
194 * if (pc->index) {
195 * count = pmc_read(pc->index - 1);
196 * count += pc->offset;
197 * } else
198 * goto regular_read;
38ff667b 199 *
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200 * barrier();
201 * } while (pc->lock != seq);
38ff667b 202 *
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203 * NOTE: for obvious reason this only works on self-monitoring
204 * processes.
38ff667b 205 */
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206 __u32 lock; /* seqlock for synchronization */
207 __u32 index; /* hardware counter identifier */
208 __s64 offset; /* add to hardware counter value */
7b732a75 209
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210 /*
211 * Control data for the mmap() data buffer.
212 *
213 * User-space reading this value should issue an rmb(), on SMP capable
214 * platforms, after reading this value -- see perf_counter_wakeup().
215 */
7b732a75 216 __u32 data_head; /* head in the data section */
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217};
218
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219#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
220#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
6b6e5486 221#define PERF_EVENT_MISC_KERNEL (1 << 0)
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222#define PERF_EVENT_MISC_USER (2 << 0)
223#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
6b6e5486 224#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
6fab0192 225
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226struct perf_event_header {
227 __u32 type;
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228 __u16 misc;
229 __u16 size;
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230};
231
232enum perf_event_type {
5ed00415 233
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234 /*
235 * The MMAP events record the PROT_EXEC mappings so that we can
236 * correlate userspace IPs to code. They have the following structure:
237 *
238 * struct {
0127c3ea 239 * struct perf_event_header header;
0c593b34 240 *
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241 * u32 pid, tid;
242 * u64 addr;
243 * u64 len;
244 * u64 pgoff;
245 * char filename[];
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246 * };
247 */
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248 PERF_EVENT_MMAP = 1,
249 PERF_EVENT_MUNMAP = 2,
0a4a9391 250
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251 /*
252 * struct {
0127c3ea 253 * struct perf_event_header header;
8d1b2d93 254 *
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255 * u32 pid, tid;
256 * char comm[];
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257 * };
258 */
259 PERF_EVENT_COMM = 3,
260
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261 /*
262 * struct {
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263 * struct perf_event_header header;
264 * u64 time;
265 * u64 irq_period;
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266 * };
267 */
268 PERF_EVENT_PERIOD = 4,
269
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270 /*
271 * struct {
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272 * struct perf_event_header header;
273 * u64 time;
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274 * };
275 */
276 PERF_EVENT_THROTTLE = 5,
277 PERF_EVENT_UNTHROTTLE = 6,
278
8a057d84 279 /*
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280 * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
281 * will be PERF_RECORD_*
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282 *
283 * struct {
0127c3ea 284 * struct perf_event_header header;
0c593b34 285 *
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286 * { u64 ip; } && PERF_RECORD_IP
287 * { u32 pid, tid; } && PERF_RECORD_TID
288 * { u64 time; } && PERF_RECORD_TIME
289 * { u64 addr; } && PERF_RECORD_ADDR
290 * { u64 config; } && PERF_RECORD_CONFIG
291 * { u32 cpu, res; } && PERF_RECORD_CPU
0c593b34 292 *
0127c3ea 293 * { u64 nr;
8e5799b1 294 * { u64 id, val; } cnt[nr]; } && PERF_RECORD_GROUP
0c593b34 295 *
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296 * { u16 nr,
297 * hv,
298 * kernel,
299 * user;
300 * u64 ips[nr]; } && PERF_RECORD_CALLCHAIN
0c593b34 301 * };
8a057d84 302 */
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303};
304
f3dfd265 305#ifdef __KERNEL__
9f66a381 306/*
f3dfd265 307 * Kernel-internal data types and definitions:
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308 */
309
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310#ifdef CONFIG_PERF_COUNTERS
311# include <asm/perf_counter.h>
312#endif
313
314#include <linux/list.h>
315#include <linux/mutex.h>
316#include <linux/rculist.h>
317#include <linux/rcupdate.h>
318#include <linux/spinlock.h>
d6d020e9 319#include <linux/hrtimer.h>
3c446b3d 320#include <linux/fs.h>
709e50cf 321#include <linux/pid_namespace.h>
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322#include <asm/atomic.h>
323
324struct task_struct;
325
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326static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
327{
328 return hw_event->config & PERF_COUNTER_RAW_MASK;
329}
330
331static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
332{
333 return hw_event->config & PERF_COUNTER_CONFIG_MASK;
334}
335
336static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
337{
338 return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
339 PERF_COUNTER_TYPE_SHIFT;
340}
341
342static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
343{
344 return hw_event->config & PERF_COUNTER_EVENT_MASK;
345}
346
0793a61d 347/**
9f66a381 348 * struct hw_perf_counter - performance counter hardware details:
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349 */
350struct hw_perf_counter {
ee06094f 351#ifdef CONFIG_PERF_COUNTERS
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352 union {
353 struct { /* hardware */
354 u64 config;
355 unsigned long config_base;
356 unsigned long counter_base;
357 int nmi;
6f00cada 358 int idx;
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359 };
360 union { /* software */
361 atomic64_t count;
362 struct hrtimer hrtimer;
363 };
364 };
ee06094f 365 atomic64_t prev_count;
9f66a381 366 u64 irq_period;
ee06094f 367 atomic64_t period_left;
60db5e09 368 u64 interrupts;
ee06094f 369#endif
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370};
371
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372struct perf_counter;
373
374/**
4aeb0b42 375 * struct pmu - generic performance monitoring unit
621a01ea 376 */
4aeb0b42 377struct pmu {
95cdd2e7 378 int (*enable) (struct perf_counter *counter);
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379 void (*disable) (struct perf_counter *counter);
380 void (*read) (struct perf_counter *counter);
a78ac325 381 void (*unthrottle) (struct perf_counter *counter);
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382};
383
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384/**
385 * enum perf_counter_active_state - the states of a counter
386 */
387enum perf_counter_active_state {
3b6f9e5c 388 PERF_COUNTER_STATE_ERROR = -2,
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389 PERF_COUNTER_STATE_OFF = -1,
390 PERF_COUNTER_STATE_INACTIVE = 0,
391 PERF_COUNTER_STATE_ACTIVE = 1,
392};
393
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394struct file;
395
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396struct perf_mmap_data {
397 struct rcu_head rcu_head;
8740f941 398 int nr_pages; /* nr of data pages */
c5078f78 399 int nr_locked; /* nr pages mlocked */
8740f941 400
c33a0bc4 401 atomic_t poll; /* POLL_ for wakeups */
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402 atomic_t head; /* write position */
403 atomic_t events; /* event limit */
404
c66de4a5 405 atomic_t done_head; /* completed head */
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406 atomic_t lock; /* concurrent writes */
407
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408 atomic_t wakeup; /* needs a wakeup */
409
7b732a75 410 struct perf_counter_mmap_page *user_page;
0127c3ea 411 void *data_pages[0];
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412};
413
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414struct perf_pending_entry {
415 struct perf_pending_entry *next;
416 void (*func)(struct perf_pending_entry *);
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417};
418
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419/**
420 * struct perf_counter - performance counter kernel representation:
421 */
422struct perf_counter {
ee06094f 423#ifdef CONFIG_PERF_COUNTERS
04289bb9 424 struct list_head list_entry;
592903cd 425 struct list_head event_entry;
04289bb9 426 struct list_head sibling_list;
0127c3ea 427 int nr_siblings;
04289bb9 428 struct perf_counter *group_leader;
4aeb0b42 429 const struct pmu *pmu;
04289bb9 430
6a930700 431 enum perf_counter_active_state state;
0793a61d 432 atomic64_t count;
ee06094f 433
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434 /*
435 * These are the total time in nanoseconds that the counter
436 * has been enabled (i.e. eligible to run, and the task has
437 * been scheduled in, if this is a per-task counter)
438 * and running (scheduled onto the CPU), respectively.
439 *
440 * They are computed from tstamp_enabled, tstamp_running and
441 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
442 */
443 u64 total_time_enabled;
444 u64 total_time_running;
445
446 /*
447 * These are timestamps used for computing total_time_enabled
448 * and total_time_running when the counter is in INACTIVE or
449 * ACTIVE state, measured in nanoseconds from an arbitrary point
450 * in time.
451 * tstamp_enabled: the notional time when the counter was enabled
452 * tstamp_running: the notional time when the counter was scheduled on
453 * tstamp_stopped: in INACTIVE state, the notional time when the
454 * counter was scheduled off.
455 */
456 u64 tstamp_enabled;
457 u64 tstamp_running;
458 u64 tstamp_stopped;
459
9f66a381 460 struct perf_counter_hw_event hw_event;
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461 struct hw_perf_counter hw;
462
463 struct perf_counter_context *ctx;
9b51f66d 464 struct file *filp;
0793a61d 465
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466 /*
467 * These accumulate total time (in nanoseconds) that children
468 * counters have been enabled and running, respectively.
469 */
470 atomic64_t child_total_time_enabled;
471 atomic64_t child_total_time_running;
472
0793a61d 473 /*
d859e29f 474 * Protect attach/detach and child_list:
0793a61d 475 */
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476 struct mutex child_mutex;
477 struct list_head child_list;
478 struct perf_counter *parent;
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479
480 int oncpu;
481 int cpu;
482
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483 struct list_head owner_entry;
484 struct task_struct *owner;
485
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486 /* mmap bits */
487 struct mutex mmap_mutex;
488 atomic_t mmap_count;
489 struct perf_mmap_data *data;
37d81828 490
7b732a75 491 /* poll related */
0793a61d 492 wait_queue_head_t waitq;
3c446b3d 493 struct fasync_struct *fasync;
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494
495 /* delayed work for NMIs and such */
496 int pending_wakeup;
4c9e2542 497 int pending_kill;
79f14641 498 int pending_disable;
671dec5d 499 struct perf_pending_entry pending;
592903cd 500
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501 atomic_t event_limit;
502
e077df4f 503 void (*destroy)(struct perf_counter *);
592903cd 504 struct rcu_head rcu_head;
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505
506 struct pid_namespace *ns;
8e5799b1 507 u64 id;
ee06094f 508#endif
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509};
510
511/**
512 * struct perf_counter_context - counter context structure
513 *
514 * Used as a container for task counters and CPU counters as well:
515 */
516struct perf_counter_context {
0793a61d 517 /*
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518 * Protect the states of the counters in the list,
519 * nr_active, and the list:
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520 */
521 spinlock_t lock;
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522 /*
523 * Protect the list of counters. Locking either mutex or lock
524 * is sufficient to ensure the list doesn't change; to change
525 * the list you need to lock both the mutex and the spinlock.
526 */
527 struct mutex mutex;
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528
529 struct list_head counter_list;
592903cd 530 struct list_head event_list;
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531 int nr_counters;
532 int nr_active;
d859e29f 533 int is_active;
a63eaf34 534 atomic_t refcount;
0793a61d 535 struct task_struct *task;
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536
537 /*
4af4998b 538 * Context clock, runs when context enabled.
53cfbf59 539 */
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540 u64 time;
541 u64 timestamp;
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542
543 /*
544 * These fields let us detect when two contexts have both
545 * been cloned (inherited) from a common ancestor.
546 */
547 struct perf_counter_context *parent_ctx;
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548 u64 parent_gen;
549 u64 generation;
25346b93 550 int pin_count;
c93f7669 551 struct rcu_head rcu_head;
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552};
553
554/**
555 * struct perf_counter_cpu_context - per cpu counter context structure
556 */
557struct perf_cpu_context {
558 struct perf_counter_context ctx;
559 struct perf_counter_context *task_ctx;
560 int active_oncpu;
561 int max_pertask;
3b6f9e5c 562 int exclusive;
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563
564 /*
565 * Recursion avoidance:
566 *
567 * task, softirq, irq, nmi context
568 */
22a4f650 569 int recursion[4];
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570};
571
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572#ifdef CONFIG_PERF_COUNTERS
573
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574/*
575 * Set by architecture code:
576 */
577extern int perf_max_counters;
578
4aeb0b42 579extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
621a01ea 580
0793a61d 581extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
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582extern void perf_counter_task_sched_out(struct task_struct *task,
583 struct task_struct *next, int cpu);
0793a61d 584extern void perf_counter_task_tick(struct task_struct *task, int cpu);
6ab423e0 585extern int perf_counter_init_task(struct task_struct *child);
9b51f66d 586extern void perf_counter_exit_task(struct task_struct *child);
bbbee908 587extern void perf_counter_free_task(struct task_struct *task);
925d519a 588extern void perf_counter_do_pending(void);
0793a61d 589extern void perf_counter_print_debug(void);
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590extern void __perf_disable(void);
591extern bool __perf_enable(void);
592extern void perf_disable(void);
593extern void perf_enable(void);
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594extern int perf_counter_task_disable(void);
595extern int perf_counter_task_enable(void);
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596extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
597 struct perf_cpu_context *cpuctx,
598 struct perf_counter_context *ctx, int cpu);
37d81828 599extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124 600
f6c7d5fe 601extern int perf_counter_overflow(struct perf_counter *counter,
78f13e95 602 int nmi, struct pt_regs *regs, u64 addr);
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603/*
604 * Return 1 for a software counter, 0 for a hardware counter
605 */
606static inline int is_software_counter(struct perf_counter *counter)
607{
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608 return !perf_event_raw(&counter->hw_event) &&
609 perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
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610}
611
78f13e95 612extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
15dbf27c 613
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614extern void perf_counter_mmap(unsigned long addr, unsigned long len,
615 unsigned long pgoff, struct file *file);
616
617extern void perf_counter_munmap(unsigned long addr, unsigned long len,
618 unsigned long pgoff, struct file *file);
619
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620extern void perf_counter_comm(struct task_struct *tsk);
621
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622extern void perf_counter_task_migration(struct task_struct *task, int cpu);
623
9c03d88e 624#define MAX_STACK_DEPTH 255
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625
626struct perf_callchain_entry {
9c03d88e 627 u16 nr, hv, kernel, user;
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628 u64 ip[MAX_STACK_DEPTH];
629};
630
631extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
632
1ccd1549 633extern int sysctl_perf_counter_priv;
c5078f78 634extern int sysctl_perf_counter_mlock;
a78ac325 635extern int sysctl_perf_counter_limit;
1ccd1549 636
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637extern void perf_counter_init(void);
638
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639#ifndef perf_misc_flags
640#define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
641 PERF_EVENT_MISC_KERNEL)
642#define perf_instruction_pointer(regs) instruction_pointer(regs)
643#endif
644
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645#else
646static inline void
647perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
648static inline void
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649perf_counter_task_sched_out(struct task_struct *task,
650 struct task_struct *next, int cpu) { }
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651static inline void
652perf_counter_task_tick(struct task_struct *task, int cpu) { }
d3e78ee3 653static inline int perf_counter_init_task(struct task_struct *child) { return 0; }
9b51f66d 654static inline void perf_counter_exit_task(struct task_struct *child) { }
bbbee908 655static inline void perf_counter_free_task(struct task_struct *task) { }
925d519a 656static inline void perf_counter_do_pending(void) { }
0793a61d 657static inline void perf_counter_print_debug(void) { }
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658static inline void perf_disable(void) { }
659static inline void perf_enable(void) { }
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660static inline int perf_counter_task_disable(void) { return -EINVAL; }
661static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c 662
925d519a 663static inline void
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664perf_swcounter_event(u32 event, u64 nr, int nmi,
665 struct pt_regs *regs, u64 addr) { }
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666
667static inline void
668perf_counter_mmap(unsigned long addr, unsigned long len,
669 unsigned long pgoff, struct file *file) { }
670
671static inline void
672perf_counter_munmap(unsigned long addr, unsigned long len,
0d905bca 673 unsigned long pgoff, struct file *file) { }
0a4a9391 674
8d1b2d93 675static inline void perf_counter_comm(struct task_struct *tsk) { }
0d905bca 676static inline void perf_counter_init(void) { }
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677static inline void perf_counter_task_migration(struct task_struct *task,
678 int cpu) { }
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679#endif
680
f3dfd265 681#endif /* __KERNEL__ */
0793a61d 682#endif /* _LINUX_PERF_COUNTER_H */