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0793a61d TG |
1 | /* |
2 | * Performance counters: | |
3 | * | |
4 | * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar | |
6 | * | |
7 | * Data type definitions, declarations, prototypes. | |
8 | * | |
9 | * Started by: Thomas Gleixner and Ingo Molnar | |
10 | * | |
11 | * For licencing details see kernel-base/COPYING | |
12 | */ | |
13 | #ifndef _LINUX_PERF_COUNTER_H | |
14 | #define _LINUX_PERF_COUNTER_H | |
15 | ||
f3dfd265 PM |
16 | #include <linux/types.h> |
17 | #include <linux/ioctl.h> | |
0793a61d TG |
18 | |
19 | /* | |
9f66a381 IM |
20 | * User-space ABI bits: |
21 | */ | |
22 | ||
23 | /* | |
24 | * Generalized performance counter event types, used by the hw_event.type | |
25 | * parameter of the sys_perf_counter_open() syscall: | |
0793a61d TG |
26 | */ |
27 | enum hw_event_types { | |
0793a61d | 28 | /* |
9f66a381 | 29 | * Common hardware events, generalized by the kernel: |
0793a61d | 30 | */ |
f650a672 | 31 | PERF_COUNT_CPU_CYCLES = 0, |
9f66a381 IM |
32 | PERF_COUNT_INSTRUCTIONS = 1, |
33 | PERF_COUNT_CACHE_REFERENCES = 2, | |
34 | PERF_COUNT_CACHE_MISSES = 3, | |
35 | PERF_COUNT_BRANCH_INSTRUCTIONS = 4, | |
36 | PERF_COUNT_BRANCH_MISSES = 5, | |
f650a672 | 37 | PERF_COUNT_BUS_CYCLES = 6, |
9f66a381 | 38 | |
f650a672 | 39 | PERF_HW_EVENTS_MAX = 7, |
6c594c21 | 40 | |
9f66a381 IM |
41 | /* |
42 | * Special "software" counters provided by the kernel, even if | |
43 | * the hardware does not support performance counters. These | |
44 | * counters measure various physical and sw events of the | |
45 | * kernel (and allow the profiling of them as well): | |
46 | */ | |
47 | PERF_COUNT_CPU_CLOCK = -1, | |
48 | PERF_COUNT_TASK_CLOCK = -2, | |
5d6a27d8 IM |
49 | PERF_COUNT_PAGE_FAULTS = -3, |
50 | PERF_COUNT_CONTEXT_SWITCHES = -4, | |
6c594c21 | 51 | PERF_COUNT_CPU_MIGRATIONS = -5, |
ac17dc8e PZ |
52 | PERF_COUNT_PAGE_FAULTS_MIN = -6, |
53 | PERF_COUNT_PAGE_FAULTS_MAJ = -7, | |
6c594c21 | 54 | |
ac17dc8e | 55 | PERF_SW_EVENTS_MIN = -8, |
0793a61d TG |
56 | }; |
57 | ||
58 | /* | |
59 | * IRQ-notification data record type: | |
60 | */ | |
9f66a381 IM |
61 | enum perf_counter_record_type { |
62 | PERF_RECORD_SIMPLE = 0, | |
63 | PERF_RECORD_IRQ = 1, | |
64 | PERF_RECORD_GROUP = 2, | |
0793a61d TG |
65 | }; |
66 | ||
9f66a381 IM |
67 | /* |
68 | * Hardware event to monitor via a performance monitoring counter: | |
69 | */ | |
70 | struct perf_counter_hw_event { | |
f3dfd265 | 71 | __s64 type; |
9f66a381 | 72 | |
f3dfd265 | 73 | __u64 irq_period; |
2743a5b0 PM |
74 | __u64 record_type; |
75 | __u64 read_format; | |
9f66a381 | 76 | |
2743a5b0 | 77 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
78 | nmi : 1, /* NMI sampling */ |
79 | raw : 1, /* raw event type */ | |
80 | inherit : 1, /* children inherit it */ | |
81 | pinned : 1, /* must always be on PMU */ | |
82 | exclusive : 1, /* only group on PMU */ | |
83 | exclude_user : 1, /* don't count user */ | |
84 | exclude_kernel : 1, /* ditto kernel */ | |
85 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 86 | exclude_idle : 1, /* don't count when idle */ |
0475f9ea | 87 | |
2485e518 | 88 | __reserved_1 : 54; |
2743a5b0 PM |
89 | |
90 | __u32 extra_config_len; | |
91 | __u32 __reserved_4; | |
9f66a381 | 92 | |
f3dfd265 | 93 | __u64 __reserved_2; |
2743a5b0 | 94 | __u64 __reserved_3; |
eab656ae TG |
95 | }; |
96 | ||
d859e29f PM |
97 | /* |
98 | * Ioctls that can be done on a perf counter fd: | |
99 | */ | |
100 | #define PERF_COUNTER_IOC_ENABLE _IO('$', 0) | |
101 | #define PERF_COUNTER_IOC_DISABLE _IO('$', 1) | |
102 | ||
f3dfd265 | 103 | #ifdef __KERNEL__ |
9f66a381 | 104 | /* |
f3dfd265 | 105 | * Kernel-internal data types and definitions: |
9f66a381 IM |
106 | */ |
107 | ||
f3dfd265 PM |
108 | #ifdef CONFIG_PERF_COUNTERS |
109 | # include <asm/perf_counter.h> | |
110 | #endif | |
111 | ||
112 | #include <linux/list.h> | |
113 | #include <linux/mutex.h> | |
114 | #include <linux/rculist.h> | |
115 | #include <linux/rcupdate.h> | |
116 | #include <linux/spinlock.h> | |
117 | #include <asm/atomic.h> | |
118 | ||
119 | struct task_struct; | |
120 | ||
0793a61d | 121 | /** |
9f66a381 | 122 | * struct hw_perf_counter - performance counter hardware details: |
0793a61d TG |
123 | */ |
124 | struct hw_perf_counter { | |
ee06094f | 125 | #ifdef CONFIG_PERF_COUNTERS |
9f66a381 IM |
126 | u64 config; |
127 | unsigned long config_base; | |
128 | unsigned long counter_base; | |
129 | int nmi; | |
130 | unsigned int idx; | |
15dbf27c | 131 | atomic64_t count; /* software */ |
ee06094f | 132 | atomic64_t prev_count; |
9f66a381 | 133 | u64 irq_period; |
ee06094f IM |
134 | atomic64_t period_left; |
135 | #endif | |
0793a61d TG |
136 | }; |
137 | ||
138 | /* | |
139 | * Hardcoded buffer length limit for now, for IRQ-fed events: | |
140 | */ | |
9f66a381 | 141 | #define PERF_DATA_BUFLEN 2048 |
0793a61d TG |
142 | |
143 | /** | |
144 | * struct perf_data - performance counter IRQ data sampling ... | |
145 | */ | |
146 | struct perf_data { | |
9f66a381 IM |
147 | int len; |
148 | int rd_idx; | |
149 | int overrun; | |
150 | u8 data[PERF_DATA_BUFLEN]; | |
0793a61d TG |
151 | }; |
152 | ||
621a01ea IM |
153 | struct perf_counter; |
154 | ||
155 | /** | |
156 | * struct hw_perf_counter_ops - performance counter hw ops | |
157 | */ | |
158 | struct hw_perf_counter_ops { | |
95cdd2e7 | 159 | int (*enable) (struct perf_counter *counter); |
7671581f IM |
160 | void (*disable) (struct perf_counter *counter); |
161 | void (*read) (struct perf_counter *counter); | |
621a01ea IM |
162 | }; |
163 | ||
6a930700 IM |
164 | /** |
165 | * enum perf_counter_active_state - the states of a counter | |
166 | */ | |
167 | enum perf_counter_active_state { | |
3b6f9e5c | 168 | PERF_COUNTER_STATE_ERROR = -2, |
6a930700 IM |
169 | PERF_COUNTER_STATE_OFF = -1, |
170 | PERF_COUNTER_STATE_INACTIVE = 0, | |
171 | PERF_COUNTER_STATE_ACTIVE = 1, | |
172 | }; | |
173 | ||
9b51f66d IM |
174 | struct file; |
175 | ||
0793a61d TG |
176 | /** |
177 | * struct perf_counter - performance counter kernel representation: | |
178 | */ | |
179 | struct perf_counter { | |
ee06094f | 180 | #ifdef CONFIG_PERF_COUNTERS |
04289bb9 IM |
181 | struct list_head list_entry; |
182 | struct list_head sibling_list; | |
183 | struct perf_counter *group_leader; | |
5c92d124 | 184 | const struct hw_perf_counter_ops *hw_ops; |
04289bb9 | 185 | |
6a930700 | 186 | enum perf_counter_active_state state; |
c07c99b6 | 187 | enum perf_counter_active_state prev_state; |
0793a61d | 188 | atomic64_t count; |
ee06094f | 189 | |
9f66a381 | 190 | struct perf_counter_hw_event hw_event; |
0793a61d TG |
191 | struct hw_perf_counter hw; |
192 | ||
193 | struct perf_counter_context *ctx; | |
194 | struct task_struct *task; | |
9b51f66d | 195 | struct file *filp; |
0793a61d | 196 | |
9b51f66d | 197 | struct perf_counter *parent; |
d859e29f PM |
198 | struct list_head child_list; |
199 | ||
0793a61d | 200 | /* |
d859e29f | 201 | * Protect attach/detach and child_list: |
0793a61d TG |
202 | */ |
203 | struct mutex mutex; | |
204 | ||
205 | int oncpu; | |
206 | int cpu; | |
207 | ||
0793a61d TG |
208 | /* read() / irq related data */ |
209 | wait_queue_head_t waitq; | |
210 | /* optional: for NMIs */ | |
211 | int wakeup_pending; | |
212 | struct perf_data *irqdata; | |
213 | struct perf_data *usrdata; | |
214 | struct perf_data data[2]; | |
ee06094f | 215 | #endif |
0793a61d TG |
216 | }; |
217 | ||
218 | /** | |
219 | * struct perf_counter_context - counter context structure | |
220 | * | |
221 | * Used as a container for task counters and CPU counters as well: | |
222 | */ | |
223 | struct perf_counter_context { | |
224 | #ifdef CONFIG_PERF_COUNTERS | |
225 | /* | |
d859e29f PM |
226 | * Protect the states of the counters in the list, |
227 | * nr_active, and the list: | |
0793a61d TG |
228 | */ |
229 | spinlock_t lock; | |
d859e29f PM |
230 | /* |
231 | * Protect the list of counters. Locking either mutex or lock | |
232 | * is sufficient to ensure the list doesn't change; to change | |
233 | * the list you need to lock both the mutex and the spinlock. | |
234 | */ | |
235 | struct mutex mutex; | |
04289bb9 IM |
236 | |
237 | struct list_head counter_list; | |
0793a61d TG |
238 | int nr_counters; |
239 | int nr_active; | |
d859e29f | 240 | int is_active; |
0793a61d TG |
241 | struct task_struct *task; |
242 | #endif | |
243 | }; | |
244 | ||
245 | /** | |
246 | * struct perf_counter_cpu_context - per cpu counter context structure | |
247 | */ | |
248 | struct perf_cpu_context { | |
249 | struct perf_counter_context ctx; | |
250 | struct perf_counter_context *task_ctx; | |
251 | int active_oncpu; | |
252 | int max_pertask; | |
3b6f9e5c | 253 | int exclusive; |
0793a61d TG |
254 | }; |
255 | ||
256 | /* | |
257 | * Set by architecture code: | |
258 | */ | |
259 | extern int perf_max_counters; | |
260 | ||
261 | #ifdef CONFIG_PERF_COUNTERS | |
5c92d124 | 262 | extern const struct hw_perf_counter_ops * |
621a01ea IM |
263 | hw_perf_counter_init(struct perf_counter *counter); |
264 | ||
0793a61d TG |
265 | extern void perf_counter_task_sched_in(struct task_struct *task, int cpu); |
266 | extern void perf_counter_task_sched_out(struct task_struct *task, int cpu); | |
267 | extern void perf_counter_task_tick(struct task_struct *task, int cpu); | |
9b51f66d IM |
268 | extern void perf_counter_init_task(struct task_struct *child); |
269 | extern void perf_counter_exit_task(struct task_struct *child); | |
0793a61d TG |
270 | extern void perf_counter_notify(struct pt_regs *regs); |
271 | extern void perf_counter_print_debug(void); | |
1b023a96 | 272 | extern void perf_counter_unthrottle(void); |
01b2838c IM |
273 | extern u64 hw_perf_save_disable(void); |
274 | extern void hw_perf_restore(u64 ctrl); | |
1d1c7ddb IM |
275 | extern int perf_counter_task_disable(void); |
276 | extern int perf_counter_task_enable(void); | |
3cbed429 PM |
277 | extern int hw_perf_group_sched_in(struct perf_counter *group_leader, |
278 | struct perf_cpu_context *cpuctx, | |
279 | struct perf_counter_context *ctx, int cpu); | |
5c92d124 | 280 | |
3b6f9e5c PM |
281 | /* |
282 | * Return 1 for a software counter, 0 for a hardware counter | |
283 | */ | |
284 | static inline int is_software_counter(struct perf_counter *counter) | |
285 | { | |
286 | return !counter->hw_event.raw && counter->hw_event.type < 0; | |
287 | } | |
288 | ||
15dbf27c PZ |
289 | extern void perf_swcounter_event(enum hw_event_types, u64, int, struct pt_regs *); |
290 | ||
0793a61d TG |
291 | #else |
292 | static inline void | |
293 | perf_counter_task_sched_in(struct task_struct *task, int cpu) { } | |
294 | static inline void | |
295 | perf_counter_task_sched_out(struct task_struct *task, int cpu) { } | |
296 | static inline void | |
297 | perf_counter_task_tick(struct task_struct *task, int cpu) { } | |
9b51f66d IM |
298 | static inline void perf_counter_init_task(struct task_struct *child) { } |
299 | static inline void perf_counter_exit_task(struct task_struct *child) { } | |
0793a61d TG |
300 | static inline void perf_counter_notify(struct pt_regs *regs) { } |
301 | static inline void perf_counter_print_debug(void) { } | |
1b023a96 | 302 | static inline void perf_counter_unthrottle(void) { } |
15dbf27c | 303 | static inline void hw_perf_restore(u64 ctrl) { } |
01b2838c | 304 | static inline u64 hw_perf_save_disable(void) { return 0; } |
1d1c7ddb IM |
305 | static inline int perf_counter_task_disable(void) { return -EINVAL; } |
306 | static inline int perf_counter_task_enable(void) { return -EINVAL; } | |
15dbf27c PZ |
307 | |
308 | static inline void perf_swcounter_event(enum hw_event_types event, u64 nr, | |
309 | int nmi, struct pt_regs *regs) { } | |
0793a61d TG |
310 | #endif |
311 | ||
f3dfd265 | 312 | #endif /* __KERNEL__ */ |
0793a61d | 313 | #endif /* _LINUX_PERF_COUNTER_H */ |