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1/*
2 * Performance counters:
3 *
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4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
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7 *
8 * Data type definitions, declarations, prototypes.
9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
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11 *
12 * For licencing details see kernel-base/COPYING
13 */
14#ifndef _LINUX_PERF_COUNTER_H
15#define _LINUX_PERF_COUNTER_H
16
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17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
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20
21/*
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22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
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29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
b8e83514 34
a308444c 35 PERF_TYPE_MAX, /* non-ABI */
b8e83514 36};
6c594c21 37
b8e83514 38/*
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39 * Generalized performance counter event types, used by the
40 * attr.event_id parameter of the sys_perf_counter_open()
41 * syscall:
b8e83514 42 */
1c432d89 43enum perf_hw_id {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
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47 PERF_COUNT_HW_CPU_CYCLES = 0,
48 PERF_COUNT_HW_INSTRUCTIONS = 1,
49 PERF_COUNT_HW_CACHE_REFERENCES = 2,
50 PERF_COUNT_HW_CACHE_MISSES = 3,
51 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_HW_BRANCH_MISSES = 5,
53 PERF_COUNT_HW_BUS_CYCLES = 6,
54
a308444c 55 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 56};
e077df4f 57
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58/*
59 * Generalized hardware cache counters:
60 *
8be6e8f3 61 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
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62 * { read, write, prefetch } x
63 * { accesses, misses }
64 */
1c432d89 65enum perf_hw_cache_id {
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66 PERF_COUNT_HW_CACHE_L1D = 0,
67 PERF_COUNT_HW_CACHE_L1I = 1,
68 PERF_COUNT_HW_CACHE_LL = 2,
69 PERF_COUNT_HW_CACHE_DTLB = 3,
70 PERF_COUNT_HW_CACHE_ITLB = 4,
71 PERF_COUNT_HW_CACHE_BPU = 5,
72
73 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
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74};
75
1c432d89 76enum perf_hw_cache_op_id {
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77 PERF_COUNT_HW_CACHE_OP_READ = 0,
78 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
79 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 80
a308444c 81 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
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82};
83
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84enum perf_hw_cache_op_result_id {
85 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
86 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 87
a308444c 88 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
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89};
90
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91/*
92 * Special "software" counters provided by the kernel, even if the hardware
93 * does not support performance counters. These counters measure various
94 * physical and sw events of the kernel (and allow the profiling of them as
95 * well):
96 */
1c432d89 97enum perf_sw_ids {
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98 PERF_COUNT_SW_CPU_CLOCK = 0,
99 PERF_COUNT_SW_TASK_CLOCK = 1,
100 PERF_COUNT_SW_PAGE_FAULTS = 2,
101 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
102 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
103 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
104 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
105
106 PERF_COUNT_SW_MAX, /* non-ABI */
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107};
108
8a057d84 109/*
0d48696f 110 * Bits that can be set in attr.sample_type to request information
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111 * in the overflow packets.
112 */
b23f3325 113enum perf_counter_sample_format {
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114 PERF_SAMPLE_IP = 1U << 0,
115 PERF_SAMPLE_TID = 1U << 1,
116 PERF_SAMPLE_TIME = 1U << 2,
117 PERF_SAMPLE_ADDR = 1U << 3,
118 PERF_SAMPLE_GROUP = 1U << 4,
119 PERF_SAMPLE_CALLCHAIN = 1U << 5,
120 PERF_SAMPLE_ID = 1U << 6,
121 PERF_SAMPLE_CPU = 1U << 7,
122 PERF_SAMPLE_PERIOD = 1U << 8,
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123};
124
53cfbf59 125/*
0d48696f 126 * Bits that can be set in attr.read_format to request that
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127 * reads on the counter should return the indicated quantities,
128 * in increasing order of bit value, after the counter value.
129 */
130enum perf_counter_read_format {
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131 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
132 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
133 PERF_FORMAT_ID = 1U << 2,
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134};
135
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136/*
137 * Hardware event to monitor via a performance monitoring counter:
138 */
0d48696f 139struct perf_counter_attr {
f4a2deb4 140 /*
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141 * Major type: hardware/software/tracepoint/etc.
142 */
143 __u32 type;
144 __u32 __reserved_1;
145
146 /*
147 * Type specific configuration information.
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148 */
149 __u64 config;
9f66a381 150
60db5e09 151 union {
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152 __u64 sample_period;
153 __u64 sample_freq;
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154 };
155
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156 __u64 sample_type;
157 __u64 read_format;
9f66a381 158
2743a5b0 159 __u64 disabled : 1, /* off by default */
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160 inherit : 1, /* children inherit it */
161 pinned : 1, /* must always be on PMU */
162 exclusive : 1, /* only group on PMU */
163 exclude_user : 1, /* don't count user */
164 exclude_kernel : 1, /* ditto kernel */
165 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 166 exclude_idle : 1, /* don't count when idle */
0a4a9391 167 mmap : 1, /* include mmap data */
8d1b2d93 168 comm : 1, /* include comm data */
60db5e09 169 freq : 1, /* use freq, not period */
0475f9ea 170
a21ca2ca 171 __reserved_2 : 53;
2743a5b0 172
c457810a 173 __u32 wakeup_events; /* wakeup every n events */
a21ca2ca 174 __u32 __reserved_3;
9f66a381 175
e527ea31 176 __u64 __reserved_4;
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177};
178
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179/*
180 * Ioctls that can be done on a perf counter fd:
181 */
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182#define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
183#define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
184#define PERF_COUNTER_IOC_REFRESH _IO ('$', 2)
185#define PERF_COUNTER_IOC_RESET _IO ('$', 3)
186#define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64)
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187
188enum perf_counter_ioc_flags {
189 PERF_IOC_FLAG_GROUP = 1U << 0,
190};
d859e29f 191
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192/*
193 * Structure of the page that can be mapped via mmap
194 */
195struct perf_counter_mmap_page {
196 __u32 version; /* version number of this structure */
197 __u32 compat_version; /* lowest version this is compat with */
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198
199 /*
200 * Bits needed to read the hw counters in user-space.
201 *
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202 * u32 seq;
203 * s64 count;
38ff667b 204 *
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205 * do {
206 * seq = pc->lock;
38ff667b 207 *
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208 * barrier()
209 * if (pc->index) {
210 * count = pmc_read(pc->index - 1);
211 * count += pc->offset;
212 * } else
213 * goto regular_read;
38ff667b 214 *
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215 * barrier();
216 * } while (pc->lock != seq);
38ff667b 217 *
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218 * NOTE: for obvious reason this only works on self-monitoring
219 * processes.
38ff667b 220 */
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221 __u32 lock; /* seqlock for synchronization */
222 __u32 index; /* hardware counter identifier */
223 __s64 offset; /* add to hardware counter value */
7b732a75 224
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225 /*
226 * Control data for the mmap() data buffer.
227 *
228 * User-space reading this value should issue an rmb(), on SMP capable
229 * platforms, after reading this value -- see perf_counter_wakeup().
230 */
8e3747c1 231 __u64 data_head; /* head in the data section */
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232};
233
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234#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
235#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
236#define PERF_EVENT_MISC_KERNEL (1 << 0)
237#define PERF_EVENT_MISC_USER (2 << 0)
238#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
239#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
6fab0192 240
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241struct perf_event_header {
242 __u32 type;
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243 __u16 misc;
244 __u16 size;
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245};
246
247enum perf_event_type {
5ed00415 248
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249 /*
250 * The MMAP events record the PROT_EXEC mappings so that we can
251 * correlate userspace IPs to code. They have the following structure:
252 *
253 * struct {
0127c3ea 254 * struct perf_event_header header;
0c593b34 255 *
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256 * u32 pid, tid;
257 * u64 addr;
258 * u64 len;
259 * u64 pgoff;
260 * char filename[];
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261 * };
262 */
8a057d84 263 PERF_EVENT_MMAP = 1,
0a4a9391 264
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265 /*
266 * struct {
0127c3ea 267 * struct perf_event_header header;
8d1b2d93 268 *
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269 * u32 pid, tid;
270 * char comm[];
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271 * };
272 */
273 PERF_EVENT_COMM = 3,
274
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275 /*
276 * struct {
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277 * struct perf_event_header header;
278 * u64 time;
689802b2 279 * u64 id;
b23f3325 280 * u64 sample_period;
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281 * };
282 */
283 PERF_EVENT_PERIOD = 4,
284
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285 /*
286 * struct {
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287 * struct perf_event_header header;
288 * u64 time;
cca3f454 289 * u64 id;
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290 * };
291 */
292 PERF_EVENT_THROTTLE = 5,
293 PERF_EVENT_UNTHROTTLE = 6,
294
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295 /*
296 * struct {
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297 * struct perf_event_header header;
298 * u32 pid, ppid;
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299 * };
300 */
301 PERF_EVENT_FORK = 7,
302
8a057d84 303 /*
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304 * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
305 * will be PERF_RECORD_*
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306 *
307 * struct {
0127c3ea 308 * struct perf_event_header header;
0c593b34 309 *
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310 * { u64 ip; } && PERF_RECORD_IP
311 * { u32 pid, tid; } && PERF_RECORD_TID
312 * { u64 time; } && PERF_RECORD_TIME
313 * { u64 addr; } && PERF_RECORD_ADDR
314 * { u64 config; } && PERF_RECORD_CONFIG
315 * { u32 cpu, res; } && PERF_RECORD_CPU
0c593b34 316 *
0127c3ea 317 * { u64 nr;
8e5799b1 318 * { u64 id, val; } cnt[nr]; } && PERF_RECORD_GROUP
0c593b34 319 *
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320 * { u16 nr,
321 * hv,
322 * kernel,
323 * user;
324 * u64 ips[nr]; } && PERF_RECORD_CALLCHAIN
0c593b34 325 * };
8a057d84 326 */
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327};
328
f3dfd265 329#ifdef __KERNEL__
9f66a381 330/*
f3dfd265 331 * Kernel-internal data types and definitions:
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332 */
333
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334#ifdef CONFIG_PERF_COUNTERS
335# include <asm/perf_counter.h>
336#endif
337
338#include <linux/list.h>
339#include <linux/mutex.h>
340#include <linux/rculist.h>
341#include <linux/rcupdate.h>
342#include <linux/spinlock.h>
d6d020e9 343#include <linux/hrtimer.h>
3c446b3d 344#include <linux/fs.h>
709e50cf 345#include <linux/pid_namespace.h>
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346#include <asm/atomic.h>
347
348struct task_struct;
349
0793a61d 350/**
9f66a381 351 * struct hw_perf_counter - performance counter hardware details:
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352 */
353struct hw_perf_counter {
ee06094f 354#ifdef CONFIG_PERF_COUNTERS
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355 union {
356 struct { /* hardware */
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357 u64 config;
358 unsigned long config_base;
359 unsigned long counter_base;
360 int idx;
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361 };
362 union { /* software */
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363 atomic64_t count;
364 struct hrtimer hrtimer;
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365 };
366 };
ee06094f 367 atomic64_t prev_count;
b23f3325 368 u64 sample_period;
9e350de3 369 u64 last_period;
ee06094f 370 atomic64_t period_left;
60db5e09 371 u64 interrupts;
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372
373 u64 freq_count;
374 u64 freq_interrupts;
bd2b5b12 375 u64 freq_stamp;
ee06094f 376#endif
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377};
378
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379struct perf_counter;
380
381/**
4aeb0b42 382 * struct pmu - generic performance monitoring unit
621a01ea 383 */
4aeb0b42 384struct pmu {
95cdd2e7 385 int (*enable) (struct perf_counter *counter);
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386 void (*disable) (struct perf_counter *counter);
387 void (*read) (struct perf_counter *counter);
a78ac325 388 void (*unthrottle) (struct perf_counter *counter);
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389};
390
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391/**
392 * enum perf_counter_active_state - the states of a counter
393 */
394enum perf_counter_active_state {
3b6f9e5c 395 PERF_COUNTER_STATE_ERROR = -2,
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396 PERF_COUNTER_STATE_OFF = -1,
397 PERF_COUNTER_STATE_INACTIVE = 0,
398 PERF_COUNTER_STATE_ACTIVE = 1,
399};
400
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401struct file;
402
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403struct perf_mmap_data {
404 struct rcu_head rcu_head;
8740f941 405 int nr_pages; /* nr of data pages */
c5078f78 406 int nr_locked; /* nr pages mlocked */
8740f941 407
c33a0bc4 408 atomic_t poll; /* POLL_ for wakeups */
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409 atomic_t events; /* event limit */
410
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411 atomic_long_t head; /* write position */
412 atomic_long_t done_head; /* completed head */
413
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414 atomic_t lock; /* concurrent writes */
415
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416 atomic_t wakeup; /* needs a wakeup */
417
7b732a75 418 struct perf_counter_mmap_page *user_page;
0127c3ea 419 void *data_pages[0];
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420};
421
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422struct perf_pending_entry {
423 struct perf_pending_entry *next;
424 void (*func)(struct perf_pending_entry *);
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425};
426
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427/**
428 * struct perf_counter - performance counter kernel representation:
429 */
430struct perf_counter {
ee06094f 431#ifdef CONFIG_PERF_COUNTERS
04289bb9 432 struct list_head list_entry;
592903cd 433 struct list_head event_entry;
04289bb9 434 struct list_head sibling_list;
0127c3ea 435 int nr_siblings;
04289bb9 436 struct perf_counter *group_leader;
4aeb0b42 437 const struct pmu *pmu;
04289bb9 438
6a930700 439 enum perf_counter_active_state state;
0793a61d 440 atomic64_t count;
ee06094f 441
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442 /*
443 * These are the total time in nanoseconds that the counter
444 * has been enabled (i.e. eligible to run, and the task has
445 * been scheduled in, if this is a per-task counter)
446 * and running (scheduled onto the CPU), respectively.
447 *
448 * They are computed from tstamp_enabled, tstamp_running and
449 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
450 */
451 u64 total_time_enabled;
452 u64 total_time_running;
453
454 /*
455 * These are timestamps used for computing total_time_enabled
456 * and total_time_running when the counter is in INACTIVE or
457 * ACTIVE state, measured in nanoseconds from an arbitrary point
458 * in time.
459 * tstamp_enabled: the notional time when the counter was enabled
460 * tstamp_running: the notional time when the counter was scheduled on
461 * tstamp_stopped: in INACTIVE state, the notional time when the
462 * counter was scheduled off.
463 */
464 u64 tstamp_enabled;
465 u64 tstamp_running;
466 u64 tstamp_stopped;
467
0d48696f 468 struct perf_counter_attr attr;
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469 struct hw_perf_counter hw;
470
471 struct perf_counter_context *ctx;
9b51f66d 472 struct file *filp;
0793a61d 473
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474 /*
475 * These accumulate total time (in nanoseconds) that children
476 * counters have been enabled and running, respectively.
477 */
478 atomic64_t child_total_time_enabled;
479 atomic64_t child_total_time_running;
480
0793a61d 481 /*
d859e29f 482 * Protect attach/detach and child_list:
0793a61d 483 */
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484 struct mutex child_mutex;
485 struct list_head child_list;
486 struct perf_counter *parent;
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487
488 int oncpu;
489 int cpu;
490
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491 struct list_head owner_entry;
492 struct task_struct *owner;
493
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494 /* mmap bits */
495 struct mutex mmap_mutex;
496 atomic_t mmap_count;
497 struct perf_mmap_data *data;
37d81828 498
7b732a75 499 /* poll related */
0793a61d 500 wait_queue_head_t waitq;
3c446b3d 501 struct fasync_struct *fasync;
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502
503 /* delayed work for NMIs and such */
504 int pending_wakeup;
4c9e2542 505 int pending_kill;
79f14641 506 int pending_disable;
671dec5d 507 struct perf_pending_entry pending;
592903cd 508
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509 atomic_t event_limit;
510
e077df4f 511 void (*destroy)(struct perf_counter *);
592903cd 512 struct rcu_head rcu_head;
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513
514 struct pid_namespace *ns;
8e5799b1 515 u64 id;
ee06094f 516#endif
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517};
518
519/**
520 * struct perf_counter_context - counter context structure
521 *
522 * Used as a container for task counters and CPU counters as well:
523 */
524struct perf_counter_context {
0793a61d 525 /*
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526 * Protect the states of the counters in the list,
527 * nr_active, and the list:
0793a61d 528 */
a308444c 529 spinlock_t lock;
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530 /*
531 * Protect the list of counters. Locking either mutex or lock
532 * is sufficient to ensure the list doesn't change; to change
533 * the list you need to lock both the mutex and the spinlock.
534 */
a308444c 535 struct mutex mutex;
04289bb9 536
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537 struct list_head counter_list;
538 struct list_head event_list;
539 int nr_counters;
540 int nr_active;
541 int is_active;
542 atomic_t refcount;
543 struct task_struct *task;
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544
545 /*
4af4998b 546 * Context clock, runs when context enabled.
53cfbf59 547 */
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548 u64 time;
549 u64 timestamp;
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550
551 /*
552 * These fields let us detect when two contexts have both
553 * been cloned (inherited) from a common ancestor.
554 */
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555 struct perf_counter_context *parent_ctx;
556 u64 parent_gen;
557 u64 generation;
558 int pin_count;
559 struct rcu_head rcu_head;
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560};
561
562/**
563 * struct perf_counter_cpu_context - per cpu counter context structure
564 */
565struct perf_cpu_context {
566 struct perf_counter_context ctx;
567 struct perf_counter_context *task_ctx;
568 int active_oncpu;
569 int max_pertask;
3b6f9e5c 570 int exclusive;
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571
572 /*
573 * Recursion avoidance:
574 *
575 * task, softirq, irq, nmi context
576 */
22a4f650 577 int recursion[4];
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578};
579
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580#ifdef CONFIG_PERF_COUNTERS
581
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582/*
583 * Set by architecture code:
584 */
585extern int perf_max_counters;
586
4aeb0b42 587extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
621a01ea 588
0793a61d 589extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
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590extern void perf_counter_task_sched_out(struct task_struct *task,
591 struct task_struct *next, int cpu);
0793a61d 592extern void perf_counter_task_tick(struct task_struct *task, int cpu);
6ab423e0 593extern int perf_counter_init_task(struct task_struct *child);
9b51f66d 594extern void perf_counter_exit_task(struct task_struct *child);
bbbee908 595extern void perf_counter_free_task(struct task_struct *task);
925d519a 596extern void perf_counter_do_pending(void);
0793a61d 597extern void perf_counter_print_debug(void);
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598extern void __perf_disable(void);
599extern bool __perf_enable(void);
600extern void perf_disable(void);
601extern void perf_enable(void);
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602extern int perf_counter_task_disable(void);
603extern int perf_counter_task_enable(void);
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604extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
605 struct perf_cpu_context *cpuctx,
606 struct perf_counter_context *ctx, int cpu);
37d81828 607extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124 608
df1a132b 609struct perf_sample_data {
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610 struct pt_regs *regs;
611 u64 addr;
612 u64 period;
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613};
614
615extern int perf_counter_overflow(struct perf_counter *counter, int nmi,
616 struct perf_sample_data *data);
617
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618/*
619 * Return 1 for a software counter, 0 for a hardware counter
620 */
621static inline int is_software_counter(struct perf_counter *counter)
622{
a21ca2ca 623 return (counter->attr.type != PERF_TYPE_RAW) &&
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624 (counter->attr.type != PERF_TYPE_HARDWARE) &&
625 (counter->attr.type != PERF_TYPE_HW_CACHE);
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626}
627
78f13e95 628extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
15dbf27c 629
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630extern void __perf_counter_mmap(struct vm_area_struct *vma);
631
632static inline void perf_counter_mmap(struct vm_area_struct *vma)
633{
634 if (vma->vm_flags & VM_EXEC)
635 __perf_counter_mmap(vma);
636}
0a4a9391 637
8d1b2d93 638extern void perf_counter_comm(struct task_struct *tsk);
60313ebe 639extern void perf_counter_fork(struct task_struct *tsk);
8d1b2d93 640
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641extern void perf_counter_task_migration(struct task_struct *task, int cpu);
642
a308444c 643#define MAX_STACK_DEPTH 255
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644
645struct perf_callchain_entry {
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646 u16 nr;
647 u16 hv;
648 u16 kernel;
649 u16 user;
650 u64 ip[MAX_STACK_DEPTH];
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651};
652
653extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
654
0764771d 655extern int sysctl_perf_counter_paranoid;
c5078f78 656extern int sysctl_perf_counter_mlock;
df58ab24 657extern int sysctl_perf_counter_sample_rate;
1ccd1549 658
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659extern void perf_counter_init(void);
660
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661#ifndef perf_misc_flags
662#define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
663 PERF_EVENT_MISC_KERNEL)
664#define perf_instruction_pointer(regs) instruction_pointer(regs)
665#endif
666
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667#else
668static inline void
669perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
670static inline void
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671perf_counter_task_sched_out(struct task_struct *task,
672 struct task_struct *next, int cpu) { }
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673static inline void
674perf_counter_task_tick(struct task_struct *task, int cpu) { }
d3e78ee3 675static inline int perf_counter_init_task(struct task_struct *child) { return 0; }
9b51f66d 676static inline void perf_counter_exit_task(struct task_struct *child) { }
bbbee908 677static inline void perf_counter_free_task(struct task_struct *task) { }
925d519a 678static inline void perf_counter_do_pending(void) { }
0793a61d 679static inline void perf_counter_print_debug(void) { }
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680static inline void perf_disable(void) { }
681static inline void perf_enable(void) { }
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682static inline int perf_counter_task_disable(void) { return -EINVAL; }
683static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c 684
925d519a 685static inline void
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686perf_swcounter_event(u32 event, u64 nr, int nmi,
687 struct pt_regs *regs, u64 addr) { }
0a4a9391 688
089dd79d 689static inline void perf_counter_mmap(struct vm_area_struct *vma) { }
8d1b2d93 690static inline void perf_counter_comm(struct task_struct *tsk) { }
60313ebe 691static inline void perf_counter_fork(struct task_struct *tsk) { }
0d905bca 692static inline void perf_counter_init(void) { }
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693static inline void perf_counter_task_migration(struct task_struct *task,
694 int cpu) { }
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695#endif
696
f3dfd265 697#endif /* __KERNEL__ */
0793a61d 698#endif /* _LINUX_PERF_COUNTER_H */