[mirror_ubuntu-zesty-kernel.git] / include / linux / perf_counter.h

/*
 *  Performance counters:
 *
 *   Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
 *   Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
 *
 *  Data type definitions, declarations, prototypes.
 *
 *  Started by: Thomas Gleixner and Ingo Molnar
 *
 *  For licencing details see kernel-base/COPYING
 */
#ifndef _LINUX_PERF_COUNTER_H
#define _LINUX_PERF_COUNTER_H

#include <linux/types.h>
#include <linux/ioctl.h>
#include <asm/byteorder.h>

/*
 * User-space ABI bits:
 */

/*
 * hw_event.type
 */
enum perf_event_types {
	PERF_TYPE_HARDWARE		= 0,
	PERF_TYPE_SOFTWARE		= 1,
	PERF_TYPE_TRACEPOINT		= 2,

	/*
	 * available TYPE space, raw is the max value.
	 */

	PERF_TYPE_RAW			= 128,
};

/*
 * Generalized performance counter event types, used by the hw_event.event_id
 * parameter of the sys_perf_counter_open() syscall:
 */
enum hw_event_ids {
	/*
	 * Common hardware events, generalized by the kernel:
	 */
	PERF_COUNT_CPU_CYCLES		= 0,
	PERF_COUNT_INSTRUCTIONS		= 1,
	PERF_COUNT_CACHE_REFERENCES	= 2,
	PERF_COUNT_CACHE_MISSES		= 3,
	PERF_COUNT_BRANCH_INSTRUCTIONS	= 4,
	PERF_COUNT_BRANCH_MISSES	= 5,
	PERF_COUNT_BUS_CYCLES		= 6,

	PERF_HW_EVENTS_MAX		= 7,
};

/*
 * Special "software" counters provided by the kernel, even if the hardware
 * does not support performance counters. These counters measure various
 * physical and sw events of the kernel (and allow the profiling of them as
 * well):
 */
enum sw_event_ids {
	PERF_COUNT_CPU_CLOCK		= 0,
	PERF_COUNT_TASK_CLOCK		= 1,
	PERF_COUNT_PAGE_FAULTS		= 2,
	PERF_COUNT_CONTEXT_SWITCHES	= 3,
	PERF_COUNT_CPU_MIGRATIONS	= 4,
	PERF_COUNT_PAGE_FAULTS_MIN	= 5,
	PERF_COUNT_PAGE_FAULTS_MAJ	= 6,

	PERF_SW_EVENTS_MAX		= 7,
};

#define __PERF_COUNTER_MASK(name) 			\
	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) <<	\
	 PERF_COUNTER_##name##_SHIFT)

#define PERF_COUNTER_RAW_BITS		1
#define PERF_COUNTER_RAW_SHIFT		63
#define PERF_COUNTER_RAW_MASK		__PERF_COUNTER_MASK(RAW)

#define PERF_COUNTER_CONFIG_BITS	63
#define PERF_COUNTER_CONFIG_SHIFT	0
#define PERF_COUNTER_CONFIG_MASK	__PERF_COUNTER_MASK(CONFIG)

#define PERF_COUNTER_TYPE_BITS		7
#define PERF_COUNTER_TYPE_SHIFT		56
#define PERF_COUNTER_TYPE_MASK		__PERF_COUNTER_MASK(TYPE)

#define PERF_COUNTER_EVENT_BITS		56
#define PERF_COUNTER_EVENT_SHIFT	0
#define PERF_COUNTER_EVENT_MASK		__PERF_COUNTER_MASK(EVENT)

/*
 * Bits that can be set in hw_event.record_type to request information
 * in the overflow packets.
 */
enum perf_counter_record_format {
	PERF_RECORD_IP		= 1U << 0,
	PERF_RECORD_TID		= 1U << 1,
	PERF_RECORD_TIME	= 1U << 2,
	PERF_RECORD_ADDR	= 1U << 3,
	PERF_RECORD_GROUP	= 1U << 4,
	PERF_RECORD_CALLCHAIN	= 1U << 5,
	PERF_RECORD_CONFIG	= 1U << 6,
	PERF_RECORD_CPU		= 1U << 7,
};

/*
 * Bits that can be set in hw_event.read_format to request that
 * reads on the counter should return the indicated quantities,
 * in increasing order of bit value, after the counter value.
 */
enum perf_counter_read_format {
	PERF_FORMAT_TOTAL_TIME_ENABLED	=  1,
	PERF_FORMAT_TOTAL_TIME_RUNNING	=  2,
};

/*
 * Hardware event to monitor via a performance monitoring counter:
 */
struct perf_counter_hw_event {
	/*
	 * The MSB of the config word signifies if the rest contains cpu
	 * specific (raw) counter configuration data, if unset, the next
	 * 7 bits are an event type and the rest of the bits are the event
	 * identifier.
	 */
	__u64			config;

	union {
		__u64		irq_period;
		__u64		irq_freq;
	};

	__u32			record_type;
	__u32			read_format;

	__u64			disabled       :  1, /* off by default        */
				nmi	       :  1, /* NMI sampling          */
				inherit	       :  1, /* children inherit it   */
				pinned	       :  1, /* must always be on PMU */
				exclusive      :  1, /* only group on PMU     */
				exclude_user   :  1, /* don't count user      */
				exclude_kernel :  1, /* ditto kernel          */
				exclude_hv     :  1, /* ditto hypervisor      */
				exclude_idle   :  1, /* don't count when idle */
				mmap           :  1, /* include mmap data     */
				munmap         :  1, /* include munmap data   */
				comm	       :  1, /* include comm data     */
				freq           :  1, /* use freq, not period  */

				__reserved_1   : 51;

	__u32			extra_config_len;
	__u32			wakeup_events;	/* wakeup every n events */

	__u64			__reserved_2;
	__u64			__reserved_3;
};

/*
 * Ioctls that can be done on a perf counter fd:
 */
#define PERF_COUNTER_IOC_ENABLE		_IOW('$', 0, u32)
#define PERF_COUNTER_IOC_DISABLE	_IOW('$', 1, u32)
#define PERF_COUNTER_IOC_REFRESH	_IOW('$', 2, u32)
#define PERF_COUNTER_IOC_RESET		_IOW('$', 3, u32)

enum perf_counter_ioc_flags {
	PERF_IOC_FLAG_GROUP		= 1U << 0,
};

/*
 * Structure of the page that can be mapped via mmap
 */
struct perf_counter_mmap_page {
	__u32	version;		/* version number of this structure */
	__u32	compat_version;		/* lowest version this is compat with */

	/*
	 * Bits needed to read the hw counters in user-space.
	 *
	 *   u32 seq;
	 *   s64 count;
	 *
	 *   do {
	 *     seq = pc->lock;
	 *
	 *     barrier()
	 *     if (pc->index) {
	 *       count = pmc_read(pc->index - 1);
	 *       count += pc->offset;
	 *     } else
	 *       goto regular_read;
	 *
	 *     barrier();
	 *   } while (pc->lock != seq);
	 *
	 * NOTE: for obvious reason this only works on self-monitoring
	 *       processes.
	 */
	__u32	lock;			/* seqlock for synchronization */
	__u32	index;			/* hardware counter identifier */
	__s64	offset;			/* add to hardware counter value */

	/*
	 * Control data for the mmap() data buffer.
	 *
	 * User-space reading this value should issue an rmb(), on SMP capable
	 * platforms, after reading this value -- see perf_counter_wakeup().
	 */
	__u32   data_head;		/* head in the data section */
};

#define PERF_EVENT_MISC_CPUMODE_MASK	(3 << 0)
#define PERF_EVENT_MISC_CPUMODE_UNKNOWN	(0 << 0)
#define PERF_EVENT_MISC_KERNEL		(1 << 0)
#define PERF_EVENT_MISC_USER		(2 << 0)
#define PERF_EVENT_MISC_HYPERVISOR	(3 << 0)
#define PERF_EVENT_MISC_OVERFLOW	(1 << 2)

struct perf_event_header {
	__u32	type;
	__u16	misc;
	__u16	size;
};

enum perf_event_type {

	/*
	 * The MMAP events record the PROT_EXEC mappings so that we can
	 * correlate userspace IPs to code. They have the following structure:
	 *
	 * struct {
	 * 	struct perf_event_header	header;
	 *
	 * 	u32				pid, tid;
	 * 	u64				addr;
	 * 	u64				len;
	 * 	u64				pgoff;
	 * 	char				filename[];
	 * };
	 */
	PERF_EVENT_MMAP			= 1,
	PERF_EVENT_MUNMAP		= 2,

	/*
	 * struct {
	 * 	struct perf_event_header	header;
	 *
	 * 	u32				pid, tid;
	 * 	char				comm[];
	 * };
	 */
	PERF_EVENT_COMM			= 3,

	/*
	 * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
	 * will be PERF_RECORD_*
	 *
	 * struct {
	 * 	struct perf_event_header	header;
	 *
	 * 	{ u64			ip;	  } && PERF_RECORD_IP
	 * 	{ u32			pid, tid; } && PERF_RECORD_TID
	 * 	{ u64			time;     } && PERF_RECORD_TIME
	 * 	{ u64			addr;     } && PERF_RECORD_ADDR
	 * 	{ u64			config;   } && PERF_RECORD_CONFIG
	 * 	{ u32			cpu, res; } && PERF_RECORD_CPU
	 *
	 * 	{ u64			nr;
	 * 	  { u64 event, val; } 	cnt[nr];  } && PERF_RECORD_GROUP
	 *
	 * 	{ u16			nr,
	 * 				hv,
	 * 				kernel,
	 * 				user;
	 * 	  u64			ips[nr];  } && PERF_RECORD_CALLCHAIN
	 * };
	 */
};

#ifdef __KERNEL__
/*
 * Kernel-internal data types and definitions:
 */

#ifdef CONFIG_PERF_COUNTERS
# include <asm/perf_counter.h>
#endif

#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/rculist.h>
#include <linux/rcupdate.h>
#include <linux/spinlock.h>
#include <linux/hrtimer.h>
#include <linux/fs.h>
#include <asm/atomic.h>

struct task_struct;

static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_RAW_MASK;
}

static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
}

static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
{
	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
		PERF_COUNTER_TYPE_SHIFT;
}

static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_EVENT_MASK;
}

/**
 * struct hw_perf_counter - performance counter hardware details:
 */
struct hw_perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	union {
		struct { /* hardware */
			u64				config;
			unsigned long			config_base;
			unsigned long			counter_base;
			int				nmi;
			int				idx;
		};
		union { /* software */
			atomic64_t			count;
			struct hrtimer			hrtimer;
		};
	};
	atomic64_t			prev_count;
	u64				irq_period;
	atomic64_t			period_left;
	u64				interrupts;
#endif
};

struct perf_counter;

/**
 * struct pmu - generic performance monitoring unit
 */
struct pmu {
	int (*enable)			(struct perf_counter *counter);
	void (*disable)			(struct perf_counter *counter);
	void (*read)			(struct perf_counter *counter);
};

/**
 * enum perf_counter_active_state - the states of a counter
 */
enum perf_counter_active_state {
	PERF_COUNTER_STATE_ERROR	= -2,
	PERF_COUNTER_STATE_OFF		= -1,
	PERF_COUNTER_STATE_INACTIVE	=  0,
	PERF_COUNTER_STATE_ACTIVE	=  1,
};

struct file;

struct perf_mmap_data {
	struct rcu_head			rcu_head;
	int				nr_pages;	/* nr of data pages  */
	int				nr_locked;	/* nr pages mlocked  */

	atomic_t			poll;		/* POLL_ for wakeups */
	atomic_t			head;		/* write position    */
	atomic_t			events;		/* event limit       */

	atomic_t			done_head;	/* completed head    */
	atomic_t			lock;		/* concurrent writes */

	atomic_t			wakeup;		/* needs a wakeup    */

	struct perf_counter_mmap_page   *user_page;
	void 				*data_pages[0];
};

struct perf_pending_entry {
	struct perf_pending_entry *next;
	void (*func)(struct perf_pending_entry *);
};

/**
 * struct perf_counter - performance counter kernel representation:
 */
struct perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	struct list_head		list_entry;
	struct list_head		event_entry;
	struct list_head		sibling_list;
	int 				nr_siblings;
	struct perf_counter		*group_leader;
	const struct pmu		*pmu;

	enum perf_counter_active_state	state;
	enum perf_counter_active_state	prev_state;
	atomic64_t			count;

	/*
	 * These are the total time in nanoseconds that the counter
	 * has been enabled (i.e. eligible to run, and the task has
	 * been scheduled in, if this is a per-task counter)
	 * and running (scheduled onto the CPU), respectively.
	 *
	 * They are computed from tstamp_enabled, tstamp_running and
	 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
	 */
	u64				total_time_enabled;
	u64				total_time_running;

	/*
	 * These are timestamps used for computing total_time_enabled
	 * and total_time_running when the counter is in INACTIVE or
	 * ACTIVE state, measured in nanoseconds from an arbitrary point
	 * in time.
	 * tstamp_enabled: the notional time when the counter was enabled
	 * tstamp_running: the notional time when the counter was scheduled on
	 * tstamp_stopped: in INACTIVE state, the notional time when the
	 *	counter was scheduled off.
	 */
	u64				tstamp_enabled;
	u64				tstamp_running;
	u64				tstamp_stopped;

	struct perf_counter_hw_event	hw_event;
	struct hw_perf_counter		hw;

	struct perf_counter_context	*ctx;
	struct task_struct		*task;
	struct file			*filp;

	struct perf_counter		*parent;
	struct list_head		child_list;

	/*
	 * These accumulate total time (in nanoseconds) that children
	 * counters have been enabled and running, respectively.
	 */
	atomic64_t			child_total_time_enabled;
	atomic64_t			child_total_time_running;

	/*
	 * Protect attach/detach and child_list:
	 */
	struct mutex			mutex;

	int				oncpu;
	int				cpu;

	/* mmap bits */
	struct mutex			mmap_mutex;
	atomic_t			mmap_count;
	struct perf_mmap_data		*data;

	/* poll related */
	wait_queue_head_t		waitq;
	struct fasync_struct		*fasync;

	/* delayed work for NMIs and such */
	int				pending_wakeup;
	int				pending_kill;
	int				pending_disable;
	struct perf_pending_entry	pending;

	atomic_t			event_limit;

	void (*destroy)(struct perf_counter *);
	struct rcu_head			rcu_head;
#endif
};

/**
 * struct perf_counter_context - counter context structure
 *
 * Used as a container for task counters and CPU counters as well:
 */
struct perf_counter_context {
#ifdef CONFIG_PERF_COUNTERS
	/*
	 * Protect the states of the counters in the list,
	 * nr_active, and the list:
	 */
	spinlock_t		lock;
	/*
	 * Protect the list of counters.  Locking either mutex or lock
	 * is sufficient to ensure the list doesn't change; to change
	 * the list you need to lock both the mutex and the spinlock.
	 */
	struct mutex		mutex;

	struct list_head	counter_list;
	struct list_head	event_list;
	int			nr_counters;
	int			nr_active;
	int			is_active;
	struct task_struct	*task;

	/*
	 * Context clock, runs when context enabled.
	 */
	u64			time;
	u64			timestamp;
#endif
};

/**
 * struct perf_counter_cpu_context - per cpu counter context structure
 */
struct perf_cpu_context {
	struct perf_counter_context	ctx;
	struct perf_counter_context	*task_ctx;
	int				active_oncpu;
	int				max_pertask;
	int				exclusive;

	/*
	 * Recursion avoidance:
	 *
	 * task, softirq, irq, nmi context
	 */
	int			recursion[4];
};

#ifdef CONFIG_PERF_COUNTERS

/*
 * Set by architecture code:
 */
extern int perf_max_counters;

extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);

extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
extern void perf_counter_task_tick(struct task_struct *task, int cpu);
extern void perf_counter_init_task(struct task_struct *child);
extern void perf_counter_exit_task(struct task_struct *child);
extern void perf_counter_do_pending(void);
extern void perf_counter_print_debug(void);
extern void perf_counter_unthrottle(void);
extern void __perf_disable(void);
extern bool __perf_enable(void);
extern void perf_disable(void);
extern void perf_enable(void);
extern int perf_counter_task_disable(void);
extern int perf_counter_task_enable(void);
extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	       struct perf_cpu_context *cpuctx,
	       struct perf_counter_context *ctx, int cpu);
extern void perf_counter_update_userpage(struct perf_counter *counter);

extern int perf_counter_overflow(struct perf_counter *counter,
				 int nmi, struct pt_regs *regs, u64 addr);
/*
 * Return 1 for a software counter, 0 for a hardware counter
 */
static inline int is_software_counter(struct perf_counter *counter)
{
	return !perf_event_raw(&counter->hw_event) &&
		perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
}

extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);

extern void perf_counter_mmap(unsigned long addr, unsigned long len,
			      unsigned long pgoff, struct file *file);

extern void perf_counter_munmap(unsigned long addr, unsigned long len,
				unsigned long pgoff, struct file *file);

extern void perf_counter_comm(struct task_struct *tsk);

#define MAX_STACK_DEPTH		255

struct perf_callchain_entry {
	u16	nr, hv, kernel, user;
	u64	ip[MAX_STACK_DEPTH];
};

extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);

extern int sysctl_perf_counter_priv;
extern int sysctl_perf_counter_mlock;

extern void perf_counter_init(void);

#ifndef perf_misc_flags
#define perf_misc_flags(regs)	(user_mode(regs) ? PERF_EVENT_MISC_USER : \
				 PERF_EVENT_MISC_KERNEL)
#define perf_instruction_pointer(regs)	instruction_pointer(regs)
#endif

#else
static inline void
perf_counter_task_sched_in(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_sched_out(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_tick(struct task_struct *task, int cpu)		{ }
static inline void perf_counter_init_task(struct task_struct *child)	{ }
static inline void perf_counter_exit_task(struct task_struct *child)	{ }
static inline void perf_counter_do_pending(void)			{ }
static inline void perf_counter_print_debug(void)			{ }
static inline void perf_counter_unthrottle(void)			{ }
static inline void perf_disable(void)					{ }
static inline void perf_enable(void)					{ }
static inline int perf_counter_task_disable(void)	{ return -EINVAL; }
static inline int perf_counter_task_enable(void)	{ return -EINVAL; }

static inline void
perf_swcounter_event(u32 event, u64 nr, int nmi,
		     struct pt_regs *regs, u64 addr)			{ }

static inline void
perf_counter_mmap(unsigned long addr, unsigned long len,
		  unsigned long pgoff, struct file *file)		{ }

static inline void
perf_counter_munmap(unsigned long addr, unsigned long len,
		    unsigned long pgoff, struct file *file)		{ }

static inline void perf_counter_comm(struct task_struct *tsk)		{ }
static inline void perf_counter_init(void)				{ }
#endif

#endif /* __KERNEL__ */
#endif /* _LINUX_PERF_COUNTER_H */
Commit	Line	Data
0793a61d TG	1	/*
	2	* Performance counters:
	3	*
	4	* Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
	5	* Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
	6	*
	7	* Data type definitions, declarations, prototypes.
	8	*
	9	* Started by: Thomas Gleixner and Ingo Molnar
	10	*
	11	* For licencing details see kernel-base/COPYING
	12	*/
	13	#ifndef _LINUX_PERF_COUNTER_H
	14	#define _LINUX_PERF_COUNTER_H
	15
f3dfd265 PM	16	#include <linux/types.h>
f3dfd265 PM	17	#include <linux/ioctl.h>
9aaa131a	18	#include <asm/byteorder.h>
0793a61d TG	19
0793a61d TG	20	/*
9f66a381 IM	21	* User-space ABI bits:
	22	*/
	23
	24	/*
b8e83514	25	* hw_event.type
0793a61d	26	*/
b8e83514 PZ	27	enum perf_event_types {
	28	PERF_TYPE_HARDWARE = 0,
	29	PERF_TYPE_SOFTWARE = 1,
	30	PERF_TYPE_TRACEPOINT = 2,
	31
0793a61d	32	/*
b8e83514	33	* available TYPE space, raw is the max value.
0793a61d	34	*/
9f66a381	35
b8e83514 PZ	36	PERF_TYPE_RAW = 128,
b8e83514 PZ	37	};
6c594c21	38
b8e83514 PZ	39	/*
	40	* Generalized performance counter event types, used by the hw_event.event_id
	41	* parameter of the sys_perf_counter_open() syscall:
	42	*/
	43	enum hw_event_ids {
9f66a381	44	/*
b8e83514	45	* Common hardware events, generalized by the kernel:
9f66a381	46	*/
b8e83514 PZ	47	PERF_COUNT_CPU_CYCLES = 0,
	48	PERF_COUNT_INSTRUCTIONS = 1,
	49	PERF_COUNT_CACHE_REFERENCES = 2,
	50	PERF_COUNT_CACHE_MISSES = 3,
	51	PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
	52	PERF_COUNT_BRANCH_MISSES = 5,
	53	PERF_COUNT_BUS_CYCLES = 6,
	54
	55	PERF_HW_EVENTS_MAX = 7,
	56	};
e077df4f	57
b8e83514 PZ	58	/*
	59	* Special "software" counters provided by the kernel, even if the hardware
	60	* does not support performance counters. These counters measure various
	61	* physical and sw events of the kernel (and allow the profiling of them as
	62	* well):
	63	*/
	64	enum sw_event_ids {
	65	PERF_COUNT_CPU_CLOCK = 0,
	66	PERF_COUNT_TASK_CLOCK = 1,
	67	PERF_COUNT_PAGE_FAULTS = 2,
	68	PERF_COUNT_CONTEXT_SWITCHES = 3,
	69	PERF_COUNT_CPU_MIGRATIONS = 4,
	70	PERF_COUNT_PAGE_FAULTS_MIN = 5,
	71	PERF_COUNT_PAGE_FAULTS_MAJ = 6,
	72
	73	PERF_SW_EVENTS_MAX = 7,
0793a61d TG	74	};
0793a61d TG	75
f4a2deb4 PZ	76	#define __PERF_COUNTER_MASK(name) \
	77	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
	78	PERF_COUNTER_##name##_SHIFT)
	79
	80	#define PERF_COUNTER_RAW_BITS 1
	81	#define PERF_COUNTER_RAW_SHIFT 63
	82	#define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
	83
	84	#define PERF_COUNTER_CONFIG_BITS 63
	85	#define PERF_COUNTER_CONFIG_SHIFT 0
	86	#define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
	87
	88	#define PERF_COUNTER_TYPE_BITS 7
	89	#define PERF_COUNTER_TYPE_SHIFT 56
	90	#define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
	91
	92	#define PERF_COUNTER_EVENT_BITS 56
	93	#define PERF_COUNTER_EVENT_SHIFT 0
	94	#define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
	95
8a057d84 PZ	96	/*
	97	* Bits that can be set in hw_event.record_type to request information
	98	* in the overflow packets.
	99	*/
	100	enum perf_counter_record_format {
	101	PERF_RECORD_IP = 1U << 0,
	102	PERF_RECORD_TID = 1U << 1,
4d855457	103	PERF_RECORD_TIME = 1U << 2,
78f13e95 PZ	104	PERF_RECORD_ADDR = 1U << 3,
	105	PERF_RECORD_GROUP = 1U << 4,
	106	PERF_RECORD_CALLCHAIN = 1U << 5,
a85f61ab	107	PERF_RECORD_CONFIG = 1U << 6,
f370e1e2	108	PERF_RECORD_CPU = 1U << 7,
8a057d84 PZ	109	};
8a057d84 PZ	110
53cfbf59 PM	111	/*
	112	* Bits that can be set in hw_event.read_format to request that
	113	* reads on the counter should return the indicated quantities,
	114	* in increasing order of bit value, after the counter value.
	115	*/
	116	enum perf_counter_read_format {
	117	PERF_FORMAT_TOTAL_TIME_ENABLED = 1,
	118	PERF_FORMAT_TOTAL_TIME_RUNNING = 2,
	119	};
	120
9f66a381 IM	121	/*
	122	* Hardware event to monitor via a performance monitoring counter:
	123	*/
	124	struct perf_counter_hw_event {
f4a2deb4 PZ	125	/*
	126	* The MSB of the config word signifies if the rest contains cpu
	127	* specific (raw) counter configuration data, if unset, the next
	128	* 7 bits are an event type and the rest of the bits are the event
	129	* identifier.
	130	*/
	131	__u64 config;
9f66a381	132
60db5e09 PZ	133	union {
	134	__u64 irq_period;
	135	__u64 irq_freq;
	136	};
	137
8a057d84 PZ	138	__u32 record_type;
8a057d84 PZ	139	__u32 read_format;
9f66a381	140
2743a5b0	141	__u64 disabled : 1, /* off by default */
0475f9ea	142	nmi : 1, /* NMI sampling */
0475f9ea PM	143	inherit : 1, /* children inherit it */
	144	pinned : 1, /* must always be on PMU */
	145	exclusive : 1, /* only group on PMU */
	146	exclude_user : 1, /* don't count user */
	147	exclude_kernel : 1, /* ditto kernel */
	148	exclude_hv : 1, /* ditto hypervisor */
2743a5b0	149	exclude_idle : 1, /* don't count when idle */
0a4a9391 PZ	150	mmap : 1, /* include mmap data */
0a4a9391 PZ	151	munmap : 1, /* include munmap data */
8d1b2d93	152	comm : 1, /* include comm data */
60db5e09	153	freq : 1, /* use freq, not period */
0475f9ea	154
60db5e09	155	__reserved_1 : 51;
2743a5b0 PM	156
2743a5b0 PM	157	__u32 extra_config_len;
c457810a	158	__u32 wakeup_events; /* wakeup every n events */
9f66a381	159
f3dfd265	160	__u64 __reserved_2;
2743a5b0	161	__u64 __reserved_3;
eab656ae TG	162	};
eab656ae TG	163
d859e29f PM	164	/*
	165	* Ioctls that can be done on a perf counter fd:
	166	*/
3df5edad PZ	167	#define PERF_COUNTER_IOC_ENABLE _IOW('$', 0, u32)
3df5edad PZ	168	#define PERF_COUNTER_IOC_DISABLE _IOW('$', 1, u32)
79f14641	169	#define PERF_COUNTER_IOC_REFRESH _IOW('$', 2, u32)
3df5edad PZ	170	#define PERF_COUNTER_IOC_RESET _IOW('$', 3, u32)
	171
	172	enum perf_counter_ioc_flags {
	173	PERF_IOC_FLAG_GROUP = 1U << 0,
	174	};
d859e29f	175
37d81828 PM	176	/*
	177	* Structure of the page that can be mapped via mmap
	178	*/
	179	struct perf_counter_mmap_page {
	180	__u32 version; /* version number of this structure */
	181	__u32 compat_version; /* lowest version this is compat with */
38ff667b PZ	182
	183	/*
	184	* Bits needed to read the hw counters in user-space.
	185	*
92f22a38 PZ	186	* u32 seq;
92f22a38 PZ	187	* s64 count;
38ff667b	188	*
a2e87d06 PZ	189	* do {
a2e87d06 PZ	190	* seq = pc->lock;
38ff667b	191	*
a2e87d06 PZ	192	* barrier()
	193	* if (pc->index) {
	194	* count = pmc_read(pc->index - 1);
	195	* count += pc->offset;
	196	* } else
	197	* goto regular_read;
38ff667b	198	*
a2e87d06 PZ	199	* barrier();
a2e87d06 PZ	200	* } while (pc->lock != seq);
38ff667b	201	*
92f22a38 PZ	202	* NOTE: for obvious reason this only works on self-monitoring
92f22a38 PZ	203	* processes.
38ff667b	204	*/
37d81828 PM	205	__u32 lock; /* seqlock for synchronization */
	206	__u32 index; /* hardware counter identifier */
	207	__s64 offset; /* add to hardware counter value */
7b732a75	208
38ff667b PZ	209	/*
	210	* Control data for the mmap() data buffer.
	211	*
	212	* User-space reading this value should issue an rmb(), on SMP capable
	213	* platforms, after reading this value -- see perf_counter_wakeup().
	214	*/
7b732a75	215	__u32 data_head; /* head in the data section */
37d81828 PM	216	};
37d81828 PM	217
9d23a90a PM	218	#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
9d23a90a PM	219	#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
6b6e5486	220	#define PERF_EVENT_MISC_KERNEL (1 << 0)
9d23a90a PM	221	#define PERF_EVENT_MISC_USER (2 << 0)
9d23a90a PM	222	#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
6b6e5486	223	#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
6fab0192	224
5c148194 PZ	225	struct perf_event_header {
5c148194 PZ	226	__u32 type;
6fab0192 PZ	227	__u16 misc;
6fab0192 PZ	228	__u16 size;
5c148194 PZ	229	};
	230
	231	enum perf_event_type {
5ed00415	232
0c593b34 PZ	233	/*
	234	* The MMAP events record the PROT_EXEC mappings so that we can
	235	* correlate userspace IPs to code. They have the following structure:
	236	*
	237	* struct {
	238	* struct perf_event_header header;
	239	*
	240	* u32 pid, tid;
	241	* u64 addr;
	242	* u64 len;
	243	* u64 pgoff;
	244	* char filename[];
	245	* };
	246	*/
8a057d84 PZ	247	PERF_EVENT_MMAP = 1,
8a057d84 PZ	248	PERF_EVENT_MUNMAP = 2,
0a4a9391	249
8d1b2d93 PZ	250	/*
	251	* struct {
	252	* struct perf_event_header header;
	253	*
	254	* u32 pid, tid;
	255	* char comm[];
	256	* };
	257	*/
	258	PERF_EVENT_COMM = 3,
	259
8a057d84	260	/*
6b6e5486 PZ	261	* When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
6b6e5486 PZ	262	* will be PERF_RECORD_*
0c593b34 PZ	263	*
	264	* struct {
	265	* struct perf_event_header header;
	266	*
6b6e5486 PZ	267	* { u64 ip; } && PERF_RECORD_IP
6b6e5486 PZ	268	* { u32 pid, tid; } && PERF_RECORD_TID
4d855457	269	* { u64 time; } && PERF_RECORD_TIME
78f13e95	270	* { u64 addr; } && PERF_RECORD_ADDR
a85f61ab	271	* { u64 config; } && PERF_RECORD_CONFIG
f370e1e2	272	* { u32 cpu, res; } && PERF_RECORD_CPU
0c593b34 PZ	273	*
0c593b34 PZ	274	* { u64 nr;
6b6e5486	275	* { u64 event, val; } cnt[nr]; } && PERF_RECORD_GROUP
0c593b34 PZ	276	*
	277	* { u16 nr,
	278	* hv,
	279	* kernel,
	280	* user;
6b6e5486	281	* u64 ips[nr]; } && PERF_RECORD_CALLCHAIN
0c593b34	282	* };
8a057d84	283	*/
5c148194 PZ	284	};
5c148194 PZ	285
f3dfd265	286	#ifdef __KERNEL__
9f66a381	287	/*
f3dfd265	288	* Kernel-internal data types and definitions:
9f66a381 IM	289	*/
9f66a381 IM	290
f3dfd265 PM	291	#ifdef CONFIG_PERF_COUNTERS
	292	# include <asm/perf_counter.h>
	293	#endif
	294
	295	#include <linux/list.h>
	296	#include <linux/mutex.h>
	297	#include <linux/rculist.h>
	298	#include <linux/rcupdate.h>
	299	#include <linux/spinlock.h>
d6d020e9	300	#include <linux/hrtimer.h>
3c446b3d	301	#include <linux/fs.h>
f3dfd265 PM	302	#include <asm/atomic.h>
	303
	304	struct task_struct;
	305
f4a2deb4 PZ	306	static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
	307	{
	308	return hw_event->config & PERF_COUNTER_RAW_MASK;
	309	}
	310
	311	static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
	312	{
	313	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
	314	}
	315
	316	static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
	317	{
	318	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
	319	PERF_COUNTER_TYPE_SHIFT;
	320	}
	321
	322	static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
	323	{
	324	return hw_event->config & PERF_COUNTER_EVENT_MASK;
	325	}
	326
0793a61d	327	/**
9f66a381	328	* struct hw_perf_counter - performance counter hardware details:
0793a61d TG	329	*/
0793a61d TG	330	struct hw_perf_counter {
ee06094f	331	#ifdef CONFIG_PERF_COUNTERS
d6d020e9 PZ	332	union {
	333	struct { /* hardware */
	334	u64 config;
	335	unsigned long config_base;
	336	unsigned long counter_base;
	337	int nmi;
6f00cada	338	int idx;
d6d020e9 PZ	339	};
	340	union { /* software */
	341	atomic64_t count;
	342	struct hrtimer hrtimer;
	343	};
	344	};
ee06094f	345	atomic64_t prev_count;
9f66a381	346	u64 irq_period;
ee06094f	347	atomic64_t period_left;
60db5e09	348	u64 interrupts;
ee06094f	349	#endif
0793a61d TG	350	};
0793a61d TG	351
621a01ea IM	352	struct perf_counter;
	353
	354	/**
4aeb0b42	355	* struct pmu - generic performance monitoring unit
621a01ea	356	*/
4aeb0b42	357	struct pmu {
95cdd2e7	358	int (enable) (struct perf_counter counter);
7671581f IM	359	void (disable) (struct perf_counter counter);
7671581f IM	360	void (read) (struct perf_counter counter);
621a01ea IM	361	};
621a01ea IM	362
6a930700 IM	363	/**
	364	* enum perf_counter_active_state - the states of a counter
	365	*/
	366	enum perf_counter_active_state {
3b6f9e5c	367	PERF_COUNTER_STATE_ERROR = -2,
6a930700 IM	368	PERF_COUNTER_STATE_OFF = -1,
	369	PERF_COUNTER_STATE_INACTIVE = 0,
	370	PERF_COUNTER_STATE_ACTIVE = 1,
	371	};
	372
9b51f66d IM	373	struct file;
9b51f66d IM	374
7b732a75 PZ	375	struct perf_mmap_data {
7b732a75 PZ	376	struct rcu_head rcu_head;
8740f941	377	int nr_pages; /* nr of data pages */
c5078f78	378	int nr_locked; /* nr pages mlocked */
8740f941	379
c33a0bc4	380	atomic_t poll; /* POLL_ for wakeups */
8740f941 PZ	381	atomic_t head; /* write position */
	382	atomic_t events; /* event limit */
	383
c66de4a5	384	atomic_t done_head; /* completed head */
c33a0bc4 PZ	385	atomic_t lock; /* concurrent writes */
c33a0bc4 PZ	386
c66de4a5 PZ	387	atomic_t wakeup; /* needs a wakeup */
c66de4a5 PZ	388
7b732a75 PZ	389	struct perf_counter_mmap_page *user_page;
	390	void *data_pages[0];
	391	};
	392
671dec5d PZ	393	struct perf_pending_entry {
	394	struct perf_pending_entry *next;
	395	void (func)(struct perf_pending_entry );
925d519a PZ	396	};
925d519a PZ	397
0793a61d TG	398	/**
	399	* struct perf_counter - performance counter kernel representation:
	400	*/
	401	struct perf_counter {
ee06094f	402	#ifdef CONFIG_PERF_COUNTERS
04289bb9	403	struct list_head list_entry;
592903cd	404	struct list_head event_entry;
04289bb9	405	struct list_head sibling_list;
5c148194	406	int nr_siblings;
04289bb9	407	struct perf_counter *group_leader;
4aeb0b42	408	const struct pmu *pmu;
04289bb9	409
6a930700	410	enum perf_counter_active_state state;
c07c99b6	411	enum perf_counter_active_state prev_state;
0793a61d	412	atomic64_t count;
ee06094f	413
53cfbf59 PM	414	/*
	415	* These are the total time in nanoseconds that the counter
	416	* has been enabled (i.e. eligible to run, and the task has
	417	* been scheduled in, if this is a per-task counter)
	418	* and running (scheduled onto the CPU), respectively.
	419	*
	420	* They are computed from tstamp_enabled, tstamp_running and
	421	* tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
	422	*/
	423	u64 total_time_enabled;
	424	u64 total_time_running;
	425
	426	/*
	427	* These are timestamps used for computing total_time_enabled
	428	* and total_time_running when the counter is in INACTIVE or
	429	* ACTIVE state, measured in nanoseconds from an arbitrary point
	430	* in time.
	431	* tstamp_enabled: the notional time when the counter was enabled
	432	* tstamp_running: the notional time when the counter was scheduled on
	433	* tstamp_stopped: in INACTIVE state, the notional time when the
	434	* counter was scheduled off.
	435	*/
	436	u64 tstamp_enabled;
	437	u64 tstamp_running;
	438	u64 tstamp_stopped;
	439
9f66a381	440	struct perf_counter_hw_event hw_event;
0793a61d TG	441	struct hw_perf_counter hw;
	442
	443	struct perf_counter_context *ctx;
	444	struct task_struct *task;
9b51f66d	445	struct file *filp;
0793a61d	446
9b51f66d	447	struct perf_counter *parent;
d859e29f PM	448	struct list_head child_list;
d859e29f PM	449
53cfbf59 PM	450	/*
	451	* These accumulate total time (in nanoseconds) that children
	452	* counters have been enabled and running, respectively.
	453	*/
	454	atomic64_t child_total_time_enabled;
	455	atomic64_t child_total_time_running;
	456
0793a61d	457	/*
d859e29f	458	* Protect attach/detach and child_list:
0793a61d TG	459	*/
	460	struct mutex mutex;
	461
	462	int oncpu;
	463	int cpu;
	464
7b732a75 PZ	465	/* mmap bits */
	466	struct mutex mmap_mutex;
	467	atomic_t mmap_count;
	468	struct perf_mmap_data *data;
37d81828	469
7b732a75	470	/* poll related */
0793a61d	471	wait_queue_head_t waitq;
3c446b3d	472	struct fasync_struct *fasync;
79f14641 PZ	473
	474	/* delayed work for NMIs and such */
	475	int pending_wakeup;
4c9e2542	476	int pending_kill;
79f14641	477	int pending_disable;
671dec5d	478	struct perf_pending_entry pending;
592903cd	479
79f14641 PZ	480	atomic_t event_limit;
79f14641 PZ	481
e077df4f	482	void (destroy)(struct perf_counter );
592903cd	483	struct rcu_head rcu_head;
ee06094f	484	#endif
0793a61d TG	485	};
	486
	487	/**
	488	* struct perf_counter_context - counter context structure
	489	*
	490	* Used as a container for task counters and CPU counters as well:
	491	*/
	492	struct perf_counter_context {
	493	#ifdef CONFIG_PERF_COUNTERS
	494	/*
d859e29f PM	495	* Protect the states of the counters in the list,
d859e29f PM	496	* nr_active, and the list:
0793a61d TG	497	*/
0793a61d TG	498	spinlock_t lock;
d859e29f PM	499	/*
	500	* Protect the list of counters. Locking either mutex or lock
	501	* is sufficient to ensure the list doesn't change; to change
	502	* the list you need to lock both the mutex and the spinlock.
	503	*/
	504	struct mutex mutex;
04289bb9 IM	505
04289bb9 IM	506	struct list_head counter_list;
592903cd	507	struct list_head event_list;
0793a61d TG	508	int nr_counters;
0793a61d TG	509	int nr_active;
d859e29f	510	int is_active;
0793a61d	511	struct task_struct *task;
53cfbf59 PM	512
53cfbf59 PM	513	/*
4af4998b	514	* Context clock, runs when context enabled.
53cfbf59	515	*/
4af4998b PZ	516	u64 time;
4af4998b PZ	517	u64 timestamp;
0793a61d TG	518	#endif
	519	};
	520
	521	/**
	522	* struct perf_counter_cpu_context - per cpu counter context structure
	523	*/
	524	struct perf_cpu_context {
	525	struct perf_counter_context ctx;
	526	struct perf_counter_context *task_ctx;
	527	int active_oncpu;
	528	int max_pertask;
3b6f9e5c	529	int exclusive;
96f6d444 PZ	530
	531	/*
	532	* Recursion avoidance:
	533	*
	534	* task, softirq, irq, nmi context
	535	*/
	536	int recursion[4];
0793a61d TG	537	};
0793a61d TG	538
829b42dd RR	539	#ifdef CONFIG_PERF_COUNTERS
829b42dd RR	540
0793a61d TG	541	/*
	542	* Set by architecture code:
	543	*/
	544	extern int perf_max_counters;
	545
4aeb0b42	546	extern const struct pmu hw_perf_counter_init(struct perf_counter counter);
621a01ea	547
0793a61d TG	548	extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
	549	extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
	550	extern void perf_counter_task_tick(struct task_struct *task, int cpu);
9b51f66d IM	551	extern void perf_counter_init_task(struct task_struct *child);
9b51f66d IM	552	extern void perf_counter_exit_task(struct task_struct *child);
925d519a	553	extern void perf_counter_do_pending(void);
0793a61d	554	extern void perf_counter_print_debug(void);
1b023a96	555	extern void perf_counter_unthrottle(void);
9e35ad38 PZ	556	extern void __perf_disable(void);
	557	extern bool __perf_enable(void);
	558	extern void perf_disable(void);
	559	extern void perf_enable(void);
1d1c7ddb IM	560	extern int perf_counter_task_disable(void);
1d1c7ddb IM	561	extern int perf_counter_task_enable(void);
3cbed429 PM	562	extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	563	struct perf_cpu_context *cpuctx,
	564	struct perf_counter_context *ctx, int cpu);
37d81828	565	extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124	566
f6c7d5fe	567	extern int perf_counter_overflow(struct perf_counter *counter,
78f13e95	568	int nmi, struct pt_regs *regs, u64 addr);
3b6f9e5c PM	569	/*
	570	* Return 1 for a software counter, 0 for a hardware counter
	571	*/
	572	static inline int is_software_counter(struct perf_counter *counter)
	573	{
f4a2deb4 PZ	574	return !perf_event_raw(&counter->hw_event) &&
f4a2deb4 PZ	575	perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
3b6f9e5c PM	576	}
3b6f9e5c PM	577
78f13e95	578	extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
15dbf27c	579
0a4a9391 PZ	580	extern void perf_counter_mmap(unsigned long addr, unsigned long len,
	581	unsigned long pgoff, struct file *file);
	582
	583	extern void perf_counter_munmap(unsigned long addr, unsigned long len,
	584	unsigned long pgoff, struct file *file);
	585
8d1b2d93 PZ	586	extern void perf_counter_comm(struct task_struct *tsk);
8d1b2d93 PZ	587
9c03d88e	588	#define MAX_STACK_DEPTH 255
394ee076 PZ	589
394ee076 PZ	590	struct perf_callchain_entry {
9c03d88e	591	u16 nr, hv, kernel, user;
394ee076 PZ	592	u64 ip[MAX_STACK_DEPTH];
	593	};
	594
	595	extern struct perf_callchain_entry perf_callchain(struct pt_regs regs);
	596
1ccd1549	597	extern int sysctl_perf_counter_priv;
c5078f78	598	extern int sysctl_perf_counter_mlock;
1ccd1549	599
0d905bca IM	600	extern void perf_counter_init(void);
0d905bca IM	601
9d23a90a PM	602	#ifndef perf_misc_flags
	603	#define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
	604	PERF_EVENT_MISC_KERNEL)
	605	#define perf_instruction_pointer(regs) instruction_pointer(regs)
	606	#endif
	607
0793a61d TG	608	#else
	609	static inline void
	610	perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
	611	static inline void
	612	perf_counter_task_sched_out(struct task_struct *task, int cpu) { }
	613	static inline void
	614	perf_counter_task_tick(struct task_struct *task, int cpu) { }
9b51f66d IM	615	static inline void perf_counter_init_task(struct task_struct *child) { }
9b51f66d IM	616	static inline void perf_counter_exit_task(struct task_struct *child) { }
925d519a	617	static inline void perf_counter_do_pending(void) { }
0793a61d	618	static inline void perf_counter_print_debug(void) { }
1b023a96	619	static inline void perf_counter_unthrottle(void) { }
9e35ad38 PZ	620	static inline void perf_disable(void) { }
9e35ad38 PZ	621	static inline void perf_enable(void) { }
1d1c7ddb IM	622	static inline int perf_counter_task_disable(void) { return -EINVAL; }
1d1c7ddb IM	623	static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c	624
925d519a	625	static inline void
78f13e95 PZ	626	perf_swcounter_event(u32 event, u64 nr, int nmi,
78f13e95 PZ	627	struct pt_regs *regs, u64 addr) { }
0a4a9391 PZ	628
	629	static inline void
	630	perf_counter_mmap(unsigned long addr, unsigned long len,
	631	unsigned long pgoff, struct file *file) { }
	632
	633	static inline void
	634	perf_counter_munmap(unsigned long addr, unsigned long len,
0d905bca	635	unsigned long pgoff, struct file *file) { }
0a4a9391	636
8d1b2d93	637	static inline void perf_counter_comm(struct task_struct *tsk) { }
0d905bca	638	static inline void perf_counter_init(void) { }
0793a61d TG	639	#endif
0793a61d TG	640
f3dfd265	641	#endif /* __KERNEL__ */
0793a61d	642	#endif /* _LINUX_PERF_COUNTER_H */