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0793a61d TG |
1 | /* |
2 | * Performance counters: | |
3 | * | |
4 | * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar | |
6 | * | |
7 | * Data type definitions, declarations, prototypes. | |
8 | * | |
9 | * Started by: Thomas Gleixner and Ingo Molnar | |
10 | * | |
11 | * For licencing details see kernel-base/COPYING | |
12 | */ | |
13 | #ifndef _LINUX_PERF_COUNTER_H | |
14 | #define _LINUX_PERF_COUNTER_H | |
15 | ||
f3dfd265 PM |
16 | #include <linux/types.h> |
17 | #include <linux/ioctl.h> | |
0793a61d TG |
18 | |
19 | /* | |
9f66a381 IM |
20 | * User-space ABI bits: |
21 | */ | |
22 | ||
23 | /* | |
b8e83514 | 24 | * hw_event.type |
0793a61d | 25 | */ |
b8e83514 PZ |
26 | enum perf_event_types { |
27 | PERF_TYPE_HARDWARE = 0, | |
28 | PERF_TYPE_SOFTWARE = 1, | |
29 | PERF_TYPE_TRACEPOINT = 2, | |
30 | ||
0793a61d | 31 | /* |
b8e83514 | 32 | * available TYPE space, raw is the max value. |
0793a61d | 33 | */ |
9f66a381 | 34 | |
b8e83514 PZ |
35 | PERF_TYPE_RAW = 128, |
36 | }; | |
6c594c21 | 37 | |
b8e83514 PZ |
38 | /* |
39 | * Generalized performance counter event types, used by the hw_event.event_id | |
40 | * parameter of the sys_perf_counter_open() syscall: | |
41 | */ | |
42 | enum hw_event_ids { | |
9f66a381 | 43 | /* |
b8e83514 | 44 | * Common hardware events, generalized by the kernel: |
9f66a381 | 45 | */ |
b8e83514 PZ |
46 | PERF_COUNT_CPU_CYCLES = 0, |
47 | PERF_COUNT_INSTRUCTIONS = 1, | |
48 | PERF_COUNT_CACHE_REFERENCES = 2, | |
49 | PERF_COUNT_CACHE_MISSES = 3, | |
50 | PERF_COUNT_BRANCH_INSTRUCTIONS = 4, | |
51 | PERF_COUNT_BRANCH_MISSES = 5, | |
52 | PERF_COUNT_BUS_CYCLES = 6, | |
53 | ||
54 | PERF_HW_EVENTS_MAX = 7, | |
55 | }; | |
e077df4f | 56 | |
b8e83514 PZ |
57 | /* |
58 | * Special "software" counters provided by the kernel, even if the hardware | |
59 | * does not support performance counters. These counters measure various | |
60 | * physical and sw events of the kernel (and allow the profiling of them as | |
61 | * well): | |
62 | */ | |
63 | enum sw_event_ids { | |
64 | PERF_COUNT_CPU_CLOCK = 0, | |
65 | PERF_COUNT_TASK_CLOCK = 1, | |
66 | PERF_COUNT_PAGE_FAULTS = 2, | |
67 | PERF_COUNT_CONTEXT_SWITCHES = 3, | |
68 | PERF_COUNT_CPU_MIGRATIONS = 4, | |
69 | PERF_COUNT_PAGE_FAULTS_MIN = 5, | |
70 | PERF_COUNT_PAGE_FAULTS_MAJ = 6, | |
71 | ||
72 | PERF_SW_EVENTS_MAX = 7, | |
0793a61d TG |
73 | }; |
74 | ||
75 | /* | |
76 | * IRQ-notification data record type: | |
77 | */ | |
9f66a381 | 78 | enum perf_counter_record_type { |
b8e83514 PZ |
79 | PERF_RECORD_SIMPLE = 0, |
80 | PERF_RECORD_IRQ = 1, | |
81 | PERF_RECORD_GROUP = 2, | |
0793a61d TG |
82 | }; |
83 | ||
9f66a381 IM |
84 | /* |
85 | * Hardware event to monitor via a performance monitoring counter: | |
86 | */ | |
87 | struct perf_counter_hw_event { | |
b8e83514 PZ |
88 | union { |
89 | struct { | |
90 | __u64 event_id : 56, | |
91 | type : 8; | |
92 | }; | |
93 | struct { | |
94 | __u64 raw_event_id : 63, | |
95 | raw_type : 1; | |
96 | }; | |
97 | __u64 event_config; | |
98 | }; | |
9f66a381 | 99 | |
f3dfd265 | 100 | __u64 irq_period; |
2743a5b0 PM |
101 | __u64 record_type; |
102 | __u64 read_format; | |
9f66a381 | 103 | |
2743a5b0 | 104 | __u64 disabled : 1, /* off by default */ |
0475f9ea | 105 | nmi : 1, /* NMI sampling */ |
0475f9ea PM |
106 | inherit : 1, /* children inherit it */ |
107 | pinned : 1, /* must always be on PMU */ | |
108 | exclusive : 1, /* only group on PMU */ | |
109 | exclude_user : 1, /* don't count user */ | |
110 | exclude_kernel : 1, /* ditto kernel */ | |
111 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 112 | exclude_idle : 1, /* don't count when idle */ |
0475f9ea | 113 | |
b8e83514 | 114 | __reserved_1 : 55; |
2743a5b0 PM |
115 | |
116 | __u32 extra_config_len; | |
117 | __u32 __reserved_4; | |
9f66a381 | 118 | |
f3dfd265 | 119 | __u64 __reserved_2; |
2743a5b0 | 120 | __u64 __reserved_3; |
eab656ae TG |
121 | }; |
122 | ||
d859e29f PM |
123 | /* |
124 | * Ioctls that can be done on a perf counter fd: | |
125 | */ | |
126 | #define PERF_COUNTER_IOC_ENABLE _IO('$', 0) | |
127 | #define PERF_COUNTER_IOC_DISABLE _IO('$', 1) | |
128 | ||
f3dfd265 | 129 | #ifdef __KERNEL__ |
9f66a381 | 130 | /* |
f3dfd265 | 131 | * Kernel-internal data types and definitions: |
9f66a381 IM |
132 | */ |
133 | ||
f3dfd265 PM |
134 | #ifdef CONFIG_PERF_COUNTERS |
135 | # include <asm/perf_counter.h> | |
136 | #endif | |
137 | ||
138 | #include <linux/list.h> | |
139 | #include <linux/mutex.h> | |
140 | #include <linux/rculist.h> | |
141 | #include <linux/rcupdate.h> | |
142 | #include <linux/spinlock.h> | |
d6d020e9 | 143 | #include <linux/hrtimer.h> |
f3dfd265 PM |
144 | #include <asm/atomic.h> |
145 | ||
146 | struct task_struct; | |
147 | ||
0793a61d | 148 | /** |
9f66a381 | 149 | * struct hw_perf_counter - performance counter hardware details: |
0793a61d TG |
150 | */ |
151 | struct hw_perf_counter { | |
ee06094f | 152 | #ifdef CONFIG_PERF_COUNTERS |
d6d020e9 PZ |
153 | union { |
154 | struct { /* hardware */ | |
155 | u64 config; | |
156 | unsigned long config_base; | |
157 | unsigned long counter_base; | |
158 | int nmi; | |
159 | unsigned int idx; | |
160 | }; | |
161 | union { /* software */ | |
162 | atomic64_t count; | |
163 | struct hrtimer hrtimer; | |
164 | }; | |
165 | }; | |
ee06094f | 166 | atomic64_t prev_count; |
9f66a381 | 167 | u64 irq_period; |
ee06094f IM |
168 | atomic64_t period_left; |
169 | #endif | |
0793a61d TG |
170 | }; |
171 | ||
172 | /* | |
173 | * Hardcoded buffer length limit for now, for IRQ-fed events: | |
174 | */ | |
9f66a381 | 175 | #define PERF_DATA_BUFLEN 2048 |
0793a61d TG |
176 | |
177 | /** | |
178 | * struct perf_data - performance counter IRQ data sampling ... | |
179 | */ | |
180 | struct perf_data { | |
9f66a381 IM |
181 | int len; |
182 | int rd_idx; | |
183 | int overrun; | |
184 | u8 data[PERF_DATA_BUFLEN]; | |
0793a61d TG |
185 | }; |
186 | ||
621a01ea IM |
187 | struct perf_counter; |
188 | ||
189 | /** | |
190 | * struct hw_perf_counter_ops - performance counter hw ops | |
191 | */ | |
192 | struct hw_perf_counter_ops { | |
95cdd2e7 | 193 | int (*enable) (struct perf_counter *counter); |
7671581f IM |
194 | void (*disable) (struct perf_counter *counter); |
195 | void (*read) (struct perf_counter *counter); | |
621a01ea IM |
196 | }; |
197 | ||
6a930700 IM |
198 | /** |
199 | * enum perf_counter_active_state - the states of a counter | |
200 | */ | |
201 | enum perf_counter_active_state { | |
3b6f9e5c | 202 | PERF_COUNTER_STATE_ERROR = -2, |
6a930700 IM |
203 | PERF_COUNTER_STATE_OFF = -1, |
204 | PERF_COUNTER_STATE_INACTIVE = 0, | |
205 | PERF_COUNTER_STATE_ACTIVE = 1, | |
206 | }; | |
207 | ||
9b51f66d IM |
208 | struct file; |
209 | ||
0793a61d TG |
210 | /** |
211 | * struct perf_counter - performance counter kernel representation: | |
212 | */ | |
213 | struct perf_counter { | |
ee06094f | 214 | #ifdef CONFIG_PERF_COUNTERS |
04289bb9 | 215 | struct list_head list_entry; |
592903cd | 216 | struct list_head event_entry; |
04289bb9 IM |
217 | struct list_head sibling_list; |
218 | struct perf_counter *group_leader; | |
5c92d124 | 219 | const struct hw_perf_counter_ops *hw_ops; |
04289bb9 | 220 | |
6a930700 | 221 | enum perf_counter_active_state state; |
c07c99b6 | 222 | enum perf_counter_active_state prev_state; |
0793a61d | 223 | atomic64_t count; |
ee06094f | 224 | |
9f66a381 | 225 | struct perf_counter_hw_event hw_event; |
0793a61d TG |
226 | struct hw_perf_counter hw; |
227 | ||
228 | struct perf_counter_context *ctx; | |
229 | struct task_struct *task; | |
9b51f66d | 230 | struct file *filp; |
0793a61d | 231 | |
9b51f66d | 232 | struct perf_counter *parent; |
d859e29f PM |
233 | struct list_head child_list; |
234 | ||
0793a61d | 235 | /* |
d859e29f | 236 | * Protect attach/detach and child_list: |
0793a61d TG |
237 | */ |
238 | struct mutex mutex; | |
239 | ||
240 | int oncpu; | |
241 | int cpu; | |
242 | ||
0793a61d TG |
243 | /* read() / irq related data */ |
244 | wait_queue_head_t waitq; | |
245 | /* optional: for NMIs */ | |
246 | int wakeup_pending; | |
247 | struct perf_data *irqdata; | |
248 | struct perf_data *usrdata; | |
249 | struct perf_data data[2]; | |
592903cd | 250 | |
e077df4f | 251 | void (*destroy)(struct perf_counter *); |
592903cd | 252 | struct rcu_head rcu_head; |
ee06094f | 253 | #endif |
0793a61d TG |
254 | }; |
255 | ||
256 | /** | |
257 | * struct perf_counter_context - counter context structure | |
258 | * | |
259 | * Used as a container for task counters and CPU counters as well: | |
260 | */ | |
261 | struct perf_counter_context { | |
262 | #ifdef CONFIG_PERF_COUNTERS | |
263 | /* | |
d859e29f PM |
264 | * Protect the states of the counters in the list, |
265 | * nr_active, and the list: | |
0793a61d TG |
266 | */ |
267 | spinlock_t lock; | |
d859e29f PM |
268 | /* |
269 | * Protect the list of counters. Locking either mutex or lock | |
270 | * is sufficient to ensure the list doesn't change; to change | |
271 | * the list you need to lock both the mutex and the spinlock. | |
272 | */ | |
273 | struct mutex mutex; | |
04289bb9 IM |
274 | |
275 | struct list_head counter_list; | |
592903cd | 276 | struct list_head event_list; |
0793a61d TG |
277 | int nr_counters; |
278 | int nr_active; | |
d859e29f | 279 | int is_active; |
0793a61d TG |
280 | struct task_struct *task; |
281 | #endif | |
282 | }; | |
283 | ||
284 | /** | |
285 | * struct perf_counter_cpu_context - per cpu counter context structure | |
286 | */ | |
287 | struct perf_cpu_context { | |
288 | struct perf_counter_context ctx; | |
289 | struct perf_counter_context *task_ctx; | |
290 | int active_oncpu; | |
291 | int max_pertask; | |
3b6f9e5c | 292 | int exclusive; |
0793a61d TG |
293 | }; |
294 | ||
295 | /* | |
296 | * Set by architecture code: | |
297 | */ | |
298 | extern int perf_max_counters; | |
299 | ||
300 | #ifdef CONFIG_PERF_COUNTERS | |
5c92d124 | 301 | extern const struct hw_perf_counter_ops * |
621a01ea IM |
302 | hw_perf_counter_init(struct perf_counter *counter); |
303 | ||
0793a61d TG |
304 | extern void perf_counter_task_sched_in(struct task_struct *task, int cpu); |
305 | extern void perf_counter_task_sched_out(struct task_struct *task, int cpu); | |
306 | extern void perf_counter_task_tick(struct task_struct *task, int cpu); | |
9b51f66d IM |
307 | extern void perf_counter_init_task(struct task_struct *child); |
308 | extern void perf_counter_exit_task(struct task_struct *child); | |
0793a61d TG |
309 | extern void perf_counter_notify(struct pt_regs *regs); |
310 | extern void perf_counter_print_debug(void); | |
1b023a96 | 311 | extern void perf_counter_unthrottle(void); |
01b2838c IM |
312 | extern u64 hw_perf_save_disable(void); |
313 | extern void hw_perf_restore(u64 ctrl); | |
1d1c7ddb IM |
314 | extern int perf_counter_task_disable(void); |
315 | extern int perf_counter_task_enable(void); | |
3cbed429 PM |
316 | extern int hw_perf_group_sched_in(struct perf_counter *group_leader, |
317 | struct perf_cpu_context *cpuctx, | |
318 | struct perf_counter_context *ctx, int cpu); | |
5c92d124 | 319 | |
0322cd6e PZ |
320 | extern void perf_counter_output(struct perf_counter *counter, |
321 | int nmi, struct pt_regs *regs); | |
3b6f9e5c PM |
322 | /* |
323 | * Return 1 for a software counter, 0 for a hardware counter | |
324 | */ | |
325 | static inline int is_software_counter(struct perf_counter *counter) | |
326 | { | |
b8e83514 PZ |
327 | return !counter->hw_event.raw_type && |
328 | counter->hw_event.type != PERF_TYPE_HARDWARE; | |
3b6f9e5c PM |
329 | } |
330 | ||
b8e83514 | 331 | extern void perf_swcounter_event(u32, u64, int, struct pt_regs *); |
15dbf27c | 332 | |
0793a61d TG |
333 | #else |
334 | static inline void | |
335 | perf_counter_task_sched_in(struct task_struct *task, int cpu) { } | |
336 | static inline void | |
337 | perf_counter_task_sched_out(struct task_struct *task, int cpu) { } | |
338 | static inline void | |
339 | perf_counter_task_tick(struct task_struct *task, int cpu) { } | |
9b51f66d IM |
340 | static inline void perf_counter_init_task(struct task_struct *child) { } |
341 | static inline void perf_counter_exit_task(struct task_struct *child) { } | |
0793a61d TG |
342 | static inline void perf_counter_notify(struct pt_regs *regs) { } |
343 | static inline void perf_counter_print_debug(void) { } | |
1b023a96 | 344 | static inline void perf_counter_unthrottle(void) { } |
15dbf27c | 345 | static inline void hw_perf_restore(u64 ctrl) { } |
01b2838c | 346 | static inline u64 hw_perf_save_disable(void) { return 0; } |
1d1c7ddb IM |
347 | static inline int perf_counter_task_disable(void) { return -EINVAL; } |
348 | static inline int perf_counter_task_enable(void) { return -EINVAL; } | |
15dbf27c | 349 | |
b8e83514 | 350 | static inline void perf_swcounter_event(u32 event, u64 nr, |
15dbf27c | 351 | int nmi, struct pt_regs *regs) { } |
0793a61d TG |
352 | #endif |
353 | ||
f3dfd265 | 354 | #endif /* __KERNEL__ */ |
0793a61d | 355 | #endif /* _LINUX_PERF_COUNTER_H */ |