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0793a61d TG |
1 | /* |
2 | * Performance counters: | |
3 | * | |
4 | * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar | |
6 | * | |
7 | * Data type definitions, declarations, prototypes. | |
8 | * | |
9 | * Started by: Thomas Gleixner and Ingo Molnar | |
10 | * | |
11 | * For licencing details see kernel-base/COPYING | |
12 | */ | |
13 | #ifndef _LINUX_PERF_COUNTER_H | |
14 | #define _LINUX_PERF_COUNTER_H | |
15 | ||
f3dfd265 PM |
16 | #include <linux/types.h> |
17 | #include <linux/ioctl.h> | |
9aaa131a | 18 | #include <asm/byteorder.h> |
0793a61d TG |
19 | |
20 | /* | |
9f66a381 IM |
21 | * User-space ABI bits: |
22 | */ | |
23 | ||
24 | /* | |
0d48696f | 25 | * attr.type |
0793a61d | 26 | */ |
b8e83514 PZ |
27 | enum perf_event_types { |
28 | PERF_TYPE_HARDWARE = 0, | |
29 | PERF_TYPE_SOFTWARE = 1, | |
30 | PERF_TYPE_TRACEPOINT = 2, | |
8326f44d | 31 | PERF_TYPE_HW_CACHE = 3, |
b8e83514 | 32 | |
0793a61d | 33 | /* |
b8e83514 | 34 | * available TYPE space, raw is the max value. |
0793a61d | 35 | */ |
9f66a381 | 36 | |
b8e83514 PZ |
37 | PERF_TYPE_RAW = 128, |
38 | }; | |
6c594c21 | 39 | |
b8e83514 | 40 | /* |
0d48696f | 41 | * Generalized performance counter event types, used by the attr.event_id |
b8e83514 PZ |
42 | * parameter of the sys_perf_counter_open() syscall: |
43 | */ | |
0d48696f | 44 | enum attr_ids { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
b8e83514 PZ |
48 | PERF_COUNT_CPU_CYCLES = 0, |
49 | PERF_COUNT_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_CACHE_MISSES = 3, | |
52 | PERF_COUNT_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_BUS_CYCLES = 6, | |
55 | ||
56 | PERF_HW_EVENTS_MAX = 7, | |
57 | }; | |
e077df4f | 58 | |
8326f44d IM |
59 | /* |
60 | * Generalized hardware cache counters: | |
61 | * | |
62 | * { L1-D, L1-I, L2, LLC, ITLB, DTLB, BPU } x | |
63 | * { read, write, prefetch } x | |
64 | * { accesses, misses } | |
65 | */ | |
66 | enum hw_cache_id { | |
67 | PERF_COUNT_HW_CACHE_L1D, | |
68 | PERF_COUNT_HW_CACHE_L1I, | |
69 | PERF_COUNT_HW_CACHE_L2, | |
70 | PERF_COUNT_HW_CACHE_DTLB, | |
71 | PERF_COUNT_HW_CACHE_ITLB, | |
72 | PERF_COUNT_HW_CACHE_BPU, | |
73 | ||
74 | PERF_COUNT_HW_CACHE_MAX, | |
75 | }; | |
76 | ||
77 | enum hw_cache_op_id { | |
78 | PERF_COUNT_HW_CACHE_OP_READ, | |
79 | PERF_COUNT_HW_CACHE_OP_WRITE, | |
80 | PERF_COUNT_HW_CACHE_OP_PREFETCH, | |
81 | ||
82 | PERF_COUNT_HW_CACHE_OP_MAX, | |
83 | }; | |
84 | ||
85 | enum hw_cache_op_result_id { | |
86 | PERF_COUNT_HW_CACHE_RESULT_ACCESS, | |
87 | PERF_COUNT_HW_CACHE_RESULT_MISS, | |
88 | ||
89 | PERF_COUNT_HW_CACHE_RESULT_MAX, | |
90 | }; | |
91 | ||
b8e83514 PZ |
92 | /* |
93 | * Special "software" counters provided by the kernel, even if the hardware | |
94 | * does not support performance counters. These counters measure various | |
95 | * physical and sw events of the kernel (and allow the profiling of them as | |
96 | * well): | |
97 | */ | |
98 | enum sw_event_ids { | |
99 | PERF_COUNT_CPU_CLOCK = 0, | |
100 | PERF_COUNT_TASK_CLOCK = 1, | |
101 | PERF_COUNT_PAGE_FAULTS = 2, | |
102 | PERF_COUNT_CONTEXT_SWITCHES = 3, | |
103 | PERF_COUNT_CPU_MIGRATIONS = 4, | |
104 | PERF_COUNT_PAGE_FAULTS_MIN = 5, | |
105 | PERF_COUNT_PAGE_FAULTS_MAJ = 6, | |
106 | ||
107 | PERF_SW_EVENTS_MAX = 7, | |
0793a61d TG |
108 | }; |
109 | ||
8a057d84 | 110 | /* |
0d48696f | 111 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
112 | * in the overflow packets. |
113 | */ | |
b23f3325 PZ |
114 | enum perf_counter_sample_format { |
115 | PERF_SAMPLE_IP = 1U << 0, | |
116 | PERF_SAMPLE_TID = 1U << 1, | |
117 | PERF_SAMPLE_TIME = 1U << 2, | |
118 | PERF_SAMPLE_ADDR = 1U << 3, | |
119 | PERF_SAMPLE_GROUP = 1U << 4, | |
120 | PERF_SAMPLE_CALLCHAIN = 1U << 5, | |
ac4bcf88 | 121 | PERF_SAMPLE_ID = 1U << 6, |
b23f3325 | 122 | PERF_SAMPLE_CPU = 1U << 7, |
689802b2 | 123 | PERF_SAMPLE_PERIOD = 1U << 8, |
8a057d84 PZ |
124 | }; |
125 | ||
53cfbf59 | 126 | /* |
0d48696f | 127 | * Bits that can be set in attr.read_format to request that |
53cfbf59 PM |
128 | * reads on the counter should return the indicated quantities, |
129 | * in increasing order of bit value, after the counter value. | |
130 | */ | |
131 | enum perf_counter_read_format { | |
8e5799b1 PZ |
132 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
133 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
134 | PERF_FORMAT_ID = 1U << 2, | |
53cfbf59 PM |
135 | }; |
136 | ||
9f66a381 IM |
137 | /* |
138 | * Hardware event to monitor via a performance monitoring counter: | |
139 | */ | |
0d48696f | 140 | struct perf_counter_attr { |
f4a2deb4 | 141 | /* |
a21ca2ca IM |
142 | * Major type: hardware/software/tracepoint/etc. |
143 | */ | |
144 | __u32 type; | |
145 | __u32 __reserved_1; | |
146 | ||
147 | /* | |
148 | * Type specific configuration information. | |
f4a2deb4 PZ |
149 | */ |
150 | __u64 config; | |
9f66a381 | 151 | |
60db5e09 | 152 | union { |
b23f3325 PZ |
153 | __u64 sample_period; |
154 | __u64 sample_freq; | |
60db5e09 PZ |
155 | }; |
156 | ||
b23f3325 PZ |
157 | __u64 sample_type; |
158 | __u64 read_format; | |
9f66a381 | 159 | |
2743a5b0 | 160 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
161 | inherit : 1, /* children inherit it */ |
162 | pinned : 1, /* must always be on PMU */ | |
163 | exclusive : 1, /* only group on PMU */ | |
164 | exclude_user : 1, /* don't count user */ | |
165 | exclude_kernel : 1, /* ditto kernel */ | |
166 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 167 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 168 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 169 | comm : 1, /* include comm data */ |
60db5e09 | 170 | freq : 1, /* use freq, not period */ |
0475f9ea | 171 | |
a21ca2ca | 172 | __reserved_2 : 53; |
2743a5b0 | 173 | |
c457810a | 174 | __u32 wakeup_events; /* wakeup every n events */ |
a21ca2ca | 175 | __u32 __reserved_3; |
9f66a381 | 176 | |
e527ea31 | 177 | __u64 __reserved_4; |
eab656ae TG |
178 | }; |
179 | ||
d859e29f PM |
180 | /* |
181 | * Ioctls that can be done on a perf counter fd: | |
182 | */ | |
08247e31 PZ |
183 | #define PERF_COUNTER_IOC_ENABLE _IO ('$', 0) |
184 | #define PERF_COUNTER_IOC_DISABLE _IO ('$', 1) | |
185 | #define PERF_COUNTER_IOC_REFRESH _IO ('$', 2) | |
186 | #define PERF_COUNTER_IOC_RESET _IO ('$', 3) | |
187 | #define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64) | |
3df5edad PZ |
188 | |
189 | enum perf_counter_ioc_flags { | |
190 | PERF_IOC_FLAG_GROUP = 1U << 0, | |
191 | }; | |
d859e29f | 192 | |
37d81828 PM |
193 | /* |
194 | * Structure of the page that can be mapped via mmap | |
195 | */ | |
196 | struct perf_counter_mmap_page { | |
197 | __u32 version; /* version number of this structure */ | |
198 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
199 | |
200 | /* | |
201 | * Bits needed to read the hw counters in user-space. | |
202 | * | |
92f22a38 PZ |
203 | * u32 seq; |
204 | * s64 count; | |
38ff667b | 205 | * |
a2e87d06 PZ |
206 | * do { |
207 | * seq = pc->lock; | |
38ff667b | 208 | * |
a2e87d06 PZ |
209 | * barrier() |
210 | * if (pc->index) { | |
211 | * count = pmc_read(pc->index - 1); | |
212 | * count += pc->offset; | |
213 | * } else | |
214 | * goto regular_read; | |
38ff667b | 215 | * |
a2e87d06 PZ |
216 | * barrier(); |
217 | * } while (pc->lock != seq); | |
38ff667b | 218 | * |
92f22a38 PZ |
219 | * NOTE: for obvious reason this only works on self-monitoring |
220 | * processes. | |
38ff667b | 221 | */ |
37d81828 PM |
222 | __u32 lock; /* seqlock for synchronization */ |
223 | __u32 index; /* hardware counter identifier */ | |
224 | __s64 offset; /* add to hardware counter value */ | |
7b732a75 | 225 | |
38ff667b PZ |
226 | /* |
227 | * Control data for the mmap() data buffer. | |
228 | * | |
229 | * User-space reading this value should issue an rmb(), on SMP capable | |
230 | * platforms, after reading this value -- see perf_counter_wakeup(). | |
231 | */ | |
8e3747c1 | 232 | __u64 data_head; /* head in the data section */ |
37d81828 PM |
233 | }; |
234 | ||
9d23a90a PM |
235 | #define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0) |
236 | #define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0) | |
6b6e5486 | 237 | #define PERF_EVENT_MISC_KERNEL (1 << 0) |
9d23a90a PM |
238 | #define PERF_EVENT_MISC_USER (2 << 0) |
239 | #define PERF_EVENT_MISC_HYPERVISOR (3 << 0) | |
6b6e5486 | 240 | #define PERF_EVENT_MISC_OVERFLOW (1 << 2) |
6fab0192 | 241 | |
5c148194 PZ |
242 | struct perf_event_header { |
243 | __u32 type; | |
6fab0192 PZ |
244 | __u16 misc; |
245 | __u16 size; | |
5c148194 PZ |
246 | }; |
247 | ||
248 | enum perf_event_type { | |
5ed00415 | 249 | |
0c593b34 PZ |
250 | /* |
251 | * The MMAP events record the PROT_EXEC mappings so that we can | |
252 | * correlate userspace IPs to code. They have the following structure: | |
253 | * | |
254 | * struct { | |
0127c3ea | 255 | * struct perf_event_header header; |
0c593b34 | 256 | * |
0127c3ea IM |
257 | * u32 pid, tid; |
258 | * u64 addr; | |
259 | * u64 len; | |
260 | * u64 pgoff; | |
261 | * char filename[]; | |
0c593b34 PZ |
262 | * }; |
263 | */ | |
8a057d84 | 264 | PERF_EVENT_MMAP = 1, |
0a4a9391 | 265 | |
8d1b2d93 PZ |
266 | /* |
267 | * struct { | |
0127c3ea | 268 | * struct perf_event_header header; |
8d1b2d93 | 269 | * |
0127c3ea IM |
270 | * u32 pid, tid; |
271 | * char comm[]; | |
8d1b2d93 PZ |
272 | * }; |
273 | */ | |
274 | PERF_EVENT_COMM = 3, | |
275 | ||
26b119bc PZ |
276 | /* |
277 | * struct { | |
0127c3ea IM |
278 | * struct perf_event_header header; |
279 | * u64 time; | |
689802b2 | 280 | * u64 id; |
b23f3325 | 281 | * u64 sample_period; |
26b119bc PZ |
282 | * }; |
283 | */ | |
284 | PERF_EVENT_PERIOD = 4, | |
285 | ||
a78ac325 PZ |
286 | /* |
287 | * struct { | |
0127c3ea IM |
288 | * struct perf_event_header header; |
289 | * u64 time; | |
a78ac325 PZ |
290 | * }; |
291 | */ | |
292 | PERF_EVENT_THROTTLE = 5, | |
293 | PERF_EVENT_UNTHROTTLE = 6, | |
294 | ||
60313ebe PZ |
295 | /* |
296 | * struct { | |
a21ca2ca IM |
297 | * struct perf_event_header header; |
298 | * u32 pid, ppid; | |
60313ebe PZ |
299 | * }; |
300 | */ | |
301 | PERF_EVENT_FORK = 7, | |
302 | ||
8a057d84 | 303 | /* |
6b6e5486 PZ |
304 | * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field |
305 | * will be PERF_RECORD_* | |
0c593b34 PZ |
306 | * |
307 | * struct { | |
0127c3ea | 308 | * struct perf_event_header header; |
0c593b34 | 309 | * |
0127c3ea IM |
310 | * { u64 ip; } && PERF_RECORD_IP |
311 | * { u32 pid, tid; } && PERF_RECORD_TID | |
312 | * { u64 time; } && PERF_RECORD_TIME | |
313 | * { u64 addr; } && PERF_RECORD_ADDR | |
314 | * { u64 config; } && PERF_RECORD_CONFIG | |
315 | * { u32 cpu, res; } && PERF_RECORD_CPU | |
0c593b34 | 316 | * |
0127c3ea | 317 | * { u64 nr; |
8e5799b1 | 318 | * { u64 id, val; } cnt[nr]; } && PERF_RECORD_GROUP |
0c593b34 | 319 | * |
0127c3ea IM |
320 | * { u16 nr, |
321 | * hv, | |
322 | * kernel, | |
323 | * user; | |
324 | * u64 ips[nr]; } && PERF_RECORD_CALLCHAIN | |
0c593b34 | 325 | * }; |
8a057d84 | 326 | */ |
5c148194 PZ |
327 | }; |
328 | ||
f3dfd265 | 329 | #ifdef __KERNEL__ |
9f66a381 | 330 | /* |
f3dfd265 | 331 | * Kernel-internal data types and definitions: |
9f66a381 IM |
332 | */ |
333 | ||
f3dfd265 PM |
334 | #ifdef CONFIG_PERF_COUNTERS |
335 | # include <asm/perf_counter.h> | |
336 | #endif | |
337 | ||
338 | #include <linux/list.h> | |
339 | #include <linux/mutex.h> | |
340 | #include <linux/rculist.h> | |
341 | #include <linux/rcupdate.h> | |
342 | #include <linux/spinlock.h> | |
d6d020e9 | 343 | #include <linux/hrtimer.h> |
3c446b3d | 344 | #include <linux/fs.h> |
709e50cf | 345 | #include <linux/pid_namespace.h> |
f3dfd265 PM |
346 | #include <asm/atomic.h> |
347 | ||
348 | struct task_struct; | |
349 | ||
0793a61d | 350 | /** |
9f66a381 | 351 | * struct hw_perf_counter - performance counter hardware details: |
0793a61d TG |
352 | */ |
353 | struct hw_perf_counter { | |
ee06094f | 354 | #ifdef CONFIG_PERF_COUNTERS |
d6d020e9 PZ |
355 | union { |
356 | struct { /* hardware */ | |
357 | u64 config; | |
358 | unsigned long config_base; | |
359 | unsigned long counter_base; | |
6f00cada | 360 | int idx; |
d6d020e9 PZ |
361 | }; |
362 | union { /* software */ | |
363 | atomic64_t count; | |
364 | struct hrtimer hrtimer; | |
365 | }; | |
366 | }; | |
ee06094f | 367 | atomic64_t prev_count; |
b23f3325 | 368 | u64 sample_period; |
ee06094f | 369 | atomic64_t period_left; |
60db5e09 | 370 | u64 interrupts; |
6a24ed6c PZ |
371 | |
372 | u64 freq_count; | |
373 | u64 freq_interrupts; | |
bd2b5b12 | 374 | u64 freq_stamp; |
ee06094f | 375 | #endif |
0793a61d TG |
376 | }; |
377 | ||
621a01ea IM |
378 | struct perf_counter; |
379 | ||
380 | /** | |
4aeb0b42 | 381 | * struct pmu - generic performance monitoring unit |
621a01ea | 382 | */ |
4aeb0b42 | 383 | struct pmu { |
95cdd2e7 | 384 | int (*enable) (struct perf_counter *counter); |
7671581f IM |
385 | void (*disable) (struct perf_counter *counter); |
386 | void (*read) (struct perf_counter *counter); | |
a78ac325 | 387 | void (*unthrottle) (struct perf_counter *counter); |
621a01ea IM |
388 | }; |
389 | ||
6a930700 IM |
390 | /** |
391 | * enum perf_counter_active_state - the states of a counter | |
392 | */ | |
393 | enum perf_counter_active_state { | |
3b6f9e5c | 394 | PERF_COUNTER_STATE_ERROR = -2, |
6a930700 IM |
395 | PERF_COUNTER_STATE_OFF = -1, |
396 | PERF_COUNTER_STATE_INACTIVE = 0, | |
397 | PERF_COUNTER_STATE_ACTIVE = 1, | |
398 | }; | |
399 | ||
9b51f66d IM |
400 | struct file; |
401 | ||
7b732a75 PZ |
402 | struct perf_mmap_data { |
403 | struct rcu_head rcu_head; | |
8740f941 | 404 | int nr_pages; /* nr of data pages */ |
c5078f78 | 405 | int nr_locked; /* nr pages mlocked */ |
8740f941 | 406 | |
c33a0bc4 | 407 | atomic_t poll; /* POLL_ for wakeups */ |
8740f941 PZ |
408 | atomic_t events; /* event limit */ |
409 | ||
8e3747c1 PZ |
410 | atomic_long_t head; /* write position */ |
411 | atomic_long_t done_head; /* completed head */ | |
412 | ||
c33a0bc4 PZ |
413 | atomic_t lock; /* concurrent writes */ |
414 | ||
c66de4a5 PZ |
415 | atomic_t wakeup; /* needs a wakeup */ |
416 | ||
7b732a75 | 417 | struct perf_counter_mmap_page *user_page; |
0127c3ea | 418 | void *data_pages[0]; |
7b732a75 PZ |
419 | }; |
420 | ||
671dec5d PZ |
421 | struct perf_pending_entry { |
422 | struct perf_pending_entry *next; | |
423 | void (*func)(struct perf_pending_entry *); | |
925d519a PZ |
424 | }; |
425 | ||
0793a61d TG |
426 | /** |
427 | * struct perf_counter - performance counter kernel representation: | |
428 | */ | |
429 | struct perf_counter { | |
ee06094f | 430 | #ifdef CONFIG_PERF_COUNTERS |
04289bb9 | 431 | struct list_head list_entry; |
592903cd | 432 | struct list_head event_entry; |
04289bb9 | 433 | struct list_head sibling_list; |
0127c3ea | 434 | int nr_siblings; |
04289bb9 | 435 | struct perf_counter *group_leader; |
4aeb0b42 | 436 | const struct pmu *pmu; |
04289bb9 | 437 | |
6a930700 | 438 | enum perf_counter_active_state state; |
0793a61d | 439 | atomic64_t count; |
ee06094f | 440 | |
53cfbf59 PM |
441 | /* |
442 | * These are the total time in nanoseconds that the counter | |
443 | * has been enabled (i.e. eligible to run, and the task has | |
444 | * been scheduled in, if this is a per-task counter) | |
445 | * and running (scheduled onto the CPU), respectively. | |
446 | * | |
447 | * They are computed from tstamp_enabled, tstamp_running and | |
448 | * tstamp_stopped when the counter is in INACTIVE or ACTIVE state. | |
449 | */ | |
450 | u64 total_time_enabled; | |
451 | u64 total_time_running; | |
452 | ||
453 | /* | |
454 | * These are timestamps used for computing total_time_enabled | |
455 | * and total_time_running when the counter is in INACTIVE or | |
456 | * ACTIVE state, measured in nanoseconds from an arbitrary point | |
457 | * in time. | |
458 | * tstamp_enabled: the notional time when the counter was enabled | |
459 | * tstamp_running: the notional time when the counter was scheduled on | |
460 | * tstamp_stopped: in INACTIVE state, the notional time when the | |
461 | * counter was scheduled off. | |
462 | */ | |
463 | u64 tstamp_enabled; | |
464 | u64 tstamp_running; | |
465 | u64 tstamp_stopped; | |
466 | ||
0d48696f | 467 | struct perf_counter_attr attr; |
0793a61d TG |
468 | struct hw_perf_counter hw; |
469 | ||
470 | struct perf_counter_context *ctx; | |
9b51f66d | 471 | struct file *filp; |
0793a61d | 472 | |
53cfbf59 PM |
473 | /* |
474 | * These accumulate total time (in nanoseconds) that children | |
475 | * counters have been enabled and running, respectively. | |
476 | */ | |
477 | atomic64_t child_total_time_enabled; | |
478 | atomic64_t child_total_time_running; | |
479 | ||
0793a61d | 480 | /* |
d859e29f | 481 | * Protect attach/detach and child_list: |
0793a61d | 482 | */ |
fccc714b PZ |
483 | struct mutex child_mutex; |
484 | struct list_head child_list; | |
485 | struct perf_counter *parent; | |
0793a61d TG |
486 | |
487 | int oncpu; | |
488 | int cpu; | |
489 | ||
082ff5a2 PZ |
490 | struct list_head owner_entry; |
491 | struct task_struct *owner; | |
492 | ||
7b732a75 PZ |
493 | /* mmap bits */ |
494 | struct mutex mmap_mutex; | |
495 | atomic_t mmap_count; | |
496 | struct perf_mmap_data *data; | |
37d81828 | 497 | |
7b732a75 | 498 | /* poll related */ |
0793a61d | 499 | wait_queue_head_t waitq; |
3c446b3d | 500 | struct fasync_struct *fasync; |
79f14641 PZ |
501 | |
502 | /* delayed work for NMIs and such */ | |
503 | int pending_wakeup; | |
4c9e2542 | 504 | int pending_kill; |
79f14641 | 505 | int pending_disable; |
671dec5d | 506 | struct perf_pending_entry pending; |
592903cd | 507 | |
79f14641 PZ |
508 | atomic_t event_limit; |
509 | ||
e077df4f | 510 | void (*destroy)(struct perf_counter *); |
592903cd | 511 | struct rcu_head rcu_head; |
709e50cf PZ |
512 | |
513 | struct pid_namespace *ns; | |
8e5799b1 | 514 | u64 id; |
ee06094f | 515 | #endif |
0793a61d TG |
516 | }; |
517 | ||
518 | /** | |
519 | * struct perf_counter_context - counter context structure | |
520 | * | |
521 | * Used as a container for task counters and CPU counters as well: | |
522 | */ | |
523 | struct perf_counter_context { | |
0793a61d | 524 | /* |
d859e29f PM |
525 | * Protect the states of the counters in the list, |
526 | * nr_active, and the list: | |
0793a61d TG |
527 | */ |
528 | spinlock_t lock; | |
d859e29f PM |
529 | /* |
530 | * Protect the list of counters. Locking either mutex or lock | |
531 | * is sufficient to ensure the list doesn't change; to change | |
532 | * the list you need to lock both the mutex and the spinlock. | |
533 | */ | |
534 | struct mutex mutex; | |
04289bb9 IM |
535 | |
536 | struct list_head counter_list; | |
592903cd | 537 | struct list_head event_list; |
0793a61d TG |
538 | int nr_counters; |
539 | int nr_active; | |
d859e29f | 540 | int is_active; |
a63eaf34 | 541 | atomic_t refcount; |
0793a61d | 542 | struct task_struct *task; |
53cfbf59 PM |
543 | |
544 | /* | |
4af4998b | 545 | * Context clock, runs when context enabled. |
53cfbf59 | 546 | */ |
4af4998b PZ |
547 | u64 time; |
548 | u64 timestamp; | |
564c2b21 PM |
549 | |
550 | /* | |
551 | * These fields let us detect when two contexts have both | |
552 | * been cloned (inherited) from a common ancestor. | |
553 | */ | |
554 | struct perf_counter_context *parent_ctx; | |
c93f7669 PM |
555 | u64 parent_gen; |
556 | u64 generation; | |
25346b93 | 557 | int pin_count; |
c93f7669 | 558 | struct rcu_head rcu_head; |
0793a61d TG |
559 | }; |
560 | ||
561 | /** | |
562 | * struct perf_counter_cpu_context - per cpu counter context structure | |
563 | */ | |
564 | struct perf_cpu_context { | |
565 | struct perf_counter_context ctx; | |
566 | struct perf_counter_context *task_ctx; | |
567 | int active_oncpu; | |
568 | int max_pertask; | |
3b6f9e5c | 569 | int exclusive; |
96f6d444 PZ |
570 | |
571 | /* | |
572 | * Recursion avoidance: | |
573 | * | |
574 | * task, softirq, irq, nmi context | |
575 | */ | |
22a4f650 | 576 | int recursion[4]; |
0793a61d TG |
577 | }; |
578 | ||
829b42dd RR |
579 | #ifdef CONFIG_PERF_COUNTERS |
580 | ||
0793a61d TG |
581 | /* |
582 | * Set by architecture code: | |
583 | */ | |
584 | extern int perf_max_counters; | |
585 | ||
4aeb0b42 | 586 | extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter); |
621a01ea | 587 | |
0793a61d | 588 | extern void perf_counter_task_sched_in(struct task_struct *task, int cpu); |
564c2b21 PM |
589 | extern void perf_counter_task_sched_out(struct task_struct *task, |
590 | struct task_struct *next, int cpu); | |
0793a61d | 591 | extern void perf_counter_task_tick(struct task_struct *task, int cpu); |
6ab423e0 | 592 | extern int perf_counter_init_task(struct task_struct *child); |
9b51f66d | 593 | extern void perf_counter_exit_task(struct task_struct *child); |
bbbee908 | 594 | extern void perf_counter_free_task(struct task_struct *task); |
925d519a | 595 | extern void perf_counter_do_pending(void); |
0793a61d | 596 | extern void perf_counter_print_debug(void); |
9e35ad38 PZ |
597 | extern void __perf_disable(void); |
598 | extern bool __perf_enable(void); | |
599 | extern void perf_disable(void); | |
600 | extern void perf_enable(void); | |
1d1c7ddb IM |
601 | extern int perf_counter_task_disable(void); |
602 | extern int perf_counter_task_enable(void); | |
3cbed429 PM |
603 | extern int hw_perf_group_sched_in(struct perf_counter *group_leader, |
604 | struct perf_cpu_context *cpuctx, | |
605 | struct perf_counter_context *ctx, int cpu); | |
37d81828 | 606 | extern void perf_counter_update_userpage(struct perf_counter *counter); |
5c92d124 | 607 | |
f6c7d5fe | 608 | extern int perf_counter_overflow(struct perf_counter *counter, |
78f13e95 | 609 | int nmi, struct pt_regs *regs, u64 addr); |
3b6f9e5c PM |
610 | /* |
611 | * Return 1 for a software counter, 0 for a hardware counter | |
612 | */ | |
613 | static inline int is_software_counter(struct perf_counter *counter) | |
614 | { | |
a21ca2ca IM |
615 | return (counter->attr.type != PERF_TYPE_RAW) && |
616 | (counter->attr.type != PERF_TYPE_HARDWARE); | |
3b6f9e5c PM |
617 | } |
618 | ||
78f13e95 | 619 | extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64); |
15dbf27c | 620 | |
089dd79d PZ |
621 | extern void __perf_counter_mmap(struct vm_area_struct *vma); |
622 | ||
623 | static inline void perf_counter_mmap(struct vm_area_struct *vma) | |
624 | { | |
625 | if (vma->vm_flags & VM_EXEC) | |
626 | __perf_counter_mmap(vma); | |
627 | } | |
0a4a9391 | 628 | |
8d1b2d93 | 629 | extern void perf_counter_comm(struct task_struct *tsk); |
60313ebe | 630 | extern void perf_counter_fork(struct task_struct *tsk); |
8d1b2d93 | 631 | |
3f731ca6 PM |
632 | extern void perf_counter_task_migration(struct task_struct *task, int cpu); |
633 | ||
9c03d88e | 634 | #define MAX_STACK_DEPTH 255 |
394ee076 PZ |
635 | |
636 | struct perf_callchain_entry { | |
9c03d88e | 637 | u16 nr, hv, kernel, user; |
394ee076 PZ |
638 | u64 ip[MAX_STACK_DEPTH]; |
639 | }; | |
640 | ||
641 | extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs); | |
642 | ||
1ccd1549 | 643 | extern int sysctl_perf_counter_priv; |
c5078f78 | 644 | extern int sysctl_perf_counter_mlock; |
a78ac325 | 645 | extern int sysctl_perf_counter_limit; |
1ccd1549 | 646 | |
0d905bca IM |
647 | extern void perf_counter_init(void); |
648 | ||
9d23a90a PM |
649 | #ifndef perf_misc_flags |
650 | #define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \ | |
651 | PERF_EVENT_MISC_KERNEL) | |
652 | #define perf_instruction_pointer(regs) instruction_pointer(regs) | |
653 | #endif | |
654 | ||
0793a61d TG |
655 | #else |
656 | static inline void | |
657 | perf_counter_task_sched_in(struct task_struct *task, int cpu) { } | |
658 | static inline void | |
910431c7 IM |
659 | perf_counter_task_sched_out(struct task_struct *task, |
660 | struct task_struct *next, int cpu) { } | |
0793a61d TG |
661 | static inline void |
662 | perf_counter_task_tick(struct task_struct *task, int cpu) { } | |
d3e78ee3 | 663 | static inline int perf_counter_init_task(struct task_struct *child) { return 0; } |
9b51f66d | 664 | static inline void perf_counter_exit_task(struct task_struct *child) { } |
bbbee908 | 665 | static inline void perf_counter_free_task(struct task_struct *task) { } |
925d519a | 666 | static inline void perf_counter_do_pending(void) { } |
0793a61d | 667 | static inline void perf_counter_print_debug(void) { } |
9e35ad38 PZ |
668 | static inline void perf_disable(void) { } |
669 | static inline void perf_enable(void) { } | |
1d1c7ddb IM |
670 | static inline int perf_counter_task_disable(void) { return -EINVAL; } |
671 | static inline int perf_counter_task_enable(void) { return -EINVAL; } | |
15dbf27c | 672 | |
925d519a | 673 | static inline void |
78f13e95 PZ |
674 | perf_swcounter_event(u32 event, u64 nr, int nmi, |
675 | struct pt_regs *regs, u64 addr) { } | |
0a4a9391 | 676 | |
089dd79d | 677 | static inline void perf_counter_mmap(struct vm_area_struct *vma) { } |
8d1b2d93 | 678 | static inline void perf_counter_comm(struct task_struct *tsk) { } |
60313ebe | 679 | static inline void perf_counter_fork(struct task_struct *tsk) { } |
0d905bca | 680 | static inline void perf_counter_init(void) { } |
3f731ca6 PM |
681 | static inline void perf_counter_task_migration(struct task_struct *task, |
682 | int cpu) { } | |
0793a61d TG |
683 | #endif |
684 | ||
f3dfd265 | 685 | #endif /* __KERNEL__ */ |
0793a61d | 686 | #endif /* _LINUX_PERF_COUNTER_H */ |