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1/*
2 * Performance counters:
3 *
4 * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
6 *
7 * Data type definitions, declarations, prototypes.
8 *
9 * Started by: Thomas Gleixner and Ingo Molnar
10 *
11 * For licencing details see kernel-base/COPYING
12 */
13#ifndef _LINUX_PERF_COUNTER_H
14#define _LINUX_PERF_COUNTER_H
15
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16#include <linux/types.h>
17#include <linux/ioctl.h>
9aaa131a 18#include <asm/byteorder.h>
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19
20/*
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21 * User-space ABI bits:
22 */
23
24/*
0d48696f 25 * attr.type
0793a61d 26 */
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27enum perf_event_types {
28 PERF_TYPE_HARDWARE = 0,
29 PERF_TYPE_SOFTWARE = 1,
30 PERF_TYPE_TRACEPOINT = 2,
31
0793a61d 32 /*
b8e83514 33 * available TYPE space, raw is the max value.
0793a61d 34 */
9f66a381 35
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36 PERF_TYPE_RAW = 128,
37};
6c594c21 38
b8e83514 39/*
0d48696f 40 * Generalized performance counter event types, used by the attr.event_id
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41 * parameter of the sys_perf_counter_open() syscall:
42 */
0d48696f 43enum attr_ids {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
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47 PERF_COUNT_CPU_CYCLES = 0,
48 PERF_COUNT_INSTRUCTIONS = 1,
49 PERF_COUNT_CACHE_REFERENCES = 2,
50 PERF_COUNT_CACHE_MISSES = 3,
51 PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_BRANCH_MISSES = 5,
53 PERF_COUNT_BUS_CYCLES = 6,
54
55 PERF_HW_EVENTS_MAX = 7,
56};
e077df4f 57
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58/*
59 * Special "software" counters provided by the kernel, even if the hardware
60 * does not support performance counters. These counters measure various
61 * physical and sw events of the kernel (and allow the profiling of them as
62 * well):
63 */
64enum sw_event_ids {
65 PERF_COUNT_CPU_CLOCK = 0,
66 PERF_COUNT_TASK_CLOCK = 1,
67 PERF_COUNT_PAGE_FAULTS = 2,
68 PERF_COUNT_CONTEXT_SWITCHES = 3,
69 PERF_COUNT_CPU_MIGRATIONS = 4,
70 PERF_COUNT_PAGE_FAULTS_MIN = 5,
71 PERF_COUNT_PAGE_FAULTS_MAJ = 6,
72
73 PERF_SW_EVENTS_MAX = 7,
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74};
75
0127c3ea 76#define __PERF_COUNTER_MASK(name) \
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77 (((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
78 PERF_COUNTER_##name##_SHIFT)
79
80#define PERF_COUNTER_RAW_BITS 1
81#define PERF_COUNTER_RAW_SHIFT 63
82#define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
83
84#define PERF_COUNTER_CONFIG_BITS 63
85#define PERF_COUNTER_CONFIG_SHIFT 0
86#define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
87
88#define PERF_COUNTER_TYPE_BITS 7
89#define PERF_COUNTER_TYPE_SHIFT 56
90#define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
91
92#define PERF_COUNTER_EVENT_BITS 56
93#define PERF_COUNTER_EVENT_SHIFT 0
94#define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
95
8a057d84 96/*
0d48696f 97 * Bits that can be set in attr.sample_type to request information
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98 * in the overflow packets.
99 */
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100enum perf_counter_sample_format {
101 PERF_SAMPLE_IP = 1U << 0,
102 PERF_SAMPLE_TID = 1U << 1,
103 PERF_SAMPLE_TIME = 1U << 2,
104 PERF_SAMPLE_ADDR = 1U << 3,
105 PERF_SAMPLE_GROUP = 1U << 4,
106 PERF_SAMPLE_CALLCHAIN = 1U << 5,
107 PERF_SAMPLE_CONFIG = 1U << 6,
108 PERF_SAMPLE_CPU = 1U << 7,
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109};
110
53cfbf59 111/*
0d48696f 112 * Bits that can be set in attr.read_format to request that
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113 * reads on the counter should return the indicated quantities,
114 * in increasing order of bit value, after the counter value.
115 */
116enum perf_counter_read_format {
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117 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
118 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
119 PERF_FORMAT_ID = 1U << 2,
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120};
121
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122/*
123 * Hardware event to monitor via a performance monitoring counter:
124 */
0d48696f 125struct perf_counter_attr {
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126 /*
127 * The MSB of the config word signifies if the rest contains cpu
128 * specific (raw) counter configuration data, if unset, the next
129 * 7 bits are an event type and the rest of the bits are the event
130 * identifier.
131 */
132 __u64 config;
9f66a381 133
60db5e09 134 union {
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135 __u64 sample_period;
136 __u64 sample_freq;
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137 };
138
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139 __u64 sample_type;
140 __u64 read_format;
9f66a381 141
2743a5b0 142 __u64 disabled : 1, /* off by default */
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143 inherit : 1, /* children inherit it */
144 pinned : 1, /* must always be on PMU */
145 exclusive : 1, /* only group on PMU */
146 exclude_user : 1, /* don't count user */
147 exclude_kernel : 1, /* ditto kernel */
148 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 149 exclude_idle : 1, /* don't count when idle */
0a4a9391 150 mmap : 1, /* include mmap data */
8d1b2d93 151 comm : 1, /* include comm data */
60db5e09 152 freq : 1, /* use freq, not period */
0475f9ea 153
d99e9446 154 __reserved_1 : 53;
2743a5b0 155
c457810a 156 __u32 wakeup_events; /* wakeup every n events */
e527ea31 157 __u32 __reserved_2;
9f66a381 158
2743a5b0 159 __u64 __reserved_3;
e527ea31 160 __u64 __reserved_4;
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161};
162
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163/*
164 * Ioctls that can be done on a perf counter fd:
165 */
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166#define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
167#define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
168#define PERF_COUNTER_IOC_REFRESH _IO ('$', 2)
169#define PERF_COUNTER_IOC_RESET _IO ('$', 3)
170#define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64)
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171
172enum perf_counter_ioc_flags {
173 PERF_IOC_FLAG_GROUP = 1U << 0,
174};
d859e29f 175
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176/*
177 * Structure of the page that can be mapped via mmap
178 */
179struct perf_counter_mmap_page {
180 __u32 version; /* version number of this structure */
181 __u32 compat_version; /* lowest version this is compat with */
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182
183 /*
184 * Bits needed to read the hw counters in user-space.
185 *
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186 * u32 seq;
187 * s64 count;
38ff667b 188 *
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189 * do {
190 * seq = pc->lock;
38ff667b 191 *
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192 * barrier()
193 * if (pc->index) {
194 * count = pmc_read(pc->index - 1);
195 * count += pc->offset;
196 * } else
197 * goto regular_read;
38ff667b 198 *
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199 * barrier();
200 * } while (pc->lock != seq);
38ff667b 201 *
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202 * NOTE: for obvious reason this only works on self-monitoring
203 * processes.
38ff667b 204 */
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205 __u32 lock; /* seqlock for synchronization */
206 __u32 index; /* hardware counter identifier */
207 __s64 offset; /* add to hardware counter value */
7b732a75 208
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209 /*
210 * Control data for the mmap() data buffer.
211 *
212 * User-space reading this value should issue an rmb(), on SMP capable
213 * platforms, after reading this value -- see perf_counter_wakeup().
214 */
8e3747c1 215 __u64 data_head; /* head in the data section */
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216};
217
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218#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
219#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
6b6e5486 220#define PERF_EVENT_MISC_KERNEL (1 << 0)
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221#define PERF_EVENT_MISC_USER (2 << 0)
222#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
6b6e5486 223#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
6fab0192 224
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225struct perf_event_header {
226 __u32 type;
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227 __u16 misc;
228 __u16 size;
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229};
230
231enum perf_event_type {
5ed00415 232
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233 /*
234 * The MMAP events record the PROT_EXEC mappings so that we can
235 * correlate userspace IPs to code. They have the following structure:
236 *
237 * struct {
0127c3ea 238 * struct perf_event_header header;
0c593b34 239 *
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240 * u32 pid, tid;
241 * u64 addr;
242 * u64 len;
243 * u64 pgoff;
244 * char filename[];
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245 * };
246 */
8a057d84 247 PERF_EVENT_MMAP = 1,
0a4a9391 248
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249 /*
250 * struct {
0127c3ea 251 * struct perf_event_header header;
8d1b2d93 252 *
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253 * u32 pid, tid;
254 * char comm[];
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255 * };
256 */
257 PERF_EVENT_COMM = 3,
258
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259 /*
260 * struct {
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261 * struct perf_event_header header;
262 * u64 time;
b23f3325 263 * u64 sample_period;
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264 * };
265 */
266 PERF_EVENT_PERIOD = 4,
267
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268 /*
269 * struct {
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270 * struct perf_event_header header;
271 * u64 time;
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272 * };
273 */
274 PERF_EVENT_THROTTLE = 5,
275 PERF_EVENT_UNTHROTTLE = 6,
276
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277 /*
278 * struct {
279 * struct perf_event_header header;
280 * u32 pid, ppid;
281 * };
282 */
283 PERF_EVENT_FORK = 7,
284
8a057d84 285 /*
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286 * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
287 * will be PERF_RECORD_*
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288 *
289 * struct {
0127c3ea 290 * struct perf_event_header header;
0c593b34 291 *
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292 * { u64 ip; } && PERF_RECORD_IP
293 * { u32 pid, tid; } && PERF_RECORD_TID
294 * { u64 time; } && PERF_RECORD_TIME
295 * { u64 addr; } && PERF_RECORD_ADDR
296 * { u64 config; } && PERF_RECORD_CONFIG
297 * { u32 cpu, res; } && PERF_RECORD_CPU
0c593b34 298 *
0127c3ea 299 * { u64 nr;
8e5799b1 300 * { u64 id, val; } cnt[nr]; } && PERF_RECORD_GROUP
0c593b34 301 *
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302 * { u16 nr,
303 * hv,
304 * kernel,
305 * user;
306 * u64 ips[nr]; } && PERF_RECORD_CALLCHAIN
0c593b34 307 * };
8a057d84 308 */
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309};
310
f3dfd265 311#ifdef __KERNEL__
9f66a381 312/*
f3dfd265 313 * Kernel-internal data types and definitions:
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314 */
315
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316#ifdef CONFIG_PERF_COUNTERS
317# include <asm/perf_counter.h>
318#endif
319
320#include <linux/list.h>
321#include <linux/mutex.h>
322#include <linux/rculist.h>
323#include <linux/rcupdate.h>
324#include <linux/spinlock.h>
d6d020e9 325#include <linux/hrtimer.h>
3c446b3d 326#include <linux/fs.h>
709e50cf 327#include <linux/pid_namespace.h>
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328#include <asm/atomic.h>
329
330struct task_struct;
331
0d48696f 332static inline u64 perf_event_raw(struct perf_counter_attr *attr)
f4a2deb4 333{
0d48696f 334 return attr->config & PERF_COUNTER_RAW_MASK;
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335}
336
0d48696f 337static inline u64 perf_event_config(struct perf_counter_attr *attr)
f4a2deb4 338{
0d48696f 339 return attr->config & PERF_COUNTER_CONFIG_MASK;
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340}
341
0d48696f 342static inline u64 perf_event_type(struct perf_counter_attr *attr)
f4a2deb4 343{
0d48696f 344 return (attr->config & PERF_COUNTER_TYPE_MASK) >>
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345 PERF_COUNTER_TYPE_SHIFT;
346}
347
0d48696f 348static inline u64 perf_event_id(struct perf_counter_attr *attr)
f4a2deb4 349{
0d48696f 350 return attr->config & PERF_COUNTER_EVENT_MASK;
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351}
352
0793a61d 353/**
9f66a381 354 * struct hw_perf_counter - performance counter hardware details:
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355 */
356struct hw_perf_counter {
ee06094f 357#ifdef CONFIG_PERF_COUNTERS
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358 union {
359 struct { /* hardware */
360 u64 config;
361 unsigned long config_base;
362 unsigned long counter_base;
6f00cada 363 int idx;
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364 };
365 union { /* software */
366 atomic64_t count;
367 struct hrtimer hrtimer;
368 };
369 };
ee06094f 370 atomic64_t prev_count;
b23f3325 371 u64 sample_period;
ee06094f 372 atomic64_t period_left;
60db5e09 373 u64 interrupts;
ee06094f 374#endif
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375};
376
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377struct perf_counter;
378
379/**
4aeb0b42 380 * struct pmu - generic performance monitoring unit
621a01ea 381 */
4aeb0b42 382struct pmu {
95cdd2e7 383 int (*enable) (struct perf_counter *counter);
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384 void (*disable) (struct perf_counter *counter);
385 void (*read) (struct perf_counter *counter);
a78ac325 386 void (*unthrottle) (struct perf_counter *counter);
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387};
388
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389/**
390 * enum perf_counter_active_state - the states of a counter
391 */
392enum perf_counter_active_state {
3b6f9e5c 393 PERF_COUNTER_STATE_ERROR = -2,
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394 PERF_COUNTER_STATE_OFF = -1,
395 PERF_COUNTER_STATE_INACTIVE = 0,
396 PERF_COUNTER_STATE_ACTIVE = 1,
397};
398
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399struct file;
400
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401struct perf_mmap_data {
402 struct rcu_head rcu_head;
8740f941 403 int nr_pages; /* nr of data pages */
c5078f78 404 int nr_locked; /* nr pages mlocked */
8740f941 405
c33a0bc4 406 atomic_t poll; /* POLL_ for wakeups */
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407 atomic_t events; /* event limit */
408
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409 atomic_long_t head; /* write position */
410 atomic_long_t done_head; /* completed head */
411
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412 atomic_t lock; /* concurrent writes */
413
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414 atomic_t wakeup; /* needs a wakeup */
415
7b732a75 416 struct perf_counter_mmap_page *user_page;
0127c3ea 417 void *data_pages[0];
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418};
419
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420struct perf_pending_entry {
421 struct perf_pending_entry *next;
422 void (*func)(struct perf_pending_entry *);
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423};
424
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425/**
426 * struct perf_counter - performance counter kernel representation:
427 */
428struct perf_counter {
ee06094f 429#ifdef CONFIG_PERF_COUNTERS
04289bb9 430 struct list_head list_entry;
592903cd 431 struct list_head event_entry;
04289bb9 432 struct list_head sibling_list;
0127c3ea 433 int nr_siblings;
04289bb9 434 struct perf_counter *group_leader;
4aeb0b42 435 const struct pmu *pmu;
04289bb9 436
6a930700 437 enum perf_counter_active_state state;
0793a61d 438 atomic64_t count;
ee06094f 439
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440 /*
441 * These are the total time in nanoseconds that the counter
442 * has been enabled (i.e. eligible to run, and the task has
443 * been scheduled in, if this is a per-task counter)
444 * and running (scheduled onto the CPU), respectively.
445 *
446 * They are computed from tstamp_enabled, tstamp_running and
447 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
448 */
449 u64 total_time_enabled;
450 u64 total_time_running;
451
452 /*
453 * These are timestamps used for computing total_time_enabled
454 * and total_time_running when the counter is in INACTIVE or
455 * ACTIVE state, measured in nanoseconds from an arbitrary point
456 * in time.
457 * tstamp_enabled: the notional time when the counter was enabled
458 * tstamp_running: the notional time when the counter was scheduled on
459 * tstamp_stopped: in INACTIVE state, the notional time when the
460 * counter was scheduled off.
461 */
462 u64 tstamp_enabled;
463 u64 tstamp_running;
464 u64 tstamp_stopped;
465
0d48696f 466 struct perf_counter_attr attr;
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467 struct hw_perf_counter hw;
468
469 struct perf_counter_context *ctx;
9b51f66d 470 struct file *filp;
0793a61d 471
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472 /*
473 * These accumulate total time (in nanoseconds) that children
474 * counters have been enabled and running, respectively.
475 */
476 atomic64_t child_total_time_enabled;
477 atomic64_t child_total_time_running;
478
0793a61d 479 /*
d859e29f 480 * Protect attach/detach and child_list:
0793a61d 481 */
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482 struct mutex child_mutex;
483 struct list_head child_list;
484 struct perf_counter *parent;
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485
486 int oncpu;
487 int cpu;
488
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489 struct list_head owner_entry;
490 struct task_struct *owner;
491
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492 /* mmap bits */
493 struct mutex mmap_mutex;
494 atomic_t mmap_count;
495 struct perf_mmap_data *data;
37d81828 496
7b732a75 497 /* poll related */
0793a61d 498 wait_queue_head_t waitq;
3c446b3d 499 struct fasync_struct *fasync;
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500
501 /* delayed work for NMIs and such */
502 int pending_wakeup;
4c9e2542 503 int pending_kill;
79f14641 504 int pending_disable;
671dec5d 505 struct perf_pending_entry pending;
592903cd 506
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507 atomic_t event_limit;
508
e077df4f 509 void (*destroy)(struct perf_counter *);
592903cd 510 struct rcu_head rcu_head;
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511
512 struct pid_namespace *ns;
8e5799b1 513 u64 id;
ee06094f 514#endif
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515};
516
517/**
518 * struct perf_counter_context - counter context structure
519 *
520 * Used as a container for task counters and CPU counters as well:
521 */
522struct perf_counter_context {
0793a61d 523 /*
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524 * Protect the states of the counters in the list,
525 * nr_active, and the list:
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526 */
527 spinlock_t lock;
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528 /*
529 * Protect the list of counters. Locking either mutex or lock
530 * is sufficient to ensure the list doesn't change; to change
531 * the list you need to lock both the mutex and the spinlock.
532 */
533 struct mutex mutex;
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534
535 struct list_head counter_list;
592903cd 536 struct list_head event_list;
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537 int nr_counters;
538 int nr_active;
d859e29f 539 int is_active;
a63eaf34 540 atomic_t refcount;
0793a61d 541 struct task_struct *task;
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542
543 /*
4af4998b 544 * Context clock, runs when context enabled.
53cfbf59 545 */
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546 u64 time;
547 u64 timestamp;
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548
549 /*
550 * These fields let us detect when two contexts have both
551 * been cloned (inherited) from a common ancestor.
552 */
553 struct perf_counter_context *parent_ctx;
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554 u64 parent_gen;
555 u64 generation;
25346b93 556 int pin_count;
c93f7669 557 struct rcu_head rcu_head;
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558};
559
560/**
561 * struct perf_counter_cpu_context - per cpu counter context structure
562 */
563struct perf_cpu_context {
564 struct perf_counter_context ctx;
565 struct perf_counter_context *task_ctx;
566 int active_oncpu;
567 int max_pertask;
3b6f9e5c 568 int exclusive;
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569
570 /*
571 * Recursion avoidance:
572 *
573 * task, softirq, irq, nmi context
574 */
22a4f650 575 int recursion[4];
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576};
577
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578#ifdef CONFIG_PERF_COUNTERS
579
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580/*
581 * Set by architecture code:
582 */
583extern int perf_max_counters;
584
4aeb0b42 585extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
621a01ea 586
0793a61d 587extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
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588extern void perf_counter_task_sched_out(struct task_struct *task,
589 struct task_struct *next, int cpu);
0793a61d 590extern void perf_counter_task_tick(struct task_struct *task, int cpu);
6ab423e0 591extern int perf_counter_init_task(struct task_struct *child);
9b51f66d 592extern void perf_counter_exit_task(struct task_struct *child);
bbbee908 593extern void perf_counter_free_task(struct task_struct *task);
925d519a 594extern void perf_counter_do_pending(void);
0793a61d 595extern void perf_counter_print_debug(void);
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596extern void __perf_disable(void);
597extern bool __perf_enable(void);
598extern void perf_disable(void);
599extern void perf_enable(void);
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600extern int perf_counter_task_disable(void);
601extern int perf_counter_task_enable(void);
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602extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
603 struct perf_cpu_context *cpuctx,
604 struct perf_counter_context *ctx, int cpu);
37d81828 605extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124 606
f6c7d5fe 607extern int perf_counter_overflow(struct perf_counter *counter,
78f13e95 608 int nmi, struct pt_regs *regs, u64 addr);
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609/*
610 * Return 1 for a software counter, 0 for a hardware counter
611 */
612static inline int is_software_counter(struct perf_counter *counter)
613{
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614 return !perf_event_raw(&counter->attr) &&
615 perf_event_type(&counter->attr) != PERF_TYPE_HARDWARE;
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616}
617
78f13e95 618extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
15dbf27c 619
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620extern void perf_counter_mmap(unsigned long addr, unsigned long len,
621 unsigned long pgoff, struct file *file);
622
8d1b2d93 623extern void perf_counter_comm(struct task_struct *tsk);
60313ebe 624extern void perf_counter_fork(struct task_struct *tsk);
8d1b2d93 625
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626extern void perf_counter_task_migration(struct task_struct *task, int cpu);
627
9c03d88e 628#define MAX_STACK_DEPTH 255
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629
630struct perf_callchain_entry {
9c03d88e 631 u16 nr, hv, kernel, user;
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632 u64 ip[MAX_STACK_DEPTH];
633};
634
635extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
636
1ccd1549 637extern int sysctl_perf_counter_priv;
c5078f78 638extern int sysctl_perf_counter_mlock;
a78ac325 639extern int sysctl_perf_counter_limit;
1ccd1549 640
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641extern void perf_counter_init(void);
642
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643#ifndef perf_misc_flags
644#define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
645 PERF_EVENT_MISC_KERNEL)
646#define perf_instruction_pointer(regs) instruction_pointer(regs)
647#endif
648
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649#else
650static inline void
651perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
652static inline void
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653perf_counter_task_sched_out(struct task_struct *task,
654 struct task_struct *next, int cpu) { }
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655static inline void
656perf_counter_task_tick(struct task_struct *task, int cpu) { }
d3e78ee3 657static inline int perf_counter_init_task(struct task_struct *child) { return 0; }
9b51f66d 658static inline void perf_counter_exit_task(struct task_struct *child) { }
bbbee908 659static inline void perf_counter_free_task(struct task_struct *task) { }
925d519a 660static inline void perf_counter_do_pending(void) { }
0793a61d 661static inline void perf_counter_print_debug(void) { }
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662static inline void perf_disable(void) { }
663static inline void perf_enable(void) { }
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664static inline int perf_counter_task_disable(void) { return -EINVAL; }
665static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c 666
925d519a 667static inline void
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668perf_swcounter_event(u32 event, u64 nr, int nmi,
669 struct pt_regs *regs, u64 addr) { }
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670
671static inline void
672perf_counter_mmap(unsigned long addr, unsigned long len,
673 unsigned long pgoff, struct file *file) { }
674
8d1b2d93 675static inline void perf_counter_comm(struct task_struct *tsk) { }
60313ebe 676static inline void perf_counter_fork(struct task_struct *tsk) { }
0d905bca 677static inline void perf_counter_init(void) { }
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678static inline void perf_counter_task_migration(struct task_struct *task,
679 int cpu) { }
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680#endif
681
f3dfd265 682#endif /* __KERNEL__ */
0793a61d 683#endif /* _LINUX_PERF_COUNTER_H */