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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
607ca46e | 17 | #include <uapi/linux/perf_event.h> |
c895f6f7 | 18 | #include <uapi/linux/bpf_perf_event.h> |
0793a61d | 19 | |
9f66a381 | 20 | /* |
f3dfd265 | 21 | * Kernel-internal data types and definitions: |
9f66a381 IM |
22 | */ |
23 | ||
cdd6c482 IM |
24 | #ifdef CONFIG_PERF_EVENTS |
25 | # include <asm/perf_event.h> | |
7be79236 | 26 | # include <asm/local64.h> |
f3dfd265 PM |
27 | #endif |
28 | ||
39447b38 | 29 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
30 | int (*is_in_guest)(void); |
31 | int (*is_user_mode)(void); | |
32 | unsigned long (*get_guest_ip)(void); | |
8479e04e | 33 | void (*handle_intel_pt_intr)(void); |
39447b38 ZY |
34 | }; |
35 | ||
2ff6cfd7 AB |
36 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
37 | #include <asm/hw_breakpoint.h> | |
38 | #endif | |
39 | ||
f3dfd265 PM |
40 | #include <linux/list.h> |
41 | #include <linux/mutex.h> | |
42 | #include <linux/rculist.h> | |
43 | #include <linux/rcupdate.h> | |
44 | #include <linux/spinlock.h> | |
d6d020e9 | 45 | #include <linux/hrtimer.h> |
3c446b3d | 46 | #include <linux/fs.h> |
709e50cf | 47 | #include <linux/pid_namespace.h> |
906010b2 | 48 | #include <linux/workqueue.h> |
5331d7b8 | 49 | #include <linux/ftrace.h> |
85cfabbc | 50 | #include <linux/cpu.h> |
e360adbe | 51 | #include <linux/irq_work.h> |
c5905afb | 52 | #include <linux/static_key.h> |
851cf6e7 | 53 | #include <linux/jump_label_ratelimit.h> |
60063497 | 54 | #include <linux/atomic.h> |
641cc938 | 55 | #include <linux/sysfs.h> |
4018994f | 56 | #include <linux/perf_regs.h> |
39bed6cb | 57 | #include <linux/cgroup.h> |
8c94abbb | 58 | #include <linux/refcount.h> |
da97e184 | 59 | #include <linux/security.h> |
fa588151 | 60 | #include <asm/local.h> |
f3dfd265 | 61 | |
f9188e02 PZ |
62 | struct perf_callchain_entry { |
63 | __u64 nr; | |
c50c75e9 | 64 | __u64 ip[]; /* /proc/sys/kernel/perf_event_max_stack */ |
f9188e02 PZ |
65 | }; |
66 | ||
cfbcf468 ACM |
67 | struct perf_callchain_entry_ctx { |
68 | struct perf_callchain_entry *entry; | |
69 | u32 max_stack; | |
3b1fff08 | 70 | u32 nr; |
c85b0334 ACM |
71 | short contexts; |
72 | bool contexts_maxed; | |
cfbcf468 ACM |
73 | }; |
74 | ||
7e3f977e | 75 | typedef unsigned long (*perf_copy_f)(void *dst, const void *src, |
aa7145c1 | 76 | unsigned long off, unsigned long len); |
7e3f977e DB |
77 | |
78 | struct perf_raw_frag { | |
79 | union { | |
80 | struct perf_raw_frag *next; | |
81 | unsigned long pad; | |
82 | }; | |
83 | perf_copy_f copy; | |
84 | void *data; | |
85 | u32 size; | |
86 | } __packed; | |
87 | ||
3a43ce68 | 88 | struct perf_raw_record { |
7e3f977e | 89 | struct perf_raw_frag frag; |
3a43ce68 | 90 | u32 size; |
f413cdb8 FW |
91 | }; |
92 | ||
bce38cd5 SE |
93 | /* |
94 | * branch stack layout: | |
95 | * nr: number of taken branches stored in entries[] | |
bbfd5e4f KL |
96 | * hw_idx: The low level index of raw branch records |
97 | * for the most recent branch. | |
98 | * -1ULL means invalid/unknown. | |
bce38cd5 SE |
99 | * |
100 | * Note that nr can vary from sample to sample | |
101 | * branches (to, from) are stored from most recent | |
102 | * to least recent, i.e., entries[0] contains the most | |
103 | * recent branch. | |
bbfd5e4f KL |
104 | * The entries[] is an abstraction of raw branch records, |
105 | * which may not be stored in age order in HW, e.g. Intel LBR. | |
106 | * The hw_idx is to expose the low level index of raw | |
107 | * branch record for the most recent branch aka entries[0]. | |
108 | * The hw_idx index is between -1 (unknown) and max depth, | |
109 | * which can be retrieved in /sys/devices/cpu/caps/branches. | |
110 | * For the architectures whose raw branch records are | |
111 | * already stored in age order, the hw_idx should be 0. | |
bce38cd5 | 112 | */ |
caff2bef PZ |
113 | struct perf_branch_stack { |
114 | __u64 nr; | |
bbfd5e4f | 115 | __u64 hw_idx; |
c50c75e9 | 116 | struct perf_branch_entry entries[]; |
caff2bef PZ |
117 | }; |
118 | ||
f3dfd265 PM |
119 | struct task_struct; |
120 | ||
efc9f05d SE |
121 | /* |
122 | * extra PMU register associated with an event | |
123 | */ | |
124 | struct hw_perf_event_extra { | |
125 | u64 config; /* register value */ | |
126 | unsigned int reg; /* register address or index */ | |
127 | int alloc; /* extra register already allocated */ | |
128 | int idx; /* index in shared_regs->regs[] */ | |
129 | }; | |
130 | ||
0793a61d | 131 | /** |
cdd6c482 | 132 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 133 | */ |
cdd6c482 IM |
134 | struct hw_perf_event { |
135 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
136 | union { |
137 | struct { /* hardware */ | |
a308444c | 138 | u64 config; |
447a194b | 139 | u64 last_tag; |
a308444c | 140 | unsigned long config_base; |
cdd6c482 | 141 | unsigned long event_base; |
c48b6053 | 142 | int event_base_rdpmc; |
a308444c | 143 | int idx; |
447a194b | 144 | int last_cpu; |
9fac2cf3 | 145 | int flags; |
bce38cd5 | 146 | |
efc9f05d | 147 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 148 | struct hw_perf_event_extra branch_reg; |
d6d020e9 | 149 | }; |
721a669b | 150 | struct { /* software */ |
a308444c | 151 | struct hrtimer hrtimer; |
d6d020e9 | 152 | }; |
f22c1bb6 | 153 | struct { /* tracepoint */ |
f22c1bb6 ON |
154 | /* for tp_event->class */ |
155 | struct list_head tp_list; | |
156 | }; | |
c7ab62bf HR |
157 | struct { /* amd_power */ |
158 | u64 pwr_acc; | |
159 | u64 ptsc; | |
160 | }; | |
24f1e32c | 161 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 | 162 | struct { /* breakpoint */ |
d580ff86 PZ |
163 | /* |
164 | * Crufty hack to avoid the chicken and egg | |
165 | * problem hw_breakpoint has with context | |
166 | * creation and event initalization. | |
167 | */ | |
f22c1bb6 ON |
168 | struct arch_hw_breakpoint info; |
169 | struct list_head bp_list; | |
45a73372 | 170 | }; |
24f1e32c | 171 | #endif |
cf25f904 SS |
172 | struct { /* amd_iommu */ |
173 | u8 iommu_bank; | |
174 | u8 iommu_cntr; | |
175 | u16 padding; | |
176 | u64 conf; | |
177 | u64 conf1; | |
178 | }; | |
d6d020e9 | 179 | }; |
b0e87875 PZ |
180 | /* |
181 | * If the event is a per task event, this will point to the task in | |
182 | * question. See the comment in perf_event_alloc(). | |
183 | */ | |
50f16a8b | 184 | struct task_struct *target; |
b0e87875 | 185 | |
375637bc AS |
186 | /* |
187 | * PMU would store hardware filter configuration | |
188 | * here. | |
189 | */ | |
190 | void *addr_filters; | |
191 | ||
192 | /* Last sync'ed generation of filters */ | |
193 | unsigned long addr_filters_gen; | |
194 | ||
b0e87875 PZ |
195 | /* |
196 | * hw_perf_event::state flags; used to track the PERF_EF_* state. | |
197 | */ | |
198 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
199 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
200 | #define PERF_HES_ARCH 0x04 | |
201 | ||
a4eaf7f1 | 202 | int state; |
b0e87875 PZ |
203 | |
204 | /* | |
205 | * The last observed hardware counter value, updated with a | |
206 | * local64_cmpxchg() such that pmu::read() can be called nested. | |
207 | */ | |
e7850595 | 208 | local64_t prev_count; |
b0e87875 PZ |
209 | |
210 | /* | |
211 | * The period to start the next sample with. | |
212 | */ | |
b23f3325 | 213 | u64 sample_period; |
b0e87875 | 214 | |
2cb5383b KL |
215 | union { |
216 | struct { /* Sampling */ | |
217 | /* | |
218 | * The period we started this sample with. | |
219 | */ | |
220 | u64 last_period; | |
b0e87875 | 221 | |
2cb5383b KL |
222 | /* |
223 | * However much is left of the current period; | |
224 | * note that this is a full 64bit value and | |
225 | * allows for generation of periods longer | |
226 | * than hardware might allow. | |
227 | */ | |
228 | local64_t period_left; | |
229 | }; | |
230 | struct { /* Topdown events counting for context switch */ | |
231 | u64 saved_metric; | |
232 | u64 saved_slots; | |
233 | }; | |
234 | }; | |
b0e87875 PZ |
235 | |
236 | /* | |
237 | * State for throttling the event, see __perf_event_overflow() and | |
238 | * perf_adjust_freq_unthr_context(). | |
239 | */ | |
e050e3f0 | 240 | u64 interrupts_seq; |
60db5e09 | 241 | u64 interrupts; |
6a24ed6c | 242 | |
b0e87875 PZ |
243 | /* |
244 | * State for freq target events, see __perf_event_overflow() and | |
245 | * perf_adjust_freq_unthr_context(). | |
246 | */ | |
abd50713 PZ |
247 | u64 freq_time_stamp; |
248 | u64 freq_count_stamp; | |
ee06094f | 249 | #endif |
0793a61d TG |
250 | }; |
251 | ||
cdd6c482 | 252 | struct perf_event; |
621a01ea | 253 | |
8d2cacbb PZ |
254 | /* |
255 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
256 | */ | |
fbbe0701 | 257 | #define PERF_PMU_TXN_ADD 0x1 /* txn to add/schedule event on PMU */ |
4a00c16e | 258 | #define PERF_PMU_TXN_READ 0x2 /* txn to read event group from PMU */ |
fbbe0701 | 259 | |
53b25335 VW |
260 | /** |
261 | * pmu::capabilities flags | |
262 | */ | |
263 | #define PERF_PMU_CAP_NO_INTERRUPT 0x01 | |
34f43927 | 264 | #define PERF_PMU_CAP_NO_NMI 0x02 |
0a4e38e6 | 265 | #define PERF_PMU_CAP_AUX_NO_SG 0x04 |
e321d02d | 266 | #define PERF_PMU_CAP_EXTENDED_REGS 0x08 |
bed5b25a | 267 | #define PERF_PMU_CAP_EXCLUSIVE 0x10 |
ec0d7729 | 268 | #define PERF_PMU_CAP_ITRACE 0x20 |
5101ef20 | 269 | #define PERF_PMU_CAP_HETEROGENEOUS_CPUS 0x40 |
cc6795ae | 270 | #define PERF_PMU_CAP_NO_EXCLUDE 0x80 |
ab43762e | 271 | #define PERF_PMU_CAP_AUX_OUTPUT 0x100 |
53b25335 | 272 | |
a4faf00d AS |
273 | struct perf_output_handle; |
274 | ||
621a01ea | 275 | /** |
4aeb0b42 | 276 | * struct pmu - generic performance monitoring unit |
621a01ea | 277 | */ |
4aeb0b42 | 278 | struct pmu { |
b0a873eb PZ |
279 | struct list_head entry; |
280 | ||
c464c76e | 281 | struct module *module; |
abe43400 | 282 | struct device *dev; |
0c9d42ed | 283 | const struct attribute_group **attr_groups; |
f3a3a825 | 284 | const struct attribute_group **attr_update; |
03d8e80b | 285 | const char *name; |
2e80a82a PZ |
286 | int type; |
287 | ||
53b25335 VW |
288 | /* |
289 | * various common per-pmu feature flags | |
290 | */ | |
291 | int capabilities; | |
292 | ||
43b9e4fe MO |
293 | int __percpu *pmu_disable_count; |
294 | struct perf_cpu_context __percpu *pmu_cpu_context; | |
bed5b25a | 295 | atomic_t exclusive_cnt; /* < 0: cpu; > 0: tsk */ |
8dc85d54 | 296 | int task_ctx_nr; |
62b85639 | 297 | int hrtimer_interval_ms; |
6bde9b6c | 298 | |
375637bc AS |
299 | /* number of address filters this PMU can do */ |
300 | unsigned int nr_addr_filters; | |
301 | ||
6bde9b6c | 302 | /* |
a4eaf7f1 PZ |
303 | * Fully disable/enable this PMU, can be used to protect from the PMI |
304 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 305 | */ |
ad5133b7 PZ |
306 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
307 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 308 | |
8d2cacbb | 309 | /* |
a4eaf7f1 | 310 | * Try and initialize the event for this PMU. |
b0e87875 PZ |
311 | * |
312 | * Returns: | |
313 | * -ENOENT -- @event is not for this PMU | |
314 | * | |
315 | * -ENODEV -- @event is for this PMU but PMU not present | |
316 | * -EBUSY -- @event is for this PMU but PMU temporarily unavailable | |
317 | * -EINVAL -- @event is for this PMU but @event is not valid | |
318 | * -EOPNOTSUPP -- @event is for this PMU, @event is valid, but not supported | |
652521d4 | 319 | * -EACCES -- @event is for this PMU, @event is valid, but no privileges |
b0e87875 PZ |
320 | * |
321 | * 0 -- @event is for this PMU and valid | |
322 | * | |
323 | * Other error return values are allowed. | |
8d2cacbb | 324 | */ |
b0a873eb PZ |
325 | int (*event_init) (struct perf_event *event); |
326 | ||
1e0fb9ec AL |
327 | /* |
328 | * Notification that the event was mapped or unmapped. Called | |
329 | * in the context of the mapping task. | |
330 | */ | |
bfe33492 PZ |
331 | void (*event_mapped) (struct perf_event *event, struct mm_struct *mm); /* optional */ |
332 | void (*event_unmapped) (struct perf_event *event, struct mm_struct *mm); /* optional */ | |
1e0fb9ec | 333 | |
b0e87875 PZ |
334 | /* |
335 | * Flags for ->add()/->del()/ ->start()/->stop(). There are | |
336 | * matching hw_perf_event::state flags. | |
337 | */ | |
a4eaf7f1 PZ |
338 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
339 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
340 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
341 | ||
8d2cacbb | 342 | /* |
b0e87875 PZ |
343 | * Adds/Removes a counter to/from the PMU, can be done inside a |
344 | * transaction, see the ->*_txn() methods. | |
345 | * | |
346 | * The add/del callbacks will reserve all hardware resources required | |
347 | * to service the event, this includes any counter constraint | |
348 | * scheduling etc. | |
349 | * | |
350 | * Called with IRQs disabled and the PMU disabled on the CPU the event | |
351 | * is on. | |
352 | * | |
353 | * ->add() called without PERF_EF_START should result in the same state | |
354 | * as ->add() followed by ->stop(). | |
355 | * | |
356 | * ->del() must always PERF_EF_UPDATE stop an event. If it calls | |
357 | * ->stop() that must deal with already being stopped without | |
358 | * PERF_EF_UPDATE. | |
a4eaf7f1 PZ |
359 | */ |
360 | int (*add) (struct perf_event *event, int flags); | |
361 | void (*del) (struct perf_event *event, int flags); | |
362 | ||
363 | /* | |
b0e87875 PZ |
364 | * Starts/Stops a counter present on the PMU. |
365 | * | |
366 | * The PMI handler should stop the counter when perf_event_overflow() | |
367 | * returns !0. ->start() will be used to continue. | |
368 | * | |
369 | * Also used to change the sample period. | |
370 | * | |
371 | * Called with IRQs disabled and the PMU disabled on the CPU the event | |
372 | * is on -- will be called from NMI context with the PMU generates | |
373 | * NMIs. | |
374 | * | |
375 | * ->stop() with PERF_EF_UPDATE will read the counter and update | |
376 | * period/count values like ->read() would. | |
377 | * | |
c2127e14 | 378 | * ->start() with PERF_EF_RELOAD will reprogram the counter |
b0e87875 | 379 | * value, must be preceded by a ->stop() with PERF_EF_UPDATE. |
a4eaf7f1 PZ |
380 | */ |
381 | void (*start) (struct perf_event *event, int flags); | |
382 | void (*stop) (struct perf_event *event, int flags); | |
383 | ||
384 | /* | |
385 | * Updates the counter value of the event. | |
b0e87875 PZ |
386 | * |
387 | * For sampling capable PMUs this will also update the software period | |
388 | * hw_perf_event::period_left field. | |
a4eaf7f1 | 389 | */ |
cdd6c482 | 390 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
391 | |
392 | /* | |
24cd7f54 PZ |
393 | * Group events scheduling is treated as a transaction, add |
394 | * group events as a whole and perform one schedulability test. | |
395 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
396 | * |
397 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 398 | * do schedulability tests. |
fbbe0701 SB |
399 | * |
400 | * Optional. | |
8d2cacbb | 401 | */ |
fbbe0701 | 402 | void (*start_txn) (struct pmu *pmu, unsigned int txn_flags); |
8d2cacbb | 403 | /* |
a4eaf7f1 | 404 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
405 | * then ->commit_txn() is required to perform one. On success |
406 | * the transaction is closed. On error the transaction is kept | |
407 | * open until ->cancel_txn() is called. | |
fbbe0701 SB |
408 | * |
409 | * Optional. | |
8d2cacbb | 410 | */ |
fbbe0701 | 411 | int (*commit_txn) (struct pmu *pmu); |
8d2cacbb | 412 | /* |
a4eaf7f1 | 413 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 414 | * for each successful ->add() during the transaction. |
fbbe0701 SB |
415 | * |
416 | * Optional. | |
8d2cacbb | 417 | */ |
fbbe0701 | 418 | void (*cancel_txn) (struct pmu *pmu); |
35edc2a5 PZ |
419 | |
420 | /* | |
421 | * Will return the value for perf_event_mmap_page::index for this event, | |
422 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
423 | */ | |
424 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 | 425 | |
ba532500 YZ |
426 | /* |
427 | * context-switches callback | |
428 | */ | |
429 | void (*sched_task) (struct perf_event_context *ctx, | |
430 | bool sched_in); | |
431 | ||
217c2a63 KL |
432 | /* |
433 | * Kmem cache of PMU specific data | |
434 | */ | |
435 | struct kmem_cache *task_ctx_cache; | |
436 | ||
fc1adfe3 AB |
437 | /* |
438 | * PMU specific parts of task perf event context (i.e. ctx->task_ctx_data) | |
439 | * can be synchronized using this function. See Intel LBR callstack support | |
440 | * implementation and Perf core context switch handling callbacks for usage | |
441 | * examples. | |
442 | */ | |
443 | void (*swap_task_ctx) (struct perf_event_context *prev, | |
444 | struct perf_event_context *next); | |
445 | /* optional */ | |
eacd3ecc | 446 | |
45bfb2e5 PZ |
447 | /* |
448 | * Set up pmu-private data structures for an AUX area | |
449 | */ | |
84001866 | 450 | void *(*setup_aux) (struct perf_event *event, void **pages, |
45bfb2e5 PZ |
451 | int nr_pages, bool overwrite); |
452 | /* optional */ | |
453 | ||
454 | /* | |
455 | * Free pmu-private AUX data structures | |
456 | */ | |
457 | void (*free_aux) (void *aux); /* optional */ | |
66eb579e | 458 | |
a4faf00d AS |
459 | /* |
460 | * Take a snapshot of the AUX buffer without touching the event | |
461 | * state, so that preempting ->start()/->stop() callbacks does | |
462 | * not interfere with their logic. Called in PMI context. | |
463 | * | |
464 | * Returns the size of AUX data copied to the output handle. | |
465 | * | |
466 | * Optional. | |
467 | */ | |
468 | long (*snapshot_aux) (struct perf_event *event, | |
469 | struct perf_output_handle *handle, | |
470 | unsigned long size); | |
471 | ||
375637bc AS |
472 | /* |
473 | * Validate address range filters: make sure the HW supports the | |
474 | * requested configuration and number of filters; return 0 if the | |
475 | * supplied filters are valid, -errno otherwise. | |
476 | * | |
477 | * Runs in the context of the ioctl()ing process and is not serialized | |
478 | * with the rest of the PMU callbacks. | |
479 | */ | |
480 | int (*addr_filters_validate) (struct list_head *filters); | |
481 | /* optional */ | |
482 | ||
483 | /* | |
484 | * Synchronize address range filter configuration: | |
485 | * translate hw-agnostic filters into hardware configuration in | |
486 | * event::hw::addr_filters. | |
487 | * | |
488 | * Runs as a part of filter sync sequence that is done in ->start() | |
489 | * callback by calling perf_event_addr_filters_sync(). | |
490 | * | |
491 | * May (and should) traverse event::addr_filters::list, for which its | |
492 | * caller provides necessary serialization. | |
493 | */ | |
494 | void (*addr_filters_sync) (struct perf_event *event); | |
495 | /* optional */ | |
496 | ||
ab43762e AS |
497 | /* |
498 | * Check if event can be used for aux_output purposes for | |
499 | * events of this PMU. | |
500 | * | |
501 | * Runs from perf_event_open(). Should return 0 for "no match" | |
502 | * or non-zero for "match". | |
503 | */ | |
504 | int (*aux_output_match) (struct perf_event *event); | |
505 | /* optional */ | |
506 | ||
66eb579e MR |
507 | /* |
508 | * Filter events for PMU-specific reasons. | |
509 | */ | |
510 | int (*filter_match) (struct perf_event *event); /* optional */ | |
81ec3f3c JO |
511 | |
512 | /* | |
513 | * Check period value for PERF_EVENT_IOC_PERIOD ioctl. | |
514 | */ | |
515 | int (*check_period) (struct perf_event *event, u64 value); /* optional */ | |
621a01ea IM |
516 | }; |
517 | ||
6ed70cf3 AS |
518 | enum perf_addr_filter_action_t { |
519 | PERF_ADDR_FILTER_ACTION_STOP = 0, | |
520 | PERF_ADDR_FILTER_ACTION_START, | |
521 | PERF_ADDR_FILTER_ACTION_FILTER, | |
522 | }; | |
523 | ||
375637bc AS |
524 | /** |
525 | * struct perf_addr_filter - address range filter definition | |
526 | * @entry: event's filter list linkage | |
1279e41d | 527 | * @path: object file's path for file-based filters |
375637bc | 528 | * @offset: filter range offset |
6ed70cf3 AS |
529 | * @size: filter range size (size==0 means single address trigger) |
530 | * @action: filter/start/stop | |
375637bc AS |
531 | * |
532 | * This is a hardware-agnostic filter configuration as specified by the user. | |
533 | */ | |
534 | struct perf_addr_filter { | |
535 | struct list_head entry; | |
9511bce9 | 536 | struct path path; |
375637bc AS |
537 | unsigned long offset; |
538 | unsigned long size; | |
6ed70cf3 | 539 | enum perf_addr_filter_action_t action; |
375637bc AS |
540 | }; |
541 | ||
542 | /** | |
543 | * struct perf_addr_filters_head - container for address range filters | |
544 | * @list: list of filters for this event | |
545 | * @lock: spinlock that serializes accesses to the @list and event's | |
546 | * (and its children's) filter generations. | |
6ce77bfd | 547 | * @nr_file_filters: number of file-based filters |
375637bc AS |
548 | * |
549 | * A child event will use parent's @list (and therefore @lock), so they are | |
550 | * bundled together; see perf_event_addr_filters(). | |
551 | */ | |
552 | struct perf_addr_filters_head { | |
553 | struct list_head list; | |
554 | raw_spinlock_t lock; | |
6ce77bfd | 555 | unsigned int nr_file_filters; |
375637bc AS |
556 | }; |
557 | ||
c60f83b8 AS |
558 | struct perf_addr_filter_range { |
559 | unsigned long start; | |
560 | unsigned long size; | |
561 | }; | |
562 | ||
6a930700 | 563 | /** |
788faab7 | 564 | * enum perf_event_state - the states of an event: |
6a930700 | 565 | */ |
8ca2bd41 | 566 | enum perf_event_state { |
a69b0ca4 | 567 | PERF_EVENT_STATE_DEAD = -4, |
179033b3 | 568 | PERF_EVENT_STATE_EXIT = -3, |
57c0c15b | 569 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
570 | PERF_EVENT_STATE_OFF = -1, |
571 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 572 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
573 | }; |
574 | ||
9b51f66d | 575 | struct file; |
453f19ee PZ |
576 | struct perf_sample_data; |
577 | ||
a8b0ca17 | 578 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
579 | struct perf_sample_data *, |
580 | struct pt_regs *regs); | |
581 | ||
4ff6a8de DCC |
582 | /* |
583 | * Event capabilities. For event_caps and groups caps. | |
584 | * | |
585 | * PERF_EV_CAP_SOFTWARE: Is a software event. | |
d6a2f903 DCC |
586 | * PERF_EV_CAP_READ_ACTIVE_PKG: A CPU event (or cgroup event) that can be read |
587 | * from any CPU in the package where it is active. | |
9f0c4fa1 KL |
588 | * PERF_EV_CAP_SIBLING: An event with this flag must be a group sibling and |
589 | * cannot be a group leader. If an event with this flag is detached from the | |
590 | * group it is scheduled out and moved into an unrecoverable ERROR state. | |
4ff6a8de DCC |
591 | */ |
592 | #define PERF_EV_CAP_SOFTWARE BIT(0) | |
d6a2f903 | 593 | #define PERF_EV_CAP_READ_ACTIVE_PKG BIT(1) |
9f0c4fa1 | 594 | #define PERF_EV_CAP_SIBLING BIT(2) |
d6f962b5 | 595 | |
e7e7ee2e IM |
596 | #define SWEVENT_HLIST_BITS 8 |
597 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
598 | |
599 | struct swevent_hlist { | |
e7e7ee2e IM |
600 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
601 | struct rcu_head rcu_head; | |
76e1d904 FW |
602 | }; |
603 | ||
8a49542c PZ |
604 | #define PERF_ATTACH_CONTEXT 0x01 |
605 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 606 | #define PERF_ATTACH_TASK 0x04 |
4af57ef2 | 607 | #define PERF_ATTACH_TASK_DATA 0x08 |
8d4e6c4c | 608 | #define PERF_ATTACH_ITRACE 0x10 |
8a49542c | 609 | |
877c6856 | 610 | struct perf_cgroup; |
56de4e8f | 611 | struct perf_buffer; |
76369139 | 612 | |
f2fb6bef KL |
613 | struct pmu_event_list { |
614 | raw_spinlock_t lock; | |
615 | struct list_head list; | |
616 | }; | |
617 | ||
edb39592 PZ |
618 | #define for_each_sibling_event(sibling, event) \ |
619 | if ((event)->group_leader == (event)) \ | |
620 | list_for_each_entry((sibling), &(event)->sibling_list, sibling_list) | |
621 | ||
0793a61d | 622 | /** |
cdd6c482 | 623 | * struct perf_event - performance event kernel representation: |
0793a61d | 624 | */ |
cdd6c482 IM |
625 | struct perf_event { |
626 | #ifdef CONFIG_PERF_EVENTS | |
9886167d PZ |
627 | /* |
628 | * entry onto perf_event_context::event_list; | |
629 | * modifications require ctx->lock | |
630 | * RCU safe iterations. | |
631 | */ | |
592903cd | 632 | struct list_head event_entry; |
9886167d PZ |
633 | |
634 | /* | |
9886167d PZ |
635 | * Locked for modification by both ctx->mutex and ctx->lock; holding |
636 | * either sufficies for read. | |
637 | */ | |
04289bb9 | 638 | struct list_head sibling_list; |
6668128a | 639 | struct list_head active_list; |
8e1a2031 AB |
640 | /* |
641 | * Node on the pinned or flexible tree located at the event context; | |
642 | */ | |
643 | struct rb_node group_node; | |
644 | u64 group_index; | |
9886167d PZ |
645 | /* |
646 | * We need storage to track the entries in perf_pmu_migrate_context; we | |
647 | * cannot use the event_entry because of RCU and we want to keep the | |
648 | * group in tact which avoids us using the other two entries. | |
649 | */ | |
650 | struct list_head migrate_entry; | |
651 | ||
f3ae75de SE |
652 | struct hlist_node hlist_entry; |
653 | struct list_head active_entry; | |
0127c3ea | 654 | int nr_siblings; |
4ff6a8de DCC |
655 | |
656 | /* Not serialized. Only written during event initialization. */ | |
657 | int event_caps; | |
658 | /* The cumulative AND of all event_caps for events in this group. */ | |
659 | int group_caps; | |
660 | ||
cdd6c482 | 661 | struct perf_event *group_leader; |
a4eaf7f1 | 662 | struct pmu *pmu; |
54d751d4 | 663 | void *pmu_private; |
04289bb9 | 664 | |
8ca2bd41 | 665 | enum perf_event_state state; |
8a49542c | 666 | unsigned int attach_state; |
e7850595 | 667 | local64_t count; |
a6e6dea6 | 668 | atomic64_t child_count; |
ee06094f | 669 | |
53cfbf59 | 670 | /* |
cdd6c482 | 671 | * These are the total time in nanoseconds that the event |
53cfbf59 | 672 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 673 | * been scheduled in, if this is a per-task event) |
53cfbf59 | 674 | * and running (scheduled onto the CPU), respectively. |
53cfbf59 PM |
675 | */ |
676 | u64 total_time_enabled; | |
677 | u64 total_time_running; | |
0d3d73aa | 678 | u64 tstamp; |
53cfbf59 | 679 | |
eed01528 SE |
680 | /* |
681 | * timestamp shadows the actual context timing but it can | |
682 | * be safely used in NMI interrupt context. It reflects the | |
683 | * context time as it was when the event was last scheduled in. | |
684 | * | |
685 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
686 | * compute ctx_time for a sample, simply add perf_clock(). | |
687 | */ | |
688 | u64 shadow_ctx_time; | |
689 | ||
24f1e32c | 690 | struct perf_event_attr attr; |
c320c7b7 | 691 | u16 header_size; |
6844c09d | 692 | u16 id_header_size; |
c320c7b7 | 693 | u16 read_size; |
cdd6c482 | 694 | struct hw_perf_event hw; |
0793a61d | 695 | |
cdd6c482 | 696 | struct perf_event_context *ctx; |
a6fa941d | 697 | atomic_long_t refcount; |
0793a61d | 698 | |
53cfbf59 PM |
699 | /* |
700 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 701 | * events have been enabled and running, respectively. |
53cfbf59 PM |
702 | */ |
703 | atomic64_t child_total_time_enabled; | |
704 | atomic64_t child_total_time_running; | |
705 | ||
0793a61d | 706 | /* |
d859e29f | 707 | * Protect attach/detach and child_list: |
0793a61d | 708 | */ |
fccc714b PZ |
709 | struct mutex child_mutex; |
710 | struct list_head child_list; | |
cdd6c482 | 711 | struct perf_event *parent; |
0793a61d TG |
712 | |
713 | int oncpu; | |
714 | int cpu; | |
715 | ||
082ff5a2 PZ |
716 | struct list_head owner_entry; |
717 | struct task_struct *owner; | |
718 | ||
7b732a75 PZ |
719 | /* mmap bits */ |
720 | struct mutex mmap_mutex; | |
721 | atomic_t mmap_count; | |
26cb63ad | 722 | |
56de4e8f | 723 | struct perf_buffer *rb; |
10c6db11 | 724 | struct list_head rb_entry; |
b69cf536 PZ |
725 | unsigned long rcu_batches; |
726 | int rcu_pending; | |
37d81828 | 727 | |
7b732a75 | 728 | /* poll related */ |
0793a61d | 729 | wait_queue_head_t waitq; |
3c446b3d | 730 | struct fasync_struct *fasync; |
79f14641 PZ |
731 | |
732 | /* delayed work for NMIs and such */ | |
733 | int pending_wakeup; | |
4c9e2542 | 734 | int pending_kill; |
79f14641 | 735 | int pending_disable; |
e360adbe | 736 | struct irq_work pending; |
592903cd | 737 | |
79f14641 PZ |
738 | atomic_t event_limit; |
739 | ||
375637bc AS |
740 | /* address range filters */ |
741 | struct perf_addr_filters_head addr_filters; | |
742 | /* vma address array for file-based filders */ | |
c60f83b8 | 743 | struct perf_addr_filter_range *addr_filter_ranges; |
375637bc AS |
744 | unsigned long addr_filters_gen; |
745 | ||
ab43762e AS |
746 | /* for aux_output events */ |
747 | struct perf_event *aux_event; | |
748 | ||
cdd6c482 | 749 | void (*destroy)(struct perf_event *); |
592903cd | 750 | struct rcu_head rcu_head; |
709e50cf PZ |
751 | |
752 | struct pid_namespace *ns; | |
8e5799b1 | 753 | u64 id; |
6fb2915d | 754 | |
34f43927 | 755 | u64 (*clock)(void); |
b326e956 | 756 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 757 | void *overflow_handler_context; |
aa6a5f3c AS |
758 | #ifdef CONFIG_BPF_SYSCALL |
759 | perf_overflow_handler_t orig_overflow_handler; | |
760 | struct bpf_prog *prog; | |
761 | #endif | |
453f19ee | 762 | |
07b139c8 | 763 | #ifdef CONFIG_EVENT_TRACING |
2425bcb9 | 764 | struct trace_event_call *tp_event; |
6fb2915d | 765 | struct event_filter *filter; |
ced39002 JO |
766 | #ifdef CONFIG_FUNCTION_TRACER |
767 | struct ftrace_ops ftrace_ops; | |
768 | #endif | |
ee06094f | 769 | #endif |
6fb2915d | 770 | |
e5d1367f SE |
771 | #ifdef CONFIG_CGROUP_PERF |
772 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
e5d1367f SE |
773 | #endif |
774 | ||
da97e184 JFG |
775 | #ifdef CONFIG_SECURITY |
776 | void *security; | |
777 | #endif | |
f2fb6bef | 778 | struct list_head sb_list; |
6fb2915d | 779 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
780 | }; |
781 | ||
8e1a2031 AB |
782 | |
783 | struct perf_event_groups { | |
784 | struct rb_root tree; | |
785 | u64 index; | |
786 | }; | |
787 | ||
0793a61d | 788 | /** |
cdd6c482 | 789 | * struct perf_event_context - event context structure |
0793a61d | 790 | * |
cdd6c482 | 791 | * Used as a container for task events and CPU events as well: |
0793a61d | 792 | */ |
cdd6c482 | 793 | struct perf_event_context { |
108b02cf | 794 | struct pmu *pmu; |
0793a61d | 795 | /* |
cdd6c482 | 796 | * Protect the states of the events in the list, |
d859e29f | 797 | * nr_active, and the list: |
0793a61d | 798 | */ |
e625cce1 | 799 | raw_spinlock_t lock; |
d859e29f | 800 | /* |
cdd6c482 | 801 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
802 | * is sufficient to ensure the list doesn't change; to change |
803 | * the list you need to lock both the mutex and the spinlock. | |
804 | */ | |
a308444c | 805 | struct mutex mutex; |
04289bb9 | 806 | |
2fde4f94 | 807 | struct list_head active_ctx_list; |
8e1a2031 AB |
808 | struct perf_event_groups pinned_groups; |
809 | struct perf_event_groups flexible_groups; | |
a308444c | 810 | struct list_head event_list; |
6668128a PZ |
811 | |
812 | struct list_head pinned_active; | |
813 | struct list_head flexible_active; | |
814 | ||
cdd6c482 | 815 | int nr_events; |
a308444c IM |
816 | int nr_active; |
817 | int is_active; | |
bfbd3381 | 818 | int nr_stat; |
0f5a2601 | 819 | int nr_freq; |
dddd3379 | 820 | int rotate_disable; |
fd7d5517 IR |
821 | /* |
822 | * Set when nr_events != nr_active, except tolerant to events not | |
823 | * necessary to be active due to scheduling constraints, such as cgroups. | |
824 | */ | |
825 | int rotate_necessary; | |
8c94abbb | 826 | refcount_t refcount; |
a308444c | 827 | struct task_struct *task; |
53cfbf59 PM |
828 | |
829 | /* | |
4af4998b | 830 | * Context clock, runs when context enabled. |
53cfbf59 | 831 | */ |
a308444c IM |
832 | u64 time; |
833 | u64 timestamp; | |
564c2b21 PM |
834 | |
835 | /* | |
836 | * These fields let us detect when two contexts have both | |
837 | * been cloned (inherited) from a common ancestor. | |
838 | */ | |
cdd6c482 | 839 | struct perf_event_context *parent_ctx; |
a308444c IM |
840 | u64 parent_gen; |
841 | u64 generation; | |
842 | int pin_count; | |
db4a8356 | 843 | #ifdef CONFIG_CGROUP_PERF |
d010b332 | 844 | int nr_cgroups; /* cgroup evts */ |
db4a8356 | 845 | #endif |
4af57ef2 | 846 | void *task_ctx_data; /* pmu specific data */ |
28009ce4 | 847 | struct rcu_head rcu_head; |
0793a61d TG |
848 | }; |
849 | ||
7ae07ea3 FW |
850 | /* |
851 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 852 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
853 | */ |
854 | #define PERF_NR_CONTEXTS 4 | |
855 | ||
0793a61d | 856 | /** |
cdd6c482 | 857 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
858 | */ |
859 | struct perf_cpu_context { | |
cdd6c482 IM |
860 | struct perf_event_context ctx; |
861 | struct perf_event_context *task_ctx; | |
0793a61d | 862 | int active_oncpu; |
3b6f9e5c | 863 | int exclusive; |
4cfafd30 PZ |
864 | |
865 | raw_spinlock_t hrtimer_lock; | |
9e630205 SE |
866 | struct hrtimer hrtimer; |
867 | ktime_t hrtimer_interval; | |
4cfafd30 PZ |
868 | unsigned int hrtimer_active; |
869 | ||
db4a8356 | 870 | #ifdef CONFIG_CGROUP_PERF |
e5d1367f | 871 | struct perf_cgroup *cgrp; |
058fe1c0 | 872 | struct list_head cgrp_cpuctx_entry; |
db4a8356 | 873 | #endif |
e48c1788 | 874 | |
e48c1788 | 875 | int sched_cb_usage; |
a63fbed7 TG |
876 | |
877 | int online; | |
836196be IR |
878 | /* |
879 | * Per-CPU storage for iterators used in visit_groups_merge. The default | |
880 | * storage is of size 2 to hold the CPU and any CPU event iterators. | |
881 | */ | |
882 | int heap_size; | |
883 | struct perf_event **heap; | |
884 | struct perf_event *heap_default[2]; | |
0793a61d TG |
885 | }; |
886 | ||
5622f295 | 887 | struct perf_output_handle { |
57c0c15b | 888 | struct perf_event *event; |
56de4e8f | 889 | struct perf_buffer *rb; |
6d1acfd5 | 890 | unsigned long wakeup; |
5d967a8b | 891 | unsigned long size; |
f4c0b0aa | 892 | u64 aux_flags; |
fdc26706 AS |
893 | union { |
894 | void *addr; | |
895 | unsigned long head; | |
896 | }; | |
5d967a8b | 897 | int page; |
5622f295 MM |
898 | }; |
899 | ||
0515e599 | 900 | struct bpf_perf_event_data_kern { |
c895f6f7 | 901 | bpf_user_pt_regs_t *regs; |
0515e599 | 902 | struct perf_sample_data *data; |
7d9285e8 | 903 | struct perf_event *event; |
0515e599 AS |
904 | }; |
905 | ||
39bed6cb MF |
906 | #ifdef CONFIG_CGROUP_PERF |
907 | ||
908 | /* | |
909 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
910 | * This is a per-cpu dynamically allocated data structure. | |
911 | */ | |
912 | struct perf_cgroup_info { | |
913 | u64 time; | |
914 | u64 timestamp; | |
915 | }; | |
916 | ||
917 | struct perf_cgroup { | |
918 | struct cgroup_subsys_state css; | |
919 | struct perf_cgroup_info __percpu *info; | |
920 | }; | |
921 | ||
922 | /* | |
923 | * Must ensure cgroup is pinned (css_get) before calling | |
924 | * this function. In other words, we cannot call this function | |
925 | * if there is no cgroup event for the current CPU context. | |
926 | */ | |
927 | static inline struct perf_cgroup * | |
614e4c4e | 928 | perf_cgroup_from_task(struct task_struct *task, struct perf_event_context *ctx) |
39bed6cb | 929 | { |
614e4c4e SE |
930 | return container_of(task_css_check(task, perf_event_cgrp_id, |
931 | ctx ? lockdep_is_held(&ctx->lock) | |
932 | : true), | |
39bed6cb MF |
933 | struct perf_cgroup, css); |
934 | } | |
935 | #endif /* CONFIG_CGROUP_PERF */ | |
936 | ||
cdd6c482 | 937 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 938 | |
fdc26706 AS |
939 | extern void *perf_aux_output_begin(struct perf_output_handle *handle, |
940 | struct perf_event *event); | |
941 | extern void perf_aux_output_end(struct perf_output_handle *handle, | |
f4c0b0aa | 942 | unsigned long size); |
fdc26706 AS |
943 | extern int perf_aux_output_skip(struct perf_output_handle *handle, |
944 | unsigned long size); | |
945 | extern void *perf_get_aux(struct perf_output_handle *handle); | |
f4c0b0aa | 946 | extern void perf_aux_output_flag(struct perf_output_handle *handle, u64 flags); |
8d4e6c4c | 947 | extern void perf_event_itrace_started(struct perf_event *event); |
fdc26706 | 948 | |
03d8e80b | 949 | extern int perf_pmu_register(struct pmu *pmu, const char *name, int type); |
b0a873eb | 950 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 951 | |
3bf101ba | 952 | extern int perf_num_counters(void); |
84c79910 | 953 | extern const char *perf_pmu_name(void); |
ab0cce56 JO |
954 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
955 | struct task_struct *task); | |
956 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
957 | struct task_struct *next); | |
cdd6c482 IM |
958 | extern int perf_event_init_task(struct task_struct *child); |
959 | extern void perf_event_exit_task(struct task_struct *child); | |
960 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 961 | extern void perf_event_delayed_put(struct task_struct *task); |
e03e7ee3 | 962 | extern struct file *perf_event_get(unsigned int fd); |
f8d959a5 | 963 | extern const struct perf_event *perf_get_event(struct file *file); |
ffe8690c | 964 | extern const struct perf_event_attr *perf_event_attrs(struct perf_event *event); |
cdd6c482 | 965 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
966 | extern void perf_pmu_disable(struct pmu *pmu); |
967 | extern void perf_pmu_enable(struct pmu *pmu); | |
ba532500 YZ |
968 | extern void perf_sched_cb_dec(struct pmu *pmu); |
969 | extern void perf_sched_cb_inc(struct pmu *pmu); | |
cdd6c482 IM |
970 | extern int perf_event_task_disable(void); |
971 | extern int perf_event_task_enable(void); | |
c68d224e SE |
972 | |
973 | extern void perf_pmu_resched(struct pmu *pmu); | |
974 | ||
26ca5c11 | 975 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 976 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
977 | extern int perf_event_release_kernel(struct perf_event *event); |
978 | extern struct perf_event * | |
979 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
980 | int cpu, | |
38a81da2 | 981 | struct task_struct *task, |
4dc0da86 AK |
982 | perf_overflow_handler_t callback, |
983 | void *context); | |
0cda4c02 YZ |
984 | extern void perf_pmu_migrate_context(struct pmu *pmu, |
985 | int src_cpu, int dst_cpu); | |
7d9285e8 YS |
986 | int perf_event_read_local(struct perf_event *event, u64 *value, |
987 | u64 *enabled, u64 *running); | |
59ed446f PZ |
988 | extern u64 perf_event_read_value(struct perf_event *event, |
989 | u64 *enabled, u64 *running); | |
5c92d124 | 990 | |
d010b332 | 991 | |
df1a132b | 992 | struct perf_sample_data { |
2565711f PZ |
993 | /* |
994 | * Fields set by perf_sample_data_init(), group so as to | |
995 | * minimize the cachelines touched. | |
996 | */ | |
997 | u64 addr; | |
998 | struct perf_raw_record *raw; | |
999 | struct perf_branch_stack *br_stack; | |
1000 | u64 period; | |
2a6c6b7d | 1001 | union perf_sample_weight weight; |
2565711f PZ |
1002 | u64 txn; |
1003 | union perf_mem_data_src data_src; | |
5622f295 | 1004 | |
2565711f PZ |
1005 | /* |
1006 | * The other fields, optionally {set,used} by | |
1007 | * perf_{prepare,output}_sample(). | |
1008 | */ | |
1009 | u64 type; | |
5622f295 MM |
1010 | u64 ip; |
1011 | struct { | |
1012 | u32 pid; | |
1013 | u32 tid; | |
1014 | } tid_entry; | |
1015 | u64 time; | |
5622f295 MM |
1016 | u64 id; |
1017 | u64 stream_id; | |
1018 | struct { | |
1019 | u32 cpu; | |
1020 | u32 reserved; | |
1021 | } cpu_entry; | |
5622f295 | 1022 | struct perf_callchain_entry *callchain; |
a4faf00d | 1023 | u64 aux_size; |
88a7c26a | 1024 | |
60e2364e SE |
1025 | struct perf_regs regs_user; |
1026 | struct perf_regs regs_intr; | |
c5ebcedb | 1027 | u64 stack_user_size; |
fc7ce9c7 KL |
1028 | |
1029 | u64 phys_addr; | |
6546b19f | 1030 | u64 cgroup; |
8d97e718 | 1031 | u64 data_page_size; |
995f088e | 1032 | u64 code_page_size; |
2565711f | 1033 | } ____cacheline_aligned; |
df1a132b | 1034 | |
770eee1f SE |
1035 | /* default value for data source */ |
1036 | #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ | |
1037 | PERF_MEM_S(LVL, NA) |\ | |
1038 | PERF_MEM_S(SNOOP, NA) |\ | |
1039 | PERF_MEM_S(LOCK, NA) |\ | |
1040 | PERF_MEM_S(TLB, NA)) | |
1041 | ||
fd0d000b RR |
1042 | static inline void perf_sample_data_init(struct perf_sample_data *data, |
1043 | u64 addr, u64 period) | |
dc1d628a | 1044 | { |
fd0d000b | 1045 | /* remaining struct members initialized in perf_prepare_sample() */ |
dc1d628a PZ |
1046 | data->addr = addr; |
1047 | data->raw = NULL; | |
bce38cd5 | 1048 | data->br_stack = NULL; |
4018994f | 1049 | data->period = period; |
2a6c6b7d | 1050 | data->weight.full = 0; |
770eee1f | 1051 | data->data_src.val = PERF_MEM_NA; |
fdfbbd07 | 1052 | data->txn = 0; |
dc1d628a PZ |
1053 | } |
1054 | ||
5622f295 MM |
1055 | extern void perf_output_sample(struct perf_output_handle *handle, |
1056 | struct perf_event_header *header, | |
1057 | struct perf_sample_data *data, | |
cdd6c482 | 1058 | struct perf_event *event); |
5622f295 MM |
1059 | extern void perf_prepare_sample(struct perf_event_header *header, |
1060 | struct perf_sample_data *data, | |
cdd6c482 | 1061 | struct perf_event *event, |
5622f295 MM |
1062 | struct pt_regs *regs); |
1063 | ||
a8b0ca17 | 1064 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
1065 | struct perf_sample_data *data, |
1066 | struct pt_regs *regs); | |
df1a132b | 1067 | |
9ecda41a WN |
1068 | extern void perf_event_output_forward(struct perf_event *event, |
1069 | struct perf_sample_data *data, | |
1070 | struct pt_regs *regs); | |
1071 | extern void perf_event_output_backward(struct perf_event *event, | |
1072 | struct perf_sample_data *data, | |
1073 | struct pt_regs *regs); | |
56201969 ACM |
1074 | extern int perf_event_output(struct perf_event *event, |
1075 | struct perf_sample_data *data, | |
1076 | struct pt_regs *regs); | |
21509084 | 1077 | |
1879445d WN |
1078 | static inline bool |
1079 | is_default_overflow_handler(struct perf_event *event) | |
1080 | { | |
9ecda41a WN |
1081 | if (likely(event->overflow_handler == perf_event_output_forward)) |
1082 | return true; | |
1083 | if (unlikely(event->overflow_handler == perf_event_output_backward)) | |
1084 | return true; | |
1085 | return false; | |
1879445d WN |
1086 | } |
1087 | ||
21509084 YZ |
1088 | extern void |
1089 | perf_event_header__init_id(struct perf_event_header *header, | |
1090 | struct perf_sample_data *data, | |
1091 | struct perf_event *event); | |
1092 | extern void | |
1093 | perf_event__output_id_sample(struct perf_event *event, | |
1094 | struct perf_output_handle *handle, | |
1095 | struct perf_sample_data *sample); | |
1096 | ||
f38b0dbb KL |
1097 | extern void |
1098 | perf_log_lost_samples(struct perf_event *event, u64 lost); | |
1099 | ||
486efe9f AM |
1100 | static inline bool event_has_any_exclude_flag(struct perf_event *event) |
1101 | { | |
1102 | struct perf_event_attr *attr = &event->attr; | |
1103 | ||
1104 | return attr->exclude_idle || attr->exclude_user || | |
1105 | attr->exclude_kernel || attr->exclude_hv || | |
1106 | attr->exclude_guest || attr->exclude_host; | |
1107 | } | |
1108 | ||
6c7e550f FBH |
1109 | static inline bool is_sampling_event(struct perf_event *event) |
1110 | { | |
1111 | return event->attr.sample_period != 0; | |
1112 | } | |
1113 | ||
3b6f9e5c | 1114 | /* |
cdd6c482 | 1115 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 1116 | */ |
cdd6c482 | 1117 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 1118 | { |
4ff6a8de | 1119 | return event->event_caps & PERF_EV_CAP_SOFTWARE; |
3b6f9e5c PM |
1120 | } |
1121 | ||
a1150c20 SL |
1122 | /* |
1123 | * Return 1 for event in sw context, 0 for event in hw context | |
1124 | */ | |
1125 | static inline int in_software_context(struct perf_event *event) | |
1126 | { | |
1127 | return event->ctx->pmu->task_ctx_nr == perf_sw_context; | |
1128 | } | |
1129 | ||
8a58ddae AS |
1130 | static inline int is_exclusive_pmu(struct pmu *pmu) |
1131 | { | |
1132 | return pmu->capabilities & PERF_PMU_CAP_EXCLUSIVE; | |
1133 | } | |
1134 | ||
c5905afb | 1135 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 1136 | |
86038c5e | 1137 | extern void ___perf_sw_event(u32, u64, struct pt_regs *, u64); |
a8b0ca17 | 1138 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 1139 | |
b0f82b81 | 1140 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 1141 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 1142 | #endif |
5331d7b8 FW |
1143 | |
1144 | /* | |
d15d3568 KS |
1145 | * When generating a perf sample in-line, instead of from an interrupt / |
1146 | * exception, we lack a pt_regs. This is typically used from software events | |
1147 | * like: SW_CONTEXT_SWITCHES, SW_MIGRATIONS and the tie-in with tracepoints. | |
1148 | * | |
1149 | * We typically don't need a full set, but (for x86) do require: | |
5331d7b8 FW |
1150 | * - ip for PERF_SAMPLE_IP |
1151 | * - cs for user_mode() tests | |
d15d3568 KS |
1152 | * - sp for PERF_SAMPLE_CALLCHAIN |
1153 | * - eflags for MISC bits and CALLCHAIN (see: perf_hw_regs()) | |
1154 | * | |
1155 | * NOTE: assumes @regs is otherwise already 0 filled; this is important for | |
1156 | * things like PERF_SAMPLE_REGS_INTR. | |
5331d7b8 | 1157 | */ |
b0f82b81 | 1158 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 1159 | { |
b0f82b81 | 1160 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
1161 | } |
1162 | ||
7e54a5a0 | 1163 | static __always_inline void |
a8b0ca17 | 1164 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1165 | { |
86038c5e PZI |
1166 | if (static_key_false(&perf_swevent_enabled[event_id])) |
1167 | __perf_sw_event(event_id, nr, regs, addr); | |
1168 | } | |
1169 | ||
1170 | DECLARE_PER_CPU(struct pt_regs, __perf_regs[4]); | |
7e54a5a0 | 1171 | |
86038c5e PZI |
1172 | /* |
1173 | * 'Special' version for the scheduler, it hard assumes no recursion, | |
1174 | * which is guaranteed by us not actually scheduling inside other swevents | |
1175 | * because those disable preemption. | |
1176 | */ | |
1177 | static __always_inline void | |
1178 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) | |
1179 | { | |
c5905afb | 1180 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
86038c5e PZI |
1181 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); |
1182 | ||
1183 | perf_fetch_caller_regs(regs); | |
1184 | ___perf_sw_event(event_id, nr, regs, addr); | |
e49a5bd3 FW |
1185 | } |
1186 | } | |
1187 | ||
9107c89e | 1188 | extern struct static_key_false perf_sched_events; |
ee6dcfa4 | 1189 | |
ff303e66 PZ |
1190 | static __always_inline bool |
1191 | perf_sw_migrate_enabled(void) | |
1192 | { | |
1193 | if (static_key_false(&perf_swevent_enabled[PERF_COUNT_SW_CPU_MIGRATIONS])) | |
1194 | return true; | |
1195 | return false; | |
1196 | } | |
1197 | ||
1198 | static inline void perf_event_task_migrate(struct task_struct *task) | |
1199 | { | |
1200 | if (perf_sw_migrate_enabled()) | |
1201 | task->sched_migrated = 1; | |
1202 | } | |
1203 | ||
ab0cce56 | 1204 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
a8d757ef | 1205 | struct task_struct *task) |
ab0cce56 | 1206 | { |
9107c89e | 1207 | if (static_branch_unlikely(&perf_sched_events)) |
ab0cce56 | 1208 | __perf_event_task_sched_in(prev, task); |
ff303e66 PZ |
1209 | |
1210 | if (perf_sw_migrate_enabled() && task->sched_migrated) { | |
1211 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); | |
1212 | ||
1213 | perf_fetch_caller_regs(regs); | |
1214 | ___perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, regs, 0); | |
1215 | task->sched_migrated = 0; | |
1216 | } | |
ab0cce56 JO |
1217 | } |
1218 | ||
1219 | static inline void perf_event_task_sched_out(struct task_struct *prev, | |
1220 | struct task_struct *next) | |
ee6dcfa4 | 1221 | { |
86038c5e | 1222 | perf_sw_event_sched(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, 0); |
ee6dcfa4 | 1223 | |
9107c89e | 1224 | if (static_branch_unlikely(&perf_sched_events)) |
ab0cce56 | 1225 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
1226 | } |
1227 | ||
3af9e859 | 1228 | extern void perf_event_mmap(struct vm_area_struct *vma); |
76193a94 SL |
1229 | |
1230 | extern void perf_event_ksymbol(u16 ksym_type, u64 addr, u32 len, | |
1231 | bool unregister, const char *sym); | |
6ee52e2a SL |
1232 | extern void perf_event_bpf_event(struct bpf_prog *prog, |
1233 | enum perf_bpf_event_type type, | |
1234 | u16 flags); | |
76193a94 | 1235 | |
39447b38 | 1236 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1237 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1238 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1239 | |
e041e328 | 1240 | extern void perf_event_exec(void); |
82b89778 | 1241 | extern void perf_event_comm(struct task_struct *tsk, bool exec); |
e4222673 | 1242 | extern void perf_event_namespaces(struct task_struct *tsk); |
cdd6c482 | 1243 | extern void perf_event_fork(struct task_struct *tsk); |
e17d43b9 AH |
1244 | extern void perf_event_text_poke(const void *addr, |
1245 | const void *old_bytes, size_t old_len, | |
1246 | const void *new_bytes, size_t new_len); | |
8d1b2d93 | 1247 | |
56962b44 FW |
1248 | /* Callchains */ |
1249 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1250 | ||
cfbcf468 ACM |
1251 | extern void perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); |
1252 | extern void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); | |
568b329a AS |
1253 | extern struct perf_callchain_entry * |
1254 | get_perf_callchain(struct pt_regs *regs, u32 init_nr, bool kernel, bool user, | |
cfbcf468 | 1255 | u32 max_stack, bool crosstask, bool add_mark); |
6cbc304f | 1256 | extern struct perf_callchain_entry *perf_callchain(struct perf_event *event, struct pt_regs *regs); |
97c79a38 | 1257 | extern int get_callchain_buffers(int max_stack); |
568b329a | 1258 | extern void put_callchain_buffers(void); |
d141b8bc SL |
1259 | extern struct perf_callchain_entry *get_callchain_entry(int *rctx); |
1260 | extern void put_callchain_entry(int rctx); | |
394ee076 | 1261 | |
c5dfd78e | 1262 | extern int sysctl_perf_event_max_stack; |
c85b0334 | 1263 | extern int sysctl_perf_event_max_contexts_per_stack; |
c5dfd78e | 1264 | |
c85b0334 ACM |
1265 | static inline int perf_callchain_store_context(struct perf_callchain_entry_ctx *ctx, u64 ip) |
1266 | { | |
1267 | if (ctx->contexts < sysctl_perf_event_max_contexts_per_stack) { | |
1268 | struct perf_callchain_entry *entry = ctx->entry; | |
1269 | entry->ip[entry->nr++] = ip; | |
1270 | ++ctx->contexts; | |
1271 | return 0; | |
1272 | } else { | |
1273 | ctx->contexts_maxed = true; | |
1274 | return -1; /* no more room, stop walking the stack */ | |
1275 | } | |
1276 | } | |
3e4de4ec | 1277 | |
cfbcf468 | 1278 | static inline int perf_callchain_store(struct perf_callchain_entry_ctx *ctx, u64 ip) |
70791ce9 | 1279 | { |
c85b0334 | 1280 | if (ctx->nr < ctx->max_stack && !ctx->contexts_maxed) { |
3b1fff08 | 1281 | struct perf_callchain_entry *entry = ctx->entry; |
70791ce9 | 1282 | entry->ip[entry->nr++] = ip; |
3b1fff08 | 1283 | ++ctx->nr; |
568b329a AS |
1284 | return 0; |
1285 | } else { | |
1286 | return -1; /* no more room, stop walking the stack */ | |
1287 | } | |
70791ce9 | 1288 | } |
394ee076 | 1289 | |
cdd6c482 IM |
1290 | extern int sysctl_perf_event_paranoid; |
1291 | extern int sysctl_perf_event_mlock; | |
1292 | extern int sysctl_perf_event_sample_rate; | |
14c63f17 DH |
1293 | extern int sysctl_perf_cpu_time_max_percent; |
1294 | ||
1295 | extern void perf_sample_event_took(u64 sample_len_ns); | |
1ccd1549 | 1296 | |
32927393 CH |
1297 | int perf_proc_update_handler(struct ctl_table *table, int write, |
1298 | void *buffer, size_t *lenp, loff_t *ppos); | |
1299 | int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, | |
1300 | void *buffer, size_t *lenp, loff_t *ppos); | |
c5dfd78e | 1301 | int perf_event_max_stack_handler(struct ctl_table *table, int write, |
32927393 | 1302 | void *buffer, size_t *lenp, loff_t *ppos); |
163ec435 | 1303 | |
da97e184 JFG |
1304 | /* Access to perf_event_open(2) syscall. */ |
1305 | #define PERF_SECURITY_OPEN 0 | |
1306 | ||
1307 | /* Finer grained perf_event_open(2) access control. */ | |
1308 | #define PERF_SECURITY_CPU 1 | |
1309 | #define PERF_SECURITY_KERNEL 2 | |
1310 | #define PERF_SECURITY_TRACEPOINT 3 | |
1311 | ||
1312 | static inline int perf_is_paranoid(void) | |
320ebf09 PZ |
1313 | { |
1314 | return sysctl_perf_event_paranoid > -1; | |
1315 | } | |
1316 | ||
da97e184 | 1317 | static inline int perf_allow_kernel(struct perf_event_attr *attr) |
320ebf09 | 1318 | { |
18aa1856 | 1319 | if (sysctl_perf_event_paranoid > 1 && !perfmon_capable()) |
da97e184 JFG |
1320 | return -EACCES; |
1321 | ||
1322 | return security_perf_event_open(attr, PERF_SECURITY_KERNEL); | |
320ebf09 PZ |
1323 | } |
1324 | ||
da97e184 | 1325 | static inline int perf_allow_cpu(struct perf_event_attr *attr) |
320ebf09 | 1326 | { |
18aa1856 | 1327 | if (sysctl_perf_event_paranoid > 0 && !perfmon_capable()) |
da97e184 JFG |
1328 | return -EACCES; |
1329 | ||
1330 | return security_perf_event_open(attr, PERF_SECURITY_CPU); | |
1331 | } | |
1332 | ||
1333 | static inline int perf_allow_tracepoint(struct perf_event_attr *attr) | |
1334 | { | |
18aa1856 | 1335 | if (sysctl_perf_event_paranoid > -1 && !perfmon_capable()) |
da97e184 JFG |
1336 | return -EPERM; |
1337 | ||
1338 | return security_perf_event_open(attr, PERF_SECURITY_TRACEPOINT); | |
320ebf09 PZ |
1339 | } |
1340 | ||
cdd6c482 | 1341 | extern void perf_event_init(void); |
1e1dcd93 | 1342 | extern void perf_tp_event(u16 event_type, u64 count, void *record, |
1c024eca | 1343 | int entry_size, struct pt_regs *regs, |
e6dab5ff | 1344 | struct hlist_head *head, int rctx, |
8fd0fbbe | 1345 | struct task_struct *task); |
24f1e32c | 1346 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1347 | |
9d23a90a | 1348 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1349 | # define perf_misc_flags(regs) \ |
1350 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1351 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a | 1352 | #endif |
c895f6f7 HB |
1353 | #ifndef perf_arch_bpf_user_pt_regs |
1354 | # define perf_arch_bpf_user_pt_regs(regs) regs | |
1355 | #endif | |
9d23a90a | 1356 | |
bce38cd5 SE |
1357 | static inline bool has_branch_stack(struct perf_event *event) |
1358 | { | |
1359 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
a46a2300 YZ |
1360 | } |
1361 | ||
1362 | static inline bool needs_branch_stack(struct perf_event *event) | |
1363 | { | |
1364 | return event->attr.branch_sample_type != 0; | |
bce38cd5 SE |
1365 | } |
1366 | ||
45bfb2e5 PZ |
1367 | static inline bool has_aux(struct perf_event *event) |
1368 | { | |
1369 | return event->pmu->setup_aux; | |
1370 | } | |
1371 | ||
9ecda41a WN |
1372 | static inline bool is_write_backward(struct perf_event *event) |
1373 | { | |
1374 | return !!event->attr.write_backward; | |
1375 | } | |
1376 | ||
375637bc AS |
1377 | static inline bool has_addr_filter(struct perf_event *event) |
1378 | { | |
1379 | return event->pmu->nr_addr_filters; | |
1380 | } | |
1381 | ||
1382 | /* | |
1383 | * An inherited event uses parent's filters | |
1384 | */ | |
1385 | static inline struct perf_addr_filters_head * | |
1386 | perf_event_addr_filters(struct perf_event *event) | |
1387 | { | |
1388 | struct perf_addr_filters_head *ifh = &event->addr_filters; | |
1389 | ||
1390 | if (event->parent) | |
1391 | ifh = &event->parent->addr_filters; | |
1392 | ||
1393 | return ifh; | |
1394 | } | |
1395 | ||
1396 | extern void perf_event_addr_filters_sync(struct perf_event *event); | |
1397 | ||
5622f295 | 1398 | extern int perf_output_begin(struct perf_output_handle *handle, |
267fb273 | 1399 | struct perf_sample_data *data, |
a7ac67ea | 1400 | struct perf_event *event, unsigned int size); |
9ecda41a | 1401 | extern int perf_output_begin_forward(struct perf_output_handle *handle, |
267fb273 PZ |
1402 | struct perf_sample_data *data, |
1403 | struct perf_event *event, | |
1404 | unsigned int size); | |
9ecda41a | 1405 | extern int perf_output_begin_backward(struct perf_output_handle *handle, |
267fb273 | 1406 | struct perf_sample_data *data, |
9ecda41a WN |
1407 | struct perf_event *event, |
1408 | unsigned int size); | |
1409 | ||
5622f295 | 1410 | extern void perf_output_end(struct perf_output_handle *handle); |
91d7753a | 1411 | extern unsigned int perf_output_copy(struct perf_output_handle *handle, |
5622f295 | 1412 | const void *buf, unsigned int len); |
5685e0ff JO |
1413 | extern unsigned int perf_output_skip(struct perf_output_handle *handle, |
1414 | unsigned int len); | |
a4faf00d AS |
1415 | extern long perf_output_copy_aux(struct perf_output_handle *aux_handle, |
1416 | struct perf_output_handle *handle, | |
1417 | unsigned long from, unsigned long to); | |
4ed7c92d PZ |
1418 | extern int perf_swevent_get_recursion_context(void); |
1419 | extern void perf_swevent_put_recursion_context(int rctx); | |
ab573844 | 1420 | extern u64 perf_swevent_set_period(struct perf_event *event); |
44234adc FW |
1421 | extern void perf_event_enable(struct perf_event *event); |
1422 | extern void perf_event_disable(struct perf_event *event); | |
fae3fde6 | 1423 | extern void perf_event_disable_local(struct perf_event *event); |
5aab90ce | 1424 | extern void perf_event_disable_inatomic(struct perf_event *event); |
e9d2b064 | 1425 | extern void perf_event_task_tick(void); |
475113d9 | 1426 | extern int perf_event_account_interrupt(struct perf_event *event); |
3ca270fc | 1427 | extern int perf_event_period(struct perf_event *event, u64 value); |
52ba4b0b | 1428 | extern u64 perf_event_pause(struct perf_event *event, bool reset); |
e041e328 | 1429 | #else /* !CONFIG_PERF_EVENTS: */ |
fdc26706 AS |
1430 | static inline void * |
1431 | perf_aux_output_begin(struct perf_output_handle *handle, | |
1432 | struct perf_event *event) { return NULL; } | |
1433 | static inline void | |
f4c0b0aa WD |
1434 | perf_aux_output_end(struct perf_output_handle *handle, unsigned long size) |
1435 | { } | |
fdc26706 AS |
1436 | static inline int |
1437 | perf_aux_output_skip(struct perf_output_handle *handle, | |
1438 | unsigned long size) { return -EINVAL; } | |
1439 | static inline void * | |
1440 | perf_get_aux(struct perf_output_handle *handle) { return NULL; } | |
0793a61d | 1441 | static inline void |
ff303e66 PZ |
1442 | perf_event_task_migrate(struct task_struct *task) { } |
1443 | static inline void | |
ab0cce56 JO |
1444 | perf_event_task_sched_in(struct task_struct *prev, |
1445 | struct task_struct *task) { } | |
1446 | static inline void | |
1447 | perf_event_task_sched_out(struct task_struct *prev, | |
1448 | struct task_struct *next) { } | |
cdd6c482 IM |
1449 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1450 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1451 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1452 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
e03e7ee3 | 1453 | static inline struct file *perf_event_get(unsigned int fd) { return ERR_PTR(-EINVAL); } |
f8d959a5 YS |
1454 | static inline const struct perf_event *perf_get_event(struct file *file) |
1455 | { | |
1456 | return ERR_PTR(-EINVAL); | |
1457 | } | |
ffe8690c KX |
1458 | static inline const struct perf_event_attr *perf_event_attrs(struct perf_event *event) |
1459 | { | |
1460 | return ERR_PTR(-EINVAL); | |
1461 | } | |
7d9285e8 YS |
1462 | static inline int perf_event_read_local(struct perf_event *event, u64 *value, |
1463 | u64 *enabled, u64 *running) | |
f91840a3 AS |
1464 | { |
1465 | return -EINVAL; | |
1466 | } | |
57c0c15b | 1467 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1468 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1469 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
1470 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
1471 | { | |
1472 | return -EINVAL; | |
1473 | } | |
15dbf27c | 1474 | |
925d519a | 1475 | static inline void |
a8b0ca17 | 1476 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1477 | static inline void |
86038c5e PZI |
1478 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) { } |
1479 | static inline void | |
184f412c | 1480 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1481 | |
39447b38 | 1482 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1483 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1484 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1485 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1486 | |
57c0c15b | 1487 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
76193a94 SL |
1488 | |
1489 | typedef int (perf_ksymbol_get_name_f)(char *name, int name_len, void *data); | |
1490 | static inline void perf_event_ksymbol(u16 ksym_type, u64 addr, u32 len, | |
1491 | bool unregister, const char *sym) { } | |
6ee52e2a SL |
1492 | static inline void perf_event_bpf_event(struct bpf_prog *prog, |
1493 | enum perf_bpf_event_type type, | |
1494 | u16 flags) { } | |
e041e328 | 1495 | static inline void perf_event_exec(void) { } |
82b89778 | 1496 | static inline void perf_event_comm(struct task_struct *tsk, bool exec) { } |
e4222673 | 1497 | static inline void perf_event_namespaces(struct task_struct *tsk) { } |
cdd6c482 | 1498 | static inline void perf_event_fork(struct task_struct *tsk) { } |
e17d43b9 AH |
1499 | static inline void perf_event_text_poke(const void *addr, |
1500 | const void *old_bytes, | |
1501 | size_t old_len, | |
1502 | const void *new_bytes, | |
1503 | size_t new_len) { } | |
cdd6c482 | 1504 | static inline void perf_event_init(void) { } |
184f412c | 1505 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1506 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
ab573844 | 1507 | static inline u64 perf_swevent_set_period(struct perf_event *event) { return 0; } |
44234adc FW |
1508 | static inline void perf_event_enable(struct perf_event *event) { } |
1509 | static inline void perf_event_disable(struct perf_event *event) { } | |
500ad2d8 | 1510 | static inline int __perf_event_disable(void *info) { return -1; } |
e9d2b064 | 1511 | static inline void perf_event_task_tick(void) { } |
ffe8690c | 1512 | static inline int perf_event_release_kernel(struct perf_event *event) { return 0; } |
3ca270fc LX |
1513 | static inline int perf_event_period(struct perf_event *event, u64 value) |
1514 | { | |
1515 | return -EINVAL; | |
1516 | } | |
52ba4b0b LX |
1517 | static inline u64 perf_event_pause(struct perf_event *event, bool reset) |
1518 | { | |
1519 | return 0; | |
1520 | } | |
0793a61d TG |
1521 | #endif |
1522 | ||
6c4d3bc9 DR |
1523 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) |
1524 | extern void perf_restore_debug_store(void); | |
1525 | #else | |
1d9d8639 | 1526 | static inline void perf_restore_debug_store(void) { } |
0793a61d TG |
1527 | #endif |
1528 | ||
7e3f977e DB |
1529 | static __always_inline bool perf_raw_frag_last(const struct perf_raw_frag *frag) |
1530 | { | |
1531 | return frag->pad < sizeof(u64); | |
1532 | } | |
1533 | ||
e7e7ee2e | 1534 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1535 | |
2663960c SB |
1536 | struct perf_pmu_events_attr { |
1537 | struct device_attribute attr; | |
1538 | u64 id; | |
3a54aaa0 | 1539 | const char *event_str; |
2663960c SB |
1540 | }; |
1541 | ||
fc07e9f9 AK |
1542 | struct perf_pmu_events_ht_attr { |
1543 | struct device_attribute attr; | |
1544 | u64 id; | |
1545 | const char *event_str_ht; | |
1546 | const char *event_str_noht; | |
1547 | }; | |
1548 | ||
fd979c01 CS |
1549 | ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr, |
1550 | char *page); | |
1551 | ||
2663960c SB |
1552 | #define PMU_EVENT_ATTR(_name, _var, _id, _show) \ |
1553 | static struct perf_pmu_events_attr _var = { \ | |
1554 | .attr = __ATTR(_name, 0444, _show, NULL), \ | |
1555 | .id = _id, \ | |
1556 | }; | |
1557 | ||
f0405b81 CS |
1558 | #define PMU_EVENT_ATTR_STRING(_name, _var, _str) \ |
1559 | static struct perf_pmu_events_attr _var = { \ | |
1560 | .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL), \ | |
1561 | .id = 0, \ | |
1562 | .event_str = _str, \ | |
1563 | }; | |
1564 | ||
641cc938 JO |
1565 | #define PMU_FORMAT_ATTR(_name, _format) \ |
1566 | static ssize_t \ | |
1567 | _name##_show(struct device *dev, \ | |
1568 | struct device_attribute *attr, \ | |
1569 | char *page) \ | |
1570 | { \ | |
1571 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
1572 | return sprintf(page, _format "\n"); \ | |
1573 | } \ | |
1574 | \ | |
1575 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
1576 | ||
00e16c3d TG |
1577 | /* Performance counter hotplug functions */ |
1578 | #ifdef CONFIG_PERF_EVENTS | |
1579 | int perf_event_init_cpu(unsigned int cpu); | |
1580 | int perf_event_exit_cpu(unsigned int cpu); | |
1581 | #else | |
1582 | #define perf_event_init_cpu NULL | |
1583 | #define perf_event_exit_cpu NULL | |
1584 | #endif | |
1585 | ||
f1ec3a51 BT |
1586 | extern void __weak arch_perf_update_userpage(struct perf_event *event, |
1587 | struct perf_event_mmap_page *userpg, | |
1588 | u64 now); | |
1589 | ||
51b646b2 PZ |
1590 | #ifdef CONFIG_MMU |
1591 | extern __weak u64 arch_perf_get_page_size(struct mm_struct *mm, unsigned long addr); | |
1592 | #endif | |
1593 | ||
cdd6c482 | 1594 | #endif /* _LINUX_PERF_EVENT_H */ |