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Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c IM |
4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
5 | * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar | |
6 | * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
b8e83514 | 34 | |
a308444c | 35 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 36 | }; |
6c594c21 | 37 | |
b8e83514 | 38 | /* |
cdd6c482 IM |
39 | * Generalized performance event event_id types, used by the |
40 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 41 | * syscall: |
b8e83514 | 42 | */ |
1c432d89 | 43 | enum perf_hw_id { |
9f66a381 | 44 | /* |
b8e83514 | 45 | * Common hardware events, generalized by the kernel: |
9f66a381 | 46 | */ |
f4dbfa8f PZ |
47 | PERF_COUNT_HW_CPU_CYCLES = 0, |
48 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
49 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
50 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
51 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
52 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
53 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
54 | ||
a308444c | 55 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 56 | }; |
e077df4f | 57 | |
8326f44d | 58 | /* |
cdd6c482 | 59 | * Generalized hardware cache events: |
8326f44d | 60 | * |
8be6e8f3 | 61 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x |
8326f44d IM |
62 | * { read, write, prefetch } x |
63 | * { accesses, misses } | |
64 | */ | |
1c432d89 | 65 | enum perf_hw_cache_id { |
a308444c IM |
66 | PERF_COUNT_HW_CACHE_L1D = 0, |
67 | PERF_COUNT_HW_CACHE_L1I = 1, | |
68 | PERF_COUNT_HW_CACHE_LL = 2, | |
69 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
70 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
71 | PERF_COUNT_HW_CACHE_BPU = 5, | |
72 | ||
73 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
74 | }; |
75 | ||
1c432d89 | 76 | enum perf_hw_cache_op_id { |
a308444c IM |
77 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
78 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
79 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 80 | |
a308444c | 81 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
82 | }; |
83 | ||
1c432d89 PZ |
84 | enum perf_hw_cache_op_result_id { |
85 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
86 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 87 | |
a308444c | 88 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
89 | }; |
90 | ||
b8e83514 | 91 | /* |
cdd6c482 IM |
92 | * Special "software" events provided by the kernel, even if the hardware |
93 | * does not support performance events. These events measure various | |
b8e83514 PZ |
94 | * physical and sw events of the kernel (and allow the profiling of them as |
95 | * well): | |
96 | */ | |
1c432d89 | 97 | enum perf_sw_ids { |
a308444c IM |
98 | PERF_COUNT_SW_CPU_CLOCK = 0, |
99 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
100 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
101 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
102 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
103 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
104 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
105 | ||
106 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
107 | }; |
108 | ||
8a057d84 | 109 | /* |
0d48696f | 110 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
111 | * in the overflow packets. |
112 | */ | |
cdd6c482 | 113 | enum perf_event_sample_format { |
a308444c IM |
114 | PERF_SAMPLE_IP = 1U << 0, |
115 | PERF_SAMPLE_TID = 1U << 1, | |
116 | PERF_SAMPLE_TIME = 1U << 2, | |
117 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 118 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
119 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
120 | PERF_SAMPLE_ID = 1U << 6, | |
121 | PERF_SAMPLE_CPU = 1U << 7, | |
122 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 123 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 124 | PERF_SAMPLE_RAW = 1U << 10, |
974802ea | 125 | |
f413cdb8 | 126 | PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ |
8a057d84 PZ |
127 | }; |
128 | ||
53cfbf59 | 129 | /* |
cdd6c482 | 130 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
131 | * as specified by attr.read_format: |
132 | * | |
133 | * struct read_format { | |
57c0c15b IM |
134 | * { u64 value; |
135 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
136 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
137 | * { u64 id; } && PERF_FORMAT_ID | |
138 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 139 | * |
57c0c15b IM |
140 | * { u64 nr; |
141 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
142 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
143 | * { u64 value; | |
144 | * { u64 id; } && PERF_FORMAT_ID | |
145 | * } cntr[nr]; | |
146 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 147 | * }; |
53cfbf59 | 148 | */ |
cdd6c482 | 149 | enum perf_event_read_format { |
a308444c IM |
150 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
151 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
152 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 153 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 154 | |
57c0c15b | 155 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
156 | }; |
157 | ||
974802ea PZ |
158 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
159 | ||
9f66a381 | 160 | /* |
cdd6c482 | 161 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 162 | */ |
cdd6c482 | 163 | struct perf_event_attr { |
974802ea | 164 | |
f4a2deb4 | 165 | /* |
a21ca2ca IM |
166 | * Major type: hardware/software/tracepoint/etc. |
167 | */ | |
168 | __u32 type; | |
974802ea PZ |
169 | |
170 | /* | |
171 | * Size of the attr structure, for fwd/bwd compat. | |
172 | */ | |
173 | __u32 size; | |
a21ca2ca IM |
174 | |
175 | /* | |
176 | * Type specific configuration information. | |
f4a2deb4 PZ |
177 | */ |
178 | __u64 config; | |
9f66a381 | 179 | |
60db5e09 | 180 | union { |
b23f3325 PZ |
181 | __u64 sample_period; |
182 | __u64 sample_freq; | |
60db5e09 PZ |
183 | }; |
184 | ||
b23f3325 PZ |
185 | __u64 sample_type; |
186 | __u64 read_format; | |
9f66a381 | 187 | |
2743a5b0 | 188 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
189 | inherit : 1, /* children inherit it */ |
190 | pinned : 1, /* must always be on PMU */ | |
191 | exclusive : 1, /* only group on PMU */ | |
192 | exclude_user : 1, /* don't count user */ | |
193 | exclude_kernel : 1, /* ditto kernel */ | |
194 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 195 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 196 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 197 | comm : 1, /* include comm data */ |
60db5e09 | 198 | freq : 1, /* use freq, not period */ |
bfbd3381 | 199 | inherit_stat : 1, /* per task counts */ |
57e7986e | 200 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 201 | task : 1, /* trace fork/exit */ |
2667de81 | 202 | watermark : 1, /* wakeup_watermark */ |
0475f9ea | 203 | |
2667de81 | 204 | __reserved_1 : 49; |
2743a5b0 | 205 | |
2667de81 PZ |
206 | union { |
207 | __u32 wakeup_events; /* wakeup every n events */ | |
208 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
209 | }; | |
974802ea | 210 | __u32 __reserved_2; |
9f66a381 | 211 | |
974802ea | 212 | __u64 __reserved_3; |
eab656ae TG |
213 | }; |
214 | ||
d859e29f | 215 | /* |
cdd6c482 | 216 | * Ioctls that can be done on a perf event fd: |
d859e29f | 217 | */ |
cdd6c482 | 218 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
219 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
220 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 IM |
221 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
222 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, u64) | |
223 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) | |
224 | ||
225 | enum perf_event_ioc_flags { | |
3df5edad PZ |
226 | PERF_IOC_FLAG_GROUP = 1U << 0, |
227 | }; | |
d859e29f | 228 | |
37d81828 PM |
229 | /* |
230 | * Structure of the page that can be mapped via mmap | |
231 | */ | |
cdd6c482 | 232 | struct perf_event_mmap_page { |
37d81828 PM |
233 | __u32 version; /* version number of this structure */ |
234 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
235 | |
236 | /* | |
cdd6c482 | 237 | * Bits needed to read the hw events in user-space. |
38ff667b | 238 | * |
92f22a38 PZ |
239 | * u32 seq; |
240 | * s64 count; | |
38ff667b | 241 | * |
a2e87d06 PZ |
242 | * do { |
243 | * seq = pc->lock; | |
38ff667b | 244 | * |
a2e87d06 PZ |
245 | * barrier() |
246 | * if (pc->index) { | |
247 | * count = pmc_read(pc->index - 1); | |
248 | * count += pc->offset; | |
249 | * } else | |
250 | * goto regular_read; | |
38ff667b | 251 | * |
a2e87d06 PZ |
252 | * barrier(); |
253 | * } while (pc->lock != seq); | |
38ff667b | 254 | * |
92f22a38 PZ |
255 | * NOTE: for obvious reason this only works on self-monitoring |
256 | * processes. | |
38ff667b | 257 | */ |
37d81828 | 258 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
259 | __u32 index; /* hardware event identifier */ |
260 | __s64 offset; /* add to hardware event value */ | |
261 | __u64 time_enabled; /* time event active */ | |
262 | __u64 time_running; /* time event on cpu */ | |
7b732a75 | 263 | |
41f95331 PZ |
264 | /* |
265 | * Hole for extension of the self monitor capabilities | |
266 | */ | |
267 | ||
7f8b4e4e | 268 | __u64 __reserved[123]; /* align to 1k */ |
41f95331 | 269 | |
38ff667b PZ |
270 | /* |
271 | * Control data for the mmap() data buffer. | |
272 | * | |
43a21ea8 PZ |
273 | * User-space reading the @data_head value should issue an rmb(), on |
274 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 275 | * perf_event_wakeup(). |
43a21ea8 PZ |
276 | * |
277 | * When the mapping is PROT_WRITE the @data_tail value should be | |
278 | * written by userspace to reflect the last read data. In this case | |
279 | * the kernel will not over-write unread data. | |
38ff667b | 280 | */ |
8e3747c1 | 281 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 282 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
283 | }; |
284 | ||
cdd6c482 IM |
285 | #define PERF_RECORD_MISC_CPUMODE_MASK (3 << 0) |
286 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) | |
287 | #define PERF_RECORD_MISC_KERNEL (1 << 0) | |
288 | #define PERF_RECORD_MISC_USER (2 << 0) | |
289 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
6fab0192 | 290 | |
5c148194 PZ |
291 | struct perf_event_header { |
292 | __u32 type; | |
6fab0192 PZ |
293 | __u16 misc; |
294 | __u16 size; | |
5c148194 PZ |
295 | }; |
296 | ||
297 | enum perf_event_type { | |
5ed00415 | 298 | |
0c593b34 PZ |
299 | /* |
300 | * The MMAP events record the PROT_EXEC mappings so that we can | |
301 | * correlate userspace IPs to code. They have the following structure: | |
302 | * | |
303 | * struct { | |
0127c3ea | 304 | * struct perf_event_header header; |
0c593b34 | 305 | * |
0127c3ea IM |
306 | * u32 pid, tid; |
307 | * u64 addr; | |
308 | * u64 len; | |
309 | * u64 pgoff; | |
310 | * char filename[]; | |
0c593b34 PZ |
311 | * }; |
312 | */ | |
cdd6c482 | 313 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 314 | |
43a21ea8 PZ |
315 | /* |
316 | * struct { | |
57c0c15b IM |
317 | * struct perf_event_header header; |
318 | * u64 id; | |
319 | * u64 lost; | |
43a21ea8 PZ |
320 | * }; |
321 | */ | |
cdd6c482 | 322 | PERF_RECORD_LOST = 2, |
43a21ea8 | 323 | |
8d1b2d93 PZ |
324 | /* |
325 | * struct { | |
0127c3ea | 326 | * struct perf_event_header header; |
8d1b2d93 | 327 | * |
0127c3ea IM |
328 | * u32 pid, tid; |
329 | * char comm[]; | |
8d1b2d93 PZ |
330 | * }; |
331 | */ | |
cdd6c482 | 332 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 333 | |
9f498cc5 PZ |
334 | /* |
335 | * struct { | |
336 | * struct perf_event_header header; | |
337 | * u32 pid, ppid; | |
338 | * u32 tid, ptid; | |
393b2ad8 | 339 | * u64 time; |
9f498cc5 PZ |
340 | * }; |
341 | */ | |
cdd6c482 | 342 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 343 | |
26b119bc PZ |
344 | /* |
345 | * struct { | |
0127c3ea IM |
346 | * struct perf_event_header header; |
347 | * u64 time; | |
689802b2 | 348 | * u64 id; |
7f453c24 | 349 | * u64 stream_id; |
a78ac325 PZ |
350 | * }; |
351 | */ | |
cdd6c482 IM |
352 | PERF_RECORD_THROTTLE = 5, |
353 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 354 | |
60313ebe PZ |
355 | /* |
356 | * struct { | |
a21ca2ca IM |
357 | * struct perf_event_header header; |
358 | * u32 pid, ppid; | |
9f498cc5 | 359 | * u32 tid, ptid; |
a6f10a2f | 360 | * u64 time; |
60313ebe PZ |
361 | * }; |
362 | */ | |
cdd6c482 | 363 | PERF_RECORD_FORK = 7, |
60313ebe | 364 | |
38b200d6 PZ |
365 | /* |
366 | * struct { | |
367 | * struct perf_event_header header; | |
368 | * u32 pid, tid; | |
3dab77fb PZ |
369 | * |
370 | * struct read_format values; | |
38b200d6 PZ |
371 | * }; |
372 | */ | |
cdd6c482 | 373 | PERF_RECORD_READ = 8, |
38b200d6 | 374 | |
8a057d84 | 375 | /* |
0c593b34 | 376 | * struct { |
0127c3ea | 377 | * struct perf_event_header header; |
0c593b34 | 378 | * |
43a21ea8 PZ |
379 | * { u64 ip; } && PERF_SAMPLE_IP |
380 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
381 | * { u64 time; } && PERF_SAMPLE_TIME | |
382 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 383 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 384 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 385 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 386 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 387 | * |
3dab77fb | 388 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 389 | * |
f9188e02 | 390 | * { u64 nr, |
43a21ea8 | 391 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 392 | * |
57c0c15b IM |
393 | * # |
394 | * # The RAW record below is opaque data wrt the ABI | |
395 | * # | |
396 | * # That is, the ABI doesn't make any promises wrt to | |
397 | * # the stability of its content, it may vary depending | |
398 | * # on event, hardware, kernel version and phase of | |
399 | * # the moon. | |
400 | * # | |
401 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
402 | * # | |
3dab77fb | 403 | * |
a044560c PZ |
404 | * { u32 size; |
405 | * char data[size];}&& PERF_SAMPLE_RAW | |
0c593b34 | 406 | * }; |
8a057d84 | 407 | */ |
cdd6c482 | 408 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 409 | |
cdd6c482 | 410 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
411 | }; |
412 | ||
f9188e02 PZ |
413 | enum perf_callchain_context { |
414 | PERF_CONTEXT_HV = (__u64)-32, | |
415 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
416 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 417 | |
f9188e02 PZ |
418 | PERF_CONTEXT_GUEST = (__u64)-2048, |
419 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
420 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
421 | ||
422 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
423 | }; |
424 | ||
a4be7c27 PZ |
425 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
426 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
427 | ||
f3dfd265 | 428 | #ifdef __KERNEL__ |
9f66a381 | 429 | /* |
f3dfd265 | 430 | * Kernel-internal data types and definitions: |
9f66a381 IM |
431 | */ |
432 | ||
cdd6c482 IM |
433 | #ifdef CONFIG_PERF_EVENTS |
434 | # include <asm/perf_event.h> | |
f3dfd265 PM |
435 | #endif |
436 | ||
437 | #include <linux/list.h> | |
438 | #include <linux/mutex.h> | |
439 | #include <linux/rculist.h> | |
440 | #include <linux/rcupdate.h> | |
441 | #include <linux/spinlock.h> | |
d6d020e9 | 442 | #include <linux/hrtimer.h> |
3c446b3d | 443 | #include <linux/fs.h> |
709e50cf | 444 | #include <linux/pid_namespace.h> |
906010b2 | 445 | #include <linux/workqueue.h> |
f3dfd265 PM |
446 | #include <asm/atomic.h> |
447 | ||
f9188e02 PZ |
448 | #define PERF_MAX_STACK_DEPTH 255 |
449 | ||
450 | struct perf_callchain_entry { | |
451 | __u64 nr; | |
452 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
453 | }; | |
454 | ||
3a43ce68 FW |
455 | struct perf_raw_record { |
456 | u32 size; | |
457 | void *data; | |
f413cdb8 FW |
458 | }; |
459 | ||
f3dfd265 PM |
460 | struct task_struct; |
461 | ||
0793a61d | 462 | /** |
cdd6c482 | 463 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 464 | */ |
cdd6c482 IM |
465 | struct hw_perf_event { |
466 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
467 | union { |
468 | struct { /* hardware */ | |
a308444c IM |
469 | u64 config; |
470 | unsigned long config_base; | |
cdd6c482 | 471 | unsigned long event_base; |
a308444c | 472 | int idx; |
d6d020e9 | 473 | }; |
721a669b SS |
474 | struct { /* software */ |
475 | s64 remaining; | |
a308444c | 476 | struct hrtimer hrtimer; |
d6d020e9 PZ |
477 | }; |
478 | }; | |
ee06094f | 479 | atomic64_t prev_count; |
b23f3325 | 480 | u64 sample_period; |
9e350de3 | 481 | u64 last_period; |
ee06094f | 482 | atomic64_t period_left; |
60db5e09 | 483 | u64 interrupts; |
6a24ed6c PZ |
484 | |
485 | u64 freq_count; | |
486 | u64 freq_interrupts; | |
bd2b5b12 | 487 | u64 freq_stamp; |
ee06094f | 488 | #endif |
0793a61d TG |
489 | }; |
490 | ||
cdd6c482 | 491 | struct perf_event; |
621a01ea IM |
492 | |
493 | /** | |
4aeb0b42 | 494 | * struct pmu - generic performance monitoring unit |
621a01ea | 495 | */ |
4aeb0b42 | 496 | struct pmu { |
cdd6c482 IM |
497 | int (*enable) (struct perf_event *event); |
498 | void (*disable) (struct perf_event *event); | |
499 | void (*read) (struct perf_event *event); | |
500 | void (*unthrottle) (struct perf_event *event); | |
621a01ea IM |
501 | }; |
502 | ||
6a930700 | 503 | /** |
cdd6c482 | 504 | * enum perf_event_active_state - the states of a event |
6a930700 | 505 | */ |
cdd6c482 | 506 | enum perf_event_active_state { |
57c0c15b | 507 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
508 | PERF_EVENT_STATE_OFF = -1, |
509 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 510 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
511 | }; |
512 | ||
9b51f66d IM |
513 | struct file; |
514 | ||
7b732a75 PZ |
515 | struct perf_mmap_data { |
516 | struct rcu_head rcu_head; | |
906010b2 PZ |
517 | #ifdef CONFIG_PERF_USE_VMALLOC |
518 | struct work_struct work; | |
519 | #endif | |
520 | int data_order; | |
8740f941 | 521 | int nr_pages; /* nr of data pages */ |
43a21ea8 | 522 | int writable; /* are we writable */ |
c5078f78 | 523 | int nr_locked; /* nr pages mlocked */ |
8740f941 | 524 | |
c33a0bc4 | 525 | atomic_t poll; /* POLL_ for wakeups */ |
cdd6c482 | 526 | atomic_t events; /* event_id limit */ |
8740f941 | 527 | |
8e3747c1 PZ |
528 | atomic_long_t head; /* write position */ |
529 | atomic_long_t done_head; /* completed head */ | |
530 | ||
c33a0bc4 | 531 | atomic_t lock; /* concurrent writes */ |
c66de4a5 | 532 | atomic_t wakeup; /* needs a wakeup */ |
43a21ea8 | 533 | atomic_t lost; /* nr records lost */ |
c66de4a5 | 534 | |
2667de81 PZ |
535 | long watermark; /* wakeup watermark */ |
536 | ||
57c0c15b | 537 | struct perf_event_mmap_page *user_page; |
0127c3ea | 538 | void *data_pages[0]; |
7b732a75 PZ |
539 | }; |
540 | ||
671dec5d PZ |
541 | struct perf_pending_entry { |
542 | struct perf_pending_entry *next; | |
543 | void (*func)(struct perf_pending_entry *); | |
925d519a PZ |
544 | }; |
545 | ||
0793a61d | 546 | /** |
cdd6c482 | 547 | * struct perf_event - performance event kernel representation: |
0793a61d | 548 | */ |
cdd6c482 IM |
549 | struct perf_event { |
550 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 551 | struct list_head group_entry; |
592903cd | 552 | struct list_head event_entry; |
04289bb9 | 553 | struct list_head sibling_list; |
0127c3ea | 554 | int nr_siblings; |
cdd6c482 IM |
555 | struct perf_event *group_leader; |
556 | struct perf_event *output; | |
4aeb0b42 | 557 | const struct pmu *pmu; |
04289bb9 | 558 | |
cdd6c482 | 559 | enum perf_event_active_state state; |
0793a61d | 560 | atomic64_t count; |
ee06094f | 561 | |
53cfbf59 | 562 | /* |
cdd6c482 | 563 | * These are the total time in nanoseconds that the event |
53cfbf59 | 564 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 565 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
566 | * and running (scheduled onto the CPU), respectively. |
567 | * | |
568 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 569 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
570 | */ |
571 | u64 total_time_enabled; | |
572 | u64 total_time_running; | |
573 | ||
574 | /* | |
575 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 576 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
577 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
578 | * in time. | |
cdd6c482 IM |
579 | * tstamp_enabled: the notional time when the event was enabled |
580 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 581 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 582 | * event was scheduled off. |
53cfbf59 PM |
583 | */ |
584 | u64 tstamp_enabled; | |
585 | u64 tstamp_running; | |
586 | u64 tstamp_stopped; | |
587 | ||
cdd6c482 IM |
588 | struct perf_event_attr attr; |
589 | struct hw_perf_event hw; | |
0793a61d | 590 | |
cdd6c482 | 591 | struct perf_event_context *ctx; |
9b51f66d | 592 | struct file *filp; |
0793a61d | 593 | |
53cfbf59 PM |
594 | /* |
595 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 596 | * events have been enabled and running, respectively. |
53cfbf59 PM |
597 | */ |
598 | atomic64_t child_total_time_enabled; | |
599 | atomic64_t child_total_time_running; | |
600 | ||
0793a61d | 601 | /* |
d859e29f | 602 | * Protect attach/detach and child_list: |
0793a61d | 603 | */ |
fccc714b PZ |
604 | struct mutex child_mutex; |
605 | struct list_head child_list; | |
cdd6c482 | 606 | struct perf_event *parent; |
0793a61d TG |
607 | |
608 | int oncpu; | |
609 | int cpu; | |
610 | ||
082ff5a2 PZ |
611 | struct list_head owner_entry; |
612 | struct task_struct *owner; | |
613 | ||
7b732a75 PZ |
614 | /* mmap bits */ |
615 | struct mutex mmap_mutex; | |
616 | atomic_t mmap_count; | |
617 | struct perf_mmap_data *data; | |
37d81828 | 618 | |
7b732a75 | 619 | /* poll related */ |
0793a61d | 620 | wait_queue_head_t waitq; |
3c446b3d | 621 | struct fasync_struct *fasync; |
79f14641 PZ |
622 | |
623 | /* delayed work for NMIs and such */ | |
624 | int pending_wakeup; | |
4c9e2542 | 625 | int pending_kill; |
79f14641 | 626 | int pending_disable; |
671dec5d | 627 | struct perf_pending_entry pending; |
592903cd | 628 | |
79f14641 PZ |
629 | atomic_t event_limit; |
630 | ||
cdd6c482 | 631 | void (*destroy)(struct perf_event *); |
592903cd | 632 | struct rcu_head rcu_head; |
709e50cf PZ |
633 | |
634 | struct pid_namespace *ns; | |
8e5799b1 | 635 | u64 id; |
ee06094f | 636 | #endif |
0793a61d TG |
637 | }; |
638 | ||
639 | /** | |
cdd6c482 | 640 | * struct perf_event_context - event context structure |
0793a61d | 641 | * |
cdd6c482 | 642 | * Used as a container for task events and CPU events as well: |
0793a61d | 643 | */ |
cdd6c482 | 644 | struct perf_event_context { |
0793a61d | 645 | /* |
cdd6c482 | 646 | * Protect the states of the events in the list, |
d859e29f | 647 | * nr_active, and the list: |
0793a61d | 648 | */ |
a308444c | 649 | spinlock_t lock; |
d859e29f | 650 | /* |
cdd6c482 | 651 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
652 | * is sufficient to ensure the list doesn't change; to change |
653 | * the list you need to lock both the mutex and the spinlock. | |
654 | */ | |
a308444c | 655 | struct mutex mutex; |
04289bb9 | 656 | |
65abc865 | 657 | struct list_head group_list; |
a308444c | 658 | struct list_head event_list; |
cdd6c482 | 659 | int nr_events; |
a308444c IM |
660 | int nr_active; |
661 | int is_active; | |
bfbd3381 | 662 | int nr_stat; |
a308444c IM |
663 | atomic_t refcount; |
664 | struct task_struct *task; | |
53cfbf59 PM |
665 | |
666 | /* | |
4af4998b | 667 | * Context clock, runs when context enabled. |
53cfbf59 | 668 | */ |
a308444c IM |
669 | u64 time; |
670 | u64 timestamp; | |
564c2b21 PM |
671 | |
672 | /* | |
673 | * These fields let us detect when two contexts have both | |
674 | * been cloned (inherited) from a common ancestor. | |
675 | */ | |
cdd6c482 | 676 | struct perf_event_context *parent_ctx; |
a308444c IM |
677 | u64 parent_gen; |
678 | u64 generation; | |
679 | int pin_count; | |
680 | struct rcu_head rcu_head; | |
0793a61d TG |
681 | }; |
682 | ||
683 | /** | |
cdd6c482 | 684 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
685 | */ |
686 | struct perf_cpu_context { | |
cdd6c482 IM |
687 | struct perf_event_context ctx; |
688 | struct perf_event_context *task_ctx; | |
0793a61d TG |
689 | int active_oncpu; |
690 | int max_pertask; | |
3b6f9e5c | 691 | int exclusive; |
96f6d444 PZ |
692 | |
693 | /* | |
694 | * Recursion avoidance: | |
695 | * | |
696 | * task, softirq, irq, nmi context | |
697 | */ | |
22a4f650 | 698 | int recursion[4]; |
0793a61d TG |
699 | }; |
700 | ||
5622f295 | 701 | struct perf_output_handle { |
57c0c15b IM |
702 | struct perf_event *event; |
703 | struct perf_mmap_data *data; | |
704 | unsigned long head; | |
705 | unsigned long offset; | |
706 | int nmi; | |
707 | int sample; | |
708 | int locked; | |
709 | unsigned long flags; | |
5622f295 MM |
710 | }; |
711 | ||
cdd6c482 | 712 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 713 | |
0793a61d TG |
714 | /* |
715 | * Set by architecture code: | |
716 | */ | |
cdd6c482 | 717 | extern int perf_max_events; |
0793a61d | 718 | |
cdd6c482 | 719 | extern const struct pmu *hw_perf_event_init(struct perf_event *event); |
621a01ea | 720 | |
cdd6c482 IM |
721 | extern void perf_event_task_sched_in(struct task_struct *task, int cpu); |
722 | extern void perf_event_task_sched_out(struct task_struct *task, | |
564c2b21 | 723 | struct task_struct *next, int cpu); |
cdd6c482 IM |
724 | extern void perf_event_task_tick(struct task_struct *task, int cpu); |
725 | extern int perf_event_init_task(struct task_struct *child); | |
726 | extern void perf_event_exit_task(struct task_struct *child); | |
727 | extern void perf_event_free_task(struct task_struct *task); | |
728 | extern void set_perf_event_pending(void); | |
729 | extern void perf_event_do_pending(void); | |
730 | extern void perf_event_print_debug(void); | |
9e35ad38 PZ |
731 | extern void __perf_disable(void); |
732 | extern bool __perf_enable(void); | |
733 | extern void perf_disable(void); | |
734 | extern void perf_enable(void); | |
cdd6c482 IM |
735 | extern int perf_event_task_disable(void); |
736 | extern int perf_event_task_enable(void); | |
737 | extern int hw_perf_group_sched_in(struct perf_event *group_leader, | |
3cbed429 | 738 | struct perf_cpu_context *cpuctx, |
cdd6c482 IM |
739 | struct perf_event_context *ctx, int cpu); |
740 | extern void perf_event_update_userpage(struct perf_event *event); | |
5c92d124 | 741 | |
df1a132b | 742 | struct perf_sample_data { |
5622f295 MM |
743 | u64 type; |
744 | ||
745 | u64 ip; | |
746 | struct { | |
747 | u32 pid; | |
748 | u32 tid; | |
749 | } tid_entry; | |
750 | u64 time; | |
a308444c | 751 | u64 addr; |
5622f295 MM |
752 | u64 id; |
753 | u64 stream_id; | |
754 | struct { | |
755 | u32 cpu; | |
756 | u32 reserved; | |
757 | } cpu_entry; | |
a308444c | 758 | u64 period; |
5622f295 | 759 | struct perf_callchain_entry *callchain; |
3a43ce68 | 760 | struct perf_raw_record *raw; |
df1a132b PZ |
761 | }; |
762 | ||
5622f295 MM |
763 | extern void perf_output_sample(struct perf_output_handle *handle, |
764 | struct perf_event_header *header, | |
765 | struct perf_sample_data *data, | |
cdd6c482 | 766 | struct perf_event *event); |
5622f295 MM |
767 | extern void perf_prepare_sample(struct perf_event_header *header, |
768 | struct perf_sample_data *data, | |
cdd6c482 | 769 | struct perf_event *event, |
5622f295 MM |
770 | struct pt_regs *regs); |
771 | ||
cdd6c482 | 772 | extern int perf_event_overflow(struct perf_event *event, int nmi, |
5622f295 MM |
773 | struct perf_sample_data *data, |
774 | struct pt_regs *regs); | |
df1a132b | 775 | |
3b6f9e5c | 776 | /* |
cdd6c482 | 777 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 778 | */ |
cdd6c482 | 779 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 780 | { |
cdd6c482 IM |
781 | return (event->attr.type != PERF_TYPE_RAW) && |
782 | (event->attr.type != PERF_TYPE_HARDWARE) && | |
783 | (event->attr.type != PERF_TYPE_HW_CACHE); | |
3b6f9e5c PM |
784 | } |
785 | ||
cdd6c482 | 786 | extern atomic_t perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 787 | |
cdd6c482 | 788 | extern void __perf_sw_event(u32, u64, int, struct pt_regs *, u64); |
f29ac756 PZ |
789 | |
790 | static inline void | |
cdd6c482 | 791 | perf_sw_event(u32 event_id, u64 nr, int nmi, struct pt_regs *regs, u64 addr) |
f29ac756 | 792 | { |
cdd6c482 IM |
793 | if (atomic_read(&perf_swevent_enabled[event_id])) |
794 | __perf_sw_event(event_id, nr, nmi, regs, addr); | |
f29ac756 | 795 | } |
15dbf27c | 796 | |
cdd6c482 | 797 | extern void __perf_event_mmap(struct vm_area_struct *vma); |
089dd79d | 798 | |
cdd6c482 | 799 | static inline void perf_event_mmap(struct vm_area_struct *vma) |
089dd79d PZ |
800 | { |
801 | if (vma->vm_flags & VM_EXEC) | |
cdd6c482 | 802 | __perf_event_mmap(vma); |
089dd79d | 803 | } |
0a4a9391 | 804 | |
cdd6c482 IM |
805 | extern void perf_event_comm(struct task_struct *tsk); |
806 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 807 | |
394ee076 PZ |
808 | extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs); |
809 | ||
cdd6c482 IM |
810 | extern int sysctl_perf_event_paranoid; |
811 | extern int sysctl_perf_event_mlock; | |
812 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 813 | |
cdd6c482 IM |
814 | extern void perf_event_init(void); |
815 | extern void perf_tp_event(int event_id, u64 addr, u64 count, | |
f4b5ffcc | 816 | void *record, int entry_size); |
0d905bca | 817 | |
9d23a90a | 818 | #ifndef perf_misc_flags |
cdd6c482 IM |
819 | #define perf_misc_flags(regs) (user_mode(regs) ? PERF_RECORD_MISC_USER : \ |
820 | PERF_RECORD_MISC_KERNEL) | |
9d23a90a PM |
821 | #define perf_instruction_pointer(regs) instruction_pointer(regs) |
822 | #endif | |
823 | ||
5622f295 | 824 | extern int perf_output_begin(struct perf_output_handle *handle, |
cdd6c482 | 825 | struct perf_event *event, unsigned int size, |
5622f295 MM |
826 | int nmi, int sample); |
827 | extern void perf_output_end(struct perf_output_handle *handle); | |
828 | extern void perf_output_copy(struct perf_output_handle *handle, | |
829 | const void *buf, unsigned int len); | |
0793a61d TG |
830 | #else |
831 | static inline void | |
cdd6c482 | 832 | perf_event_task_sched_in(struct task_struct *task, int cpu) { } |
0793a61d | 833 | static inline void |
cdd6c482 | 834 | perf_event_task_sched_out(struct task_struct *task, |
910431c7 | 835 | struct task_struct *next, int cpu) { } |
0793a61d | 836 | static inline void |
57c0c15b | 837 | perf_event_task_tick(struct task_struct *task, int cpu) { } |
cdd6c482 IM |
838 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
839 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
840 | static inline void perf_event_free_task(struct task_struct *task) { } | |
57c0c15b IM |
841 | static inline void perf_event_do_pending(void) { } |
842 | static inline void perf_event_print_debug(void) { } | |
9e35ad38 PZ |
843 | static inline void perf_disable(void) { } |
844 | static inline void perf_enable(void) { } | |
57c0c15b IM |
845 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
846 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
15dbf27c | 847 | |
925d519a | 848 | static inline void |
cdd6c482 | 849 | perf_sw_event(u32 event_id, u64 nr, int nmi, |
78f13e95 | 850 | struct pt_regs *regs, u64 addr) { } |
0a4a9391 | 851 | |
57c0c15b | 852 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
853 | static inline void perf_event_comm(struct task_struct *tsk) { } |
854 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
855 | static inline void perf_event_init(void) { } | |
5622f295 | 856 | |
0793a61d TG |
857 | #endif |
858 | ||
5622f295 MM |
859 | #define perf_output_put(handle, x) \ |
860 | perf_output_copy((handle), &(x), sizeof(x)) | |
861 | ||
f3dfd265 | 862 | #endif /* __KERNEL__ */ |
cdd6c482 | 863 | #endif /* _LINUX_PERF_EVENT_H */ |