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Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c IM |
4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
5 | * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar | |
6 | * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
55 | ||
a308444c | 56 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 57 | }; |
e077df4f | 58 | |
8326f44d | 59 | /* |
cdd6c482 | 60 | * Generalized hardware cache events: |
8326f44d | 61 | * |
8be6e8f3 | 62 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x |
8326f44d IM |
63 | * { read, write, prefetch } x |
64 | * { accesses, misses } | |
65 | */ | |
1c432d89 | 66 | enum perf_hw_cache_id { |
a308444c IM |
67 | PERF_COUNT_HW_CACHE_L1D = 0, |
68 | PERF_COUNT_HW_CACHE_L1I = 1, | |
69 | PERF_COUNT_HW_CACHE_LL = 2, | |
70 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
71 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
72 | PERF_COUNT_HW_CACHE_BPU = 5, | |
73 | ||
74 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
75 | }; |
76 | ||
1c432d89 | 77 | enum perf_hw_cache_op_id { |
a308444c IM |
78 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
79 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
80 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 81 | |
a308444c | 82 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
83 | }; |
84 | ||
1c432d89 PZ |
85 | enum perf_hw_cache_op_result_id { |
86 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
87 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 88 | |
a308444c | 89 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
90 | }; |
91 | ||
b8e83514 | 92 | /* |
cdd6c482 IM |
93 | * Special "software" events provided by the kernel, even if the hardware |
94 | * does not support performance events. These events measure various | |
b8e83514 PZ |
95 | * physical and sw events of the kernel (and allow the profiling of them as |
96 | * well): | |
97 | */ | |
1c432d89 | 98 | enum perf_sw_ids { |
a308444c IM |
99 | PERF_COUNT_SW_CPU_CLOCK = 0, |
100 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
101 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
102 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
103 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
104 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
105 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
106 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
107 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
108 | |
109 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
110 | }; |
111 | ||
8a057d84 | 112 | /* |
0d48696f | 113 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
114 | * in the overflow packets. |
115 | */ | |
cdd6c482 | 116 | enum perf_event_sample_format { |
a308444c IM |
117 | PERF_SAMPLE_IP = 1U << 0, |
118 | PERF_SAMPLE_TID = 1U << 1, | |
119 | PERF_SAMPLE_TIME = 1U << 2, | |
120 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 121 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
122 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
123 | PERF_SAMPLE_ID = 1U << 6, | |
124 | PERF_SAMPLE_CPU = 1U << 7, | |
125 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 126 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 127 | PERF_SAMPLE_RAW = 1U << 10, |
974802ea | 128 | |
f413cdb8 | 129 | PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ |
8a057d84 PZ |
130 | }; |
131 | ||
53cfbf59 | 132 | /* |
cdd6c482 | 133 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
134 | * as specified by attr.read_format: |
135 | * | |
136 | * struct read_format { | |
57c0c15b IM |
137 | * { u64 value; |
138 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
139 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
140 | * { u64 id; } && PERF_FORMAT_ID | |
141 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 142 | * |
57c0c15b IM |
143 | * { u64 nr; |
144 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
145 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
146 | * { u64 value; | |
147 | * { u64 id; } && PERF_FORMAT_ID | |
148 | * } cntr[nr]; | |
149 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 150 | * }; |
53cfbf59 | 151 | */ |
cdd6c482 | 152 | enum perf_event_read_format { |
a308444c IM |
153 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
154 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
155 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 156 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 157 | |
57c0c15b | 158 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
159 | }; |
160 | ||
974802ea PZ |
161 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
162 | ||
9f66a381 | 163 | /* |
cdd6c482 | 164 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 165 | */ |
cdd6c482 | 166 | struct perf_event_attr { |
974802ea | 167 | |
f4a2deb4 | 168 | /* |
a21ca2ca IM |
169 | * Major type: hardware/software/tracepoint/etc. |
170 | */ | |
171 | __u32 type; | |
974802ea PZ |
172 | |
173 | /* | |
174 | * Size of the attr structure, for fwd/bwd compat. | |
175 | */ | |
176 | __u32 size; | |
a21ca2ca IM |
177 | |
178 | /* | |
179 | * Type specific configuration information. | |
f4a2deb4 PZ |
180 | */ |
181 | __u64 config; | |
9f66a381 | 182 | |
60db5e09 | 183 | union { |
b23f3325 PZ |
184 | __u64 sample_period; |
185 | __u64 sample_freq; | |
60db5e09 PZ |
186 | }; |
187 | ||
b23f3325 PZ |
188 | __u64 sample_type; |
189 | __u64 read_format; | |
9f66a381 | 190 | |
2743a5b0 | 191 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
192 | inherit : 1, /* children inherit it */ |
193 | pinned : 1, /* must always be on PMU */ | |
194 | exclusive : 1, /* only group on PMU */ | |
195 | exclude_user : 1, /* don't count user */ | |
196 | exclude_kernel : 1, /* ditto kernel */ | |
197 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 198 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 199 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 200 | comm : 1, /* include comm data */ |
60db5e09 | 201 | freq : 1, /* use freq, not period */ |
bfbd3381 | 202 | inherit_stat : 1, /* per task counts */ |
57e7986e | 203 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 204 | task : 1, /* trace fork/exit */ |
2667de81 | 205 | watermark : 1, /* wakeup_watermark */ |
0475f9ea | 206 | |
2667de81 | 207 | __reserved_1 : 49; |
2743a5b0 | 208 | |
2667de81 PZ |
209 | union { |
210 | __u32 wakeup_events; /* wakeup every n events */ | |
211 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
212 | }; | |
24f1e32c | 213 | |
f13c12c6 | 214 | __u32 bp_type; |
cd757645 MS |
215 | __u64 bp_addr; |
216 | __u64 bp_len; | |
eab656ae TG |
217 | }; |
218 | ||
d859e29f | 219 | /* |
cdd6c482 | 220 | * Ioctls that can be done on a perf event fd: |
d859e29f | 221 | */ |
cdd6c482 | 222 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
223 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
224 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 225 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 226 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 227 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 228 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
229 | |
230 | enum perf_event_ioc_flags { | |
3df5edad PZ |
231 | PERF_IOC_FLAG_GROUP = 1U << 0, |
232 | }; | |
d859e29f | 233 | |
37d81828 PM |
234 | /* |
235 | * Structure of the page that can be mapped via mmap | |
236 | */ | |
cdd6c482 | 237 | struct perf_event_mmap_page { |
37d81828 PM |
238 | __u32 version; /* version number of this structure */ |
239 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
240 | |
241 | /* | |
cdd6c482 | 242 | * Bits needed to read the hw events in user-space. |
38ff667b | 243 | * |
92f22a38 PZ |
244 | * u32 seq; |
245 | * s64 count; | |
38ff667b | 246 | * |
a2e87d06 PZ |
247 | * do { |
248 | * seq = pc->lock; | |
38ff667b | 249 | * |
a2e87d06 PZ |
250 | * barrier() |
251 | * if (pc->index) { | |
252 | * count = pmc_read(pc->index - 1); | |
253 | * count += pc->offset; | |
254 | * } else | |
255 | * goto regular_read; | |
38ff667b | 256 | * |
a2e87d06 PZ |
257 | * barrier(); |
258 | * } while (pc->lock != seq); | |
38ff667b | 259 | * |
92f22a38 PZ |
260 | * NOTE: for obvious reason this only works on self-monitoring |
261 | * processes. | |
38ff667b | 262 | */ |
37d81828 | 263 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
264 | __u32 index; /* hardware event identifier */ |
265 | __s64 offset; /* add to hardware event value */ | |
266 | __u64 time_enabled; /* time event active */ | |
267 | __u64 time_running; /* time event on cpu */ | |
7b732a75 | 268 | |
41f95331 PZ |
269 | /* |
270 | * Hole for extension of the self monitor capabilities | |
271 | */ | |
272 | ||
7f8b4e4e | 273 | __u64 __reserved[123]; /* align to 1k */ |
41f95331 | 274 | |
38ff667b PZ |
275 | /* |
276 | * Control data for the mmap() data buffer. | |
277 | * | |
43a21ea8 PZ |
278 | * User-space reading the @data_head value should issue an rmb(), on |
279 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 280 | * perf_event_wakeup(). |
43a21ea8 PZ |
281 | * |
282 | * When the mapping is PROT_WRITE the @data_tail value should be | |
283 | * written by userspace to reflect the last read data. In this case | |
284 | * the kernel will not over-write unread data. | |
38ff667b | 285 | */ |
8e3747c1 | 286 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 287 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
288 | }; |
289 | ||
cdd6c482 | 290 | #define PERF_RECORD_MISC_CPUMODE_MASK (3 << 0) |
184f412c | 291 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) |
cdd6c482 IM |
292 | #define PERF_RECORD_MISC_KERNEL (1 << 0) |
293 | #define PERF_RECORD_MISC_USER (2 << 0) | |
294 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
6fab0192 | 295 | |
5c148194 PZ |
296 | struct perf_event_header { |
297 | __u32 type; | |
6fab0192 PZ |
298 | __u16 misc; |
299 | __u16 size; | |
5c148194 PZ |
300 | }; |
301 | ||
302 | enum perf_event_type { | |
5ed00415 | 303 | |
0c593b34 PZ |
304 | /* |
305 | * The MMAP events record the PROT_EXEC mappings so that we can | |
306 | * correlate userspace IPs to code. They have the following structure: | |
307 | * | |
308 | * struct { | |
0127c3ea | 309 | * struct perf_event_header header; |
0c593b34 | 310 | * |
0127c3ea IM |
311 | * u32 pid, tid; |
312 | * u64 addr; | |
313 | * u64 len; | |
314 | * u64 pgoff; | |
315 | * char filename[]; | |
0c593b34 PZ |
316 | * }; |
317 | */ | |
cdd6c482 | 318 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 319 | |
43a21ea8 PZ |
320 | /* |
321 | * struct { | |
57c0c15b IM |
322 | * struct perf_event_header header; |
323 | * u64 id; | |
324 | * u64 lost; | |
43a21ea8 PZ |
325 | * }; |
326 | */ | |
cdd6c482 | 327 | PERF_RECORD_LOST = 2, |
43a21ea8 | 328 | |
8d1b2d93 PZ |
329 | /* |
330 | * struct { | |
0127c3ea | 331 | * struct perf_event_header header; |
8d1b2d93 | 332 | * |
0127c3ea IM |
333 | * u32 pid, tid; |
334 | * char comm[]; | |
8d1b2d93 PZ |
335 | * }; |
336 | */ | |
cdd6c482 | 337 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 338 | |
9f498cc5 PZ |
339 | /* |
340 | * struct { | |
341 | * struct perf_event_header header; | |
342 | * u32 pid, ppid; | |
343 | * u32 tid, ptid; | |
393b2ad8 | 344 | * u64 time; |
9f498cc5 PZ |
345 | * }; |
346 | */ | |
cdd6c482 | 347 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 348 | |
26b119bc PZ |
349 | /* |
350 | * struct { | |
0127c3ea IM |
351 | * struct perf_event_header header; |
352 | * u64 time; | |
689802b2 | 353 | * u64 id; |
7f453c24 | 354 | * u64 stream_id; |
a78ac325 PZ |
355 | * }; |
356 | */ | |
184f412c IM |
357 | PERF_RECORD_THROTTLE = 5, |
358 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 359 | |
60313ebe PZ |
360 | /* |
361 | * struct { | |
a21ca2ca IM |
362 | * struct perf_event_header header; |
363 | * u32 pid, ppid; | |
9f498cc5 | 364 | * u32 tid, ptid; |
a6f10a2f | 365 | * u64 time; |
60313ebe PZ |
366 | * }; |
367 | */ | |
cdd6c482 | 368 | PERF_RECORD_FORK = 7, |
60313ebe | 369 | |
38b200d6 PZ |
370 | /* |
371 | * struct { | |
184f412c IM |
372 | * struct perf_event_header header; |
373 | * u32 pid, tid; | |
3dab77fb | 374 | * |
184f412c | 375 | * struct read_format values; |
38b200d6 PZ |
376 | * }; |
377 | */ | |
cdd6c482 | 378 | PERF_RECORD_READ = 8, |
38b200d6 | 379 | |
8a057d84 | 380 | /* |
0c593b34 | 381 | * struct { |
0127c3ea | 382 | * struct perf_event_header header; |
0c593b34 | 383 | * |
43a21ea8 PZ |
384 | * { u64 ip; } && PERF_SAMPLE_IP |
385 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
386 | * { u64 time; } && PERF_SAMPLE_TIME | |
387 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 388 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 389 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 390 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 391 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 392 | * |
3dab77fb | 393 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 394 | * |
f9188e02 | 395 | * { u64 nr, |
43a21ea8 | 396 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 397 | * |
57c0c15b IM |
398 | * # |
399 | * # The RAW record below is opaque data wrt the ABI | |
400 | * # | |
401 | * # That is, the ABI doesn't make any promises wrt to | |
402 | * # the stability of its content, it may vary depending | |
403 | * # on event, hardware, kernel version and phase of | |
404 | * # the moon. | |
405 | * # | |
406 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
407 | * # | |
3dab77fb | 408 | * |
a044560c PZ |
409 | * { u32 size; |
410 | * char data[size];}&& PERF_SAMPLE_RAW | |
0c593b34 | 411 | * }; |
8a057d84 | 412 | */ |
184f412c | 413 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 414 | |
cdd6c482 | 415 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
416 | }; |
417 | ||
f9188e02 PZ |
418 | enum perf_callchain_context { |
419 | PERF_CONTEXT_HV = (__u64)-32, | |
420 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
421 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 422 | |
f9188e02 PZ |
423 | PERF_CONTEXT_GUEST = (__u64)-2048, |
424 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
425 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
426 | ||
427 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
428 | }; |
429 | ||
a4be7c27 PZ |
430 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
431 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
432 | ||
f3dfd265 | 433 | #ifdef __KERNEL__ |
9f66a381 | 434 | /* |
f3dfd265 | 435 | * Kernel-internal data types and definitions: |
9f66a381 IM |
436 | */ |
437 | ||
cdd6c482 IM |
438 | #ifdef CONFIG_PERF_EVENTS |
439 | # include <asm/perf_event.h> | |
f3dfd265 PM |
440 | #endif |
441 | ||
2ff6cfd7 AB |
442 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
443 | #include <asm/hw_breakpoint.h> | |
444 | #endif | |
445 | ||
f3dfd265 PM |
446 | #include <linux/list.h> |
447 | #include <linux/mutex.h> | |
448 | #include <linux/rculist.h> | |
449 | #include <linux/rcupdate.h> | |
450 | #include <linux/spinlock.h> | |
d6d020e9 | 451 | #include <linux/hrtimer.h> |
3c446b3d | 452 | #include <linux/fs.h> |
709e50cf | 453 | #include <linux/pid_namespace.h> |
906010b2 | 454 | #include <linux/workqueue.h> |
5331d7b8 | 455 | #include <linux/ftrace.h> |
f3dfd265 PM |
456 | #include <asm/atomic.h> |
457 | ||
f9188e02 PZ |
458 | #define PERF_MAX_STACK_DEPTH 255 |
459 | ||
460 | struct perf_callchain_entry { | |
461 | __u64 nr; | |
462 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
463 | }; | |
464 | ||
3a43ce68 FW |
465 | struct perf_raw_record { |
466 | u32 size; | |
467 | void *data; | |
f413cdb8 FW |
468 | }; |
469 | ||
f3dfd265 PM |
470 | struct task_struct; |
471 | ||
0793a61d | 472 | /** |
cdd6c482 | 473 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 474 | */ |
cdd6c482 IM |
475 | struct hw_perf_event { |
476 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
477 | union { |
478 | struct { /* hardware */ | |
a308444c | 479 | u64 config; |
447a194b | 480 | u64 last_tag; |
a308444c | 481 | unsigned long config_base; |
cdd6c482 | 482 | unsigned long event_base; |
a308444c | 483 | int idx; |
447a194b | 484 | int last_cpu; |
d6d020e9 | 485 | }; |
721a669b SS |
486 | struct { /* software */ |
487 | s64 remaining; | |
a308444c | 488 | struct hrtimer hrtimer; |
d6d020e9 | 489 | }; |
24f1e32c | 490 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
dd8b1cf6 FW |
491 | /* breakpoint */ |
492 | struct arch_hw_breakpoint info; | |
24f1e32c | 493 | #endif |
d6d020e9 | 494 | }; |
ee06094f | 495 | atomic64_t prev_count; |
b23f3325 | 496 | u64 sample_period; |
9e350de3 | 497 | u64 last_period; |
ee06094f | 498 | atomic64_t period_left; |
60db5e09 | 499 | u64 interrupts; |
6a24ed6c | 500 | |
abd50713 PZ |
501 | u64 freq_time_stamp; |
502 | u64 freq_count_stamp; | |
ee06094f | 503 | #endif |
0793a61d TG |
504 | }; |
505 | ||
cdd6c482 | 506 | struct perf_event; |
621a01ea IM |
507 | |
508 | /** | |
4aeb0b42 | 509 | * struct pmu - generic performance monitoring unit |
621a01ea | 510 | */ |
4aeb0b42 | 511 | struct pmu { |
cdd6c482 IM |
512 | int (*enable) (struct perf_event *event); |
513 | void (*disable) (struct perf_event *event); | |
d76a0812 SE |
514 | int (*start) (struct perf_event *event); |
515 | void (*stop) (struct perf_event *event); | |
cdd6c482 IM |
516 | void (*read) (struct perf_event *event); |
517 | void (*unthrottle) (struct perf_event *event); | |
621a01ea IM |
518 | }; |
519 | ||
6a930700 | 520 | /** |
cdd6c482 | 521 | * enum perf_event_active_state - the states of a event |
6a930700 | 522 | */ |
cdd6c482 | 523 | enum perf_event_active_state { |
57c0c15b | 524 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
525 | PERF_EVENT_STATE_OFF = -1, |
526 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 527 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
528 | }; |
529 | ||
9b51f66d IM |
530 | struct file; |
531 | ||
7b732a75 PZ |
532 | struct perf_mmap_data { |
533 | struct rcu_head rcu_head; | |
906010b2 PZ |
534 | #ifdef CONFIG_PERF_USE_VMALLOC |
535 | struct work_struct work; | |
536 | #endif | |
537 | int data_order; | |
8740f941 | 538 | int nr_pages; /* nr of data pages */ |
43a21ea8 | 539 | int writable; /* are we writable */ |
c5078f78 | 540 | int nr_locked; /* nr pages mlocked */ |
8740f941 | 541 | |
c33a0bc4 | 542 | atomic_t poll; /* POLL_ for wakeups */ |
cdd6c482 | 543 | atomic_t events; /* event_id limit */ |
8740f941 | 544 | |
8e3747c1 PZ |
545 | atomic_long_t head; /* write position */ |
546 | atomic_long_t done_head; /* completed head */ | |
547 | ||
c33a0bc4 | 548 | atomic_t lock; /* concurrent writes */ |
c66de4a5 | 549 | atomic_t wakeup; /* needs a wakeup */ |
43a21ea8 | 550 | atomic_t lost; /* nr records lost */ |
c66de4a5 | 551 | |
2667de81 PZ |
552 | long watermark; /* wakeup watermark */ |
553 | ||
57c0c15b | 554 | struct perf_event_mmap_page *user_page; |
0127c3ea | 555 | void *data_pages[0]; |
7b732a75 PZ |
556 | }; |
557 | ||
671dec5d PZ |
558 | struct perf_pending_entry { |
559 | struct perf_pending_entry *next; | |
560 | void (*func)(struct perf_pending_entry *); | |
925d519a PZ |
561 | }; |
562 | ||
453f19ee PZ |
563 | struct perf_sample_data; |
564 | ||
b326e956 FW |
565 | typedef void (*perf_overflow_handler_t)(struct perf_event *, int, |
566 | struct perf_sample_data *, | |
567 | struct pt_regs *regs); | |
568 | ||
d6f962b5 FW |
569 | enum perf_group_flag { |
570 | PERF_GROUP_SOFTWARE = 0x1, | |
571 | }; | |
572 | ||
0793a61d | 573 | /** |
cdd6c482 | 574 | * struct perf_event - performance event kernel representation: |
0793a61d | 575 | */ |
cdd6c482 IM |
576 | struct perf_event { |
577 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 578 | struct list_head group_entry; |
592903cd | 579 | struct list_head event_entry; |
04289bb9 | 580 | struct list_head sibling_list; |
0127c3ea | 581 | int nr_siblings; |
d6f962b5 | 582 | int group_flags; |
cdd6c482 IM |
583 | struct perf_event *group_leader; |
584 | struct perf_event *output; | |
4aeb0b42 | 585 | const struct pmu *pmu; |
04289bb9 | 586 | |
cdd6c482 | 587 | enum perf_event_active_state state; |
0793a61d | 588 | atomic64_t count; |
ee06094f | 589 | |
53cfbf59 | 590 | /* |
cdd6c482 | 591 | * These are the total time in nanoseconds that the event |
53cfbf59 | 592 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 593 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
594 | * and running (scheduled onto the CPU), respectively. |
595 | * | |
596 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 597 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
598 | */ |
599 | u64 total_time_enabled; | |
600 | u64 total_time_running; | |
601 | ||
602 | /* | |
603 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 604 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
605 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
606 | * in time. | |
cdd6c482 IM |
607 | * tstamp_enabled: the notional time when the event was enabled |
608 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 609 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 610 | * event was scheduled off. |
53cfbf59 PM |
611 | */ |
612 | u64 tstamp_enabled; | |
613 | u64 tstamp_running; | |
614 | u64 tstamp_stopped; | |
615 | ||
24f1e32c | 616 | struct perf_event_attr attr; |
cdd6c482 | 617 | struct hw_perf_event hw; |
0793a61d | 618 | |
cdd6c482 | 619 | struct perf_event_context *ctx; |
9b51f66d | 620 | struct file *filp; |
0793a61d | 621 | |
53cfbf59 PM |
622 | /* |
623 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 624 | * events have been enabled and running, respectively. |
53cfbf59 PM |
625 | */ |
626 | atomic64_t child_total_time_enabled; | |
627 | atomic64_t child_total_time_running; | |
628 | ||
0793a61d | 629 | /* |
d859e29f | 630 | * Protect attach/detach and child_list: |
0793a61d | 631 | */ |
fccc714b PZ |
632 | struct mutex child_mutex; |
633 | struct list_head child_list; | |
cdd6c482 | 634 | struct perf_event *parent; |
0793a61d TG |
635 | |
636 | int oncpu; | |
637 | int cpu; | |
638 | ||
082ff5a2 PZ |
639 | struct list_head owner_entry; |
640 | struct task_struct *owner; | |
641 | ||
7b732a75 PZ |
642 | /* mmap bits */ |
643 | struct mutex mmap_mutex; | |
644 | atomic_t mmap_count; | |
645 | struct perf_mmap_data *data; | |
37d81828 | 646 | |
7b732a75 | 647 | /* poll related */ |
0793a61d | 648 | wait_queue_head_t waitq; |
3c446b3d | 649 | struct fasync_struct *fasync; |
79f14641 PZ |
650 | |
651 | /* delayed work for NMIs and such */ | |
652 | int pending_wakeup; | |
4c9e2542 | 653 | int pending_kill; |
79f14641 | 654 | int pending_disable; |
671dec5d | 655 | struct perf_pending_entry pending; |
592903cd | 656 | |
79f14641 PZ |
657 | atomic_t event_limit; |
658 | ||
cdd6c482 | 659 | void (*destroy)(struct perf_event *); |
592903cd | 660 | struct rcu_head rcu_head; |
709e50cf PZ |
661 | |
662 | struct pid_namespace *ns; | |
8e5799b1 | 663 | u64 id; |
6fb2915d | 664 | |
b326e956 | 665 | perf_overflow_handler_t overflow_handler; |
453f19ee | 666 | |
07b139c8 | 667 | #ifdef CONFIG_EVENT_TRACING |
6fb2915d | 668 | struct event_filter *filter; |
ee06094f | 669 | #endif |
6fb2915d LZ |
670 | |
671 | #endif /* CONFIG_PERF_EVENTS */ | |
0793a61d TG |
672 | }; |
673 | ||
674 | /** | |
cdd6c482 | 675 | * struct perf_event_context - event context structure |
0793a61d | 676 | * |
cdd6c482 | 677 | * Used as a container for task events and CPU events as well: |
0793a61d | 678 | */ |
cdd6c482 | 679 | struct perf_event_context { |
0793a61d | 680 | /* |
cdd6c482 | 681 | * Protect the states of the events in the list, |
d859e29f | 682 | * nr_active, and the list: |
0793a61d | 683 | */ |
e625cce1 | 684 | raw_spinlock_t lock; |
d859e29f | 685 | /* |
cdd6c482 | 686 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
687 | * is sufficient to ensure the list doesn't change; to change |
688 | * the list you need to lock both the mutex and the spinlock. | |
689 | */ | |
a308444c | 690 | struct mutex mutex; |
04289bb9 | 691 | |
889ff015 FW |
692 | struct list_head pinned_groups; |
693 | struct list_head flexible_groups; | |
a308444c | 694 | struct list_head event_list; |
cdd6c482 | 695 | int nr_events; |
a308444c IM |
696 | int nr_active; |
697 | int is_active; | |
bfbd3381 | 698 | int nr_stat; |
a308444c IM |
699 | atomic_t refcount; |
700 | struct task_struct *task; | |
53cfbf59 PM |
701 | |
702 | /* | |
4af4998b | 703 | * Context clock, runs when context enabled. |
53cfbf59 | 704 | */ |
a308444c IM |
705 | u64 time; |
706 | u64 timestamp; | |
564c2b21 PM |
707 | |
708 | /* | |
709 | * These fields let us detect when two contexts have both | |
710 | * been cloned (inherited) from a common ancestor. | |
711 | */ | |
cdd6c482 | 712 | struct perf_event_context *parent_ctx; |
a308444c IM |
713 | u64 parent_gen; |
714 | u64 generation; | |
715 | int pin_count; | |
716 | struct rcu_head rcu_head; | |
0793a61d TG |
717 | }; |
718 | ||
719 | /** | |
cdd6c482 | 720 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
721 | */ |
722 | struct perf_cpu_context { | |
cdd6c482 IM |
723 | struct perf_event_context ctx; |
724 | struct perf_event_context *task_ctx; | |
0793a61d TG |
725 | int active_oncpu; |
726 | int max_pertask; | |
3b6f9e5c | 727 | int exclusive; |
96f6d444 PZ |
728 | |
729 | /* | |
730 | * Recursion avoidance: | |
731 | * | |
732 | * task, softirq, irq, nmi context | |
733 | */ | |
22a4f650 | 734 | int recursion[4]; |
0793a61d TG |
735 | }; |
736 | ||
5622f295 | 737 | struct perf_output_handle { |
57c0c15b IM |
738 | struct perf_event *event; |
739 | struct perf_mmap_data *data; | |
740 | unsigned long head; | |
741 | unsigned long offset; | |
742 | int nmi; | |
743 | int sample; | |
744 | int locked; | |
5622f295 MM |
745 | }; |
746 | ||
cdd6c482 | 747 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 748 | |
0793a61d TG |
749 | /* |
750 | * Set by architecture code: | |
751 | */ | |
cdd6c482 | 752 | extern int perf_max_events; |
0793a61d | 753 | |
cdd6c482 | 754 | extern const struct pmu *hw_perf_event_init(struct perf_event *event); |
621a01ea | 755 | |
49f47433 | 756 | extern void perf_event_task_sched_in(struct task_struct *task); |
184f412c | 757 | extern void perf_event_task_sched_out(struct task_struct *task, struct task_struct *next); |
49f47433 | 758 | extern void perf_event_task_tick(struct task_struct *task); |
cdd6c482 IM |
759 | extern int perf_event_init_task(struct task_struct *child); |
760 | extern void perf_event_exit_task(struct task_struct *child); | |
761 | extern void perf_event_free_task(struct task_struct *task); | |
762 | extern void set_perf_event_pending(void); | |
763 | extern void perf_event_do_pending(void); | |
764 | extern void perf_event_print_debug(void); | |
9e35ad38 PZ |
765 | extern void __perf_disable(void); |
766 | extern bool __perf_enable(void); | |
767 | extern void perf_disable(void); | |
768 | extern void perf_enable(void); | |
cdd6c482 IM |
769 | extern int perf_event_task_disable(void); |
770 | extern int perf_event_task_enable(void); | |
771 | extern int hw_perf_group_sched_in(struct perf_event *group_leader, | |
3cbed429 | 772 | struct perf_cpu_context *cpuctx, |
6e37738a | 773 | struct perf_event_context *ctx); |
cdd6c482 | 774 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
775 | extern int perf_event_release_kernel(struct perf_event *event); |
776 | extern struct perf_event * | |
777 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
778 | int cpu, | |
97eaf530 | 779 | pid_t pid, |
b326e956 | 780 | perf_overflow_handler_t callback); |
59ed446f PZ |
781 | extern u64 perf_event_read_value(struct perf_event *event, |
782 | u64 *enabled, u64 *running); | |
5c92d124 | 783 | |
df1a132b | 784 | struct perf_sample_data { |
5622f295 MM |
785 | u64 type; |
786 | ||
787 | u64 ip; | |
788 | struct { | |
789 | u32 pid; | |
790 | u32 tid; | |
791 | } tid_entry; | |
792 | u64 time; | |
a308444c | 793 | u64 addr; |
5622f295 MM |
794 | u64 id; |
795 | u64 stream_id; | |
796 | struct { | |
797 | u32 cpu; | |
798 | u32 reserved; | |
799 | } cpu_entry; | |
a308444c | 800 | u64 period; |
5622f295 | 801 | struct perf_callchain_entry *callchain; |
3a43ce68 | 802 | struct perf_raw_record *raw; |
df1a132b PZ |
803 | }; |
804 | ||
dc1d628a PZ |
805 | static inline |
806 | void perf_sample_data_init(struct perf_sample_data *data, u64 addr) | |
807 | { | |
808 | data->addr = addr; | |
809 | data->raw = NULL; | |
810 | } | |
811 | ||
5622f295 MM |
812 | extern void perf_output_sample(struct perf_output_handle *handle, |
813 | struct perf_event_header *header, | |
814 | struct perf_sample_data *data, | |
cdd6c482 | 815 | struct perf_event *event); |
5622f295 MM |
816 | extern void perf_prepare_sample(struct perf_event_header *header, |
817 | struct perf_sample_data *data, | |
cdd6c482 | 818 | struct perf_event *event, |
5622f295 MM |
819 | struct pt_regs *regs); |
820 | ||
cdd6c482 | 821 | extern int perf_event_overflow(struct perf_event *event, int nmi, |
5622f295 MM |
822 | struct perf_sample_data *data, |
823 | struct pt_regs *regs); | |
df1a132b | 824 | |
3b6f9e5c | 825 | /* |
cdd6c482 | 826 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 827 | */ |
cdd6c482 | 828 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 829 | { |
92b67598 PZ |
830 | switch (event->attr.type) { |
831 | case PERF_TYPE_SOFTWARE: | |
832 | case PERF_TYPE_TRACEPOINT: | |
833 | /* for now the breakpoint stuff also works as software event */ | |
834 | case PERF_TYPE_BREAKPOINT: | |
835 | return 1; | |
836 | } | |
837 | return 0; | |
3b6f9e5c PM |
838 | } |
839 | ||
cdd6c482 | 840 | extern atomic_t perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 841 | |
cdd6c482 | 842 | extern void __perf_sw_event(u32, u64, int, struct pt_regs *, u64); |
f29ac756 PZ |
843 | |
844 | static inline void | |
cdd6c482 | 845 | perf_sw_event(u32 event_id, u64 nr, int nmi, struct pt_regs *regs, u64 addr) |
f29ac756 | 846 | { |
cdd6c482 IM |
847 | if (atomic_read(&perf_swevent_enabled[event_id])) |
848 | __perf_sw_event(event_id, nr, nmi, regs, addr); | |
f29ac756 | 849 | } |
15dbf27c | 850 | |
5331d7b8 FW |
851 | extern void |
852 | perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip, int skip); | |
853 | ||
854 | /* | |
855 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
856 | * the nth caller. We only need a few of the regs: | |
857 | * - ip for PERF_SAMPLE_IP | |
858 | * - cs for user_mode() tests | |
859 | * - bp for callchains | |
860 | * - eflags, for future purposes, just in case | |
861 | */ | |
862 | static inline void perf_fetch_caller_regs(struct pt_regs *regs, int skip) | |
863 | { | |
864 | unsigned long ip; | |
865 | ||
866 | memset(regs, 0, sizeof(*regs)); | |
867 | ||
868 | switch (skip) { | |
869 | case 1 : | |
870 | ip = CALLER_ADDR0; | |
871 | break; | |
872 | case 2 : | |
873 | ip = CALLER_ADDR1; | |
874 | break; | |
875 | case 3 : | |
876 | ip = CALLER_ADDR2; | |
877 | break; | |
878 | case 4: | |
879 | ip = CALLER_ADDR3; | |
880 | break; | |
881 | /* No need to support further for now */ | |
882 | default: | |
883 | ip = 0; | |
884 | } | |
885 | ||
886 | return perf_arch_fetch_caller_regs(regs, ip, skip); | |
887 | } | |
888 | ||
cdd6c482 | 889 | extern void __perf_event_mmap(struct vm_area_struct *vma); |
089dd79d | 890 | |
cdd6c482 | 891 | static inline void perf_event_mmap(struct vm_area_struct *vma) |
089dd79d PZ |
892 | { |
893 | if (vma->vm_flags & VM_EXEC) | |
cdd6c482 | 894 | __perf_event_mmap(vma); |
089dd79d | 895 | } |
0a4a9391 | 896 | |
cdd6c482 IM |
897 | extern void perf_event_comm(struct task_struct *tsk); |
898 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 899 | |
394ee076 PZ |
900 | extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs); |
901 | ||
cdd6c482 IM |
902 | extern int sysctl_perf_event_paranoid; |
903 | extern int sysctl_perf_event_mlock; | |
904 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 905 | |
320ebf09 PZ |
906 | static inline bool perf_paranoid_tracepoint_raw(void) |
907 | { | |
908 | return sysctl_perf_event_paranoid > -1; | |
909 | } | |
910 | ||
911 | static inline bool perf_paranoid_cpu(void) | |
912 | { | |
913 | return sysctl_perf_event_paranoid > 0; | |
914 | } | |
915 | ||
916 | static inline bool perf_paranoid_kernel(void) | |
917 | { | |
918 | return sysctl_perf_event_paranoid > 1; | |
919 | } | |
920 | ||
cdd6c482 | 921 | extern void perf_event_init(void); |
5331d7b8 FW |
922 | extern void perf_tp_event(int event_id, u64 addr, u64 count, void *record, |
923 | int entry_size, struct pt_regs *regs); | |
24f1e32c | 924 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 925 | |
9d23a90a | 926 | #ifndef perf_misc_flags |
cdd6c482 IM |
927 | #define perf_misc_flags(regs) (user_mode(regs) ? PERF_RECORD_MISC_USER : \ |
928 | PERF_RECORD_MISC_KERNEL) | |
9d23a90a PM |
929 | #define perf_instruction_pointer(regs) instruction_pointer(regs) |
930 | #endif | |
931 | ||
5622f295 | 932 | extern int perf_output_begin(struct perf_output_handle *handle, |
cdd6c482 | 933 | struct perf_event *event, unsigned int size, |
5622f295 MM |
934 | int nmi, int sample); |
935 | extern void perf_output_end(struct perf_output_handle *handle); | |
936 | extern void perf_output_copy(struct perf_output_handle *handle, | |
937 | const void *buf, unsigned int len); | |
4ed7c92d PZ |
938 | extern int perf_swevent_get_recursion_context(void); |
939 | extern void perf_swevent_put_recursion_context(int rctx); | |
44234adc FW |
940 | extern void perf_event_enable(struct perf_event *event); |
941 | extern void perf_event_disable(struct perf_event *event); | |
0793a61d TG |
942 | #else |
943 | static inline void | |
49f47433 | 944 | perf_event_task_sched_in(struct task_struct *task) { } |
0793a61d | 945 | static inline void |
cdd6c482 | 946 | perf_event_task_sched_out(struct task_struct *task, |
49f47433 | 947 | struct task_struct *next) { } |
0793a61d | 948 | static inline void |
49f47433 | 949 | perf_event_task_tick(struct task_struct *task) { } |
cdd6c482 IM |
950 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
951 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
952 | static inline void perf_event_free_task(struct task_struct *task) { } | |
57c0c15b IM |
953 | static inline void perf_event_do_pending(void) { } |
954 | static inline void perf_event_print_debug(void) { } | |
9e35ad38 PZ |
955 | static inline void perf_disable(void) { } |
956 | static inline void perf_enable(void) { } | |
57c0c15b IM |
957 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
958 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
15dbf27c | 959 | |
925d519a | 960 | static inline void |
cdd6c482 | 961 | perf_sw_event(u32 event_id, u64 nr, int nmi, |
78f13e95 | 962 | struct pt_regs *regs, u64 addr) { } |
24f1e32c | 963 | static inline void |
184f412c | 964 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 965 | |
57c0c15b | 966 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
967 | static inline void perf_event_comm(struct task_struct *tsk) { } |
968 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
969 | static inline void perf_event_init(void) { } | |
184f412c | 970 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 971 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
44234adc FW |
972 | static inline void perf_event_enable(struct perf_event *event) { } |
973 | static inline void perf_event_disable(struct perf_event *event) { } | |
0793a61d TG |
974 | #endif |
975 | ||
5622f295 MM |
976 | #define perf_output_put(handle, x) \ |
977 | perf_output_copy((handle), &(x), sizeof(x)) | |
978 | ||
3f6da390 PZ |
979 | /* |
980 | * This has to have a higher priority than migration_notifier in sched.c. | |
981 | */ | |
982 | #define perf_cpu_notifier(fn) \ | |
983 | do { \ | |
984 | static struct notifier_block fn##_nb __cpuinitdata = \ | |
985 | { .notifier_call = fn, .priority = 20 }; \ | |
986 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ | |
987 | (void *)(unsigned long)smp_processor_id()); \ | |
988 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ | |
989 | (void *)(unsigned long)smp_processor_id()); \ | |
990 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ | |
991 | (void *)(unsigned long)smp_processor_id()); \ | |
992 | register_cpu_notifier(&fn##_nb); \ | |
993 | } while (0) | |
994 | ||
f3dfd265 | 995 | #endif /* __KERNEL__ */ |
cdd6c482 | 996 | #endif /* _LINUX_PERF_EVENT_H */ |