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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
8f622422 IM |
55 | PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, |
56 | PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, | |
f4dbfa8f | 57 | |
a308444c | 58 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 59 | }; |
e077df4f | 60 | |
8326f44d | 61 | /* |
cdd6c482 | 62 | * Generalized hardware cache events: |
8326f44d | 63 | * |
89d6c0b5 | 64 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x |
8326f44d IM |
65 | * { read, write, prefetch } x |
66 | * { accesses, misses } | |
67 | */ | |
1c432d89 | 68 | enum perf_hw_cache_id { |
a308444c IM |
69 | PERF_COUNT_HW_CACHE_L1D = 0, |
70 | PERF_COUNT_HW_CACHE_L1I = 1, | |
71 | PERF_COUNT_HW_CACHE_LL = 2, | |
72 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
73 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
74 | PERF_COUNT_HW_CACHE_BPU = 5, | |
89d6c0b5 | 75 | PERF_COUNT_HW_CACHE_NODE = 6, |
a308444c IM |
76 | |
77 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
78 | }; |
79 | ||
1c432d89 | 80 | enum perf_hw_cache_op_id { |
a308444c IM |
81 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
82 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
83 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 84 | |
a308444c | 85 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
86 | }; |
87 | ||
1c432d89 PZ |
88 | enum perf_hw_cache_op_result_id { |
89 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
90 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 91 | |
a308444c | 92 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
93 | }; |
94 | ||
b8e83514 | 95 | /* |
cdd6c482 IM |
96 | * Special "software" events provided by the kernel, even if the hardware |
97 | * does not support performance events. These events measure various | |
b8e83514 PZ |
98 | * physical and sw events of the kernel (and allow the profiling of them as |
99 | * well): | |
100 | */ | |
1c432d89 | 101 | enum perf_sw_ids { |
a308444c IM |
102 | PERF_COUNT_SW_CPU_CLOCK = 0, |
103 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
104 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
105 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
106 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
107 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
108 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
109 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
110 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
111 | |
112 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
113 | }; |
114 | ||
8a057d84 | 115 | /* |
0d48696f | 116 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
117 | * in the overflow packets. |
118 | */ | |
cdd6c482 | 119 | enum perf_event_sample_format { |
a308444c IM |
120 | PERF_SAMPLE_IP = 1U << 0, |
121 | PERF_SAMPLE_TID = 1U << 1, | |
122 | PERF_SAMPLE_TIME = 1U << 2, | |
123 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 124 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
125 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
126 | PERF_SAMPLE_ID = 1U << 6, | |
127 | PERF_SAMPLE_CPU = 1U << 7, | |
128 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 129 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 130 | PERF_SAMPLE_RAW = 1U << 10, |
974802ea | 131 | |
f413cdb8 | 132 | PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ |
8a057d84 PZ |
133 | }; |
134 | ||
53cfbf59 | 135 | /* |
cdd6c482 | 136 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
137 | * as specified by attr.read_format: |
138 | * | |
139 | * struct read_format { | |
57c0c15b | 140 | * { u64 value; |
d7ebe75b VW |
141 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
142 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
143 | * { u64 id; } && PERF_FORMAT_ID |
144 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 145 | * |
57c0c15b | 146 | * { u64 nr; |
d7ebe75b VW |
147 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
148 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
149 | * { u64 value; |
150 | * { u64 id; } && PERF_FORMAT_ID | |
151 | * } cntr[nr]; | |
152 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 153 | * }; |
53cfbf59 | 154 | */ |
cdd6c482 | 155 | enum perf_event_read_format { |
a308444c IM |
156 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
157 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
158 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 159 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 160 | |
57c0c15b | 161 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
162 | }; |
163 | ||
974802ea PZ |
164 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
165 | ||
9f66a381 | 166 | /* |
cdd6c482 | 167 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 168 | */ |
cdd6c482 | 169 | struct perf_event_attr { |
974802ea | 170 | |
f4a2deb4 | 171 | /* |
a21ca2ca IM |
172 | * Major type: hardware/software/tracepoint/etc. |
173 | */ | |
174 | __u32 type; | |
974802ea PZ |
175 | |
176 | /* | |
177 | * Size of the attr structure, for fwd/bwd compat. | |
178 | */ | |
179 | __u32 size; | |
a21ca2ca IM |
180 | |
181 | /* | |
182 | * Type specific configuration information. | |
f4a2deb4 PZ |
183 | */ |
184 | __u64 config; | |
9f66a381 | 185 | |
60db5e09 | 186 | union { |
b23f3325 PZ |
187 | __u64 sample_period; |
188 | __u64 sample_freq; | |
60db5e09 PZ |
189 | }; |
190 | ||
b23f3325 PZ |
191 | __u64 sample_type; |
192 | __u64 read_format; | |
9f66a381 | 193 | |
2743a5b0 | 194 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
195 | inherit : 1, /* children inherit it */ |
196 | pinned : 1, /* must always be on PMU */ | |
197 | exclusive : 1, /* only group on PMU */ | |
198 | exclude_user : 1, /* don't count user */ | |
199 | exclude_kernel : 1, /* ditto kernel */ | |
200 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 201 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 202 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 203 | comm : 1, /* include comm data */ |
60db5e09 | 204 | freq : 1, /* use freq, not period */ |
bfbd3381 | 205 | inherit_stat : 1, /* per task counts */ |
57e7986e | 206 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 207 | task : 1, /* trace fork/exit */ |
2667de81 | 208 | watermark : 1, /* wakeup_watermark */ |
ab608344 PZ |
209 | /* |
210 | * precise_ip: | |
211 | * | |
212 | * 0 - SAMPLE_IP can have arbitrary skid | |
213 | * 1 - SAMPLE_IP must have constant skid | |
214 | * 2 - SAMPLE_IP requested to have 0 skid | |
215 | * 3 - SAMPLE_IP must have 0 skid | |
216 | * | |
217 | * See also PERF_RECORD_MISC_EXACT_IP | |
218 | */ | |
219 | precise_ip : 2, /* skid constraint */ | |
3af9e859 | 220 | mmap_data : 1, /* non-exec mmap data */ |
c980d109 | 221 | sample_id_all : 1, /* sample_type all events */ |
ab608344 | 222 | |
c980d109 | 223 | __reserved_1 : 45; |
2743a5b0 | 224 | |
2667de81 PZ |
225 | union { |
226 | __u32 wakeup_events; /* wakeup every n events */ | |
227 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
228 | }; | |
24f1e32c | 229 | |
f13c12c6 | 230 | __u32 bp_type; |
a7e3ed1e AK |
231 | union { |
232 | __u64 bp_addr; | |
233 | __u64 config1; /* extension of config */ | |
234 | }; | |
235 | union { | |
236 | __u64 bp_len; | |
237 | __u64 config2; /* extension of config1 */ | |
238 | }; | |
eab656ae TG |
239 | }; |
240 | ||
d859e29f | 241 | /* |
cdd6c482 | 242 | * Ioctls that can be done on a perf event fd: |
d859e29f | 243 | */ |
cdd6c482 | 244 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
245 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
246 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 247 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 248 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 249 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 250 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
251 | |
252 | enum perf_event_ioc_flags { | |
3df5edad PZ |
253 | PERF_IOC_FLAG_GROUP = 1U << 0, |
254 | }; | |
d859e29f | 255 | |
37d81828 PM |
256 | /* |
257 | * Structure of the page that can be mapped via mmap | |
258 | */ | |
cdd6c482 | 259 | struct perf_event_mmap_page { |
37d81828 PM |
260 | __u32 version; /* version number of this structure */ |
261 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
262 | |
263 | /* | |
cdd6c482 | 264 | * Bits needed to read the hw events in user-space. |
38ff667b | 265 | * |
92f22a38 PZ |
266 | * u32 seq; |
267 | * s64 count; | |
38ff667b | 268 | * |
a2e87d06 PZ |
269 | * do { |
270 | * seq = pc->lock; | |
38ff667b | 271 | * |
a2e87d06 PZ |
272 | * barrier() |
273 | * if (pc->index) { | |
274 | * count = pmc_read(pc->index - 1); | |
275 | * count += pc->offset; | |
276 | * } else | |
277 | * goto regular_read; | |
38ff667b | 278 | * |
a2e87d06 PZ |
279 | * barrier(); |
280 | * } while (pc->lock != seq); | |
38ff667b | 281 | * |
92f22a38 PZ |
282 | * NOTE: for obvious reason this only works on self-monitoring |
283 | * processes. | |
38ff667b | 284 | */ |
37d81828 | 285 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
286 | __u32 index; /* hardware event identifier */ |
287 | __s64 offset; /* add to hardware event value */ | |
288 | __u64 time_enabled; /* time event active */ | |
289 | __u64 time_running; /* time event on cpu */ | |
7b732a75 | 290 | |
41f95331 PZ |
291 | /* |
292 | * Hole for extension of the self monitor capabilities | |
293 | */ | |
294 | ||
7f8b4e4e | 295 | __u64 __reserved[123]; /* align to 1k */ |
41f95331 | 296 | |
38ff667b PZ |
297 | /* |
298 | * Control data for the mmap() data buffer. | |
299 | * | |
43a21ea8 PZ |
300 | * User-space reading the @data_head value should issue an rmb(), on |
301 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 302 | * perf_event_wakeup(). |
43a21ea8 PZ |
303 | * |
304 | * When the mapping is PROT_WRITE the @data_tail value should be | |
305 | * written by userspace to reflect the last read data. In this case | |
306 | * the kernel will not over-write unread data. | |
38ff667b | 307 | */ |
8e3747c1 | 308 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 309 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
310 | }; |
311 | ||
39447b38 | 312 | #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) |
184f412c | 313 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) |
cdd6c482 IM |
314 | #define PERF_RECORD_MISC_KERNEL (1 << 0) |
315 | #define PERF_RECORD_MISC_USER (2 << 0) | |
316 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
39447b38 ZY |
317 | #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) |
318 | #define PERF_RECORD_MISC_GUEST_USER (5 << 0) | |
6fab0192 | 319 | |
ab608344 PZ |
320 | /* |
321 | * Indicates that the content of PERF_SAMPLE_IP points to | |
322 | * the actual instruction that triggered the event. See also | |
323 | * perf_event_attr::precise_ip. | |
324 | */ | |
325 | #define PERF_RECORD_MISC_EXACT_IP (1 << 14) | |
ef21f683 PZ |
326 | /* |
327 | * Reserve the last bit to indicate some extended misc field | |
328 | */ | |
329 | #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) | |
330 | ||
5c148194 PZ |
331 | struct perf_event_header { |
332 | __u32 type; | |
6fab0192 PZ |
333 | __u16 misc; |
334 | __u16 size; | |
5c148194 PZ |
335 | }; |
336 | ||
337 | enum perf_event_type { | |
5ed00415 | 338 | |
0c593b34 | 339 | /* |
c980d109 ACM |
340 | * If perf_event_attr.sample_id_all is set then all event types will |
341 | * have the sample_type selected fields related to where/when | |
342 | * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID) | |
343 | * described in PERF_RECORD_SAMPLE below, it will be stashed just after | |
344 | * the perf_event_header and the fields already present for the existing | |
345 | * fields, i.e. at the end of the payload. That way a newer perf.data | |
346 | * file will be supported by older perf tools, with these new optional | |
347 | * fields being ignored. | |
348 | * | |
0c593b34 PZ |
349 | * The MMAP events record the PROT_EXEC mappings so that we can |
350 | * correlate userspace IPs to code. They have the following structure: | |
351 | * | |
352 | * struct { | |
0127c3ea | 353 | * struct perf_event_header header; |
0c593b34 | 354 | * |
0127c3ea IM |
355 | * u32 pid, tid; |
356 | * u64 addr; | |
357 | * u64 len; | |
358 | * u64 pgoff; | |
359 | * char filename[]; | |
0c593b34 PZ |
360 | * }; |
361 | */ | |
cdd6c482 | 362 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 363 | |
43a21ea8 PZ |
364 | /* |
365 | * struct { | |
57c0c15b IM |
366 | * struct perf_event_header header; |
367 | * u64 id; | |
368 | * u64 lost; | |
43a21ea8 PZ |
369 | * }; |
370 | */ | |
cdd6c482 | 371 | PERF_RECORD_LOST = 2, |
43a21ea8 | 372 | |
8d1b2d93 PZ |
373 | /* |
374 | * struct { | |
0127c3ea | 375 | * struct perf_event_header header; |
8d1b2d93 | 376 | * |
0127c3ea IM |
377 | * u32 pid, tid; |
378 | * char comm[]; | |
8d1b2d93 PZ |
379 | * }; |
380 | */ | |
cdd6c482 | 381 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 382 | |
9f498cc5 PZ |
383 | /* |
384 | * struct { | |
385 | * struct perf_event_header header; | |
386 | * u32 pid, ppid; | |
387 | * u32 tid, ptid; | |
393b2ad8 | 388 | * u64 time; |
9f498cc5 PZ |
389 | * }; |
390 | */ | |
cdd6c482 | 391 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 392 | |
26b119bc PZ |
393 | /* |
394 | * struct { | |
0127c3ea IM |
395 | * struct perf_event_header header; |
396 | * u64 time; | |
689802b2 | 397 | * u64 id; |
7f453c24 | 398 | * u64 stream_id; |
a78ac325 PZ |
399 | * }; |
400 | */ | |
184f412c IM |
401 | PERF_RECORD_THROTTLE = 5, |
402 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 403 | |
60313ebe PZ |
404 | /* |
405 | * struct { | |
a21ca2ca IM |
406 | * struct perf_event_header header; |
407 | * u32 pid, ppid; | |
9f498cc5 | 408 | * u32 tid, ptid; |
a6f10a2f | 409 | * u64 time; |
60313ebe PZ |
410 | * }; |
411 | */ | |
cdd6c482 | 412 | PERF_RECORD_FORK = 7, |
60313ebe | 413 | |
38b200d6 PZ |
414 | /* |
415 | * struct { | |
184f412c IM |
416 | * struct perf_event_header header; |
417 | * u32 pid, tid; | |
3dab77fb | 418 | * |
184f412c | 419 | * struct read_format values; |
38b200d6 PZ |
420 | * }; |
421 | */ | |
cdd6c482 | 422 | PERF_RECORD_READ = 8, |
38b200d6 | 423 | |
8a057d84 | 424 | /* |
0c593b34 | 425 | * struct { |
0127c3ea | 426 | * struct perf_event_header header; |
0c593b34 | 427 | * |
43a21ea8 PZ |
428 | * { u64 ip; } && PERF_SAMPLE_IP |
429 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
430 | * { u64 time; } && PERF_SAMPLE_TIME | |
431 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 432 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 433 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 434 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 435 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 436 | * |
3dab77fb | 437 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 438 | * |
f9188e02 | 439 | * { u64 nr, |
43a21ea8 | 440 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 441 | * |
57c0c15b IM |
442 | * # |
443 | * # The RAW record below is opaque data wrt the ABI | |
444 | * # | |
445 | * # That is, the ABI doesn't make any promises wrt to | |
446 | * # the stability of its content, it may vary depending | |
447 | * # on event, hardware, kernel version and phase of | |
448 | * # the moon. | |
449 | * # | |
450 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
451 | * # | |
3dab77fb | 452 | * |
a044560c PZ |
453 | * { u32 size; |
454 | * char data[size];}&& PERF_SAMPLE_RAW | |
0c593b34 | 455 | * }; |
8a057d84 | 456 | */ |
184f412c | 457 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 458 | |
cdd6c482 | 459 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
460 | }; |
461 | ||
f9188e02 PZ |
462 | enum perf_callchain_context { |
463 | PERF_CONTEXT_HV = (__u64)-32, | |
464 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
465 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 466 | |
f9188e02 PZ |
467 | PERF_CONTEXT_GUEST = (__u64)-2048, |
468 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
469 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
470 | ||
471 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
472 | }; |
473 | ||
e7e7ee2e IM |
474 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
475 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
476 | #define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */ | |
a4be7c27 | 477 | |
f3dfd265 | 478 | #ifdef __KERNEL__ |
9f66a381 | 479 | /* |
f3dfd265 | 480 | * Kernel-internal data types and definitions: |
9f66a381 IM |
481 | */ |
482 | ||
cdd6c482 | 483 | #ifdef CONFIG_PERF_EVENTS |
e5d1367f | 484 | # include <linux/cgroup.h> |
cdd6c482 | 485 | # include <asm/perf_event.h> |
7be79236 | 486 | # include <asm/local64.h> |
f3dfd265 PM |
487 | #endif |
488 | ||
39447b38 | 489 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
490 | int (*is_in_guest)(void); |
491 | int (*is_user_mode)(void); | |
492 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
493 | }; |
494 | ||
2ff6cfd7 AB |
495 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
496 | #include <asm/hw_breakpoint.h> | |
497 | #endif | |
498 | ||
f3dfd265 PM |
499 | #include <linux/list.h> |
500 | #include <linux/mutex.h> | |
501 | #include <linux/rculist.h> | |
502 | #include <linux/rcupdate.h> | |
503 | #include <linux/spinlock.h> | |
d6d020e9 | 504 | #include <linux/hrtimer.h> |
3c446b3d | 505 | #include <linux/fs.h> |
709e50cf | 506 | #include <linux/pid_namespace.h> |
906010b2 | 507 | #include <linux/workqueue.h> |
5331d7b8 | 508 | #include <linux/ftrace.h> |
85cfabbc | 509 | #include <linux/cpu.h> |
e360adbe | 510 | #include <linux/irq_work.h> |
d430d3d7 | 511 | #include <linux/jump_label.h> |
60063497 | 512 | #include <linux/atomic.h> |
fa588151 | 513 | #include <asm/local.h> |
f3dfd265 | 514 | |
f9188e02 PZ |
515 | #define PERF_MAX_STACK_DEPTH 255 |
516 | ||
517 | struct perf_callchain_entry { | |
518 | __u64 nr; | |
519 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
520 | }; | |
521 | ||
3a43ce68 FW |
522 | struct perf_raw_record { |
523 | u32 size; | |
524 | void *data; | |
f413cdb8 FW |
525 | }; |
526 | ||
caff2bef PZ |
527 | struct perf_branch_entry { |
528 | __u64 from; | |
529 | __u64 to; | |
530 | __u64 flags; | |
531 | }; | |
532 | ||
533 | struct perf_branch_stack { | |
534 | __u64 nr; | |
535 | struct perf_branch_entry entries[0]; | |
536 | }; | |
537 | ||
f3dfd265 PM |
538 | struct task_struct; |
539 | ||
efc9f05d SE |
540 | /* |
541 | * extra PMU register associated with an event | |
542 | */ | |
543 | struct hw_perf_event_extra { | |
544 | u64 config; /* register value */ | |
545 | unsigned int reg; /* register address or index */ | |
546 | int alloc; /* extra register already allocated */ | |
547 | int idx; /* index in shared_regs->regs[] */ | |
548 | }; | |
549 | ||
0793a61d | 550 | /** |
cdd6c482 | 551 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 552 | */ |
cdd6c482 IM |
553 | struct hw_perf_event { |
554 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
555 | union { |
556 | struct { /* hardware */ | |
a308444c | 557 | u64 config; |
447a194b | 558 | u64 last_tag; |
a308444c | 559 | unsigned long config_base; |
cdd6c482 | 560 | unsigned long event_base; |
a308444c | 561 | int idx; |
447a194b | 562 | int last_cpu; |
efc9f05d | 563 | struct hw_perf_event_extra extra_reg; |
d6d020e9 | 564 | }; |
721a669b | 565 | struct { /* software */ |
a308444c | 566 | struct hrtimer hrtimer; |
d6d020e9 | 567 | }; |
24f1e32c | 568 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 FW |
569 | struct { /* breakpoint */ |
570 | struct arch_hw_breakpoint info; | |
571 | struct list_head bp_list; | |
d580ff86 PZ |
572 | /* |
573 | * Crufty hack to avoid the chicken and egg | |
574 | * problem hw_breakpoint has with context | |
575 | * creation and event initalization. | |
576 | */ | |
577 | struct task_struct *bp_target; | |
45a73372 | 578 | }; |
24f1e32c | 579 | #endif |
d6d020e9 | 580 | }; |
a4eaf7f1 | 581 | int state; |
e7850595 | 582 | local64_t prev_count; |
b23f3325 | 583 | u64 sample_period; |
9e350de3 | 584 | u64 last_period; |
e7850595 | 585 | local64_t period_left; |
60db5e09 | 586 | u64 interrupts; |
6a24ed6c | 587 | |
abd50713 PZ |
588 | u64 freq_time_stamp; |
589 | u64 freq_count_stamp; | |
ee06094f | 590 | #endif |
0793a61d TG |
591 | }; |
592 | ||
a4eaf7f1 PZ |
593 | /* |
594 | * hw_perf_event::state flags | |
595 | */ | |
596 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
597 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
598 | #define PERF_HES_ARCH 0x04 | |
599 | ||
cdd6c482 | 600 | struct perf_event; |
621a01ea | 601 | |
8d2cacbb PZ |
602 | /* |
603 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
604 | */ | |
605 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 606 | |
621a01ea | 607 | /** |
4aeb0b42 | 608 | * struct pmu - generic performance monitoring unit |
621a01ea | 609 | */ |
4aeb0b42 | 610 | struct pmu { |
b0a873eb PZ |
611 | struct list_head entry; |
612 | ||
abe43400 | 613 | struct device *dev; |
2e80a82a PZ |
614 | char *name; |
615 | int type; | |
616 | ||
108b02cf PZ |
617 | int * __percpu pmu_disable_count; |
618 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
8dc85d54 | 619 | int task_ctx_nr; |
6bde9b6c LM |
620 | |
621 | /* | |
a4eaf7f1 PZ |
622 | * Fully disable/enable this PMU, can be used to protect from the PMI |
623 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 624 | */ |
ad5133b7 PZ |
625 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
626 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 627 | |
8d2cacbb | 628 | /* |
a4eaf7f1 | 629 | * Try and initialize the event for this PMU. |
24cd7f54 | 630 | * Should return -ENOENT when the @event doesn't match this PMU. |
8d2cacbb | 631 | */ |
b0a873eb PZ |
632 | int (*event_init) (struct perf_event *event); |
633 | ||
a4eaf7f1 PZ |
634 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
635 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
636 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
637 | ||
8d2cacbb | 638 | /* |
a4eaf7f1 PZ |
639 | * Adds/Removes a counter to/from the PMU, can be done inside |
640 | * a transaction, see the ->*_txn() methods. | |
641 | */ | |
642 | int (*add) (struct perf_event *event, int flags); | |
643 | void (*del) (struct perf_event *event, int flags); | |
644 | ||
645 | /* | |
646 | * Starts/Stops a counter present on the PMU. The PMI handler | |
647 | * should stop the counter when perf_event_overflow() returns | |
648 | * !0. ->start() will be used to continue. | |
649 | */ | |
650 | void (*start) (struct perf_event *event, int flags); | |
651 | void (*stop) (struct perf_event *event, int flags); | |
652 | ||
653 | /* | |
654 | * Updates the counter value of the event. | |
655 | */ | |
cdd6c482 | 656 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
657 | |
658 | /* | |
24cd7f54 PZ |
659 | * Group events scheduling is treated as a transaction, add |
660 | * group events as a whole and perform one schedulability test. | |
661 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
662 | * |
663 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 664 | * do schedulability tests. |
8d2cacbb | 665 | */ |
e7e7ee2e | 666 | void (*start_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 667 | /* |
a4eaf7f1 | 668 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
669 | * then ->commit_txn() is required to perform one. On success |
670 | * the transaction is closed. On error the transaction is kept | |
671 | * open until ->cancel_txn() is called. | |
672 | */ | |
e7e7ee2e | 673 | int (*commit_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 674 | /* |
a4eaf7f1 | 675 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 676 | * for each successful ->add() during the transaction. |
8d2cacbb | 677 | */ |
e7e7ee2e | 678 | void (*cancel_txn) (struct pmu *pmu); /* optional */ |
621a01ea IM |
679 | }; |
680 | ||
6a930700 | 681 | /** |
cdd6c482 | 682 | * enum perf_event_active_state - the states of a event |
6a930700 | 683 | */ |
cdd6c482 | 684 | enum perf_event_active_state { |
57c0c15b | 685 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
686 | PERF_EVENT_STATE_OFF = -1, |
687 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 688 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
689 | }; |
690 | ||
9b51f66d | 691 | struct file; |
453f19ee PZ |
692 | struct perf_sample_data; |
693 | ||
a8b0ca17 | 694 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
695 | struct perf_sample_data *, |
696 | struct pt_regs *regs); | |
697 | ||
d6f962b5 | 698 | enum perf_group_flag { |
e7e7ee2e | 699 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
700 | }; |
701 | ||
e7e7ee2e IM |
702 | #define SWEVENT_HLIST_BITS 8 |
703 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
704 | |
705 | struct swevent_hlist { | |
e7e7ee2e IM |
706 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
707 | struct rcu_head rcu_head; | |
76e1d904 FW |
708 | }; |
709 | ||
8a49542c PZ |
710 | #define PERF_ATTACH_CONTEXT 0x01 |
711 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 712 | #define PERF_ATTACH_TASK 0x04 |
8a49542c | 713 | |
e5d1367f SE |
714 | #ifdef CONFIG_CGROUP_PERF |
715 | /* | |
716 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
717 | * This is a per-cpu dynamically allocated data structure. | |
718 | */ | |
719 | struct perf_cgroup_info { | |
e7e7ee2e IM |
720 | u64 time; |
721 | u64 timestamp; | |
e5d1367f SE |
722 | }; |
723 | ||
724 | struct perf_cgroup { | |
e7e7ee2e IM |
725 | struct cgroup_subsys_state css; |
726 | struct perf_cgroup_info *info; /* timing info, one per cpu */ | |
e5d1367f SE |
727 | }; |
728 | #endif | |
729 | ||
76369139 FW |
730 | struct ring_buffer; |
731 | ||
0793a61d | 732 | /** |
cdd6c482 | 733 | * struct perf_event - performance event kernel representation: |
0793a61d | 734 | */ |
cdd6c482 IM |
735 | struct perf_event { |
736 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 737 | struct list_head group_entry; |
592903cd | 738 | struct list_head event_entry; |
04289bb9 | 739 | struct list_head sibling_list; |
76e1d904 | 740 | struct hlist_node hlist_entry; |
0127c3ea | 741 | int nr_siblings; |
d6f962b5 | 742 | int group_flags; |
cdd6c482 | 743 | struct perf_event *group_leader; |
a4eaf7f1 | 744 | struct pmu *pmu; |
04289bb9 | 745 | |
cdd6c482 | 746 | enum perf_event_active_state state; |
8a49542c | 747 | unsigned int attach_state; |
e7850595 | 748 | local64_t count; |
a6e6dea6 | 749 | atomic64_t child_count; |
ee06094f | 750 | |
53cfbf59 | 751 | /* |
cdd6c482 | 752 | * These are the total time in nanoseconds that the event |
53cfbf59 | 753 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 754 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
755 | * and running (scheduled onto the CPU), respectively. |
756 | * | |
757 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 758 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
759 | */ |
760 | u64 total_time_enabled; | |
761 | u64 total_time_running; | |
762 | ||
763 | /* | |
764 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 765 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
766 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
767 | * in time. | |
cdd6c482 IM |
768 | * tstamp_enabled: the notional time when the event was enabled |
769 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 770 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 771 | * event was scheduled off. |
53cfbf59 PM |
772 | */ |
773 | u64 tstamp_enabled; | |
774 | u64 tstamp_running; | |
775 | u64 tstamp_stopped; | |
776 | ||
eed01528 SE |
777 | /* |
778 | * timestamp shadows the actual context timing but it can | |
779 | * be safely used in NMI interrupt context. It reflects the | |
780 | * context time as it was when the event was last scheduled in. | |
781 | * | |
782 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
783 | * compute ctx_time for a sample, simply add perf_clock(). | |
784 | */ | |
785 | u64 shadow_ctx_time; | |
786 | ||
24f1e32c | 787 | struct perf_event_attr attr; |
c320c7b7 | 788 | u16 header_size; |
6844c09d | 789 | u16 id_header_size; |
c320c7b7 | 790 | u16 read_size; |
cdd6c482 | 791 | struct hw_perf_event hw; |
0793a61d | 792 | |
cdd6c482 | 793 | struct perf_event_context *ctx; |
9b51f66d | 794 | struct file *filp; |
0793a61d | 795 | |
53cfbf59 PM |
796 | /* |
797 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 798 | * events have been enabled and running, respectively. |
53cfbf59 PM |
799 | */ |
800 | atomic64_t child_total_time_enabled; | |
801 | atomic64_t child_total_time_running; | |
802 | ||
0793a61d | 803 | /* |
d859e29f | 804 | * Protect attach/detach and child_list: |
0793a61d | 805 | */ |
fccc714b PZ |
806 | struct mutex child_mutex; |
807 | struct list_head child_list; | |
cdd6c482 | 808 | struct perf_event *parent; |
0793a61d TG |
809 | |
810 | int oncpu; | |
811 | int cpu; | |
812 | ||
082ff5a2 PZ |
813 | struct list_head owner_entry; |
814 | struct task_struct *owner; | |
815 | ||
7b732a75 PZ |
816 | /* mmap bits */ |
817 | struct mutex mmap_mutex; | |
818 | atomic_t mmap_count; | |
ac9721f3 PZ |
819 | int mmap_locked; |
820 | struct user_struct *mmap_user; | |
76369139 | 821 | struct ring_buffer *rb; |
37d81828 | 822 | |
7b732a75 | 823 | /* poll related */ |
0793a61d | 824 | wait_queue_head_t waitq; |
3c446b3d | 825 | struct fasync_struct *fasync; |
79f14641 PZ |
826 | |
827 | /* delayed work for NMIs and such */ | |
828 | int pending_wakeup; | |
4c9e2542 | 829 | int pending_kill; |
79f14641 | 830 | int pending_disable; |
e360adbe | 831 | struct irq_work pending; |
592903cd | 832 | |
79f14641 PZ |
833 | atomic_t event_limit; |
834 | ||
cdd6c482 | 835 | void (*destroy)(struct perf_event *); |
592903cd | 836 | struct rcu_head rcu_head; |
709e50cf PZ |
837 | |
838 | struct pid_namespace *ns; | |
8e5799b1 | 839 | u64 id; |
6fb2915d | 840 | |
b326e956 | 841 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 842 | void *overflow_handler_context; |
453f19ee | 843 | |
07b139c8 | 844 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 845 | struct ftrace_event_call *tp_event; |
6fb2915d | 846 | struct event_filter *filter; |
ee06094f | 847 | #endif |
6fb2915d | 848 | |
e5d1367f SE |
849 | #ifdef CONFIG_CGROUP_PERF |
850 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
851 | int cgrp_defer_enabled; | |
852 | #endif | |
853 | ||
6fb2915d | 854 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
855 | }; |
856 | ||
b04243ef PZ |
857 | enum perf_event_context_type { |
858 | task_context, | |
859 | cpu_context, | |
860 | }; | |
861 | ||
0793a61d | 862 | /** |
cdd6c482 | 863 | * struct perf_event_context - event context structure |
0793a61d | 864 | * |
cdd6c482 | 865 | * Used as a container for task events and CPU events as well: |
0793a61d | 866 | */ |
cdd6c482 | 867 | struct perf_event_context { |
108b02cf | 868 | struct pmu *pmu; |
ee643c41 | 869 | enum perf_event_context_type type; |
0793a61d | 870 | /* |
cdd6c482 | 871 | * Protect the states of the events in the list, |
d859e29f | 872 | * nr_active, and the list: |
0793a61d | 873 | */ |
e625cce1 | 874 | raw_spinlock_t lock; |
d859e29f | 875 | /* |
cdd6c482 | 876 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
877 | * is sufficient to ensure the list doesn't change; to change |
878 | * the list you need to lock both the mutex and the spinlock. | |
879 | */ | |
a308444c | 880 | struct mutex mutex; |
04289bb9 | 881 | |
889ff015 FW |
882 | struct list_head pinned_groups; |
883 | struct list_head flexible_groups; | |
a308444c | 884 | struct list_head event_list; |
cdd6c482 | 885 | int nr_events; |
a308444c IM |
886 | int nr_active; |
887 | int is_active; | |
bfbd3381 | 888 | int nr_stat; |
dddd3379 | 889 | int rotate_disable; |
a308444c IM |
890 | atomic_t refcount; |
891 | struct task_struct *task; | |
53cfbf59 PM |
892 | |
893 | /* | |
4af4998b | 894 | * Context clock, runs when context enabled. |
53cfbf59 | 895 | */ |
a308444c IM |
896 | u64 time; |
897 | u64 timestamp; | |
564c2b21 PM |
898 | |
899 | /* | |
900 | * These fields let us detect when two contexts have both | |
901 | * been cloned (inherited) from a common ancestor. | |
902 | */ | |
cdd6c482 | 903 | struct perf_event_context *parent_ctx; |
a308444c IM |
904 | u64 parent_gen; |
905 | u64 generation; | |
906 | int pin_count; | |
e5d1367f | 907 | int nr_cgroups; /* cgroup events present */ |
28009ce4 | 908 | struct rcu_head rcu_head; |
0793a61d TG |
909 | }; |
910 | ||
7ae07ea3 FW |
911 | /* |
912 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 913 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
914 | */ |
915 | #define PERF_NR_CONTEXTS 4 | |
916 | ||
0793a61d | 917 | /** |
cdd6c482 | 918 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
919 | */ |
920 | struct perf_cpu_context { | |
cdd6c482 IM |
921 | struct perf_event_context ctx; |
922 | struct perf_event_context *task_ctx; | |
0793a61d | 923 | int active_oncpu; |
3b6f9e5c | 924 | int exclusive; |
e9d2b064 PZ |
925 | struct list_head rotation_list; |
926 | int jiffies_interval; | |
51676957 | 927 | struct pmu *active_pmu; |
e5d1367f | 928 | struct perf_cgroup *cgrp; |
0793a61d TG |
929 | }; |
930 | ||
5622f295 | 931 | struct perf_output_handle { |
57c0c15b | 932 | struct perf_event *event; |
76369139 | 933 | struct ring_buffer *rb; |
6d1acfd5 | 934 | unsigned long wakeup; |
5d967a8b PZ |
935 | unsigned long size; |
936 | void *addr; | |
937 | int page; | |
5622f295 MM |
938 | }; |
939 | ||
cdd6c482 | 940 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 941 | |
2e80a82a | 942 | extern int perf_pmu_register(struct pmu *pmu, char *name, int type); |
b0a873eb | 943 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 944 | |
3bf101ba | 945 | extern int perf_num_counters(void); |
84c79910 | 946 | extern const char *perf_pmu_name(void); |
a8d757ef SE |
947 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
948 | struct task_struct *task); | |
949 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
950 | struct task_struct *next); | |
cdd6c482 IM |
951 | extern int perf_event_init_task(struct task_struct *child); |
952 | extern void perf_event_exit_task(struct task_struct *child); | |
953 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 954 | extern void perf_event_delayed_put(struct task_struct *task); |
cdd6c482 | 955 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
956 | extern void perf_pmu_disable(struct pmu *pmu); |
957 | extern void perf_pmu_enable(struct pmu *pmu); | |
cdd6c482 IM |
958 | extern int perf_event_task_disable(void); |
959 | extern int perf_event_task_enable(void); | |
26ca5c11 | 960 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 961 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
962 | extern int perf_event_release_kernel(struct perf_event *event); |
963 | extern struct perf_event * | |
964 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
965 | int cpu, | |
38a81da2 | 966 | struct task_struct *task, |
4dc0da86 AK |
967 | perf_overflow_handler_t callback, |
968 | void *context); | |
59ed446f PZ |
969 | extern u64 perf_event_read_value(struct perf_event *event, |
970 | u64 *enabled, u64 *running); | |
5c92d124 | 971 | |
df1a132b | 972 | struct perf_sample_data { |
5622f295 MM |
973 | u64 type; |
974 | ||
975 | u64 ip; | |
976 | struct { | |
977 | u32 pid; | |
978 | u32 tid; | |
979 | } tid_entry; | |
980 | u64 time; | |
a308444c | 981 | u64 addr; |
5622f295 MM |
982 | u64 id; |
983 | u64 stream_id; | |
984 | struct { | |
985 | u32 cpu; | |
986 | u32 reserved; | |
987 | } cpu_entry; | |
a308444c | 988 | u64 period; |
5622f295 | 989 | struct perf_callchain_entry *callchain; |
3a43ce68 | 990 | struct perf_raw_record *raw; |
df1a132b PZ |
991 | }; |
992 | ||
e7e7ee2e | 993 | static inline void perf_sample_data_init(struct perf_sample_data *data, u64 addr) |
dc1d628a PZ |
994 | { |
995 | data->addr = addr; | |
996 | data->raw = NULL; | |
997 | } | |
998 | ||
5622f295 MM |
999 | extern void perf_output_sample(struct perf_output_handle *handle, |
1000 | struct perf_event_header *header, | |
1001 | struct perf_sample_data *data, | |
cdd6c482 | 1002 | struct perf_event *event); |
5622f295 MM |
1003 | extern void perf_prepare_sample(struct perf_event_header *header, |
1004 | struct perf_sample_data *data, | |
cdd6c482 | 1005 | struct perf_event *event, |
5622f295 MM |
1006 | struct pt_regs *regs); |
1007 | ||
a8b0ca17 | 1008 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
1009 | struct perf_sample_data *data, |
1010 | struct pt_regs *regs); | |
df1a132b | 1011 | |
6c7e550f FBH |
1012 | static inline bool is_sampling_event(struct perf_event *event) |
1013 | { | |
1014 | return event->attr.sample_period != 0; | |
1015 | } | |
1016 | ||
3b6f9e5c | 1017 | /* |
cdd6c482 | 1018 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 1019 | */ |
cdd6c482 | 1020 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 1021 | { |
89a1e187 | 1022 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
1023 | } |
1024 | ||
d430d3d7 | 1025 | extern struct jump_label_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 1026 | |
a8b0ca17 | 1027 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 1028 | |
b0f82b81 | 1029 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 1030 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 1031 | #endif |
5331d7b8 FW |
1032 | |
1033 | /* | |
1034 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
1035 | * the nth caller. We only need a few of the regs: | |
1036 | * - ip for PERF_SAMPLE_IP | |
1037 | * - cs for user_mode() tests | |
1038 | * - bp for callchains | |
1039 | * - eflags, for future purposes, just in case | |
1040 | */ | |
b0f82b81 | 1041 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 1042 | { |
5331d7b8 FW |
1043 | memset(regs, 0, sizeof(*regs)); |
1044 | ||
b0f82b81 | 1045 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
1046 | } |
1047 | ||
7e54a5a0 | 1048 | static __always_inline void |
a8b0ca17 | 1049 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1050 | { |
7e54a5a0 PZ |
1051 | struct pt_regs hot_regs; |
1052 | ||
d430d3d7 JB |
1053 | if (static_branch(&perf_swevent_enabled[event_id])) { |
1054 | if (!regs) { | |
1055 | perf_fetch_caller_regs(&hot_regs); | |
1056 | regs = &hot_regs; | |
1057 | } | |
a8b0ca17 | 1058 | __perf_sw_event(event_id, nr, regs, addr); |
e49a5bd3 FW |
1059 | } |
1060 | } | |
1061 | ||
d430d3d7 | 1062 | extern struct jump_label_key perf_sched_events; |
ee6dcfa4 | 1063 | |
a8d757ef SE |
1064 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
1065 | struct task_struct *task) | |
ee6dcfa4 | 1066 | { |
d430d3d7 | 1067 | if (static_branch(&perf_sched_events)) |
a8d757ef | 1068 | __perf_event_task_sched_in(prev, task); |
ee6dcfa4 PZ |
1069 | } |
1070 | ||
a8d757ef SE |
1071 | static inline void perf_event_task_sched_out(struct task_struct *prev, |
1072 | struct task_struct *next) | |
ee6dcfa4 | 1073 | { |
a8b0ca17 | 1074 | perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0); |
ee6dcfa4 | 1075 | |
a8d757ef SE |
1076 | if (static_branch(&perf_sched_events)) |
1077 | __perf_event_task_sched_out(prev, next); | |
ee6dcfa4 PZ |
1078 | } |
1079 | ||
3af9e859 | 1080 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 1081 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1082 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1083 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1084 | |
cdd6c482 IM |
1085 | extern void perf_event_comm(struct task_struct *tsk); |
1086 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 1087 | |
56962b44 FW |
1088 | /* Callchains */ |
1089 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1090 | ||
e7e7ee2e IM |
1091 | extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs); |
1092 | extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs); | |
394ee076 | 1093 | |
e7e7ee2e | 1094 | static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip) |
70791ce9 FW |
1095 | { |
1096 | if (entry->nr < PERF_MAX_STACK_DEPTH) | |
1097 | entry->ip[entry->nr++] = ip; | |
1098 | } | |
394ee076 | 1099 | |
cdd6c482 IM |
1100 | extern int sysctl_perf_event_paranoid; |
1101 | extern int sysctl_perf_event_mlock; | |
1102 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 1103 | |
163ec435 PZ |
1104 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
1105 | void __user *buffer, size_t *lenp, | |
1106 | loff_t *ppos); | |
1107 | ||
320ebf09 PZ |
1108 | static inline bool perf_paranoid_tracepoint_raw(void) |
1109 | { | |
1110 | return sysctl_perf_event_paranoid > -1; | |
1111 | } | |
1112 | ||
1113 | static inline bool perf_paranoid_cpu(void) | |
1114 | { | |
1115 | return sysctl_perf_event_paranoid > 0; | |
1116 | } | |
1117 | ||
1118 | static inline bool perf_paranoid_kernel(void) | |
1119 | { | |
1120 | return sysctl_perf_event_paranoid > 1; | |
1121 | } | |
1122 | ||
cdd6c482 | 1123 | extern void perf_event_init(void); |
1c024eca PZ |
1124 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
1125 | int entry_size, struct pt_regs *regs, | |
ecc55f84 | 1126 | struct hlist_head *head, int rctx); |
24f1e32c | 1127 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1128 | |
9d23a90a | 1129 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1130 | # define perf_misc_flags(regs) \ |
1131 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1132 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
1133 | #endif |
1134 | ||
5622f295 | 1135 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 1136 | struct perf_event *event, unsigned int size); |
5622f295 MM |
1137 | extern void perf_output_end(struct perf_output_handle *handle); |
1138 | extern void perf_output_copy(struct perf_output_handle *handle, | |
1139 | const void *buf, unsigned int len); | |
4ed7c92d PZ |
1140 | extern int perf_swevent_get_recursion_context(void); |
1141 | extern void perf_swevent_put_recursion_context(int rctx); | |
44234adc FW |
1142 | extern void perf_event_enable(struct perf_event *event); |
1143 | extern void perf_event_disable(struct perf_event *event); | |
e9d2b064 | 1144 | extern void perf_event_task_tick(void); |
0793a61d TG |
1145 | #else |
1146 | static inline void | |
a8d757ef SE |
1147 | perf_event_task_sched_in(struct task_struct *prev, |
1148 | struct task_struct *task) { } | |
0793a61d | 1149 | static inline void |
a8d757ef SE |
1150 | perf_event_task_sched_out(struct task_struct *prev, |
1151 | struct task_struct *next) { } | |
cdd6c482 IM |
1152 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1153 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1154 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1155 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
57c0c15b | 1156 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1157 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1158 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
1159 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
1160 | { | |
1161 | return -EINVAL; | |
1162 | } | |
15dbf27c | 1163 | |
925d519a | 1164 | static inline void |
a8b0ca17 | 1165 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1166 | static inline void |
184f412c | 1167 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1168 | |
39447b38 | 1169 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1170 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1171 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1172 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1173 | |
57c0c15b | 1174 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
1175 | static inline void perf_event_comm(struct task_struct *tsk) { } |
1176 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
1177 | static inline void perf_event_init(void) { } | |
184f412c | 1178 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1179 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
44234adc FW |
1180 | static inline void perf_event_enable(struct perf_event *event) { } |
1181 | static inline void perf_event_disable(struct perf_event *event) { } | |
e9d2b064 | 1182 | static inline void perf_event_task_tick(void) { } |
0793a61d TG |
1183 | #endif |
1184 | ||
e7e7ee2e | 1185 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1186 | |
3f6da390 PZ |
1187 | /* |
1188 | * This has to have a higher priority than migration_notifier in sched.c. | |
1189 | */ | |
e7e7ee2e IM |
1190 | #define perf_cpu_notifier(fn) \ |
1191 | do { \ | |
1192 | static struct notifier_block fn##_nb __cpuinitdata = \ | |
1193 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
1194 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ | |
1195 | (void *)(unsigned long)smp_processor_id()); \ | |
1196 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ | |
1197 | (void *)(unsigned long)smp_processor_id()); \ | |
1198 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ | |
1199 | (void *)(unsigned long)smp_processor_id()); \ | |
1200 | register_cpu_notifier(&fn##_nb); \ | |
3f6da390 PZ |
1201 | } while (0) |
1202 | ||
f3dfd265 | 1203 | #endif /* __KERNEL__ */ |
cdd6c482 | 1204 | #endif /* _LINUX_PERF_EVENT_H */ |