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Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
607ca46e | 17 | #include <uapi/linux/perf_event.h> |
0793a61d | 18 | |
9f66a381 | 19 | /* |
f3dfd265 | 20 | * Kernel-internal data types and definitions: |
9f66a381 IM |
21 | */ |
22 | ||
cdd6c482 IM |
23 | #ifdef CONFIG_PERF_EVENTS |
24 | # include <asm/perf_event.h> | |
7be79236 | 25 | # include <asm/local64.h> |
f3dfd265 PM |
26 | #endif |
27 | ||
39447b38 | 28 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
29 | int (*is_in_guest)(void); |
30 | int (*is_user_mode)(void); | |
31 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
32 | }; |
33 | ||
2ff6cfd7 AB |
34 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
35 | #include <asm/hw_breakpoint.h> | |
36 | #endif | |
37 | ||
f3dfd265 PM |
38 | #include <linux/list.h> |
39 | #include <linux/mutex.h> | |
40 | #include <linux/rculist.h> | |
41 | #include <linux/rcupdate.h> | |
42 | #include <linux/spinlock.h> | |
d6d020e9 | 43 | #include <linux/hrtimer.h> |
3c446b3d | 44 | #include <linux/fs.h> |
709e50cf | 45 | #include <linux/pid_namespace.h> |
906010b2 | 46 | #include <linux/workqueue.h> |
5331d7b8 | 47 | #include <linux/ftrace.h> |
85cfabbc | 48 | #include <linux/cpu.h> |
e360adbe | 49 | #include <linux/irq_work.h> |
c5905afb | 50 | #include <linux/static_key.h> |
851cf6e7 | 51 | #include <linux/jump_label_ratelimit.h> |
60063497 | 52 | #include <linux/atomic.h> |
641cc938 | 53 | #include <linux/sysfs.h> |
4018994f | 54 | #include <linux/perf_regs.h> |
fadfe7be | 55 | #include <linux/workqueue.h> |
39bed6cb | 56 | #include <linux/cgroup.h> |
fa588151 | 57 | #include <asm/local.h> |
f3dfd265 | 58 | |
f9188e02 PZ |
59 | struct perf_callchain_entry { |
60 | __u64 nr; | |
c5dfd78e | 61 | __u64 ip[0]; /* /proc/sys/kernel/perf_event_max_stack */ |
f9188e02 PZ |
62 | }; |
63 | ||
cfbcf468 ACM |
64 | struct perf_callchain_entry_ctx { |
65 | struct perf_callchain_entry *entry; | |
66 | u32 max_stack; | |
3b1fff08 | 67 | u32 nr; |
c85b0334 ACM |
68 | short contexts; |
69 | bool contexts_maxed; | |
cfbcf468 ACM |
70 | }; |
71 | ||
7e3f977e | 72 | typedef unsigned long (*perf_copy_f)(void *dst, const void *src, |
aa7145c1 | 73 | unsigned long off, unsigned long len); |
7e3f977e DB |
74 | |
75 | struct perf_raw_frag { | |
76 | union { | |
77 | struct perf_raw_frag *next; | |
78 | unsigned long pad; | |
79 | }; | |
80 | perf_copy_f copy; | |
81 | void *data; | |
82 | u32 size; | |
83 | } __packed; | |
84 | ||
3a43ce68 | 85 | struct perf_raw_record { |
7e3f977e | 86 | struct perf_raw_frag frag; |
3a43ce68 | 87 | u32 size; |
f413cdb8 FW |
88 | }; |
89 | ||
bce38cd5 SE |
90 | /* |
91 | * branch stack layout: | |
92 | * nr: number of taken branches stored in entries[] | |
93 | * | |
94 | * Note that nr can vary from sample to sample | |
95 | * branches (to, from) are stored from most recent | |
96 | * to least recent, i.e., entries[0] contains the most | |
97 | * recent branch. | |
98 | */ | |
caff2bef PZ |
99 | struct perf_branch_stack { |
100 | __u64 nr; | |
101 | struct perf_branch_entry entries[0]; | |
102 | }; | |
103 | ||
f3dfd265 PM |
104 | struct task_struct; |
105 | ||
efc9f05d SE |
106 | /* |
107 | * extra PMU register associated with an event | |
108 | */ | |
109 | struct hw_perf_event_extra { | |
110 | u64 config; /* register value */ | |
111 | unsigned int reg; /* register address or index */ | |
112 | int alloc; /* extra register already allocated */ | |
113 | int idx; /* index in shared_regs->regs[] */ | |
114 | }; | |
115 | ||
0793a61d | 116 | /** |
cdd6c482 | 117 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 118 | */ |
cdd6c482 IM |
119 | struct hw_perf_event { |
120 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
121 | union { |
122 | struct { /* hardware */ | |
a308444c | 123 | u64 config; |
447a194b | 124 | u64 last_tag; |
a308444c | 125 | unsigned long config_base; |
cdd6c482 | 126 | unsigned long event_base; |
c48b6053 | 127 | int event_base_rdpmc; |
a308444c | 128 | int idx; |
447a194b | 129 | int last_cpu; |
9fac2cf3 | 130 | int flags; |
bce38cd5 | 131 | |
efc9f05d | 132 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 133 | struct hw_perf_event_extra branch_reg; |
d6d020e9 | 134 | }; |
721a669b | 135 | struct { /* software */ |
a308444c | 136 | struct hrtimer hrtimer; |
d6d020e9 | 137 | }; |
f22c1bb6 | 138 | struct { /* tracepoint */ |
f22c1bb6 ON |
139 | /* for tp_event->class */ |
140 | struct list_head tp_list; | |
141 | }; | |
4afbb24c MF |
142 | struct { /* intel_cqm */ |
143 | int cqm_state; | |
b3df4ec4 | 144 | u32 cqm_rmid; |
a223c1c7 | 145 | int is_group_event; |
4afbb24c MF |
146 | struct list_head cqm_events_entry; |
147 | struct list_head cqm_groups_entry; | |
148 | struct list_head cqm_group_entry; | |
149 | }; | |
c7ab62bf HR |
150 | struct { /* amd_power */ |
151 | u64 pwr_acc; | |
152 | u64 ptsc; | |
153 | }; | |
24f1e32c | 154 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 | 155 | struct { /* breakpoint */ |
d580ff86 PZ |
156 | /* |
157 | * Crufty hack to avoid the chicken and egg | |
158 | * problem hw_breakpoint has with context | |
159 | * creation and event initalization. | |
160 | */ | |
f22c1bb6 ON |
161 | struct arch_hw_breakpoint info; |
162 | struct list_head bp_list; | |
45a73372 | 163 | }; |
24f1e32c | 164 | #endif |
cf25f904 SS |
165 | struct { /* amd_iommu */ |
166 | u8 iommu_bank; | |
167 | u8 iommu_cntr; | |
168 | u16 padding; | |
169 | u64 conf; | |
170 | u64 conf1; | |
171 | }; | |
d6d020e9 | 172 | }; |
b0e87875 PZ |
173 | /* |
174 | * If the event is a per task event, this will point to the task in | |
175 | * question. See the comment in perf_event_alloc(). | |
176 | */ | |
50f16a8b | 177 | struct task_struct *target; |
b0e87875 | 178 | |
375637bc AS |
179 | /* |
180 | * PMU would store hardware filter configuration | |
181 | * here. | |
182 | */ | |
183 | void *addr_filters; | |
184 | ||
185 | /* Last sync'ed generation of filters */ | |
186 | unsigned long addr_filters_gen; | |
187 | ||
b0e87875 PZ |
188 | /* |
189 | * hw_perf_event::state flags; used to track the PERF_EF_* state. | |
190 | */ | |
191 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
192 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
193 | #define PERF_HES_ARCH 0x04 | |
194 | ||
a4eaf7f1 | 195 | int state; |
b0e87875 PZ |
196 | |
197 | /* | |
198 | * The last observed hardware counter value, updated with a | |
199 | * local64_cmpxchg() such that pmu::read() can be called nested. | |
200 | */ | |
e7850595 | 201 | local64_t prev_count; |
b0e87875 PZ |
202 | |
203 | /* | |
204 | * The period to start the next sample with. | |
205 | */ | |
b23f3325 | 206 | u64 sample_period; |
b0e87875 PZ |
207 | |
208 | /* | |
209 | * The period we started this sample with. | |
210 | */ | |
9e350de3 | 211 | u64 last_period; |
b0e87875 PZ |
212 | |
213 | /* | |
214 | * However much is left of the current period; note that this is | |
215 | * a full 64bit value and allows for generation of periods longer | |
216 | * than hardware might allow. | |
217 | */ | |
e7850595 | 218 | local64_t period_left; |
b0e87875 PZ |
219 | |
220 | /* | |
221 | * State for throttling the event, see __perf_event_overflow() and | |
222 | * perf_adjust_freq_unthr_context(). | |
223 | */ | |
e050e3f0 | 224 | u64 interrupts_seq; |
60db5e09 | 225 | u64 interrupts; |
6a24ed6c | 226 | |
b0e87875 PZ |
227 | /* |
228 | * State for freq target events, see __perf_event_overflow() and | |
229 | * perf_adjust_freq_unthr_context(). | |
230 | */ | |
abd50713 PZ |
231 | u64 freq_time_stamp; |
232 | u64 freq_count_stamp; | |
ee06094f | 233 | #endif |
0793a61d TG |
234 | }; |
235 | ||
cdd6c482 | 236 | struct perf_event; |
621a01ea | 237 | |
8d2cacbb PZ |
238 | /* |
239 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
240 | */ | |
fbbe0701 | 241 | #define PERF_PMU_TXN_ADD 0x1 /* txn to add/schedule event on PMU */ |
4a00c16e | 242 | #define PERF_PMU_TXN_READ 0x2 /* txn to read event group from PMU */ |
fbbe0701 | 243 | |
53b25335 VW |
244 | /** |
245 | * pmu::capabilities flags | |
246 | */ | |
247 | #define PERF_PMU_CAP_NO_INTERRUPT 0x01 | |
34f43927 | 248 | #define PERF_PMU_CAP_NO_NMI 0x02 |
0a4e38e6 | 249 | #define PERF_PMU_CAP_AUX_NO_SG 0x04 |
6a279230 | 250 | #define PERF_PMU_CAP_AUX_SW_DOUBLEBUF 0x08 |
bed5b25a | 251 | #define PERF_PMU_CAP_EXCLUSIVE 0x10 |
ec0d7729 | 252 | #define PERF_PMU_CAP_ITRACE 0x20 |
5101ef20 | 253 | #define PERF_PMU_CAP_HETEROGENEOUS_CPUS 0x40 |
53b25335 | 254 | |
621a01ea | 255 | /** |
4aeb0b42 | 256 | * struct pmu - generic performance monitoring unit |
621a01ea | 257 | */ |
4aeb0b42 | 258 | struct pmu { |
b0a873eb PZ |
259 | struct list_head entry; |
260 | ||
c464c76e | 261 | struct module *module; |
abe43400 | 262 | struct device *dev; |
0c9d42ed | 263 | const struct attribute_group **attr_groups; |
03d8e80b | 264 | const char *name; |
2e80a82a PZ |
265 | int type; |
266 | ||
53b25335 VW |
267 | /* |
268 | * various common per-pmu feature flags | |
269 | */ | |
270 | int capabilities; | |
271 | ||
108b02cf PZ |
272 | int * __percpu pmu_disable_count; |
273 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
bed5b25a | 274 | atomic_t exclusive_cnt; /* < 0: cpu; > 0: tsk */ |
8dc85d54 | 275 | int task_ctx_nr; |
62b85639 | 276 | int hrtimer_interval_ms; |
6bde9b6c | 277 | |
375637bc AS |
278 | /* number of address filters this PMU can do */ |
279 | unsigned int nr_addr_filters; | |
280 | ||
6bde9b6c | 281 | /* |
a4eaf7f1 PZ |
282 | * Fully disable/enable this PMU, can be used to protect from the PMI |
283 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 284 | */ |
ad5133b7 PZ |
285 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
286 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 287 | |
8d2cacbb | 288 | /* |
a4eaf7f1 | 289 | * Try and initialize the event for this PMU. |
b0e87875 PZ |
290 | * |
291 | * Returns: | |
292 | * -ENOENT -- @event is not for this PMU | |
293 | * | |
294 | * -ENODEV -- @event is for this PMU but PMU not present | |
295 | * -EBUSY -- @event is for this PMU but PMU temporarily unavailable | |
296 | * -EINVAL -- @event is for this PMU but @event is not valid | |
297 | * -EOPNOTSUPP -- @event is for this PMU, @event is valid, but not supported | |
298 | * -EACCESS -- @event is for this PMU, @event is valid, but no privilidges | |
299 | * | |
300 | * 0 -- @event is for this PMU and valid | |
301 | * | |
302 | * Other error return values are allowed. | |
8d2cacbb | 303 | */ |
b0a873eb PZ |
304 | int (*event_init) (struct perf_event *event); |
305 | ||
1e0fb9ec AL |
306 | /* |
307 | * Notification that the event was mapped or unmapped. Called | |
308 | * in the context of the mapping task. | |
309 | */ | |
bfe33492 PZ |
310 | void (*event_mapped) (struct perf_event *event, struct mm_struct *mm); /* optional */ |
311 | void (*event_unmapped) (struct perf_event *event, struct mm_struct *mm); /* optional */ | |
1e0fb9ec | 312 | |
b0e87875 PZ |
313 | /* |
314 | * Flags for ->add()/->del()/ ->start()/->stop(). There are | |
315 | * matching hw_perf_event::state flags. | |
316 | */ | |
a4eaf7f1 PZ |
317 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
318 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
319 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
320 | ||
8d2cacbb | 321 | /* |
b0e87875 PZ |
322 | * Adds/Removes a counter to/from the PMU, can be done inside a |
323 | * transaction, see the ->*_txn() methods. | |
324 | * | |
325 | * The add/del callbacks will reserve all hardware resources required | |
326 | * to service the event, this includes any counter constraint | |
327 | * scheduling etc. | |
328 | * | |
329 | * Called with IRQs disabled and the PMU disabled on the CPU the event | |
330 | * is on. | |
331 | * | |
332 | * ->add() called without PERF_EF_START should result in the same state | |
333 | * as ->add() followed by ->stop(). | |
334 | * | |
335 | * ->del() must always PERF_EF_UPDATE stop an event. If it calls | |
336 | * ->stop() that must deal with already being stopped without | |
337 | * PERF_EF_UPDATE. | |
a4eaf7f1 PZ |
338 | */ |
339 | int (*add) (struct perf_event *event, int flags); | |
340 | void (*del) (struct perf_event *event, int flags); | |
341 | ||
342 | /* | |
b0e87875 PZ |
343 | * Starts/Stops a counter present on the PMU. |
344 | * | |
345 | * The PMI handler should stop the counter when perf_event_overflow() | |
346 | * returns !0. ->start() will be used to continue. | |
347 | * | |
348 | * Also used to change the sample period. | |
349 | * | |
350 | * Called with IRQs disabled and the PMU disabled on the CPU the event | |
351 | * is on -- will be called from NMI context with the PMU generates | |
352 | * NMIs. | |
353 | * | |
354 | * ->stop() with PERF_EF_UPDATE will read the counter and update | |
355 | * period/count values like ->read() would. | |
356 | * | |
357 | * ->start() with PERF_EF_RELOAD will reprogram the the counter | |
358 | * value, must be preceded by a ->stop() with PERF_EF_UPDATE. | |
a4eaf7f1 PZ |
359 | */ |
360 | void (*start) (struct perf_event *event, int flags); | |
361 | void (*stop) (struct perf_event *event, int flags); | |
362 | ||
363 | /* | |
364 | * Updates the counter value of the event. | |
b0e87875 PZ |
365 | * |
366 | * For sampling capable PMUs this will also update the software period | |
367 | * hw_perf_event::period_left field. | |
a4eaf7f1 | 368 | */ |
cdd6c482 | 369 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
370 | |
371 | /* | |
24cd7f54 PZ |
372 | * Group events scheduling is treated as a transaction, add |
373 | * group events as a whole and perform one schedulability test. | |
374 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
375 | * |
376 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 377 | * do schedulability tests. |
fbbe0701 SB |
378 | * |
379 | * Optional. | |
8d2cacbb | 380 | */ |
fbbe0701 | 381 | void (*start_txn) (struct pmu *pmu, unsigned int txn_flags); |
8d2cacbb | 382 | /* |
a4eaf7f1 | 383 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
384 | * then ->commit_txn() is required to perform one. On success |
385 | * the transaction is closed. On error the transaction is kept | |
386 | * open until ->cancel_txn() is called. | |
fbbe0701 SB |
387 | * |
388 | * Optional. | |
8d2cacbb | 389 | */ |
fbbe0701 | 390 | int (*commit_txn) (struct pmu *pmu); |
8d2cacbb | 391 | /* |
a4eaf7f1 | 392 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 393 | * for each successful ->add() during the transaction. |
fbbe0701 SB |
394 | * |
395 | * Optional. | |
8d2cacbb | 396 | */ |
fbbe0701 | 397 | void (*cancel_txn) (struct pmu *pmu); |
35edc2a5 PZ |
398 | |
399 | /* | |
400 | * Will return the value for perf_event_mmap_page::index for this event, | |
401 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
402 | */ | |
403 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 | 404 | |
ba532500 YZ |
405 | /* |
406 | * context-switches callback | |
407 | */ | |
408 | void (*sched_task) (struct perf_event_context *ctx, | |
409 | bool sched_in); | |
4af57ef2 YZ |
410 | /* |
411 | * PMU specific data size | |
412 | */ | |
413 | size_t task_ctx_size; | |
ba532500 | 414 | |
eacd3ecc MF |
415 | |
416 | /* | |
417 | * Return the count value for a counter. | |
418 | */ | |
419 | u64 (*count) (struct perf_event *event); /*optional*/ | |
45bfb2e5 PZ |
420 | |
421 | /* | |
422 | * Set up pmu-private data structures for an AUX area | |
423 | */ | |
424 | void *(*setup_aux) (int cpu, void **pages, | |
425 | int nr_pages, bool overwrite); | |
426 | /* optional */ | |
427 | ||
428 | /* | |
429 | * Free pmu-private AUX data structures | |
430 | */ | |
431 | void (*free_aux) (void *aux); /* optional */ | |
66eb579e | 432 | |
375637bc AS |
433 | /* |
434 | * Validate address range filters: make sure the HW supports the | |
435 | * requested configuration and number of filters; return 0 if the | |
436 | * supplied filters are valid, -errno otherwise. | |
437 | * | |
438 | * Runs in the context of the ioctl()ing process and is not serialized | |
439 | * with the rest of the PMU callbacks. | |
440 | */ | |
441 | int (*addr_filters_validate) (struct list_head *filters); | |
442 | /* optional */ | |
443 | ||
444 | /* | |
445 | * Synchronize address range filter configuration: | |
446 | * translate hw-agnostic filters into hardware configuration in | |
447 | * event::hw::addr_filters. | |
448 | * | |
449 | * Runs as a part of filter sync sequence that is done in ->start() | |
450 | * callback by calling perf_event_addr_filters_sync(). | |
451 | * | |
452 | * May (and should) traverse event::addr_filters::list, for which its | |
453 | * caller provides necessary serialization. | |
454 | */ | |
455 | void (*addr_filters_sync) (struct perf_event *event); | |
456 | /* optional */ | |
457 | ||
66eb579e MR |
458 | /* |
459 | * Filter events for PMU-specific reasons. | |
460 | */ | |
461 | int (*filter_match) (struct perf_event *event); /* optional */ | |
621a01ea IM |
462 | }; |
463 | ||
375637bc AS |
464 | /** |
465 | * struct perf_addr_filter - address range filter definition | |
466 | * @entry: event's filter list linkage | |
467 | * @inode: object file's inode for file-based filters | |
468 | * @offset: filter range offset | |
469 | * @size: filter range size | |
470 | * @range: 1: range, 0: address | |
471 | * @filter: 1: filter/start, 0: stop | |
472 | * | |
473 | * This is a hardware-agnostic filter configuration as specified by the user. | |
474 | */ | |
475 | struct perf_addr_filter { | |
476 | struct list_head entry; | |
477 | struct inode *inode; | |
478 | unsigned long offset; | |
479 | unsigned long size; | |
480 | unsigned int range : 1, | |
481 | filter : 1; | |
482 | }; | |
483 | ||
484 | /** | |
485 | * struct perf_addr_filters_head - container for address range filters | |
486 | * @list: list of filters for this event | |
487 | * @lock: spinlock that serializes accesses to the @list and event's | |
488 | * (and its children's) filter generations. | |
6ce77bfd | 489 | * @nr_file_filters: number of file-based filters |
375637bc AS |
490 | * |
491 | * A child event will use parent's @list (and therefore @lock), so they are | |
492 | * bundled together; see perf_event_addr_filters(). | |
493 | */ | |
494 | struct perf_addr_filters_head { | |
495 | struct list_head list; | |
496 | raw_spinlock_t lock; | |
6ce77bfd | 497 | unsigned int nr_file_filters; |
375637bc AS |
498 | }; |
499 | ||
6a930700 | 500 | /** |
cdd6c482 | 501 | * enum perf_event_active_state - the states of a event |
6a930700 | 502 | */ |
cdd6c482 | 503 | enum perf_event_active_state { |
a69b0ca4 | 504 | PERF_EVENT_STATE_DEAD = -4, |
179033b3 | 505 | PERF_EVENT_STATE_EXIT = -3, |
57c0c15b | 506 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
507 | PERF_EVENT_STATE_OFF = -1, |
508 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 509 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
510 | }; |
511 | ||
9b51f66d | 512 | struct file; |
453f19ee PZ |
513 | struct perf_sample_data; |
514 | ||
a8b0ca17 | 515 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
516 | struct perf_sample_data *, |
517 | struct pt_regs *regs); | |
518 | ||
4ff6a8de DCC |
519 | /* |
520 | * Event capabilities. For event_caps and groups caps. | |
521 | * | |
522 | * PERF_EV_CAP_SOFTWARE: Is a software event. | |
d6a2f903 DCC |
523 | * PERF_EV_CAP_READ_ACTIVE_PKG: A CPU event (or cgroup event) that can be read |
524 | * from any CPU in the package where it is active. | |
4ff6a8de DCC |
525 | */ |
526 | #define PERF_EV_CAP_SOFTWARE BIT(0) | |
d6a2f903 | 527 | #define PERF_EV_CAP_READ_ACTIVE_PKG BIT(1) |
d6f962b5 | 528 | |
e7e7ee2e IM |
529 | #define SWEVENT_HLIST_BITS 8 |
530 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
531 | |
532 | struct swevent_hlist { | |
e7e7ee2e IM |
533 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
534 | struct rcu_head rcu_head; | |
76e1d904 FW |
535 | }; |
536 | ||
8a49542c PZ |
537 | #define PERF_ATTACH_CONTEXT 0x01 |
538 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 539 | #define PERF_ATTACH_TASK 0x04 |
4af57ef2 | 540 | #define PERF_ATTACH_TASK_DATA 0x08 |
8d4e6c4c | 541 | #define PERF_ATTACH_ITRACE 0x10 |
8a49542c | 542 | |
877c6856 | 543 | struct perf_cgroup; |
76369139 FW |
544 | struct ring_buffer; |
545 | ||
f2fb6bef KL |
546 | struct pmu_event_list { |
547 | raw_spinlock_t lock; | |
548 | struct list_head list; | |
549 | }; | |
550 | ||
0793a61d | 551 | /** |
cdd6c482 | 552 | * struct perf_event - performance event kernel representation: |
0793a61d | 553 | */ |
cdd6c482 IM |
554 | struct perf_event { |
555 | #ifdef CONFIG_PERF_EVENTS | |
9886167d PZ |
556 | /* |
557 | * entry onto perf_event_context::event_list; | |
558 | * modifications require ctx->lock | |
559 | * RCU safe iterations. | |
560 | */ | |
592903cd | 561 | struct list_head event_entry; |
9886167d PZ |
562 | |
563 | /* | |
564 | * XXX: group_entry and sibling_list should be mutually exclusive; | |
565 | * either you're a sibling on a group, or you're the group leader. | |
566 | * Rework the code to always use the same list element. | |
567 | * | |
568 | * Locked for modification by both ctx->mutex and ctx->lock; holding | |
569 | * either sufficies for read. | |
570 | */ | |
571 | struct list_head group_entry; | |
04289bb9 | 572 | struct list_head sibling_list; |
9886167d PZ |
573 | |
574 | /* | |
575 | * We need storage to track the entries in perf_pmu_migrate_context; we | |
576 | * cannot use the event_entry because of RCU and we want to keep the | |
577 | * group in tact which avoids us using the other two entries. | |
578 | */ | |
579 | struct list_head migrate_entry; | |
580 | ||
f3ae75de SE |
581 | struct hlist_node hlist_entry; |
582 | struct list_head active_entry; | |
0127c3ea | 583 | int nr_siblings; |
4ff6a8de DCC |
584 | |
585 | /* Not serialized. Only written during event initialization. */ | |
586 | int event_caps; | |
587 | /* The cumulative AND of all event_caps for events in this group. */ | |
588 | int group_caps; | |
589 | ||
cdd6c482 | 590 | struct perf_event *group_leader; |
a4eaf7f1 | 591 | struct pmu *pmu; |
54d751d4 | 592 | void *pmu_private; |
04289bb9 | 593 | |
cdd6c482 | 594 | enum perf_event_active_state state; |
8a49542c | 595 | unsigned int attach_state; |
e7850595 | 596 | local64_t count; |
a6e6dea6 | 597 | atomic64_t child_count; |
ee06094f | 598 | |
53cfbf59 | 599 | /* |
cdd6c482 | 600 | * These are the total time in nanoseconds that the event |
53cfbf59 | 601 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 602 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
603 | * and running (scheduled onto the CPU), respectively. |
604 | * | |
605 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 606 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
607 | */ |
608 | u64 total_time_enabled; | |
609 | u64 total_time_running; | |
610 | ||
611 | /* | |
612 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 613 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
614 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
615 | * in time. | |
cdd6c482 IM |
616 | * tstamp_enabled: the notional time when the event was enabled |
617 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 618 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 619 | * event was scheduled off. |
53cfbf59 PM |
620 | */ |
621 | u64 tstamp_enabled; | |
622 | u64 tstamp_running; | |
623 | u64 tstamp_stopped; | |
624 | ||
eed01528 SE |
625 | /* |
626 | * timestamp shadows the actual context timing but it can | |
627 | * be safely used in NMI interrupt context. It reflects the | |
628 | * context time as it was when the event was last scheduled in. | |
629 | * | |
630 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
631 | * compute ctx_time for a sample, simply add perf_clock(). | |
632 | */ | |
633 | u64 shadow_ctx_time; | |
634 | ||
24f1e32c | 635 | struct perf_event_attr attr; |
c320c7b7 | 636 | u16 header_size; |
6844c09d | 637 | u16 id_header_size; |
c320c7b7 | 638 | u16 read_size; |
cdd6c482 | 639 | struct hw_perf_event hw; |
0793a61d | 640 | |
cdd6c482 | 641 | struct perf_event_context *ctx; |
a6fa941d | 642 | atomic_long_t refcount; |
0793a61d | 643 | |
53cfbf59 PM |
644 | /* |
645 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 646 | * events have been enabled and running, respectively. |
53cfbf59 PM |
647 | */ |
648 | atomic64_t child_total_time_enabled; | |
649 | atomic64_t child_total_time_running; | |
650 | ||
0793a61d | 651 | /* |
d859e29f | 652 | * Protect attach/detach and child_list: |
0793a61d | 653 | */ |
fccc714b PZ |
654 | struct mutex child_mutex; |
655 | struct list_head child_list; | |
cdd6c482 | 656 | struct perf_event *parent; |
0793a61d TG |
657 | |
658 | int oncpu; | |
659 | int cpu; | |
660 | ||
082ff5a2 PZ |
661 | struct list_head owner_entry; |
662 | struct task_struct *owner; | |
663 | ||
7b732a75 PZ |
664 | /* mmap bits */ |
665 | struct mutex mmap_mutex; | |
666 | atomic_t mmap_count; | |
26cb63ad | 667 | |
76369139 | 668 | struct ring_buffer *rb; |
10c6db11 | 669 | struct list_head rb_entry; |
b69cf536 PZ |
670 | unsigned long rcu_batches; |
671 | int rcu_pending; | |
37d81828 | 672 | |
7b732a75 | 673 | /* poll related */ |
0793a61d | 674 | wait_queue_head_t waitq; |
3c446b3d | 675 | struct fasync_struct *fasync; |
79f14641 PZ |
676 | |
677 | /* delayed work for NMIs and such */ | |
678 | int pending_wakeup; | |
4c9e2542 | 679 | int pending_kill; |
79f14641 | 680 | int pending_disable; |
e360adbe | 681 | struct irq_work pending; |
592903cd | 682 | |
79f14641 PZ |
683 | atomic_t event_limit; |
684 | ||
375637bc AS |
685 | /* address range filters */ |
686 | struct perf_addr_filters_head addr_filters; | |
687 | /* vma address array for file-based filders */ | |
688 | unsigned long *addr_filters_offs; | |
689 | unsigned long addr_filters_gen; | |
690 | ||
cdd6c482 | 691 | void (*destroy)(struct perf_event *); |
592903cd | 692 | struct rcu_head rcu_head; |
709e50cf PZ |
693 | |
694 | struct pid_namespace *ns; | |
8e5799b1 | 695 | u64 id; |
6fb2915d | 696 | |
34f43927 | 697 | u64 (*clock)(void); |
b326e956 | 698 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 699 | void *overflow_handler_context; |
aa6a5f3c AS |
700 | #ifdef CONFIG_BPF_SYSCALL |
701 | perf_overflow_handler_t orig_overflow_handler; | |
702 | struct bpf_prog *prog; | |
703 | #endif | |
453f19ee | 704 | |
07b139c8 | 705 | #ifdef CONFIG_EVENT_TRACING |
2425bcb9 | 706 | struct trace_event_call *tp_event; |
6fb2915d | 707 | struct event_filter *filter; |
ced39002 JO |
708 | #ifdef CONFIG_FUNCTION_TRACER |
709 | struct ftrace_ops ftrace_ops; | |
710 | #endif | |
ee06094f | 711 | #endif |
6fb2915d | 712 | |
e5d1367f SE |
713 | #ifdef CONFIG_CGROUP_PERF |
714 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
715 | int cgrp_defer_enabled; | |
716 | #endif | |
717 | ||
f2fb6bef | 718 | struct list_head sb_list; |
6fb2915d | 719 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
720 | }; |
721 | ||
722 | /** | |
cdd6c482 | 723 | * struct perf_event_context - event context structure |
0793a61d | 724 | * |
cdd6c482 | 725 | * Used as a container for task events and CPU events as well: |
0793a61d | 726 | */ |
cdd6c482 | 727 | struct perf_event_context { |
108b02cf | 728 | struct pmu *pmu; |
0793a61d | 729 | /* |
cdd6c482 | 730 | * Protect the states of the events in the list, |
d859e29f | 731 | * nr_active, and the list: |
0793a61d | 732 | */ |
e625cce1 | 733 | raw_spinlock_t lock; |
d859e29f | 734 | /* |
cdd6c482 | 735 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
736 | * is sufficient to ensure the list doesn't change; to change |
737 | * the list you need to lock both the mutex and the spinlock. | |
738 | */ | |
a308444c | 739 | struct mutex mutex; |
04289bb9 | 740 | |
2fde4f94 | 741 | struct list_head active_ctx_list; |
889ff015 FW |
742 | struct list_head pinned_groups; |
743 | struct list_head flexible_groups; | |
a308444c | 744 | struct list_head event_list; |
cdd6c482 | 745 | int nr_events; |
a308444c IM |
746 | int nr_active; |
747 | int is_active; | |
bfbd3381 | 748 | int nr_stat; |
0f5a2601 | 749 | int nr_freq; |
dddd3379 | 750 | int rotate_disable; |
a308444c IM |
751 | atomic_t refcount; |
752 | struct task_struct *task; | |
53cfbf59 PM |
753 | |
754 | /* | |
4af4998b | 755 | * Context clock, runs when context enabled. |
53cfbf59 | 756 | */ |
a308444c IM |
757 | u64 time; |
758 | u64 timestamp; | |
564c2b21 PM |
759 | |
760 | /* | |
761 | * These fields let us detect when two contexts have both | |
762 | * been cloned (inherited) from a common ancestor. | |
763 | */ | |
cdd6c482 | 764 | struct perf_event_context *parent_ctx; |
a308444c IM |
765 | u64 parent_gen; |
766 | u64 generation; | |
767 | int pin_count; | |
db4a8356 | 768 | #ifdef CONFIG_CGROUP_PERF |
d010b332 | 769 | int nr_cgroups; /* cgroup evts */ |
db4a8356 | 770 | #endif |
4af57ef2 | 771 | void *task_ctx_data; /* pmu specific data */ |
28009ce4 | 772 | struct rcu_head rcu_head; |
0793a61d TG |
773 | }; |
774 | ||
7ae07ea3 FW |
775 | /* |
776 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 777 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
778 | */ |
779 | #define PERF_NR_CONTEXTS 4 | |
780 | ||
0793a61d | 781 | /** |
cdd6c482 | 782 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
783 | */ |
784 | struct perf_cpu_context { | |
cdd6c482 IM |
785 | struct perf_event_context ctx; |
786 | struct perf_event_context *task_ctx; | |
0793a61d | 787 | int active_oncpu; |
3b6f9e5c | 788 | int exclusive; |
4cfafd30 PZ |
789 | |
790 | raw_spinlock_t hrtimer_lock; | |
9e630205 SE |
791 | struct hrtimer hrtimer; |
792 | ktime_t hrtimer_interval; | |
4cfafd30 PZ |
793 | unsigned int hrtimer_active; |
794 | ||
db4a8356 | 795 | #ifdef CONFIG_CGROUP_PERF |
e5d1367f | 796 | struct perf_cgroup *cgrp; |
058fe1c0 | 797 | struct list_head cgrp_cpuctx_entry; |
db4a8356 | 798 | #endif |
e48c1788 PZ |
799 | |
800 | struct list_head sched_cb_entry; | |
801 | int sched_cb_usage; | |
a63fbed7 TG |
802 | |
803 | int online; | |
0793a61d TG |
804 | }; |
805 | ||
5622f295 | 806 | struct perf_output_handle { |
57c0c15b | 807 | struct perf_event *event; |
76369139 | 808 | struct ring_buffer *rb; |
6d1acfd5 | 809 | unsigned long wakeup; |
5d967a8b | 810 | unsigned long size; |
f4c0b0aa | 811 | u64 aux_flags; |
fdc26706 AS |
812 | union { |
813 | void *addr; | |
814 | unsigned long head; | |
815 | }; | |
5d967a8b | 816 | int page; |
5622f295 MM |
817 | }; |
818 | ||
0515e599 AS |
819 | struct bpf_perf_event_data_kern { |
820 | struct pt_regs *regs; | |
821 | struct perf_sample_data *data; | |
822 | }; | |
823 | ||
39bed6cb MF |
824 | #ifdef CONFIG_CGROUP_PERF |
825 | ||
826 | /* | |
827 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
828 | * This is a per-cpu dynamically allocated data structure. | |
829 | */ | |
830 | struct perf_cgroup_info { | |
831 | u64 time; | |
832 | u64 timestamp; | |
833 | }; | |
834 | ||
835 | struct perf_cgroup { | |
836 | struct cgroup_subsys_state css; | |
837 | struct perf_cgroup_info __percpu *info; | |
838 | }; | |
839 | ||
840 | /* | |
841 | * Must ensure cgroup is pinned (css_get) before calling | |
842 | * this function. In other words, we cannot call this function | |
843 | * if there is no cgroup event for the current CPU context. | |
844 | */ | |
845 | static inline struct perf_cgroup * | |
614e4c4e | 846 | perf_cgroup_from_task(struct task_struct *task, struct perf_event_context *ctx) |
39bed6cb | 847 | { |
614e4c4e SE |
848 | return container_of(task_css_check(task, perf_event_cgrp_id, |
849 | ctx ? lockdep_is_held(&ctx->lock) | |
850 | : true), | |
39bed6cb MF |
851 | struct perf_cgroup, css); |
852 | } | |
853 | #endif /* CONFIG_CGROUP_PERF */ | |
854 | ||
cdd6c482 | 855 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 856 | |
fdc26706 AS |
857 | extern void *perf_aux_output_begin(struct perf_output_handle *handle, |
858 | struct perf_event *event); | |
859 | extern void perf_aux_output_end(struct perf_output_handle *handle, | |
f4c0b0aa | 860 | unsigned long size); |
fdc26706 AS |
861 | extern int perf_aux_output_skip(struct perf_output_handle *handle, |
862 | unsigned long size); | |
863 | extern void *perf_get_aux(struct perf_output_handle *handle); | |
f4c0b0aa | 864 | extern void perf_aux_output_flag(struct perf_output_handle *handle, u64 flags); |
8d4e6c4c | 865 | extern void perf_event_itrace_started(struct perf_event *event); |
fdc26706 | 866 | |
03d8e80b | 867 | extern int perf_pmu_register(struct pmu *pmu, const char *name, int type); |
b0a873eb | 868 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 869 | |
3bf101ba | 870 | extern int perf_num_counters(void); |
84c79910 | 871 | extern const char *perf_pmu_name(void); |
ab0cce56 JO |
872 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
873 | struct task_struct *task); | |
874 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
875 | struct task_struct *next); | |
cdd6c482 IM |
876 | extern int perf_event_init_task(struct task_struct *child); |
877 | extern void perf_event_exit_task(struct task_struct *child); | |
878 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 879 | extern void perf_event_delayed_put(struct task_struct *task); |
e03e7ee3 | 880 | extern struct file *perf_event_get(unsigned int fd); |
ffe8690c | 881 | extern const struct perf_event_attr *perf_event_attrs(struct perf_event *event); |
cdd6c482 | 882 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
883 | extern void perf_pmu_disable(struct pmu *pmu); |
884 | extern void perf_pmu_enable(struct pmu *pmu); | |
ba532500 YZ |
885 | extern void perf_sched_cb_dec(struct pmu *pmu); |
886 | extern void perf_sched_cb_inc(struct pmu *pmu); | |
cdd6c482 IM |
887 | extern int perf_event_task_disable(void); |
888 | extern int perf_event_task_enable(void); | |
26ca5c11 | 889 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 890 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
891 | extern int perf_event_release_kernel(struct perf_event *event); |
892 | extern struct perf_event * | |
893 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
894 | int cpu, | |
38a81da2 | 895 | struct task_struct *task, |
4dc0da86 AK |
896 | perf_overflow_handler_t callback, |
897 | void *context); | |
0cda4c02 YZ |
898 | extern void perf_pmu_migrate_context(struct pmu *pmu, |
899 | int src_cpu, int dst_cpu); | |
f91840a3 | 900 | int perf_event_read_local(struct perf_event *event, u64 *value); |
59ed446f PZ |
901 | extern u64 perf_event_read_value(struct perf_event *event, |
902 | u64 *enabled, u64 *running); | |
5c92d124 | 903 | |
d010b332 | 904 | |
df1a132b | 905 | struct perf_sample_data { |
2565711f PZ |
906 | /* |
907 | * Fields set by perf_sample_data_init(), group so as to | |
908 | * minimize the cachelines touched. | |
909 | */ | |
910 | u64 addr; | |
911 | struct perf_raw_record *raw; | |
912 | struct perf_branch_stack *br_stack; | |
913 | u64 period; | |
914 | u64 weight; | |
915 | u64 txn; | |
916 | union perf_mem_data_src data_src; | |
5622f295 | 917 | |
2565711f PZ |
918 | /* |
919 | * The other fields, optionally {set,used} by | |
920 | * perf_{prepare,output}_sample(). | |
921 | */ | |
922 | u64 type; | |
5622f295 MM |
923 | u64 ip; |
924 | struct { | |
925 | u32 pid; | |
926 | u32 tid; | |
927 | } tid_entry; | |
928 | u64 time; | |
5622f295 MM |
929 | u64 id; |
930 | u64 stream_id; | |
931 | struct { | |
932 | u32 cpu; | |
933 | u32 reserved; | |
934 | } cpu_entry; | |
5622f295 | 935 | struct perf_callchain_entry *callchain; |
88a7c26a AL |
936 | |
937 | /* | |
938 | * regs_user may point to task_pt_regs or to regs_user_copy, depending | |
939 | * on arch details. | |
940 | */ | |
60e2364e | 941 | struct perf_regs regs_user; |
88a7c26a AL |
942 | struct pt_regs regs_user_copy; |
943 | ||
60e2364e | 944 | struct perf_regs regs_intr; |
c5ebcedb | 945 | u64 stack_user_size; |
2565711f | 946 | } ____cacheline_aligned; |
df1a132b | 947 | |
770eee1f SE |
948 | /* default value for data source */ |
949 | #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ | |
950 | PERF_MEM_S(LVL, NA) |\ | |
951 | PERF_MEM_S(SNOOP, NA) |\ | |
952 | PERF_MEM_S(LOCK, NA) |\ | |
953 | PERF_MEM_S(TLB, NA)) | |
954 | ||
fd0d000b RR |
955 | static inline void perf_sample_data_init(struct perf_sample_data *data, |
956 | u64 addr, u64 period) | |
dc1d628a | 957 | { |
fd0d000b | 958 | /* remaining struct members initialized in perf_prepare_sample() */ |
dc1d628a PZ |
959 | data->addr = addr; |
960 | data->raw = NULL; | |
bce38cd5 | 961 | data->br_stack = NULL; |
4018994f | 962 | data->period = period; |
c3feedf2 | 963 | data->weight = 0; |
770eee1f | 964 | data->data_src.val = PERF_MEM_NA; |
fdfbbd07 | 965 | data->txn = 0; |
dc1d628a PZ |
966 | } |
967 | ||
5622f295 MM |
968 | extern void perf_output_sample(struct perf_output_handle *handle, |
969 | struct perf_event_header *header, | |
970 | struct perf_sample_data *data, | |
cdd6c482 | 971 | struct perf_event *event); |
5622f295 MM |
972 | extern void perf_prepare_sample(struct perf_event_header *header, |
973 | struct perf_sample_data *data, | |
cdd6c482 | 974 | struct perf_event *event, |
5622f295 MM |
975 | struct pt_regs *regs); |
976 | ||
a8b0ca17 | 977 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
978 | struct perf_sample_data *data, |
979 | struct pt_regs *regs); | |
df1a132b | 980 | |
9ecda41a WN |
981 | extern void perf_event_output_forward(struct perf_event *event, |
982 | struct perf_sample_data *data, | |
983 | struct pt_regs *regs); | |
984 | extern void perf_event_output_backward(struct perf_event *event, | |
985 | struct perf_sample_data *data, | |
986 | struct pt_regs *regs); | |
21509084 | 987 | extern void perf_event_output(struct perf_event *event, |
9ecda41a WN |
988 | struct perf_sample_data *data, |
989 | struct pt_regs *regs); | |
21509084 | 990 | |
1879445d WN |
991 | static inline bool |
992 | is_default_overflow_handler(struct perf_event *event) | |
993 | { | |
9ecda41a WN |
994 | if (likely(event->overflow_handler == perf_event_output_forward)) |
995 | return true; | |
996 | if (unlikely(event->overflow_handler == perf_event_output_backward)) | |
997 | return true; | |
998 | return false; | |
1879445d WN |
999 | } |
1000 | ||
21509084 YZ |
1001 | extern void |
1002 | perf_event_header__init_id(struct perf_event_header *header, | |
1003 | struct perf_sample_data *data, | |
1004 | struct perf_event *event); | |
1005 | extern void | |
1006 | perf_event__output_id_sample(struct perf_event *event, | |
1007 | struct perf_output_handle *handle, | |
1008 | struct perf_sample_data *sample); | |
1009 | ||
f38b0dbb KL |
1010 | extern void |
1011 | perf_log_lost_samples(struct perf_event *event, u64 lost); | |
1012 | ||
6c7e550f FBH |
1013 | static inline bool is_sampling_event(struct perf_event *event) |
1014 | { | |
1015 | return event->attr.sample_period != 0; | |
1016 | } | |
1017 | ||
3b6f9e5c | 1018 | /* |
cdd6c482 | 1019 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 1020 | */ |
cdd6c482 | 1021 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 1022 | { |
4ff6a8de | 1023 | return event->event_caps & PERF_EV_CAP_SOFTWARE; |
3b6f9e5c PM |
1024 | } |
1025 | ||
c5905afb | 1026 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 1027 | |
86038c5e | 1028 | extern void ___perf_sw_event(u32, u64, struct pt_regs *, u64); |
a8b0ca17 | 1029 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 1030 | |
b0f82b81 | 1031 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 1032 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 1033 | #endif |
5331d7b8 FW |
1034 | |
1035 | /* | |
1036 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
1037 | * the nth caller. We only need a few of the regs: | |
1038 | * - ip for PERF_SAMPLE_IP | |
1039 | * - cs for user_mode() tests | |
1040 | * - bp for callchains | |
1041 | * - eflags, for future purposes, just in case | |
1042 | */ | |
b0f82b81 | 1043 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 1044 | { |
b0f82b81 | 1045 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
1046 | } |
1047 | ||
7e54a5a0 | 1048 | static __always_inline void |
a8b0ca17 | 1049 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1050 | { |
86038c5e PZI |
1051 | if (static_key_false(&perf_swevent_enabled[event_id])) |
1052 | __perf_sw_event(event_id, nr, regs, addr); | |
1053 | } | |
1054 | ||
1055 | DECLARE_PER_CPU(struct pt_regs, __perf_regs[4]); | |
7e54a5a0 | 1056 | |
86038c5e PZI |
1057 | /* |
1058 | * 'Special' version for the scheduler, it hard assumes no recursion, | |
1059 | * which is guaranteed by us not actually scheduling inside other swevents | |
1060 | * because those disable preemption. | |
1061 | */ | |
1062 | static __always_inline void | |
1063 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) | |
1064 | { | |
c5905afb | 1065 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
86038c5e PZI |
1066 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); |
1067 | ||
1068 | perf_fetch_caller_regs(regs); | |
1069 | ___perf_sw_event(event_id, nr, regs, addr); | |
e49a5bd3 FW |
1070 | } |
1071 | } | |
1072 | ||
9107c89e | 1073 | extern struct static_key_false perf_sched_events; |
ee6dcfa4 | 1074 | |
ff303e66 PZ |
1075 | static __always_inline bool |
1076 | perf_sw_migrate_enabled(void) | |
1077 | { | |
1078 | if (static_key_false(&perf_swevent_enabled[PERF_COUNT_SW_CPU_MIGRATIONS])) | |
1079 | return true; | |
1080 | return false; | |
1081 | } | |
1082 | ||
1083 | static inline void perf_event_task_migrate(struct task_struct *task) | |
1084 | { | |
1085 | if (perf_sw_migrate_enabled()) | |
1086 | task->sched_migrated = 1; | |
1087 | } | |
1088 | ||
ab0cce56 | 1089 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
a8d757ef | 1090 | struct task_struct *task) |
ab0cce56 | 1091 | { |
9107c89e | 1092 | if (static_branch_unlikely(&perf_sched_events)) |
ab0cce56 | 1093 | __perf_event_task_sched_in(prev, task); |
ff303e66 PZ |
1094 | |
1095 | if (perf_sw_migrate_enabled() && task->sched_migrated) { | |
1096 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); | |
1097 | ||
1098 | perf_fetch_caller_regs(regs); | |
1099 | ___perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, regs, 0); | |
1100 | task->sched_migrated = 0; | |
1101 | } | |
ab0cce56 JO |
1102 | } |
1103 | ||
1104 | static inline void perf_event_task_sched_out(struct task_struct *prev, | |
1105 | struct task_struct *next) | |
ee6dcfa4 | 1106 | { |
86038c5e | 1107 | perf_sw_event_sched(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, 0); |
ee6dcfa4 | 1108 | |
9107c89e | 1109 | if (static_branch_unlikely(&perf_sched_events)) |
ab0cce56 | 1110 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
1111 | } |
1112 | ||
eacd3ecc MF |
1113 | static inline u64 __perf_event_count(struct perf_event *event) |
1114 | { | |
1115 | return local64_read(&event->count) + atomic64_read(&event->child_count); | |
1116 | } | |
1117 | ||
3af9e859 | 1118 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 1119 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1120 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1121 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1122 | |
e041e328 | 1123 | extern void perf_event_exec(void); |
82b89778 | 1124 | extern void perf_event_comm(struct task_struct *tsk, bool exec); |
e4222673 | 1125 | extern void perf_event_namespaces(struct task_struct *tsk); |
cdd6c482 | 1126 | extern void perf_event_fork(struct task_struct *tsk); |
8d1b2d93 | 1127 | |
56962b44 FW |
1128 | /* Callchains */ |
1129 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1130 | ||
cfbcf468 ACM |
1131 | extern void perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); |
1132 | extern void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); | |
568b329a AS |
1133 | extern struct perf_callchain_entry * |
1134 | get_perf_callchain(struct pt_regs *regs, u32 init_nr, bool kernel, bool user, | |
cfbcf468 | 1135 | u32 max_stack, bool crosstask, bool add_mark); |
97c79a38 | 1136 | extern int get_callchain_buffers(int max_stack); |
568b329a | 1137 | extern void put_callchain_buffers(void); |
394ee076 | 1138 | |
c5dfd78e | 1139 | extern int sysctl_perf_event_max_stack; |
c85b0334 | 1140 | extern int sysctl_perf_event_max_contexts_per_stack; |
c5dfd78e | 1141 | |
c85b0334 ACM |
1142 | static inline int perf_callchain_store_context(struct perf_callchain_entry_ctx *ctx, u64 ip) |
1143 | { | |
1144 | if (ctx->contexts < sysctl_perf_event_max_contexts_per_stack) { | |
1145 | struct perf_callchain_entry *entry = ctx->entry; | |
1146 | entry->ip[entry->nr++] = ip; | |
1147 | ++ctx->contexts; | |
1148 | return 0; | |
1149 | } else { | |
1150 | ctx->contexts_maxed = true; | |
1151 | return -1; /* no more room, stop walking the stack */ | |
1152 | } | |
1153 | } | |
3e4de4ec | 1154 | |
cfbcf468 | 1155 | static inline int perf_callchain_store(struct perf_callchain_entry_ctx *ctx, u64 ip) |
70791ce9 | 1156 | { |
c85b0334 | 1157 | if (ctx->nr < ctx->max_stack && !ctx->contexts_maxed) { |
3b1fff08 | 1158 | struct perf_callchain_entry *entry = ctx->entry; |
70791ce9 | 1159 | entry->ip[entry->nr++] = ip; |
3b1fff08 | 1160 | ++ctx->nr; |
568b329a AS |
1161 | return 0; |
1162 | } else { | |
1163 | return -1; /* no more room, stop walking the stack */ | |
1164 | } | |
70791ce9 | 1165 | } |
394ee076 | 1166 | |
cdd6c482 IM |
1167 | extern int sysctl_perf_event_paranoid; |
1168 | extern int sysctl_perf_event_mlock; | |
1169 | extern int sysctl_perf_event_sample_rate; | |
14c63f17 DH |
1170 | extern int sysctl_perf_cpu_time_max_percent; |
1171 | ||
1172 | extern void perf_sample_event_took(u64 sample_len_ns); | |
1ccd1549 | 1173 | |
163ec435 PZ |
1174 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
1175 | void __user *buffer, size_t *lenp, | |
1176 | loff_t *ppos); | |
14c63f17 DH |
1177 | extern int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, |
1178 | void __user *buffer, size_t *lenp, | |
1179 | loff_t *ppos); | |
1180 | ||
c5dfd78e ACM |
1181 | int perf_event_max_stack_handler(struct ctl_table *table, int write, |
1182 | void __user *buffer, size_t *lenp, loff_t *ppos); | |
163ec435 | 1183 | |
320ebf09 PZ |
1184 | static inline bool perf_paranoid_tracepoint_raw(void) |
1185 | { | |
1186 | return sysctl_perf_event_paranoid > -1; | |
1187 | } | |
1188 | ||
1189 | static inline bool perf_paranoid_cpu(void) | |
1190 | { | |
1191 | return sysctl_perf_event_paranoid > 0; | |
1192 | } | |
1193 | ||
1194 | static inline bool perf_paranoid_kernel(void) | |
1195 | { | |
1196 | return sysctl_perf_event_paranoid > 1; | |
1197 | } | |
1198 | ||
cdd6c482 | 1199 | extern void perf_event_init(void); |
1e1dcd93 | 1200 | extern void perf_tp_event(u16 event_type, u64 count, void *record, |
1c024eca | 1201 | int entry_size, struct pt_regs *regs, |
e6dab5ff | 1202 | struct hlist_head *head, int rctx, |
75e83876 | 1203 | struct task_struct *task, struct perf_event *event); |
24f1e32c | 1204 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1205 | |
9d23a90a | 1206 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1207 | # define perf_misc_flags(regs) \ |
1208 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1209 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
1210 | #endif |
1211 | ||
bce38cd5 SE |
1212 | static inline bool has_branch_stack(struct perf_event *event) |
1213 | { | |
1214 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
a46a2300 YZ |
1215 | } |
1216 | ||
1217 | static inline bool needs_branch_stack(struct perf_event *event) | |
1218 | { | |
1219 | return event->attr.branch_sample_type != 0; | |
bce38cd5 SE |
1220 | } |
1221 | ||
45bfb2e5 PZ |
1222 | static inline bool has_aux(struct perf_event *event) |
1223 | { | |
1224 | return event->pmu->setup_aux; | |
1225 | } | |
1226 | ||
9ecda41a WN |
1227 | static inline bool is_write_backward(struct perf_event *event) |
1228 | { | |
1229 | return !!event->attr.write_backward; | |
1230 | } | |
1231 | ||
375637bc AS |
1232 | static inline bool has_addr_filter(struct perf_event *event) |
1233 | { | |
1234 | return event->pmu->nr_addr_filters; | |
1235 | } | |
1236 | ||
1237 | /* | |
1238 | * An inherited event uses parent's filters | |
1239 | */ | |
1240 | static inline struct perf_addr_filters_head * | |
1241 | perf_event_addr_filters(struct perf_event *event) | |
1242 | { | |
1243 | struct perf_addr_filters_head *ifh = &event->addr_filters; | |
1244 | ||
1245 | if (event->parent) | |
1246 | ifh = &event->parent->addr_filters; | |
1247 | ||
1248 | return ifh; | |
1249 | } | |
1250 | ||
1251 | extern void perf_event_addr_filters_sync(struct perf_event *event); | |
1252 | ||
5622f295 | 1253 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 1254 | struct perf_event *event, unsigned int size); |
9ecda41a WN |
1255 | extern int perf_output_begin_forward(struct perf_output_handle *handle, |
1256 | struct perf_event *event, | |
1257 | unsigned int size); | |
1258 | extern int perf_output_begin_backward(struct perf_output_handle *handle, | |
1259 | struct perf_event *event, | |
1260 | unsigned int size); | |
1261 | ||
5622f295 | 1262 | extern void perf_output_end(struct perf_output_handle *handle); |
91d7753a | 1263 | extern unsigned int perf_output_copy(struct perf_output_handle *handle, |
5622f295 | 1264 | const void *buf, unsigned int len); |
5685e0ff JO |
1265 | extern unsigned int perf_output_skip(struct perf_output_handle *handle, |
1266 | unsigned int len); | |
4ed7c92d PZ |
1267 | extern int perf_swevent_get_recursion_context(void); |
1268 | extern void perf_swevent_put_recursion_context(int rctx); | |
ab573844 | 1269 | extern u64 perf_swevent_set_period(struct perf_event *event); |
44234adc FW |
1270 | extern void perf_event_enable(struct perf_event *event); |
1271 | extern void perf_event_disable(struct perf_event *event); | |
fae3fde6 | 1272 | extern void perf_event_disable_local(struct perf_event *event); |
5aab90ce | 1273 | extern void perf_event_disable_inatomic(struct perf_event *event); |
e9d2b064 | 1274 | extern void perf_event_task_tick(void); |
475113d9 | 1275 | extern int perf_event_account_interrupt(struct perf_event *event); |
e041e328 | 1276 | #else /* !CONFIG_PERF_EVENTS: */ |
fdc26706 AS |
1277 | static inline void * |
1278 | perf_aux_output_begin(struct perf_output_handle *handle, | |
1279 | struct perf_event *event) { return NULL; } | |
1280 | static inline void | |
f4c0b0aa WD |
1281 | perf_aux_output_end(struct perf_output_handle *handle, unsigned long size) |
1282 | { } | |
fdc26706 AS |
1283 | static inline int |
1284 | perf_aux_output_skip(struct perf_output_handle *handle, | |
1285 | unsigned long size) { return -EINVAL; } | |
1286 | static inline void * | |
1287 | perf_get_aux(struct perf_output_handle *handle) { return NULL; } | |
0793a61d | 1288 | static inline void |
ff303e66 PZ |
1289 | perf_event_task_migrate(struct task_struct *task) { } |
1290 | static inline void | |
ab0cce56 JO |
1291 | perf_event_task_sched_in(struct task_struct *prev, |
1292 | struct task_struct *task) { } | |
1293 | static inline void | |
1294 | perf_event_task_sched_out(struct task_struct *prev, | |
1295 | struct task_struct *next) { } | |
cdd6c482 IM |
1296 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1297 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1298 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1299 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
e03e7ee3 | 1300 | static inline struct file *perf_event_get(unsigned int fd) { return ERR_PTR(-EINVAL); } |
ffe8690c KX |
1301 | static inline const struct perf_event_attr *perf_event_attrs(struct perf_event *event) |
1302 | { | |
1303 | return ERR_PTR(-EINVAL); | |
1304 | } | |
f91840a3 AS |
1305 | static inline int perf_event_read_local(struct perf_event *event, u64 *value) |
1306 | { | |
1307 | return -EINVAL; | |
1308 | } | |
57c0c15b | 1309 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1310 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1311 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
1312 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
1313 | { | |
1314 | return -EINVAL; | |
1315 | } | |
15dbf27c | 1316 | |
925d519a | 1317 | static inline void |
a8b0ca17 | 1318 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1319 | static inline void |
86038c5e PZI |
1320 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) { } |
1321 | static inline void | |
184f412c | 1322 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1323 | |
39447b38 | 1324 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1325 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1326 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1327 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1328 | |
57c0c15b | 1329 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
e041e328 | 1330 | static inline void perf_event_exec(void) { } |
82b89778 | 1331 | static inline void perf_event_comm(struct task_struct *tsk, bool exec) { } |
e4222673 | 1332 | static inline void perf_event_namespaces(struct task_struct *tsk) { } |
cdd6c482 IM |
1333 | static inline void perf_event_fork(struct task_struct *tsk) { } |
1334 | static inline void perf_event_init(void) { } | |
184f412c | 1335 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1336 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
ab573844 | 1337 | static inline u64 perf_swevent_set_period(struct perf_event *event) { return 0; } |
44234adc FW |
1338 | static inline void perf_event_enable(struct perf_event *event) { } |
1339 | static inline void perf_event_disable(struct perf_event *event) { } | |
500ad2d8 | 1340 | static inline int __perf_event_disable(void *info) { return -1; } |
e9d2b064 | 1341 | static inline void perf_event_task_tick(void) { } |
ffe8690c | 1342 | static inline int perf_event_release_kernel(struct perf_event *event) { return 0; } |
0793a61d TG |
1343 | #endif |
1344 | ||
6c4d3bc9 DR |
1345 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) |
1346 | extern void perf_restore_debug_store(void); | |
1347 | #else | |
1d9d8639 | 1348 | static inline void perf_restore_debug_store(void) { } |
0793a61d TG |
1349 | #endif |
1350 | ||
7e3f977e DB |
1351 | static __always_inline bool perf_raw_frag_last(const struct perf_raw_frag *frag) |
1352 | { | |
1353 | return frag->pad < sizeof(u64); | |
1354 | } | |
1355 | ||
e7e7ee2e | 1356 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1357 | |
2663960c SB |
1358 | struct perf_pmu_events_attr { |
1359 | struct device_attribute attr; | |
1360 | u64 id; | |
3a54aaa0 | 1361 | const char *event_str; |
2663960c SB |
1362 | }; |
1363 | ||
fc07e9f9 AK |
1364 | struct perf_pmu_events_ht_attr { |
1365 | struct device_attribute attr; | |
1366 | u64 id; | |
1367 | const char *event_str_ht; | |
1368 | const char *event_str_noht; | |
1369 | }; | |
1370 | ||
fd979c01 CS |
1371 | ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr, |
1372 | char *page); | |
1373 | ||
2663960c SB |
1374 | #define PMU_EVENT_ATTR(_name, _var, _id, _show) \ |
1375 | static struct perf_pmu_events_attr _var = { \ | |
1376 | .attr = __ATTR(_name, 0444, _show, NULL), \ | |
1377 | .id = _id, \ | |
1378 | }; | |
1379 | ||
f0405b81 CS |
1380 | #define PMU_EVENT_ATTR_STRING(_name, _var, _str) \ |
1381 | static struct perf_pmu_events_attr _var = { \ | |
1382 | .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL), \ | |
1383 | .id = 0, \ | |
1384 | .event_str = _str, \ | |
1385 | }; | |
1386 | ||
641cc938 JO |
1387 | #define PMU_FORMAT_ATTR(_name, _format) \ |
1388 | static ssize_t \ | |
1389 | _name##_show(struct device *dev, \ | |
1390 | struct device_attribute *attr, \ | |
1391 | char *page) \ | |
1392 | { \ | |
1393 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
1394 | return sprintf(page, _format "\n"); \ | |
1395 | } \ | |
1396 | \ | |
1397 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
1398 | ||
00e16c3d TG |
1399 | /* Performance counter hotplug functions */ |
1400 | #ifdef CONFIG_PERF_EVENTS | |
1401 | int perf_event_init_cpu(unsigned int cpu); | |
1402 | int perf_event_exit_cpu(unsigned int cpu); | |
1403 | #else | |
1404 | #define perf_event_init_cpu NULL | |
1405 | #define perf_event_exit_cpu NULL | |
1406 | #endif | |
1407 | ||
cdd6c482 | 1408 | #endif /* _LINUX_PERF_EVENT_H */ |