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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
8f622422 IM |
55 | PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, |
56 | PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, | |
c37e1749 | 57 | PERF_COUNT_HW_REF_CPU_CYCLES = 9, |
f4dbfa8f | 58 | |
a308444c | 59 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 60 | }; |
e077df4f | 61 | |
8326f44d | 62 | /* |
cdd6c482 | 63 | * Generalized hardware cache events: |
8326f44d | 64 | * |
89d6c0b5 | 65 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x |
8326f44d IM |
66 | * { read, write, prefetch } x |
67 | * { accesses, misses } | |
68 | */ | |
1c432d89 | 69 | enum perf_hw_cache_id { |
a308444c IM |
70 | PERF_COUNT_HW_CACHE_L1D = 0, |
71 | PERF_COUNT_HW_CACHE_L1I = 1, | |
72 | PERF_COUNT_HW_CACHE_LL = 2, | |
73 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
74 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
75 | PERF_COUNT_HW_CACHE_BPU = 5, | |
89d6c0b5 | 76 | PERF_COUNT_HW_CACHE_NODE = 6, |
a308444c IM |
77 | |
78 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
79 | }; |
80 | ||
1c432d89 | 81 | enum perf_hw_cache_op_id { |
a308444c IM |
82 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
83 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
84 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 85 | |
a308444c | 86 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
87 | }; |
88 | ||
1c432d89 PZ |
89 | enum perf_hw_cache_op_result_id { |
90 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
91 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 92 | |
a308444c | 93 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
94 | }; |
95 | ||
b8e83514 | 96 | /* |
cdd6c482 IM |
97 | * Special "software" events provided by the kernel, even if the hardware |
98 | * does not support performance events. These events measure various | |
b8e83514 PZ |
99 | * physical and sw events of the kernel (and allow the profiling of them as |
100 | * well): | |
101 | */ | |
1c432d89 | 102 | enum perf_sw_ids { |
a308444c IM |
103 | PERF_COUNT_SW_CPU_CLOCK = 0, |
104 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
105 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
106 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
107 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
108 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
109 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
110 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
111 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
112 | |
113 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
114 | }; |
115 | ||
8a057d84 | 116 | /* |
0d48696f | 117 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
118 | * in the overflow packets. |
119 | */ | |
cdd6c482 | 120 | enum perf_event_sample_format { |
a308444c IM |
121 | PERF_SAMPLE_IP = 1U << 0, |
122 | PERF_SAMPLE_TID = 1U << 1, | |
123 | PERF_SAMPLE_TIME = 1U << 2, | |
124 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 125 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
126 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
127 | PERF_SAMPLE_ID = 1U << 6, | |
128 | PERF_SAMPLE_CPU = 1U << 7, | |
129 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 130 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 131 | PERF_SAMPLE_RAW = 1U << 10, |
bce38cd5 | 132 | PERF_SAMPLE_BRANCH_STACK = 1U << 11, |
4018994f | 133 | PERF_SAMPLE_REGS_USER = 1U << 12, |
974802ea | 134 | |
4018994f | 135 | PERF_SAMPLE_MAX = 1U << 13, /* non-ABI */ |
8a057d84 PZ |
136 | }; |
137 | ||
bce38cd5 SE |
138 | /* |
139 | * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set | |
140 | * | |
141 | * If the user does not pass priv level information via branch_sample_type, | |
142 | * the kernel uses the event's priv level. Branch and event priv levels do | |
143 | * not have to match. Branch priv level is checked for permissions. | |
144 | * | |
145 | * The branch types can be combined, however BRANCH_ANY covers all types | |
146 | * of branches and therefore it supersedes all the other types. | |
147 | */ | |
148 | enum perf_branch_sample_type { | |
149 | PERF_SAMPLE_BRANCH_USER = 1U << 0, /* user branches */ | |
150 | PERF_SAMPLE_BRANCH_KERNEL = 1U << 1, /* kernel branches */ | |
151 | PERF_SAMPLE_BRANCH_HV = 1U << 2, /* hypervisor branches */ | |
152 | ||
153 | PERF_SAMPLE_BRANCH_ANY = 1U << 3, /* any branch types */ | |
154 | PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */ | |
155 | PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */ | |
156 | PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */ | |
157 | ||
158 | PERF_SAMPLE_BRANCH_MAX = 1U << 7, /* non-ABI */ | |
159 | }; | |
160 | ||
161 | #define PERF_SAMPLE_BRANCH_PLM_ALL \ | |
162 | (PERF_SAMPLE_BRANCH_USER|\ | |
163 | PERF_SAMPLE_BRANCH_KERNEL|\ | |
164 | PERF_SAMPLE_BRANCH_HV) | |
165 | ||
4018994f JO |
166 | /* |
167 | * Values to determine ABI of the registers dump. | |
168 | */ | |
169 | enum perf_sample_regs_abi { | |
170 | PERF_SAMPLE_REGS_ABI_NONE = 0, | |
171 | PERF_SAMPLE_REGS_ABI_32 = 1, | |
172 | PERF_SAMPLE_REGS_ABI_64 = 2, | |
173 | }; | |
174 | ||
53cfbf59 | 175 | /* |
cdd6c482 | 176 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
177 | * as specified by attr.read_format: |
178 | * | |
179 | * struct read_format { | |
57c0c15b | 180 | * { u64 value; |
d7ebe75b VW |
181 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
182 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
183 | * { u64 id; } && PERF_FORMAT_ID |
184 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 185 | * |
57c0c15b | 186 | * { u64 nr; |
d7ebe75b VW |
187 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
188 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
189 | * { u64 value; |
190 | * { u64 id; } && PERF_FORMAT_ID | |
191 | * } cntr[nr]; | |
192 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 193 | * }; |
53cfbf59 | 194 | */ |
cdd6c482 | 195 | enum perf_event_read_format { |
a308444c IM |
196 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
197 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
198 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 199 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 200 | |
57c0c15b | 201 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
202 | }; |
203 | ||
974802ea | 204 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
cb5d7699 SE |
205 | #define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ |
206 | #define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ | |
4018994f | 207 | #define PERF_ATTR_SIZE_VER3 88 /* add: sample_regs_user */ |
974802ea | 208 | |
9f66a381 | 209 | /* |
cdd6c482 | 210 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 211 | */ |
cdd6c482 | 212 | struct perf_event_attr { |
974802ea | 213 | |
f4a2deb4 | 214 | /* |
a21ca2ca IM |
215 | * Major type: hardware/software/tracepoint/etc. |
216 | */ | |
217 | __u32 type; | |
974802ea PZ |
218 | |
219 | /* | |
220 | * Size of the attr structure, for fwd/bwd compat. | |
221 | */ | |
222 | __u32 size; | |
a21ca2ca IM |
223 | |
224 | /* | |
225 | * Type specific configuration information. | |
f4a2deb4 PZ |
226 | */ |
227 | __u64 config; | |
9f66a381 | 228 | |
60db5e09 | 229 | union { |
b23f3325 PZ |
230 | __u64 sample_period; |
231 | __u64 sample_freq; | |
60db5e09 PZ |
232 | }; |
233 | ||
b23f3325 PZ |
234 | __u64 sample_type; |
235 | __u64 read_format; | |
9f66a381 | 236 | |
2743a5b0 | 237 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
238 | inherit : 1, /* children inherit it */ |
239 | pinned : 1, /* must always be on PMU */ | |
240 | exclusive : 1, /* only group on PMU */ | |
241 | exclude_user : 1, /* don't count user */ | |
242 | exclude_kernel : 1, /* ditto kernel */ | |
243 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 244 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 245 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 246 | comm : 1, /* include comm data */ |
60db5e09 | 247 | freq : 1, /* use freq, not period */ |
bfbd3381 | 248 | inherit_stat : 1, /* per task counts */ |
57e7986e | 249 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 250 | task : 1, /* trace fork/exit */ |
2667de81 | 251 | watermark : 1, /* wakeup_watermark */ |
ab608344 PZ |
252 | /* |
253 | * precise_ip: | |
254 | * | |
255 | * 0 - SAMPLE_IP can have arbitrary skid | |
256 | * 1 - SAMPLE_IP must have constant skid | |
257 | * 2 - SAMPLE_IP requested to have 0 skid | |
258 | * 3 - SAMPLE_IP must have 0 skid | |
259 | * | |
260 | * See also PERF_RECORD_MISC_EXACT_IP | |
261 | */ | |
262 | precise_ip : 2, /* skid constraint */ | |
3af9e859 | 263 | mmap_data : 1, /* non-exec mmap data */ |
c980d109 | 264 | sample_id_all : 1, /* sample_type all events */ |
ab608344 | 265 | |
a240f761 JR |
266 | exclude_host : 1, /* don't count in host */ |
267 | exclude_guest : 1, /* don't count in guest */ | |
268 | ||
269 | __reserved_1 : 43; | |
2743a5b0 | 270 | |
2667de81 PZ |
271 | union { |
272 | __u32 wakeup_events; /* wakeup every n events */ | |
273 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
274 | }; | |
24f1e32c | 275 | |
f13c12c6 | 276 | __u32 bp_type; |
a7e3ed1e AK |
277 | union { |
278 | __u64 bp_addr; | |
279 | __u64 config1; /* extension of config */ | |
280 | }; | |
281 | union { | |
282 | __u64 bp_len; | |
283 | __u64 config2; /* extension of config1 */ | |
284 | }; | |
4018994f JO |
285 | __u64 branch_sample_type; /* enum perf_branch_sample_type */ |
286 | ||
287 | /* | |
288 | * Defines set of user regs to dump on samples. | |
289 | * See asm/perf_regs.h for details. | |
290 | */ | |
291 | __u64 sample_regs_user; | |
eab656ae TG |
292 | }; |
293 | ||
d859e29f | 294 | /* |
cdd6c482 | 295 | * Ioctls that can be done on a perf event fd: |
d859e29f | 296 | */ |
cdd6c482 | 297 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
298 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
299 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 300 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 301 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 302 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 303 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
304 | |
305 | enum perf_event_ioc_flags { | |
3df5edad PZ |
306 | PERF_IOC_FLAG_GROUP = 1U << 0, |
307 | }; | |
d859e29f | 308 | |
37d81828 PM |
309 | /* |
310 | * Structure of the page that can be mapped via mmap | |
311 | */ | |
cdd6c482 | 312 | struct perf_event_mmap_page { |
37d81828 PM |
313 | __u32 version; /* version number of this structure */ |
314 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
315 | |
316 | /* | |
cdd6c482 | 317 | * Bits needed to read the hw events in user-space. |
38ff667b | 318 | * |
c7206205 PZ |
319 | * u32 seq, time_mult, time_shift, idx, width; |
320 | * u64 count, enabled, running; | |
321 | * u64 cyc, time_offset; | |
322 | * s64 pmc = 0; | |
38ff667b | 323 | * |
a2e87d06 PZ |
324 | * do { |
325 | * seq = pc->lock; | |
a2e87d06 | 326 | * barrier() |
c7206205 PZ |
327 | * |
328 | * enabled = pc->time_enabled; | |
329 | * running = pc->time_running; | |
330 | * | |
331 | * if (pc->cap_usr_time && enabled != running) { | |
332 | * cyc = rdtsc(); | |
333 | * time_offset = pc->time_offset; | |
334 | * time_mult = pc->time_mult; | |
335 | * time_shift = pc->time_shift; | |
336 | * } | |
337 | * | |
338 | * idx = pc->index; | |
339 | * count = pc->offset; | |
340 | * if (pc->cap_usr_rdpmc && idx) { | |
341 | * width = pc->pmc_width; | |
342 | * pmc = rdpmc(idx - 1); | |
343 | * } | |
38ff667b | 344 | * |
a2e87d06 PZ |
345 | * barrier(); |
346 | * } while (pc->lock != seq); | |
38ff667b | 347 | * |
92f22a38 PZ |
348 | * NOTE: for obvious reason this only works on self-monitoring |
349 | * processes. | |
38ff667b | 350 | */ |
37d81828 | 351 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
352 | __u32 index; /* hardware event identifier */ |
353 | __s64 offset; /* add to hardware event value */ | |
354 | __u64 time_enabled; /* time event active */ | |
355 | __u64 time_running; /* time event on cpu */ | |
c7206205 PZ |
356 | union { |
357 | __u64 capabilities; | |
358 | __u64 cap_usr_time : 1, | |
359 | cap_usr_rdpmc : 1, | |
360 | cap_____res : 62; | |
361 | }; | |
362 | ||
363 | /* | |
364 | * If cap_usr_rdpmc this field provides the bit-width of the value | |
365 | * read using the rdpmc() or equivalent instruction. This can be used | |
366 | * to sign extend the result like: | |
367 | * | |
368 | * pmc <<= 64 - width; | |
369 | * pmc >>= 64 - width; // signed shift right | |
370 | * count += pmc; | |
371 | */ | |
372 | __u16 pmc_width; | |
373 | ||
374 | /* | |
375 | * If cap_usr_time the below fields can be used to compute the time | |
376 | * delta since time_enabled (in ns) using rdtsc or similar. | |
377 | * | |
378 | * u64 quot, rem; | |
379 | * u64 delta; | |
380 | * | |
381 | * quot = (cyc >> time_shift); | |
382 | * rem = cyc & ((1 << time_shift) - 1); | |
383 | * delta = time_offset + quot * time_mult + | |
384 | * ((rem * time_mult) >> time_shift); | |
385 | * | |
386 | * Where time_offset,time_mult,time_shift and cyc are read in the | |
387 | * seqcount loop described above. This delta can then be added to | |
388 | * enabled and possible running (if idx), improving the scaling: | |
389 | * | |
390 | * enabled += delta; | |
391 | * if (idx) | |
392 | * running += delta; | |
393 | * | |
394 | * quot = count / running; | |
395 | * rem = count % running; | |
396 | * count = quot * enabled + (rem * enabled) / running; | |
397 | */ | |
398 | __u16 time_shift; | |
399 | __u32 time_mult; | |
e3f3541c | 400 | __u64 time_offset; |
7b732a75 | 401 | |
41f95331 PZ |
402 | /* |
403 | * Hole for extension of the self monitor capabilities | |
404 | */ | |
405 | ||
c7206205 | 406 | __u64 __reserved[120]; /* align to 1k */ |
41f95331 | 407 | |
38ff667b PZ |
408 | /* |
409 | * Control data for the mmap() data buffer. | |
410 | * | |
43a21ea8 PZ |
411 | * User-space reading the @data_head value should issue an rmb(), on |
412 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 413 | * perf_event_wakeup(). |
43a21ea8 PZ |
414 | * |
415 | * When the mapping is PROT_WRITE the @data_tail value should be | |
416 | * written by userspace to reflect the last read data. In this case | |
417 | * the kernel will not over-write unread data. | |
38ff667b | 418 | */ |
8e3747c1 | 419 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 420 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
421 | }; |
422 | ||
39447b38 | 423 | #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) |
184f412c | 424 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) |
cdd6c482 IM |
425 | #define PERF_RECORD_MISC_KERNEL (1 << 0) |
426 | #define PERF_RECORD_MISC_USER (2 << 0) | |
427 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
39447b38 ZY |
428 | #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) |
429 | #define PERF_RECORD_MISC_GUEST_USER (5 << 0) | |
6fab0192 | 430 | |
ab608344 PZ |
431 | /* |
432 | * Indicates that the content of PERF_SAMPLE_IP points to | |
433 | * the actual instruction that triggered the event. See also | |
434 | * perf_event_attr::precise_ip. | |
435 | */ | |
436 | #define PERF_RECORD_MISC_EXACT_IP (1 << 14) | |
ef21f683 PZ |
437 | /* |
438 | * Reserve the last bit to indicate some extended misc field | |
439 | */ | |
440 | #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) | |
441 | ||
5c148194 PZ |
442 | struct perf_event_header { |
443 | __u32 type; | |
6fab0192 PZ |
444 | __u16 misc; |
445 | __u16 size; | |
5c148194 PZ |
446 | }; |
447 | ||
448 | enum perf_event_type { | |
5ed00415 | 449 | |
0c593b34 | 450 | /* |
c980d109 ACM |
451 | * If perf_event_attr.sample_id_all is set then all event types will |
452 | * have the sample_type selected fields related to where/when | |
453 | * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID) | |
454 | * described in PERF_RECORD_SAMPLE below, it will be stashed just after | |
455 | * the perf_event_header and the fields already present for the existing | |
456 | * fields, i.e. at the end of the payload. That way a newer perf.data | |
457 | * file will be supported by older perf tools, with these new optional | |
458 | * fields being ignored. | |
459 | * | |
0c593b34 PZ |
460 | * The MMAP events record the PROT_EXEC mappings so that we can |
461 | * correlate userspace IPs to code. They have the following structure: | |
462 | * | |
463 | * struct { | |
0127c3ea | 464 | * struct perf_event_header header; |
0c593b34 | 465 | * |
0127c3ea IM |
466 | * u32 pid, tid; |
467 | * u64 addr; | |
468 | * u64 len; | |
469 | * u64 pgoff; | |
470 | * char filename[]; | |
0c593b34 PZ |
471 | * }; |
472 | */ | |
cdd6c482 | 473 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 474 | |
43a21ea8 PZ |
475 | /* |
476 | * struct { | |
57c0c15b IM |
477 | * struct perf_event_header header; |
478 | * u64 id; | |
479 | * u64 lost; | |
43a21ea8 PZ |
480 | * }; |
481 | */ | |
cdd6c482 | 482 | PERF_RECORD_LOST = 2, |
43a21ea8 | 483 | |
8d1b2d93 PZ |
484 | /* |
485 | * struct { | |
0127c3ea | 486 | * struct perf_event_header header; |
8d1b2d93 | 487 | * |
0127c3ea IM |
488 | * u32 pid, tid; |
489 | * char comm[]; | |
8d1b2d93 PZ |
490 | * }; |
491 | */ | |
cdd6c482 | 492 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 493 | |
9f498cc5 PZ |
494 | /* |
495 | * struct { | |
496 | * struct perf_event_header header; | |
497 | * u32 pid, ppid; | |
498 | * u32 tid, ptid; | |
393b2ad8 | 499 | * u64 time; |
9f498cc5 PZ |
500 | * }; |
501 | */ | |
cdd6c482 | 502 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 503 | |
26b119bc PZ |
504 | /* |
505 | * struct { | |
0127c3ea IM |
506 | * struct perf_event_header header; |
507 | * u64 time; | |
689802b2 | 508 | * u64 id; |
7f453c24 | 509 | * u64 stream_id; |
a78ac325 PZ |
510 | * }; |
511 | */ | |
184f412c IM |
512 | PERF_RECORD_THROTTLE = 5, |
513 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 514 | |
60313ebe PZ |
515 | /* |
516 | * struct { | |
a21ca2ca IM |
517 | * struct perf_event_header header; |
518 | * u32 pid, ppid; | |
9f498cc5 | 519 | * u32 tid, ptid; |
a6f10a2f | 520 | * u64 time; |
60313ebe PZ |
521 | * }; |
522 | */ | |
cdd6c482 | 523 | PERF_RECORD_FORK = 7, |
60313ebe | 524 | |
38b200d6 PZ |
525 | /* |
526 | * struct { | |
184f412c IM |
527 | * struct perf_event_header header; |
528 | * u32 pid, tid; | |
3dab77fb | 529 | * |
184f412c | 530 | * struct read_format values; |
38b200d6 PZ |
531 | * }; |
532 | */ | |
cdd6c482 | 533 | PERF_RECORD_READ = 8, |
38b200d6 | 534 | |
8a057d84 | 535 | /* |
0c593b34 | 536 | * struct { |
0127c3ea | 537 | * struct perf_event_header header; |
0c593b34 | 538 | * |
43a21ea8 PZ |
539 | * { u64 ip; } && PERF_SAMPLE_IP |
540 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
541 | * { u64 time; } && PERF_SAMPLE_TIME | |
542 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 543 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 544 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 545 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 546 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 547 | * |
3dab77fb | 548 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 549 | * |
f9188e02 | 550 | * { u64 nr, |
43a21ea8 | 551 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 552 | * |
57c0c15b IM |
553 | * # |
554 | * # The RAW record below is opaque data wrt the ABI | |
555 | * # | |
556 | * # That is, the ABI doesn't make any promises wrt to | |
557 | * # the stability of its content, it may vary depending | |
558 | * # on event, hardware, kernel version and phase of | |
559 | * # the moon. | |
560 | * # | |
561 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
562 | * # | |
3dab77fb | 563 | * |
a044560c PZ |
564 | * { u32 size; |
565 | * char data[size];}&& PERF_SAMPLE_RAW | |
bce38cd5 SE |
566 | * |
567 | * { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK | |
4018994f JO |
568 | * |
569 | * { u64 abi; # enum perf_sample_regs_abi | |
570 | * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER | |
0c593b34 | 571 | * }; |
8a057d84 | 572 | */ |
184f412c | 573 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 574 | |
cdd6c482 | 575 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
576 | }; |
577 | ||
0b0d9cf6 | 578 | #define PERF_MAX_STACK_DEPTH 127 |
114067b6 | 579 | |
f9188e02 PZ |
580 | enum perf_callchain_context { |
581 | PERF_CONTEXT_HV = (__u64)-32, | |
582 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
583 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 584 | |
f9188e02 PZ |
585 | PERF_CONTEXT_GUEST = (__u64)-2048, |
586 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
587 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
588 | ||
589 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
590 | }; |
591 | ||
e7e7ee2e IM |
592 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
593 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
594 | #define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */ | |
a4be7c27 | 595 | |
f3dfd265 | 596 | #ifdef __KERNEL__ |
9f66a381 | 597 | /* |
f3dfd265 | 598 | * Kernel-internal data types and definitions: |
9f66a381 IM |
599 | */ |
600 | ||
cdd6c482 | 601 | #ifdef CONFIG_PERF_EVENTS |
e5d1367f | 602 | # include <linux/cgroup.h> |
cdd6c482 | 603 | # include <asm/perf_event.h> |
7be79236 | 604 | # include <asm/local64.h> |
f3dfd265 PM |
605 | #endif |
606 | ||
39447b38 | 607 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
608 | int (*is_in_guest)(void); |
609 | int (*is_user_mode)(void); | |
610 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
611 | }; |
612 | ||
2ff6cfd7 AB |
613 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
614 | #include <asm/hw_breakpoint.h> | |
615 | #endif | |
616 | ||
f3dfd265 PM |
617 | #include <linux/list.h> |
618 | #include <linux/mutex.h> | |
619 | #include <linux/rculist.h> | |
620 | #include <linux/rcupdate.h> | |
621 | #include <linux/spinlock.h> | |
d6d020e9 | 622 | #include <linux/hrtimer.h> |
3c446b3d | 623 | #include <linux/fs.h> |
709e50cf | 624 | #include <linux/pid_namespace.h> |
906010b2 | 625 | #include <linux/workqueue.h> |
5331d7b8 | 626 | #include <linux/ftrace.h> |
85cfabbc | 627 | #include <linux/cpu.h> |
e360adbe | 628 | #include <linux/irq_work.h> |
c5905afb | 629 | #include <linux/static_key.h> |
60063497 | 630 | #include <linux/atomic.h> |
641cc938 | 631 | #include <linux/sysfs.h> |
4018994f | 632 | #include <linux/perf_regs.h> |
fa588151 | 633 | #include <asm/local.h> |
f3dfd265 | 634 | |
f9188e02 PZ |
635 | struct perf_callchain_entry { |
636 | __u64 nr; | |
637 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
638 | }; | |
639 | ||
3a43ce68 FW |
640 | struct perf_raw_record { |
641 | u32 size; | |
642 | void *data; | |
f413cdb8 FW |
643 | }; |
644 | ||
bce38cd5 SE |
645 | /* |
646 | * single taken branch record layout: | |
647 | * | |
648 | * from: source instruction (may not always be a branch insn) | |
649 | * to: branch target | |
650 | * mispred: branch target was mispredicted | |
651 | * predicted: branch target was predicted | |
652 | * | |
653 | * support for mispred, predicted is optional. In case it | |
654 | * is not supported mispred = predicted = 0. | |
655 | */ | |
caff2bef | 656 | struct perf_branch_entry { |
bce38cd5 SE |
657 | __u64 from; |
658 | __u64 to; | |
659 | __u64 mispred:1, /* target mispredicted */ | |
660 | predicted:1,/* target predicted */ | |
661 | reserved:62; | |
caff2bef PZ |
662 | }; |
663 | ||
bce38cd5 SE |
664 | /* |
665 | * branch stack layout: | |
666 | * nr: number of taken branches stored in entries[] | |
667 | * | |
668 | * Note that nr can vary from sample to sample | |
669 | * branches (to, from) are stored from most recent | |
670 | * to least recent, i.e., entries[0] contains the most | |
671 | * recent branch. | |
672 | */ | |
caff2bef PZ |
673 | struct perf_branch_stack { |
674 | __u64 nr; | |
675 | struct perf_branch_entry entries[0]; | |
676 | }; | |
677 | ||
4018994f JO |
678 | struct perf_regs_user { |
679 | __u64 abi; | |
680 | struct pt_regs *regs; | |
681 | }; | |
682 | ||
f3dfd265 PM |
683 | struct task_struct; |
684 | ||
efc9f05d SE |
685 | /* |
686 | * extra PMU register associated with an event | |
687 | */ | |
688 | struct hw_perf_event_extra { | |
689 | u64 config; /* register value */ | |
690 | unsigned int reg; /* register address or index */ | |
691 | int alloc; /* extra register already allocated */ | |
692 | int idx; /* index in shared_regs->regs[] */ | |
693 | }; | |
694 | ||
0793a61d | 695 | /** |
cdd6c482 | 696 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 697 | */ |
cdd6c482 IM |
698 | struct hw_perf_event { |
699 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
700 | union { |
701 | struct { /* hardware */ | |
a308444c | 702 | u64 config; |
447a194b | 703 | u64 last_tag; |
a308444c | 704 | unsigned long config_base; |
cdd6c482 | 705 | unsigned long event_base; |
c48b6053 | 706 | int event_base_rdpmc; |
a308444c | 707 | int idx; |
447a194b | 708 | int last_cpu; |
bce38cd5 | 709 | |
efc9f05d | 710 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 711 | struct hw_perf_event_extra branch_reg; |
d6d020e9 | 712 | }; |
721a669b | 713 | struct { /* software */ |
a308444c | 714 | struct hrtimer hrtimer; |
d6d020e9 | 715 | }; |
24f1e32c | 716 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 FW |
717 | struct { /* breakpoint */ |
718 | struct arch_hw_breakpoint info; | |
719 | struct list_head bp_list; | |
d580ff86 PZ |
720 | /* |
721 | * Crufty hack to avoid the chicken and egg | |
722 | * problem hw_breakpoint has with context | |
723 | * creation and event initalization. | |
724 | */ | |
725 | struct task_struct *bp_target; | |
45a73372 | 726 | }; |
24f1e32c | 727 | #endif |
d6d020e9 | 728 | }; |
a4eaf7f1 | 729 | int state; |
e7850595 | 730 | local64_t prev_count; |
b23f3325 | 731 | u64 sample_period; |
9e350de3 | 732 | u64 last_period; |
e7850595 | 733 | local64_t period_left; |
e050e3f0 | 734 | u64 interrupts_seq; |
60db5e09 | 735 | u64 interrupts; |
6a24ed6c | 736 | |
abd50713 PZ |
737 | u64 freq_time_stamp; |
738 | u64 freq_count_stamp; | |
ee06094f | 739 | #endif |
0793a61d TG |
740 | }; |
741 | ||
a4eaf7f1 PZ |
742 | /* |
743 | * hw_perf_event::state flags | |
744 | */ | |
745 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
746 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
747 | #define PERF_HES_ARCH 0x04 | |
748 | ||
cdd6c482 | 749 | struct perf_event; |
621a01ea | 750 | |
8d2cacbb PZ |
751 | /* |
752 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
753 | */ | |
754 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 755 | |
621a01ea | 756 | /** |
4aeb0b42 | 757 | * struct pmu - generic performance monitoring unit |
621a01ea | 758 | */ |
4aeb0b42 | 759 | struct pmu { |
b0a873eb PZ |
760 | struct list_head entry; |
761 | ||
abe43400 | 762 | struct device *dev; |
0c9d42ed | 763 | const struct attribute_group **attr_groups; |
2e80a82a PZ |
764 | char *name; |
765 | int type; | |
766 | ||
108b02cf PZ |
767 | int * __percpu pmu_disable_count; |
768 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
8dc85d54 | 769 | int task_ctx_nr; |
6bde9b6c LM |
770 | |
771 | /* | |
a4eaf7f1 PZ |
772 | * Fully disable/enable this PMU, can be used to protect from the PMI |
773 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 774 | */ |
ad5133b7 PZ |
775 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
776 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 777 | |
8d2cacbb | 778 | /* |
a4eaf7f1 | 779 | * Try and initialize the event for this PMU. |
24cd7f54 | 780 | * Should return -ENOENT when the @event doesn't match this PMU. |
8d2cacbb | 781 | */ |
b0a873eb PZ |
782 | int (*event_init) (struct perf_event *event); |
783 | ||
a4eaf7f1 PZ |
784 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
785 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
786 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
787 | ||
8d2cacbb | 788 | /* |
a4eaf7f1 PZ |
789 | * Adds/Removes a counter to/from the PMU, can be done inside |
790 | * a transaction, see the ->*_txn() methods. | |
791 | */ | |
792 | int (*add) (struct perf_event *event, int flags); | |
793 | void (*del) (struct perf_event *event, int flags); | |
794 | ||
795 | /* | |
796 | * Starts/Stops a counter present on the PMU. The PMI handler | |
797 | * should stop the counter when perf_event_overflow() returns | |
798 | * !0. ->start() will be used to continue. | |
799 | */ | |
800 | void (*start) (struct perf_event *event, int flags); | |
801 | void (*stop) (struct perf_event *event, int flags); | |
802 | ||
803 | /* | |
804 | * Updates the counter value of the event. | |
805 | */ | |
cdd6c482 | 806 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
807 | |
808 | /* | |
24cd7f54 PZ |
809 | * Group events scheduling is treated as a transaction, add |
810 | * group events as a whole and perform one schedulability test. | |
811 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
812 | * |
813 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 814 | * do schedulability tests. |
8d2cacbb | 815 | */ |
e7e7ee2e | 816 | void (*start_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 817 | /* |
a4eaf7f1 | 818 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
819 | * then ->commit_txn() is required to perform one. On success |
820 | * the transaction is closed. On error the transaction is kept | |
821 | * open until ->cancel_txn() is called. | |
822 | */ | |
e7e7ee2e | 823 | int (*commit_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 824 | /* |
a4eaf7f1 | 825 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 826 | * for each successful ->add() during the transaction. |
8d2cacbb | 827 | */ |
e7e7ee2e | 828 | void (*cancel_txn) (struct pmu *pmu); /* optional */ |
35edc2a5 PZ |
829 | |
830 | /* | |
831 | * Will return the value for perf_event_mmap_page::index for this event, | |
832 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
833 | */ | |
834 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 SE |
835 | |
836 | /* | |
837 | * flush branch stack on context-switches (needed in cpu-wide mode) | |
838 | */ | |
839 | void (*flush_branch_stack) (void); | |
621a01ea IM |
840 | }; |
841 | ||
6a930700 | 842 | /** |
cdd6c482 | 843 | * enum perf_event_active_state - the states of a event |
6a930700 | 844 | */ |
cdd6c482 | 845 | enum perf_event_active_state { |
57c0c15b | 846 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
847 | PERF_EVENT_STATE_OFF = -1, |
848 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 849 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
850 | }; |
851 | ||
9b51f66d | 852 | struct file; |
453f19ee PZ |
853 | struct perf_sample_data; |
854 | ||
a8b0ca17 | 855 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
856 | struct perf_sample_data *, |
857 | struct pt_regs *regs); | |
858 | ||
d6f962b5 | 859 | enum perf_group_flag { |
e7e7ee2e | 860 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
861 | }; |
862 | ||
e7e7ee2e IM |
863 | #define SWEVENT_HLIST_BITS 8 |
864 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
865 | |
866 | struct swevent_hlist { | |
e7e7ee2e IM |
867 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
868 | struct rcu_head rcu_head; | |
76e1d904 FW |
869 | }; |
870 | ||
8a49542c PZ |
871 | #define PERF_ATTACH_CONTEXT 0x01 |
872 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 873 | #define PERF_ATTACH_TASK 0x04 |
8a49542c | 874 | |
e5d1367f SE |
875 | #ifdef CONFIG_CGROUP_PERF |
876 | /* | |
877 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
878 | * This is a per-cpu dynamically allocated data structure. | |
879 | */ | |
880 | struct perf_cgroup_info { | |
e7e7ee2e IM |
881 | u64 time; |
882 | u64 timestamp; | |
e5d1367f SE |
883 | }; |
884 | ||
885 | struct perf_cgroup { | |
e7e7ee2e IM |
886 | struct cgroup_subsys_state css; |
887 | struct perf_cgroup_info *info; /* timing info, one per cpu */ | |
e5d1367f SE |
888 | }; |
889 | #endif | |
890 | ||
76369139 FW |
891 | struct ring_buffer; |
892 | ||
0793a61d | 893 | /** |
cdd6c482 | 894 | * struct perf_event - performance event kernel representation: |
0793a61d | 895 | */ |
cdd6c482 IM |
896 | struct perf_event { |
897 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 898 | struct list_head group_entry; |
592903cd | 899 | struct list_head event_entry; |
04289bb9 | 900 | struct list_head sibling_list; |
76e1d904 | 901 | struct hlist_node hlist_entry; |
0127c3ea | 902 | int nr_siblings; |
d6f962b5 | 903 | int group_flags; |
cdd6c482 | 904 | struct perf_event *group_leader; |
a4eaf7f1 | 905 | struct pmu *pmu; |
04289bb9 | 906 | |
cdd6c482 | 907 | enum perf_event_active_state state; |
8a49542c | 908 | unsigned int attach_state; |
e7850595 | 909 | local64_t count; |
a6e6dea6 | 910 | atomic64_t child_count; |
ee06094f | 911 | |
53cfbf59 | 912 | /* |
cdd6c482 | 913 | * These are the total time in nanoseconds that the event |
53cfbf59 | 914 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 915 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
916 | * and running (scheduled onto the CPU), respectively. |
917 | * | |
918 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 919 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
920 | */ |
921 | u64 total_time_enabled; | |
922 | u64 total_time_running; | |
923 | ||
924 | /* | |
925 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 926 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
927 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
928 | * in time. | |
cdd6c482 IM |
929 | * tstamp_enabled: the notional time when the event was enabled |
930 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 931 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 932 | * event was scheduled off. |
53cfbf59 PM |
933 | */ |
934 | u64 tstamp_enabled; | |
935 | u64 tstamp_running; | |
936 | u64 tstamp_stopped; | |
937 | ||
eed01528 SE |
938 | /* |
939 | * timestamp shadows the actual context timing but it can | |
940 | * be safely used in NMI interrupt context. It reflects the | |
941 | * context time as it was when the event was last scheduled in. | |
942 | * | |
943 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
944 | * compute ctx_time for a sample, simply add perf_clock(). | |
945 | */ | |
946 | u64 shadow_ctx_time; | |
947 | ||
24f1e32c | 948 | struct perf_event_attr attr; |
c320c7b7 | 949 | u16 header_size; |
6844c09d | 950 | u16 id_header_size; |
c320c7b7 | 951 | u16 read_size; |
cdd6c482 | 952 | struct hw_perf_event hw; |
0793a61d | 953 | |
cdd6c482 | 954 | struct perf_event_context *ctx; |
9b51f66d | 955 | struct file *filp; |
0793a61d | 956 | |
53cfbf59 PM |
957 | /* |
958 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 959 | * events have been enabled and running, respectively. |
53cfbf59 PM |
960 | */ |
961 | atomic64_t child_total_time_enabled; | |
962 | atomic64_t child_total_time_running; | |
963 | ||
0793a61d | 964 | /* |
d859e29f | 965 | * Protect attach/detach and child_list: |
0793a61d | 966 | */ |
fccc714b PZ |
967 | struct mutex child_mutex; |
968 | struct list_head child_list; | |
cdd6c482 | 969 | struct perf_event *parent; |
0793a61d TG |
970 | |
971 | int oncpu; | |
972 | int cpu; | |
973 | ||
082ff5a2 PZ |
974 | struct list_head owner_entry; |
975 | struct task_struct *owner; | |
976 | ||
7b732a75 PZ |
977 | /* mmap bits */ |
978 | struct mutex mmap_mutex; | |
979 | atomic_t mmap_count; | |
ac9721f3 PZ |
980 | int mmap_locked; |
981 | struct user_struct *mmap_user; | |
76369139 | 982 | struct ring_buffer *rb; |
10c6db11 | 983 | struct list_head rb_entry; |
37d81828 | 984 | |
7b732a75 | 985 | /* poll related */ |
0793a61d | 986 | wait_queue_head_t waitq; |
3c446b3d | 987 | struct fasync_struct *fasync; |
79f14641 PZ |
988 | |
989 | /* delayed work for NMIs and such */ | |
990 | int pending_wakeup; | |
4c9e2542 | 991 | int pending_kill; |
79f14641 | 992 | int pending_disable; |
e360adbe | 993 | struct irq_work pending; |
592903cd | 994 | |
79f14641 PZ |
995 | atomic_t event_limit; |
996 | ||
cdd6c482 | 997 | void (*destroy)(struct perf_event *); |
592903cd | 998 | struct rcu_head rcu_head; |
709e50cf PZ |
999 | |
1000 | struct pid_namespace *ns; | |
8e5799b1 | 1001 | u64 id; |
6fb2915d | 1002 | |
b326e956 | 1003 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 1004 | void *overflow_handler_context; |
453f19ee | 1005 | |
07b139c8 | 1006 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 1007 | struct ftrace_event_call *tp_event; |
6fb2915d | 1008 | struct event_filter *filter; |
ced39002 JO |
1009 | #ifdef CONFIG_FUNCTION_TRACER |
1010 | struct ftrace_ops ftrace_ops; | |
1011 | #endif | |
ee06094f | 1012 | #endif |
6fb2915d | 1013 | |
e5d1367f SE |
1014 | #ifdef CONFIG_CGROUP_PERF |
1015 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
1016 | int cgrp_defer_enabled; | |
1017 | #endif | |
1018 | ||
6fb2915d | 1019 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
1020 | }; |
1021 | ||
b04243ef PZ |
1022 | enum perf_event_context_type { |
1023 | task_context, | |
1024 | cpu_context, | |
1025 | }; | |
1026 | ||
0793a61d | 1027 | /** |
cdd6c482 | 1028 | * struct perf_event_context - event context structure |
0793a61d | 1029 | * |
cdd6c482 | 1030 | * Used as a container for task events and CPU events as well: |
0793a61d | 1031 | */ |
cdd6c482 | 1032 | struct perf_event_context { |
108b02cf | 1033 | struct pmu *pmu; |
ee643c41 | 1034 | enum perf_event_context_type type; |
0793a61d | 1035 | /* |
cdd6c482 | 1036 | * Protect the states of the events in the list, |
d859e29f | 1037 | * nr_active, and the list: |
0793a61d | 1038 | */ |
e625cce1 | 1039 | raw_spinlock_t lock; |
d859e29f | 1040 | /* |
cdd6c482 | 1041 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
1042 | * is sufficient to ensure the list doesn't change; to change |
1043 | * the list you need to lock both the mutex and the spinlock. | |
1044 | */ | |
a308444c | 1045 | struct mutex mutex; |
04289bb9 | 1046 | |
889ff015 FW |
1047 | struct list_head pinned_groups; |
1048 | struct list_head flexible_groups; | |
a308444c | 1049 | struct list_head event_list; |
cdd6c482 | 1050 | int nr_events; |
a308444c IM |
1051 | int nr_active; |
1052 | int is_active; | |
bfbd3381 | 1053 | int nr_stat; |
0f5a2601 | 1054 | int nr_freq; |
dddd3379 | 1055 | int rotate_disable; |
a308444c IM |
1056 | atomic_t refcount; |
1057 | struct task_struct *task; | |
53cfbf59 PM |
1058 | |
1059 | /* | |
4af4998b | 1060 | * Context clock, runs when context enabled. |
53cfbf59 | 1061 | */ |
a308444c IM |
1062 | u64 time; |
1063 | u64 timestamp; | |
564c2b21 PM |
1064 | |
1065 | /* | |
1066 | * These fields let us detect when two contexts have both | |
1067 | * been cloned (inherited) from a common ancestor. | |
1068 | */ | |
cdd6c482 | 1069 | struct perf_event_context *parent_ctx; |
a308444c IM |
1070 | u64 parent_gen; |
1071 | u64 generation; | |
1072 | int pin_count; | |
d010b332 SE |
1073 | int nr_cgroups; /* cgroup evts */ |
1074 | int nr_branch_stack; /* branch_stack evt */ | |
28009ce4 | 1075 | struct rcu_head rcu_head; |
0793a61d TG |
1076 | }; |
1077 | ||
7ae07ea3 FW |
1078 | /* |
1079 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 1080 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
1081 | */ |
1082 | #define PERF_NR_CONTEXTS 4 | |
1083 | ||
0793a61d | 1084 | /** |
cdd6c482 | 1085 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
1086 | */ |
1087 | struct perf_cpu_context { | |
cdd6c482 IM |
1088 | struct perf_event_context ctx; |
1089 | struct perf_event_context *task_ctx; | |
0793a61d | 1090 | int active_oncpu; |
3b6f9e5c | 1091 | int exclusive; |
e9d2b064 PZ |
1092 | struct list_head rotation_list; |
1093 | int jiffies_interval; | |
51676957 | 1094 | struct pmu *active_pmu; |
e5d1367f | 1095 | struct perf_cgroup *cgrp; |
0793a61d TG |
1096 | }; |
1097 | ||
5622f295 | 1098 | struct perf_output_handle { |
57c0c15b | 1099 | struct perf_event *event; |
76369139 | 1100 | struct ring_buffer *rb; |
6d1acfd5 | 1101 | unsigned long wakeup; |
5d967a8b PZ |
1102 | unsigned long size; |
1103 | void *addr; | |
1104 | int page; | |
5622f295 MM |
1105 | }; |
1106 | ||
cdd6c482 | 1107 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 1108 | |
2e80a82a | 1109 | extern int perf_pmu_register(struct pmu *pmu, char *name, int type); |
b0a873eb | 1110 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 1111 | |
3bf101ba | 1112 | extern int perf_num_counters(void); |
84c79910 | 1113 | extern const char *perf_pmu_name(void); |
ab0cce56 JO |
1114 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
1115 | struct task_struct *task); | |
1116 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
1117 | struct task_struct *next); | |
cdd6c482 IM |
1118 | extern int perf_event_init_task(struct task_struct *child); |
1119 | extern void perf_event_exit_task(struct task_struct *child); | |
1120 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 1121 | extern void perf_event_delayed_put(struct task_struct *task); |
cdd6c482 | 1122 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
1123 | extern void perf_pmu_disable(struct pmu *pmu); |
1124 | extern void perf_pmu_enable(struct pmu *pmu); | |
cdd6c482 IM |
1125 | extern int perf_event_task_disable(void); |
1126 | extern int perf_event_task_enable(void); | |
26ca5c11 | 1127 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 1128 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
1129 | extern int perf_event_release_kernel(struct perf_event *event); |
1130 | extern struct perf_event * | |
1131 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
1132 | int cpu, | |
38a81da2 | 1133 | struct task_struct *task, |
4dc0da86 AK |
1134 | perf_overflow_handler_t callback, |
1135 | void *context); | |
0cda4c02 YZ |
1136 | extern void perf_pmu_migrate_context(struct pmu *pmu, |
1137 | int src_cpu, int dst_cpu); | |
59ed446f PZ |
1138 | extern u64 perf_event_read_value(struct perf_event *event, |
1139 | u64 *enabled, u64 *running); | |
5c92d124 | 1140 | |
d010b332 | 1141 | |
df1a132b | 1142 | struct perf_sample_data { |
5622f295 MM |
1143 | u64 type; |
1144 | ||
1145 | u64 ip; | |
1146 | struct { | |
1147 | u32 pid; | |
1148 | u32 tid; | |
1149 | } tid_entry; | |
1150 | u64 time; | |
a308444c | 1151 | u64 addr; |
5622f295 MM |
1152 | u64 id; |
1153 | u64 stream_id; | |
1154 | struct { | |
1155 | u32 cpu; | |
1156 | u32 reserved; | |
1157 | } cpu_entry; | |
a308444c | 1158 | u64 period; |
5622f295 | 1159 | struct perf_callchain_entry *callchain; |
3a43ce68 | 1160 | struct perf_raw_record *raw; |
bce38cd5 | 1161 | struct perf_branch_stack *br_stack; |
4018994f | 1162 | struct perf_regs_user regs_user; |
df1a132b PZ |
1163 | }; |
1164 | ||
fd0d000b RR |
1165 | static inline void perf_sample_data_init(struct perf_sample_data *data, |
1166 | u64 addr, u64 period) | |
dc1d628a | 1167 | { |
fd0d000b | 1168 | /* remaining struct members initialized in perf_prepare_sample() */ |
dc1d628a PZ |
1169 | data->addr = addr; |
1170 | data->raw = NULL; | |
bce38cd5 | 1171 | data->br_stack = NULL; |
4018994f JO |
1172 | data->period = period; |
1173 | data->regs_user.abi = PERF_SAMPLE_REGS_ABI_NONE; | |
1174 | data->regs_user.regs = NULL; | |
dc1d628a PZ |
1175 | } |
1176 | ||
5622f295 MM |
1177 | extern void perf_output_sample(struct perf_output_handle *handle, |
1178 | struct perf_event_header *header, | |
1179 | struct perf_sample_data *data, | |
cdd6c482 | 1180 | struct perf_event *event); |
5622f295 MM |
1181 | extern void perf_prepare_sample(struct perf_event_header *header, |
1182 | struct perf_sample_data *data, | |
cdd6c482 | 1183 | struct perf_event *event, |
5622f295 MM |
1184 | struct pt_regs *regs); |
1185 | ||
a8b0ca17 | 1186 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
1187 | struct perf_sample_data *data, |
1188 | struct pt_regs *regs); | |
df1a132b | 1189 | |
6c7e550f FBH |
1190 | static inline bool is_sampling_event(struct perf_event *event) |
1191 | { | |
1192 | return event->attr.sample_period != 0; | |
1193 | } | |
1194 | ||
3b6f9e5c | 1195 | /* |
cdd6c482 | 1196 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 1197 | */ |
cdd6c482 | 1198 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 1199 | { |
89a1e187 | 1200 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
1201 | } |
1202 | ||
c5905afb | 1203 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 1204 | |
a8b0ca17 | 1205 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 1206 | |
b0f82b81 | 1207 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 1208 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 1209 | #endif |
5331d7b8 FW |
1210 | |
1211 | /* | |
1212 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
1213 | * the nth caller. We only need a few of the regs: | |
1214 | * - ip for PERF_SAMPLE_IP | |
1215 | * - cs for user_mode() tests | |
1216 | * - bp for callchains | |
1217 | * - eflags, for future purposes, just in case | |
1218 | */ | |
b0f82b81 | 1219 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 1220 | { |
5331d7b8 FW |
1221 | memset(regs, 0, sizeof(*regs)); |
1222 | ||
b0f82b81 | 1223 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
1224 | } |
1225 | ||
7e54a5a0 | 1226 | static __always_inline void |
a8b0ca17 | 1227 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1228 | { |
7e54a5a0 PZ |
1229 | struct pt_regs hot_regs; |
1230 | ||
c5905afb | 1231 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
d430d3d7 JB |
1232 | if (!regs) { |
1233 | perf_fetch_caller_regs(&hot_regs); | |
1234 | regs = &hot_regs; | |
1235 | } | |
a8b0ca17 | 1236 | __perf_sw_event(event_id, nr, regs, addr); |
e49a5bd3 FW |
1237 | } |
1238 | } | |
1239 | ||
c5905afb | 1240 | extern struct static_key_deferred perf_sched_events; |
ee6dcfa4 | 1241 | |
ab0cce56 | 1242 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
a8d757ef | 1243 | struct task_struct *task) |
ab0cce56 JO |
1244 | { |
1245 | if (static_key_false(&perf_sched_events.key)) | |
1246 | __perf_event_task_sched_in(prev, task); | |
1247 | } | |
1248 | ||
1249 | static inline void perf_event_task_sched_out(struct task_struct *prev, | |
1250 | struct task_struct *next) | |
ee6dcfa4 | 1251 | { |
a8b0ca17 | 1252 | perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0); |
ee6dcfa4 | 1253 | |
c5905afb | 1254 | if (static_key_false(&perf_sched_events.key)) |
ab0cce56 | 1255 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
1256 | } |
1257 | ||
3af9e859 | 1258 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 1259 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1260 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1261 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1262 | |
cdd6c482 IM |
1263 | extern void perf_event_comm(struct task_struct *tsk); |
1264 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 1265 | |
56962b44 FW |
1266 | /* Callchains */ |
1267 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1268 | ||
e7e7ee2e IM |
1269 | extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs); |
1270 | extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs); | |
394ee076 | 1271 | |
e7e7ee2e | 1272 | static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip) |
70791ce9 FW |
1273 | { |
1274 | if (entry->nr < PERF_MAX_STACK_DEPTH) | |
1275 | entry->ip[entry->nr++] = ip; | |
1276 | } | |
394ee076 | 1277 | |
cdd6c482 IM |
1278 | extern int sysctl_perf_event_paranoid; |
1279 | extern int sysctl_perf_event_mlock; | |
1280 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 1281 | |
163ec435 PZ |
1282 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
1283 | void __user *buffer, size_t *lenp, | |
1284 | loff_t *ppos); | |
1285 | ||
320ebf09 PZ |
1286 | static inline bool perf_paranoid_tracepoint_raw(void) |
1287 | { | |
1288 | return sysctl_perf_event_paranoid > -1; | |
1289 | } | |
1290 | ||
1291 | static inline bool perf_paranoid_cpu(void) | |
1292 | { | |
1293 | return sysctl_perf_event_paranoid > 0; | |
1294 | } | |
1295 | ||
1296 | static inline bool perf_paranoid_kernel(void) | |
1297 | { | |
1298 | return sysctl_perf_event_paranoid > 1; | |
1299 | } | |
1300 | ||
cdd6c482 | 1301 | extern void perf_event_init(void); |
1c024eca PZ |
1302 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
1303 | int entry_size, struct pt_regs *regs, | |
e6dab5ff AV |
1304 | struct hlist_head *head, int rctx, |
1305 | struct task_struct *task); | |
24f1e32c | 1306 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1307 | |
9d23a90a | 1308 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1309 | # define perf_misc_flags(regs) \ |
1310 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1311 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
1312 | #endif |
1313 | ||
bce38cd5 SE |
1314 | static inline bool has_branch_stack(struct perf_event *event) |
1315 | { | |
1316 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
1317 | } | |
1318 | ||
5622f295 | 1319 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 1320 | struct perf_event *event, unsigned int size); |
5622f295 | 1321 | extern void perf_output_end(struct perf_output_handle *handle); |
91d7753a | 1322 | extern unsigned int perf_output_copy(struct perf_output_handle *handle, |
5622f295 | 1323 | const void *buf, unsigned int len); |
4ed7c92d PZ |
1324 | extern int perf_swevent_get_recursion_context(void); |
1325 | extern void perf_swevent_put_recursion_context(int rctx); | |
44234adc FW |
1326 | extern void perf_event_enable(struct perf_event *event); |
1327 | extern void perf_event_disable(struct perf_event *event); | |
e9d2b064 | 1328 | extern void perf_event_task_tick(void); |
0793a61d TG |
1329 | #else |
1330 | static inline void | |
ab0cce56 JO |
1331 | perf_event_task_sched_in(struct task_struct *prev, |
1332 | struct task_struct *task) { } | |
1333 | static inline void | |
1334 | perf_event_task_sched_out(struct task_struct *prev, | |
1335 | struct task_struct *next) { } | |
cdd6c482 IM |
1336 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1337 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1338 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1339 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
57c0c15b | 1340 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1341 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1342 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
1343 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
1344 | { | |
1345 | return -EINVAL; | |
1346 | } | |
15dbf27c | 1347 | |
925d519a | 1348 | static inline void |
a8b0ca17 | 1349 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1350 | static inline void |
184f412c | 1351 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1352 | |
39447b38 | 1353 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1354 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1355 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1356 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1357 | |
57c0c15b | 1358 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
1359 | static inline void perf_event_comm(struct task_struct *tsk) { } |
1360 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
1361 | static inline void perf_event_init(void) { } | |
184f412c | 1362 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1363 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
44234adc FW |
1364 | static inline void perf_event_enable(struct perf_event *event) { } |
1365 | static inline void perf_event_disable(struct perf_event *event) { } | |
e9d2b064 | 1366 | static inline void perf_event_task_tick(void) { } |
0793a61d TG |
1367 | #endif |
1368 | ||
e7e7ee2e | 1369 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1370 | |
3f6da390 PZ |
1371 | /* |
1372 | * This has to have a higher priority than migration_notifier in sched.c. | |
1373 | */ | |
e7e7ee2e IM |
1374 | #define perf_cpu_notifier(fn) \ |
1375 | do { \ | |
1376 | static struct notifier_block fn##_nb __cpuinitdata = \ | |
1377 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
1378 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ | |
1379 | (void *)(unsigned long)smp_processor_id()); \ | |
1380 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ | |
1381 | (void *)(unsigned long)smp_processor_id()); \ | |
1382 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ | |
1383 | (void *)(unsigned long)smp_processor_id()); \ | |
1384 | register_cpu_notifier(&fn##_nb); \ | |
3f6da390 PZ |
1385 | } while (0) |
1386 | ||
641cc938 JO |
1387 | |
1388 | #define PMU_FORMAT_ATTR(_name, _format) \ | |
1389 | static ssize_t \ | |
1390 | _name##_show(struct device *dev, \ | |
1391 | struct device_attribute *attr, \ | |
1392 | char *page) \ | |
1393 | { \ | |
1394 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
1395 | return sprintf(page, _format "\n"); \ | |
1396 | } \ | |
1397 | \ | |
1398 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
1399 | ||
f3dfd265 | 1400 | #endif /* __KERNEL__ */ |
cdd6c482 | 1401 | #endif /* _LINUX_PERF_EVENT_H */ |