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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
8f622422 IM |
55 | PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, |
56 | PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, | |
f4dbfa8f | 57 | |
a308444c | 58 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 59 | }; |
e077df4f | 60 | |
8326f44d | 61 | /* |
cdd6c482 | 62 | * Generalized hardware cache events: |
8326f44d | 63 | * |
8be6e8f3 | 64 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x |
8326f44d IM |
65 | * { read, write, prefetch } x |
66 | * { accesses, misses } | |
67 | */ | |
1c432d89 | 68 | enum perf_hw_cache_id { |
a308444c IM |
69 | PERF_COUNT_HW_CACHE_L1D = 0, |
70 | PERF_COUNT_HW_CACHE_L1I = 1, | |
71 | PERF_COUNT_HW_CACHE_LL = 2, | |
72 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
73 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
74 | PERF_COUNT_HW_CACHE_BPU = 5, | |
75 | ||
76 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
77 | }; |
78 | ||
1c432d89 | 79 | enum perf_hw_cache_op_id { |
a308444c IM |
80 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
81 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
82 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 83 | |
a308444c | 84 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
85 | }; |
86 | ||
1c432d89 PZ |
87 | enum perf_hw_cache_op_result_id { |
88 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
89 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 90 | |
a308444c | 91 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
92 | }; |
93 | ||
b8e83514 | 94 | /* |
cdd6c482 IM |
95 | * Special "software" events provided by the kernel, even if the hardware |
96 | * does not support performance events. These events measure various | |
b8e83514 PZ |
97 | * physical and sw events of the kernel (and allow the profiling of them as |
98 | * well): | |
99 | */ | |
1c432d89 | 100 | enum perf_sw_ids { |
a308444c IM |
101 | PERF_COUNT_SW_CPU_CLOCK = 0, |
102 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
103 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
104 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
105 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
106 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
107 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
108 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
109 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
110 | |
111 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
112 | }; |
113 | ||
8a057d84 | 114 | /* |
0d48696f | 115 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
116 | * in the overflow packets. |
117 | */ | |
cdd6c482 | 118 | enum perf_event_sample_format { |
a308444c IM |
119 | PERF_SAMPLE_IP = 1U << 0, |
120 | PERF_SAMPLE_TID = 1U << 1, | |
121 | PERF_SAMPLE_TIME = 1U << 2, | |
122 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 123 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
124 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
125 | PERF_SAMPLE_ID = 1U << 6, | |
126 | PERF_SAMPLE_CPU = 1U << 7, | |
127 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 128 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 129 | PERF_SAMPLE_RAW = 1U << 10, |
974802ea | 130 | |
f413cdb8 | 131 | PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ |
8a057d84 PZ |
132 | }; |
133 | ||
53cfbf59 | 134 | /* |
cdd6c482 | 135 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
136 | * as specified by attr.read_format: |
137 | * | |
138 | * struct read_format { | |
57c0c15b | 139 | * { u64 value; |
d7ebe75b VW |
140 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
141 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
142 | * { u64 id; } && PERF_FORMAT_ID |
143 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 144 | * |
57c0c15b | 145 | * { u64 nr; |
d7ebe75b VW |
146 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
147 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
148 | * { u64 value; |
149 | * { u64 id; } && PERF_FORMAT_ID | |
150 | * } cntr[nr]; | |
151 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 152 | * }; |
53cfbf59 | 153 | */ |
cdd6c482 | 154 | enum perf_event_read_format { |
a308444c IM |
155 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
156 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
157 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 158 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 159 | |
57c0c15b | 160 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
161 | }; |
162 | ||
974802ea PZ |
163 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
164 | ||
9f66a381 | 165 | /* |
cdd6c482 | 166 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 167 | */ |
cdd6c482 | 168 | struct perf_event_attr { |
974802ea | 169 | |
f4a2deb4 | 170 | /* |
a21ca2ca IM |
171 | * Major type: hardware/software/tracepoint/etc. |
172 | */ | |
173 | __u32 type; | |
974802ea PZ |
174 | |
175 | /* | |
176 | * Size of the attr structure, for fwd/bwd compat. | |
177 | */ | |
178 | __u32 size; | |
a21ca2ca IM |
179 | |
180 | /* | |
181 | * Type specific configuration information. | |
f4a2deb4 PZ |
182 | */ |
183 | __u64 config; | |
9f66a381 | 184 | |
60db5e09 | 185 | union { |
b23f3325 PZ |
186 | __u64 sample_period; |
187 | __u64 sample_freq; | |
60db5e09 PZ |
188 | }; |
189 | ||
b23f3325 PZ |
190 | __u64 sample_type; |
191 | __u64 read_format; | |
9f66a381 | 192 | |
2743a5b0 | 193 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
194 | inherit : 1, /* children inherit it */ |
195 | pinned : 1, /* must always be on PMU */ | |
196 | exclusive : 1, /* only group on PMU */ | |
197 | exclude_user : 1, /* don't count user */ | |
198 | exclude_kernel : 1, /* ditto kernel */ | |
199 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 200 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 201 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 202 | comm : 1, /* include comm data */ |
60db5e09 | 203 | freq : 1, /* use freq, not period */ |
bfbd3381 | 204 | inherit_stat : 1, /* per task counts */ |
57e7986e | 205 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 206 | task : 1, /* trace fork/exit */ |
2667de81 | 207 | watermark : 1, /* wakeup_watermark */ |
ab608344 PZ |
208 | /* |
209 | * precise_ip: | |
210 | * | |
211 | * 0 - SAMPLE_IP can have arbitrary skid | |
212 | * 1 - SAMPLE_IP must have constant skid | |
213 | * 2 - SAMPLE_IP requested to have 0 skid | |
214 | * 3 - SAMPLE_IP must have 0 skid | |
215 | * | |
216 | * See also PERF_RECORD_MISC_EXACT_IP | |
217 | */ | |
218 | precise_ip : 2, /* skid constraint */ | |
3af9e859 | 219 | mmap_data : 1, /* non-exec mmap data */ |
c980d109 | 220 | sample_id_all : 1, /* sample_type all events */ |
ab608344 | 221 | |
c980d109 | 222 | __reserved_1 : 45; |
2743a5b0 | 223 | |
2667de81 PZ |
224 | union { |
225 | __u32 wakeup_events; /* wakeup every n events */ | |
226 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
227 | }; | |
24f1e32c | 228 | |
f13c12c6 | 229 | __u32 bp_type; |
a7e3ed1e AK |
230 | union { |
231 | __u64 bp_addr; | |
232 | __u64 config1; /* extension of config */ | |
233 | }; | |
234 | union { | |
235 | __u64 bp_len; | |
236 | __u64 config2; /* extension of config1 */ | |
237 | }; | |
eab656ae TG |
238 | }; |
239 | ||
d859e29f | 240 | /* |
cdd6c482 | 241 | * Ioctls that can be done on a perf event fd: |
d859e29f | 242 | */ |
cdd6c482 | 243 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
244 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
245 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 246 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 247 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 248 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 249 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
250 | |
251 | enum perf_event_ioc_flags { | |
3df5edad PZ |
252 | PERF_IOC_FLAG_GROUP = 1U << 0, |
253 | }; | |
d859e29f | 254 | |
37d81828 PM |
255 | /* |
256 | * Structure of the page that can be mapped via mmap | |
257 | */ | |
cdd6c482 | 258 | struct perf_event_mmap_page { |
37d81828 PM |
259 | __u32 version; /* version number of this structure */ |
260 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
261 | |
262 | /* | |
cdd6c482 | 263 | * Bits needed to read the hw events in user-space. |
38ff667b | 264 | * |
92f22a38 PZ |
265 | * u32 seq; |
266 | * s64 count; | |
38ff667b | 267 | * |
a2e87d06 PZ |
268 | * do { |
269 | * seq = pc->lock; | |
38ff667b | 270 | * |
a2e87d06 PZ |
271 | * barrier() |
272 | * if (pc->index) { | |
273 | * count = pmc_read(pc->index - 1); | |
274 | * count += pc->offset; | |
275 | * } else | |
276 | * goto regular_read; | |
38ff667b | 277 | * |
a2e87d06 PZ |
278 | * barrier(); |
279 | * } while (pc->lock != seq); | |
38ff667b | 280 | * |
92f22a38 PZ |
281 | * NOTE: for obvious reason this only works on self-monitoring |
282 | * processes. | |
38ff667b | 283 | */ |
37d81828 | 284 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
285 | __u32 index; /* hardware event identifier */ |
286 | __s64 offset; /* add to hardware event value */ | |
287 | __u64 time_enabled; /* time event active */ | |
288 | __u64 time_running; /* time event on cpu */ | |
7b732a75 | 289 | |
41f95331 PZ |
290 | /* |
291 | * Hole for extension of the self monitor capabilities | |
292 | */ | |
293 | ||
7f8b4e4e | 294 | __u64 __reserved[123]; /* align to 1k */ |
41f95331 | 295 | |
38ff667b PZ |
296 | /* |
297 | * Control data for the mmap() data buffer. | |
298 | * | |
43a21ea8 PZ |
299 | * User-space reading the @data_head value should issue an rmb(), on |
300 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 301 | * perf_event_wakeup(). |
43a21ea8 PZ |
302 | * |
303 | * When the mapping is PROT_WRITE the @data_tail value should be | |
304 | * written by userspace to reflect the last read data. In this case | |
305 | * the kernel will not over-write unread data. | |
38ff667b | 306 | */ |
8e3747c1 | 307 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 308 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
309 | }; |
310 | ||
39447b38 | 311 | #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) |
184f412c | 312 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) |
cdd6c482 IM |
313 | #define PERF_RECORD_MISC_KERNEL (1 << 0) |
314 | #define PERF_RECORD_MISC_USER (2 << 0) | |
315 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
39447b38 ZY |
316 | #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) |
317 | #define PERF_RECORD_MISC_GUEST_USER (5 << 0) | |
6fab0192 | 318 | |
ab608344 PZ |
319 | /* |
320 | * Indicates that the content of PERF_SAMPLE_IP points to | |
321 | * the actual instruction that triggered the event. See also | |
322 | * perf_event_attr::precise_ip. | |
323 | */ | |
324 | #define PERF_RECORD_MISC_EXACT_IP (1 << 14) | |
ef21f683 PZ |
325 | /* |
326 | * Reserve the last bit to indicate some extended misc field | |
327 | */ | |
328 | #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) | |
329 | ||
5c148194 PZ |
330 | struct perf_event_header { |
331 | __u32 type; | |
6fab0192 PZ |
332 | __u16 misc; |
333 | __u16 size; | |
5c148194 PZ |
334 | }; |
335 | ||
336 | enum perf_event_type { | |
5ed00415 | 337 | |
0c593b34 | 338 | /* |
c980d109 ACM |
339 | * If perf_event_attr.sample_id_all is set then all event types will |
340 | * have the sample_type selected fields related to where/when | |
341 | * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID) | |
342 | * described in PERF_RECORD_SAMPLE below, it will be stashed just after | |
343 | * the perf_event_header and the fields already present for the existing | |
344 | * fields, i.e. at the end of the payload. That way a newer perf.data | |
345 | * file will be supported by older perf tools, with these new optional | |
346 | * fields being ignored. | |
347 | * | |
0c593b34 PZ |
348 | * The MMAP events record the PROT_EXEC mappings so that we can |
349 | * correlate userspace IPs to code. They have the following structure: | |
350 | * | |
351 | * struct { | |
0127c3ea | 352 | * struct perf_event_header header; |
0c593b34 | 353 | * |
0127c3ea IM |
354 | * u32 pid, tid; |
355 | * u64 addr; | |
356 | * u64 len; | |
357 | * u64 pgoff; | |
358 | * char filename[]; | |
0c593b34 PZ |
359 | * }; |
360 | */ | |
cdd6c482 | 361 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 362 | |
43a21ea8 PZ |
363 | /* |
364 | * struct { | |
57c0c15b IM |
365 | * struct perf_event_header header; |
366 | * u64 id; | |
367 | * u64 lost; | |
43a21ea8 PZ |
368 | * }; |
369 | */ | |
cdd6c482 | 370 | PERF_RECORD_LOST = 2, |
43a21ea8 | 371 | |
8d1b2d93 PZ |
372 | /* |
373 | * struct { | |
0127c3ea | 374 | * struct perf_event_header header; |
8d1b2d93 | 375 | * |
0127c3ea IM |
376 | * u32 pid, tid; |
377 | * char comm[]; | |
8d1b2d93 PZ |
378 | * }; |
379 | */ | |
cdd6c482 | 380 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 381 | |
9f498cc5 PZ |
382 | /* |
383 | * struct { | |
384 | * struct perf_event_header header; | |
385 | * u32 pid, ppid; | |
386 | * u32 tid, ptid; | |
393b2ad8 | 387 | * u64 time; |
9f498cc5 PZ |
388 | * }; |
389 | */ | |
cdd6c482 | 390 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 391 | |
26b119bc PZ |
392 | /* |
393 | * struct { | |
0127c3ea IM |
394 | * struct perf_event_header header; |
395 | * u64 time; | |
689802b2 | 396 | * u64 id; |
7f453c24 | 397 | * u64 stream_id; |
a78ac325 PZ |
398 | * }; |
399 | */ | |
184f412c IM |
400 | PERF_RECORD_THROTTLE = 5, |
401 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 402 | |
60313ebe PZ |
403 | /* |
404 | * struct { | |
a21ca2ca IM |
405 | * struct perf_event_header header; |
406 | * u32 pid, ppid; | |
9f498cc5 | 407 | * u32 tid, ptid; |
a6f10a2f | 408 | * u64 time; |
60313ebe PZ |
409 | * }; |
410 | */ | |
cdd6c482 | 411 | PERF_RECORD_FORK = 7, |
60313ebe | 412 | |
38b200d6 PZ |
413 | /* |
414 | * struct { | |
184f412c IM |
415 | * struct perf_event_header header; |
416 | * u32 pid, tid; | |
3dab77fb | 417 | * |
184f412c | 418 | * struct read_format values; |
38b200d6 PZ |
419 | * }; |
420 | */ | |
cdd6c482 | 421 | PERF_RECORD_READ = 8, |
38b200d6 | 422 | |
8a057d84 | 423 | /* |
0c593b34 | 424 | * struct { |
0127c3ea | 425 | * struct perf_event_header header; |
0c593b34 | 426 | * |
43a21ea8 PZ |
427 | * { u64 ip; } && PERF_SAMPLE_IP |
428 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
429 | * { u64 time; } && PERF_SAMPLE_TIME | |
430 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 431 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 432 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 433 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 434 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 435 | * |
3dab77fb | 436 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 437 | * |
f9188e02 | 438 | * { u64 nr, |
43a21ea8 | 439 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 440 | * |
57c0c15b IM |
441 | * # |
442 | * # The RAW record below is opaque data wrt the ABI | |
443 | * # | |
444 | * # That is, the ABI doesn't make any promises wrt to | |
445 | * # the stability of its content, it may vary depending | |
446 | * # on event, hardware, kernel version and phase of | |
447 | * # the moon. | |
448 | * # | |
449 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
450 | * # | |
3dab77fb | 451 | * |
a044560c PZ |
452 | * { u32 size; |
453 | * char data[size];}&& PERF_SAMPLE_RAW | |
0c593b34 | 454 | * }; |
8a057d84 | 455 | */ |
184f412c | 456 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 457 | |
cdd6c482 | 458 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
459 | }; |
460 | ||
f9188e02 PZ |
461 | enum perf_callchain_context { |
462 | PERF_CONTEXT_HV = (__u64)-32, | |
463 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
464 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 465 | |
f9188e02 PZ |
466 | PERF_CONTEXT_GUEST = (__u64)-2048, |
467 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
468 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
469 | ||
470 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
471 | }; |
472 | ||
e7e7ee2e IM |
473 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
474 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
475 | #define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */ | |
a4be7c27 | 476 | |
f3dfd265 | 477 | #ifdef __KERNEL__ |
9f66a381 | 478 | /* |
f3dfd265 | 479 | * Kernel-internal data types and definitions: |
9f66a381 IM |
480 | */ |
481 | ||
cdd6c482 | 482 | #ifdef CONFIG_PERF_EVENTS |
e5d1367f | 483 | # include <linux/cgroup.h> |
cdd6c482 | 484 | # include <asm/perf_event.h> |
7be79236 | 485 | # include <asm/local64.h> |
f3dfd265 PM |
486 | #endif |
487 | ||
39447b38 | 488 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
489 | int (*is_in_guest)(void); |
490 | int (*is_user_mode)(void); | |
491 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
492 | }; |
493 | ||
2ff6cfd7 AB |
494 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
495 | #include <asm/hw_breakpoint.h> | |
496 | #endif | |
497 | ||
f3dfd265 PM |
498 | #include <linux/list.h> |
499 | #include <linux/mutex.h> | |
500 | #include <linux/rculist.h> | |
501 | #include <linux/rcupdate.h> | |
502 | #include <linux/spinlock.h> | |
d6d020e9 | 503 | #include <linux/hrtimer.h> |
3c446b3d | 504 | #include <linux/fs.h> |
709e50cf | 505 | #include <linux/pid_namespace.h> |
906010b2 | 506 | #include <linux/workqueue.h> |
5331d7b8 | 507 | #include <linux/ftrace.h> |
85cfabbc | 508 | #include <linux/cpu.h> |
e360adbe | 509 | #include <linux/irq_work.h> |
d430d3d7 | 510 | #include <linux/jump_label.h> |
f3dfd265 | 511 | #include <asm/atomic.h> |
fa588151 | 512 | #include <asm/local.h> |
f3dfd265 | 513 | |
f9188e02 PZ |
514 | #define PERF_MAX_STACK_DEPTH 255 |
515 | ||
516 | struct perf_callchain_entry { | |
517 | __u64 nr; | |
518 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
519 | }; | |
520 | ||
3a43ce68 FW |
521 | struct perf_raw_record { |
522 | u32 size; | |
523 | void *data; | |
f413cdb8 FW |
524 | }; |
525 | ||
caff2bef PZ |
526 | struct perf_branch_entry { |
527 | __u64 from; | |
528 | __u64 to; | |
529 | __u64 flags; | |
530 | }; | |
531 | ||
532 | struct perf_branch_stack { | |
533 | __u64 nr; | |
534 | struct perf_branch_entry entries[0]; | |
535 | }; | |
536 | ||
f3dfd265 PM |
537 | struct task_struct; |
538 | ||
0793a61d | 539 | /** |
cdd6c482 | 540 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 541 | */ |
cdd6c482 IM |
542 | struct hw_perf_event { |
543 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
544 | union { |
545 | struct { /* hardware */ | |
a308444c | 546 | u64 config; |
447a194b | 547 | u64 last_tag; |
a308444c | 548 | unsigned long config_base; |
cdd6c482 | 549 | unsigned long event_base; |
a308444c | 550 | int idx; |
447a194b | 551 | int last_cpu; |
a7e3ed1e AK |
552 | unsigned int extra_reg; |
553 | u64 extra_config; | |
554 | int extra_alloc; | |
d6d020e9 | 555 | }; |
721a669b | 556 | struct { /* software */ |
a308444c | 557 | struct hrtimer hrtimer; |
d6d020e9 | 558 | }; |
24f1e32c | 559 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 FW |
560 | struct { /* breakpoint */ |
561 | struct arch_hw_breakpoint info; | |
562 | struct list_head bp_list; | |
d580ff86 PZ |
563 | /* |
564 | * Crufty hack to avoid the chicken and egg | |
565 | * problem hw_breakpoint has with context | |
566 | * creation and event initalization. | |
567 | */ | |
568 | struct task_struct *bp_target; | |
45a73372 | 569 | }; |
24f1e32c | 570 | #endif |
d6d020e9 | 571 | }; |
a4eaf7f1 | 572 | int state; |
e7850595 | 573 | local64_t prev_count; |
b23f3325 | 574 | u64 sample_period; |
9e350de3 | 575 | u64 last_period; |
e7850595 | 576 | local64_t period_left; |
60db5e09 | 577 | u64 interrupts; |
6a24ed6c | 578 | |
abd50713 PZ |
579 | u64 freq_time_stamp; |
580 | u64 freq_count_stamp; | |
ee06094f | 581 | #endif |
0793a61d TG |
582 | }; |
583 | ||
a4eaf7f1 PZ |
584 | /* |
585 | * hw_perf_event::state flags | |
586 | */ | |
587 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
588 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
589 | #define PERF_HES_ARCH 0x04 | |
590 | ||
cdd6c482 | 591 | struct perf_event; |
621a01ea | 592 | |
8d2cacbb PZ |
593 | /* |
594 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
595 | */ | |
596 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 597 | |
621a01ea | 598 | /** |
4aeb0b42 | 599 | * struct pmu - generic performance monitoring unit |
621a01ea | 600 | */ |
4aeb0b42 | 601 | struct pmu { |
b0a873eb PZ |
602 | struct list_head entry; |
603 | ||
abe43400 | 604 | struct device *dev; |
2e80a82a PZ |
605 | char *name; |
606 | int type; | |
607 | ||
108b02cf PZ |
608 | int * __percpu pmu_disable_count; |
609 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
8dc85d54 | 610 | int task_ctx_nr; |
6bde9b6c LM |
611 | |
612 | /* | |
a4eaf7f1 PZ |
613 | * Fully disable/enable this PMU, can be used to protect from the PMI |
614 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 615 | */ |
ad5133b7 PZ |
616 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
617 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 618 | |
8d2cacbb | 619 | /* |
a4eaf7f1 | 620 | * Try and initialize the event for this PMU. |
24cd7f54 | 621 | * Should return -ENOENT when the @event doesn't match this PMU. |
8d2cacbb | 622 | */ |
b0a873eb PZ |
623 | int (*event_init) (struct perf_event *event); |
624 | ||
a4eaf7f1 PZ |
625 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
626 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
627 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
628 | ||
8d2cacbb | 629 | /* |
a4eaf7f1 PZ |
630 | * Adds/Removes a counter to/from the PMU, can be done inside |
631 | * a transaction, see the ->*_txn() methods. | |
632 | */ | |
633 | int (*add) (struct perf_event *event, int flags); | |
634 | void (*del) (struct perf_event *event, int flags); | |
635 | ||
636 | /* | |
637 | * Starts/Stops a counter present on the PMU. The PMI handler | |
638 | * should stop the counter when perf_event_overflow() returns | |
639 | * !0. ->start() will be used to continue. | |
640 | */ | |
641 | void (*start) (struct perf_event *event, int flags); | |
642 | void (*stop) (struct perf_event *event, int flags); | |
643 | ||
644 | /* | |
645 | * Updates the counter value of the event. | |
646 | */ | |
cdd6c482 | 647 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
648 | |
649 | /* | |
24cd7f54 PZ |
650 | * Group events scheduling is treated as a transaction, add |
651 | * group events as a whole and perform one schedulability test. | |
652 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
653 | * |
654 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 655 | * do schedulability tests. |
8d2cacbb | 656 | */ |
e7e7ee2e | 657 | void (*start_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 658 | /* |
a4eaf7f1 | 659 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
660 | * then ->commit_txn() is required to perform one. On success |
661 | * the transaction is closed. On error the transaction is kept | |
662 | * open until ->cancel_txn() is called. | |
663 | */ | |
e7e7ee2e | 664 | int (*commit_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 665 | /* |
a4eaf7f1 | 666 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 667 | * for each successful ->add() during the transaction. |
8d2cacbb | 668 | */ |
e7e7ee2e | 669 | void (*cancel_txn) (struct pmu *pmu); /* optional */ |
621a01ea IM |
670 | }; |
671 | ||
6a930700 | 672 | /** |
cdd6c482 | 673 | * enum perf_event_active_state - the states of a event |
6a930700 | 674 | */ |
cdd6c482 | 675 | enum perf_event_active_state { |
57c0c15b | 676 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
677 | PERF_EVENT_STATE_OFF = -1, |
678 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 679 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
680 | }; |
681 | ||
9b51f66d | 682 | struct file; |
453f19ee PZ |
683 | struct perf_sample_data; |
684 | ||
a8b0ca17 | 685 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
686 | struct perf_sample_data *, |
687 | struct pt_regs *regs); | |
688 | ||
d6f962b5 | 689 | enum perf_group_flag { |
e7e7ee2e | 690 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
691 | }; |
692 | ||
e7e7ee2e IM |
693 | #define SWEVENT_HLIST_BITS 8 |
694 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
695 | |
696 | struct swevent_hlist { | |
e7e7ee2e IM |
697 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
698 | struct rcu_head rcu_head; | |
76e1d904 FW |
699 | }; |
700 | ||
8a49542c PZ |
701 | #define PERF_ATTACH_CONTEXT 0x01 |
702 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 703 | #define PERF_ATTACH_TASK 0x04 |
8a49542c | 704 | |
e5d1367f SE |
705 | #ifdef CONFIG_CGROUP_PERF |
706 | /* | |
707 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
708 | * This is a per-cpu dynamically allocated data structure. | |
709 | */ | |
710 | struct perf_cgroup_info { | |
e7e7ee2e IM |
711 | u64 time; |
712 | u64 timestamp; | |
e5d1367f SE |
713 | }; |
714 | ||
715 | struct perf_cgroup { | |
e7e7ee2e IM |
716 | struct cgroup_subsys_state css; |
717 | struct perf_cgroup_info *info; /* timing info, one per cpu */ | |
e5d1367f SE |
718 | }; |
719 | #endif | |
720 | ||
76369139 FW |
721 | struct ring_buffer; |
722 | ||
0793a61d | 723 | /** |
cdd6c482 | 724 | * struct perf_event - performance event kernel representation: |
0793a61d | 725 | */ |
cdd6c482 IM |
726 | struct perf_event { |
727 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 728 | struct list_head group_entry; |
592903cd | 729 | struct list_head event_entry; |
04289bb9 | 730 | struct list_head sibling_list; |
76e1d904 | 731 | struct hlist_node hlist_entry; |
0127c3ea | 732 | int nr_siblings; |
d6f962b5 | 733 | int group_flags; |
cdd6c482 | 734 | struct perf_event *group_leader; |
a4eaf7f1 | 735 | struct pmu *pmu; |
04289bb9 | 736 | |
cdd6c482 | 737 | enum perf_event_active_state state; |
8a49542c | 738 | unsigned int attach_state; |
e7850595 | 739 | local64_t count; |
a6e6dea6 | 740 | atomic64_t child_count; |
ee06094f | 741 | |
53cfbf59 | 742 | /* |
cdd6c482 | 743 | * These are the total time in nanoseconds that the event |
53cfbf59 | 744 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 745 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
746 | * and running (scheduled onto the CPU), respectively. |
747 | * | |
748 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 749 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
750 | */ |
751 | u64 total_time_enabled; | |
752 | u64 total_time_running; | |
753 | ||
754 | /* | |
755 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 756 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
757 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
758 | * in time. | |
cdd6c482 IM |
759 | * tstamp_enabled: the notional time when the event was enabled |
760 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 761 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 762 | * event was scheduled off. |
53cfbf59 PM |
763 | */ |
764 | u64 tstamp_enabled; | |
765 | u64 tstamp_running; | |
766 | u64 tstamp_stopped; | |
767 | ||
eed01528 SE |
768 | /* |
769 | * timestamp shadows the actual context timing but it can | |
770 | * be safely used in NMI interrupt context. It reflects the | |
771 | * context time as it was when the event was last scheduled in. | |
772 | * | |
773 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
774 | * compute ctx_time for a sample, simply add perf_clock(). | |
775 | */ | |
776 | u64 shadow_ctx_time; | |
777 | ||
24f1e32c | 778 | struct perf_event_attr attr; |
c320c7b7 | 779 | u16 header_size; |
6844c09d | 780 | u16 id_header_size; |
c320c7b7 | 781 | u16 read_size; |
cdd6c482 | 782 | struct hw_perf_event hw; |
0793a61d | 783 | |
cdd6c482 | 784 | struct perf_event_context *ctx; |
9b51f66d | 785 | struct file *filp; |
0793a61d | 786 | |
53cfbf59 PM |
787 | /* |
788 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 789 | * events have been enabled and running, respectively. |
53cfbf59 PM |
790 | */ |
791 | atomic64_t child_total_time_enabled; | |
792 | atomic64_t child_total_time_running; | |
793 | ||
0793a61d | 794 | /* |
d859e29f | 795 | * Protect attach/detach and child_list: |
0793a61d | 796 | */ |
fccc714b PZ |
797 | struct mutex child_mutex; |
798 | struct list_head child_list; | |
cdd6c482 | 799 | struct perf_event *parent; |
0793a61d TG |
800 | |
801 | int oncpu; | |
802 | int cpu; | |
803 | ||
082ff5a2 PZ |
804 | struct list_head owner_entry; |
805 | struct task_struct *owner; | |
806 | ||
7b732a75 PZ |
807 | /* mmap bits */ |
808 | struct mutex mmap_mutex; | |
809 | atomic_t mmap_count; | |
ac9721f3 PZ |
810 | int mmap_locked; |
811 | struct user_struct *mmap_user; | |
76369139 | 812 | struct ring_buffer *rb; |
37d81828 | 813 | |
7b732a75 | 814 | /* poll related */ |
0793a61d | 815 | wait_queue_head_t waitq; |
3c446b3d | 816 | struct fasync_struct *fasync; |
79f14641 PZ |
817 | |
818 | /* delayed work for NMIs and such */ | |
819 | int pending_wakeup; | |
4c9e2542 | 820 | int pending_kill; |
79f14641 | 821 | int pending_disable; |
e360adbe | 822 | struct irq_work pending; |
592903cd | 823 | |
79f14641 PZ |
824 | atomic_t event_limit; |
825 | ||
cdd6c482 | 826 | void (*destroy)(struct perf_event *); |
592903cd | 827 | struct rcu_head rcu_head; |
709e50cf PZ |
828 | |
829 | struct pid_namespace *ns; | |
8e5799b1 | 830 | u64 id; |
6fb2915d | 831 | |
b326e956 | 832 | perf_overflow_handler_t overflow_handler; |
453f19ee | 833 | |
07b139c8 | 834 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 835 | struct ftrace_event_call *tp_event; |
6fb2915d | 836 | struct event_filter *filter; |
ee06094f | 837 | #endif |
6fb2915d | 838 | |
e5d1367f SE |
839 | #ifdef CONFIG_CGROUP_PERF |
840 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
841 | int cgrp_defer_enabled; | |
842 | #endif | |
843 | ||
6fb2915d | 844 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
845 | }; |
846 | ||
b04243ef PZ |
847 | enum perf_event_context_type { |
848 | task_context, | |
849 | cpu_context, | |
850 | }; | |
851 | ||
0793a61d | 852 | /** |
cdd6c482 | 853 | * struct perf_event_context - event context structure |
0793a61d | 854 | * |
cdd6c482 | 855 | * Used as a container for task events and CPU events as well: |
0793a61d | 856 | */ |
cdd6c482 | 857 | struct perf_event_context { |
108b02cf | 858 | struct pmu *pmu; |
ee643c41 | 859 | enum perf_event_context_type type; |
0793a61d | 860 | /* |
cdd6c482 | 861 | * Protect the states of the events in the list, |
d859e29f | 862 | * nr_active, and the list: |
0793a61d | 863 | */ |
e625cce1 | 864 | raw_spinlock_t lock; |
d859e29f | 865 | /* |
cdd6c482 | 866 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
867 | * is sufficient to ensure the list doesn't change; to change |
868 | * the list you need to lock both the mutex and the spinlock. | |
869 | */ | |
a308444c | 870 | struct mutex mutex; |
04289bb9 | 871 | |
889ff015 FW |
872 | struct list_head pinned_groups; |
873 | struct list_head flexible_groups; | |
a308444c | 874 | struct list_head event_list; |
cdd6c482 | 875 | int nr_events; |
a308444c IM |
876 | int nr_active; |
877 | int is_active; | |
bfbd3381 | 878 | int nr_stat; |
dddd3379 | 879 | int rotate_disable; |
a308444c IM |
880 | atomic_t refcount; |
881 | struct task_struct *task; | |
53cfbf59 PM |
882 | |
883 | /* | |
4af4998b | 884 | * Context clock, runs when context enabled. |
53cfbf59 | 885 | */ |
a308444c IM |
886 | u64 time; |
887 | u64 timestamp; | |
564c2b21 PM |
888 | |
889 | /* | |
890 | * These fields let us detect when two contexts have both | |
891 | * been cloned (inherited) from a common ancestor. | |
892 | */ | |
cdd6c482 | 893 | struct perf_event_context *parent_ctx; |
a308444c IM |
894 | u64 parent_gen; |
895 | u64 generation; | |
896 | int pin_count; | |
e5d1367f | 897 | int nr_cgroups; /* cgroup events present */ |
28009ce4 | 898 | struct rcu_head rcu_head; |
0793a61d TG |
899 | }; |
900 | ||
7ae07ea3 FW |
901 | /* |
902 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 903 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
904 | */ |
905 | #define PERF_NR_CONTEXTS 4 | |
906 | ||
0793a61d | 907 | /** |
cdd6c482 | 908 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
909 | */ |
910 | struct perf_cpu_context { | |
cdd6c482 IM |
911 | struct perf_event_context ctx; |
912 | struct perf_event_context *task_ctx; | |
0793a61d | 913 | int active_oncpu; |
3b6f9e5c | 914 | int exclusive; |
e9d2b064 PZ |
915 | struct list_head rotation_list; |
916 | int jiffies_interval; | |
51676957 | 917 | struct pmu *active_pmu; |
e5d1367f | 918 | struct perf_cgroup *cgrp; |
0793a61d TG |
919 | }; |
920 | ||
5622f295 | 921 | struct perf_output_handle { |
57c0c15b | 922 | struct perf_event *event; |
76369139 | 923 | struct ring_buffer *rb; |
6d1acfd5 | 924 | unsigned long wakeup; |
5d967a8b PZ |
925 | unsigned long size; |
926 | void *addr; | |
927 | int page; | |
5622f295 MM |
928 | }; |
929 | ||
cdd6c482 | 930 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 931 | |
2e80a82a | 932 | extern int perf_pmu_register(struct pmu *pmu, char *name, int type); |
b0a873eb | 933 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 934 | |
3bf101ba | 935 | extern int perf_num_counters(void); |
84c79910 | 936 | extern const char *perf_pmu_name(void); |
82cd6def PZ |
937 | extern void __perf_event_task_sched_in(struct task_struct *task); |
938 | extern void __perf_event_task_sched_out(struct task_struct *task, struct task_struct *next); | |
cdd6c482 IM |
939 | extern int perf_event_init_task(struct task_struct *child); |
940 | extern void perf_event_exit_task(struct task_struct *child); | |
941 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 942 | extern void perf_event_delayed_put(struct task_struct *task); |
cdd6c482 | 943 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
944 | extern void perf_pmu_disable(struct pmu *pmu); |
945 | extern void perf_pmu_enable(struct pmu *pmu); | |
cdd6c482 IM |
946 | extern int perf_event_task_disable(void); |
947 | extern int perf_event_task_enable(void); | |
cdd6c482 | 948 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
949 | extern int perf_event_release_kernel(struct perf_event *event); |
950 | extern struct perf_event * | |
951 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
952 | int cpu, | |
38a81da2 | 953 | struct task_struct *task, |
b326e956 | 954 | perf_overflow_handler_t callback); |
59ed446f PZ |
955 | extern u64 perf_event_read_value(struct perf_event *event, |
956 | u64 *enabled, u64 *running); | |
5c92d124 | 957 | |
df1a132b | 958 | struct perf_sample_data { |
5622f295 MM |
959 | u64 type; |
960 | ||
961 | u64 ip; | |
962 | struct { | |
963 | u32 pid; | |
964 | u32 tid; | |
965 | } tid_entry; | |
966 | u64 time; | |
a308444c | 967 | u64 addr; |
5622f295 MM |
968 | u64 id; |
969 | u64 stream_id; | |
970 | struct { | |
971 | u32 cpu; | |
972 | u32 reserved; | |
973 | } cpu_entry; | |
a308444c | 974 | u64 period; |
5622f295 | 975 | struct perf_callchain_entry *callchain; |
3a43ce68 | 976 | struct perf_raw_record *raw; |
df1a132b PZ |
977 | }; |
978 | ||
e7e7ee2e | 979 | static inline void perf_sample_data_init(struct perf_sample_data *data, u64 addr) |
dc1d628a PZ |
980 | { |
981 | data->addr = addr; | |
982 | data->raw = NULL; | |
983 | } | |
984 | ||
5622f295 MM |
985 | extern void perf_output_sample(struct perf_output_handle *handle, |
986 | struct perf_event_header *header, | |
987 | struct perf_sample_data *data, | |
cdd6c482 | 988 | struct perf_event *event); |
5622f295 MM |
989 | extern void perf_prepare_sample(struct perf_event_header *header, |
990 | struct perf_sample_data *data, | |
cdd6c482 | 991 | struct perf_event *event, |
5622f295 MM |
992 | struct pt_regs *regs); |
993 | ||
a8b0ca17 | 994 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
995 | struct perf_sample_data *data, |
996 | struct pt_regs *regs); | |
df1a132b | 997 | |
6c7e550f FBH |
998 | static inline bool is_sampling_event(struct perf_event *event) |
999 | { | |
1000 | return event->attr.sample_period != 0; | |
1001 | } | |
1002 | ||
3b6f9e5c | 1003 | /* |
cdd6c482 | 1004 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 1005 | */ |
cdd6c482 | 1006 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 1007 | { |
89a1e187 | 1008 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
1009 | } |
1010 | ||
d430d3d7 | 1011 | extern struct jump_label_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 1012 | |
a8b0ca17 | 1013 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 1014 | |
b0f82b81 | 1015 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 1016 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 1017 | #endif |
5331d7b8 FW |
1018 | |
1019 | /* | |
1020 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
1021 | * the nth caller. We only need a few of the regs: | |
1022 | * - ip for PERF_SAMPLE_IP | |
1023 | * - cs for user_mode() tests | |
1024 | * - bp for callchains | |
1025 | * - eflags, for future purposes, just in case | |
1026 | */ | |
b0f82b81 | 1027 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 1028 | { |
5331d7b8 FW |
1029 | memset(regs, 0, sizeof(*regs)); |
1030 | ||
b0f82b81 | 1031 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
1032 | } |
1033 | ||
7e54a5a0 | 1034 | static __always_inline void |
a8b0ca17 | 1035 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1036 | { |
7e54a5a0 PZ |
1037 | struct pt_regs hot_regs; |
1038 | ||
d430d3d7 JB |
1039 | if (static_branch(&perf_swevent_enabled[event_id])) { |
1040 | if (!regs) { | |
1041 | perf_fetch_caller_regs(&hot_regs); | |
1042 | regs = &hot_regs; | |
1043 | } | |
a8b0ca17 | 1044 | __perf_sw_event(event_id, nr, regs, addr); |
e49a5bd3 FW |
1045 | } |
1046 | } | |
1047 | ||
d430d3d7 | 1048 | extern struct jump_label_key perf_sched_events; |
ee6dcfa4 PZ |
1049 | |
1050 | static inline void perf_event_task_sched_in(struct task_struct *task) | |
1051 | { | |
d430d3d7 JB |
1052 | if (static_branch(&perf_sched_events)) |
1053 | __perf_event_task_sched_in(task); | |
ee6dcfa4 PZ |
1054 | } |
1055 | ||
e7e7ee2e | 1056 | static inline void perf_event_task_sched_out(struct task_struct *task, struct task_struct *next) |
ee6dcfa4 | 1057 | { |
a8b0ca17 | 1058 | perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0); |
ee6dcfa4 | 1059 | |
ab711fe0 | 1060 | __perf_event_task_sched_out(task, next); |
ee6dcfa4 PZ |
1061 | } |
1062 | ||
3af9e859 | 1063 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 1064 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1065 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1066 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1067 | |
cdd6c482 IM |
1068 | extern void perf_event_comm(struct task_struct *tsk); |
1069 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 1070 | |
56962b44 FW |
1071 | /* Callchains */ |
1072 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1073 | ||
e7e7ee2e IM |
1074 | extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs); |
1075 | extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs); | |
394ee076 | 1076 | |
e7e7ee2e | 1077 | static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip) |
70791ce9 FW |
1078 | { |
1079 | if (entry->nr < PERF_MAX_STACK_DEPTH) | |
1080 | entry->ip[entry->nr++] = ip; | |
1081 | } | |
394ee076 | 1082 | |
cdd6c482 IM |
1083 | extern int sysctl_perf_event_paranoid; |
1084 | extern int sysctl_perf_event_mlock; | |
1085 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 1086 | |
163ec435 PZ |
1087 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
1088 | void __user *buffer, size_t *lenp, | |
1089 | loff_t *ppos); | |
1090 | ||
320ebf09 PZ |
1091 | static inline bool perf_paranoid_tracepoint_raw(void) |
1092 | { | |
1093 | return sysctl_perf_event_paranoid > -1; | |
1094 | } | |
1095 | ||
1096 | static inline bool perf_paranoid_cpu(void) | |
1097 | { | |
1098 | return sysctl_perf_event_paranoid > 0; | |
1099 | } | |
1100 | ||
1101 | static inline bool perf_paranoid_kernel(void) | |
1102 | { | |
1103 | return sysctl_perf_event_paranoid > 1; | |
1104 | } | |
1105 | ||
cdd6c482 | 1106 | extern void perf_event_init(void); |
1c024eca PZ |
1107 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
1108 | int entry_size, struct pt_regs *regs, | |
ecc55f84 | 1109 | struct hlist_head *head, int rctx); |
24f1e32c | 1110 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1111 | |
9d23a90a | 1112 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1113 | # define perf_misc_flags(regs) \ |
1114 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1115 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
1116 | #endif |
1117 | ||
5622f295 | 1118 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 1119 | struct perf_event *event, unsigned int size); |
5622f295 MM |
1120 | extern void perf_output_end(struct perf_output_handle *handle); |
1121 | extern void perf_output_copy(struct perf_output_handle *handle, | |
1122 | const void *buf, unsigned int len); | |
4ed7c92d PZ |
1123 | extern int perf_swevent_get_recursion_context(void); |
1124 | extern void perf_swevent_put_recursion_context(int rctx); | |
44234adc FW |
1125 | extern void perf_event_enable(struct perf_event *event); |
1126 | extern void perf_event_disable(struct perf_event *event); | |
e9d2b064 | 1127 | extern void perf_event_task_tick(void); |
0793a61d TG |
1128 | #else |
1129 | static inline void | |
49f47433 | 1130 | perf_event_task_sched_in(struct task_struct *task) { } |
0793a61d | 1131 | static inline void |
cdd6c482 | 1132 | perf_event_task_sched_out(struct task_struct *task, |
49f47433 | 1133 | struct task_struct *next) { } |
cdd6c482 IM |
1134 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1135 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1136 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1137 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
57c0c15b | 1138 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1139 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1140 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
15dbf27c | 1141 | |
925d519a | 1142 | static inline void |
a8b0ca17 | 1143 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1144 | static inline void |
184f412c | 1145 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1146 | |
39447b38 | 1147 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1148 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1149 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1150 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1151 | |
57c0c15b | 1152 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
1153 | static inline void perf_event_comm(struct task_struct *tsk) { } |
1154 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
1155 | static inline void perf_event_init(void) { } | |
184f412c | 1156 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1157 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
44234adc FW |
1158 | static inline void perf_event_enable(struct perf_event *event) { } |
1159 | static inline void perf_event_disable(struct perf_event *event) { } | |
e9d2b064 | 1160 | static inline void perf_event_task_tick(void) { } |
0793a61d TG |
1161 | #endif |
1162 | ||
e7e7ee2e | 1163 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1164 | |
3f6da390 PZ |
1165 | /* |
1166 | * This has to have a higher priority than migration_notifier in sched.c. | |
1167 | */ | |
e7e7ee2e IM |
1168 | #define perf_cpu_notifier(fn) \ |
1169 | do { \ | |
1170 | static struct notifier_block fn##_nb __cpuinitdata = \ | |
1171 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
1172 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ | |
1173 | (void *)(unsigned long)smp_processor_id()); \ | |
1174 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ | |
1175 | (void *)(unsigned long)smp_processor_id()); \ | |
1176 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ | |
1177 | (void *)(unsigned long)smp_processor_id()); \ | |
1178 | register_cpu_notifier(&fn##_nb); \ | |
3f6da390 PZ |
1179 | } while (0) |
1180 | ||
f3dfd265 | 1181 | #endif /* __KERNEL__ */ |
cdd6c482 | 1182 | #endif /* _LINUX_PERF_EVENT_H */ |