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Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c IM |
4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
5 | * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar | |
6 | * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
55 | ||
a308444c | 56 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 57 | }; |
e077df4f | 58 | |
8326f44d | 59 | /* |
cdd6c482 | 60 | * Generalized hardware cache events: |
8326f44d | 61 | * |
8be6e8f3 | 62 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x |
8326f44d IM |
63 | * { read, write, prefetch } x |
64 | * { accesses, misses } | |
65 | */ | |
1c432d89 | 66 | enum perf_hw_cache_id { |
a308444c IM |
67 | PERF_COUNT_HW_CACHE_L1D = 0, |
68 | PERF_COUNT_HW_CACHE_L1I = 1, | |
69 | PERF_COUNT_HW_CACHE_LL = 2, | |
70 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
71 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
72 | PERF_COUNT_HW_CACHE_BPU = 5, | |
73 | ||
74 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
75 | }; |
76 | ||
1c432d89 | 77 | enum perf_hw_cache_op_id { |
a308444c IM |
78 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
79 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
80 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 81 | |
a308444c | 82 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
83 | }; |
84 | ||
1c432d89 PZ |
85 | enum perf_hw_cache_op_result_id { |
86 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
87 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 88 | |
a308444c | 89 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
90 | }; |
91 | ||
b8e83514 | 92 | /* |
cdd6c482 IM |
93 | * Special "software" events provided by the kernel, even if the hardware |
94 | * does not support performance events. These events measure various | |
b8e83514 PZ |
95 | * physical and sw events of the kernel (and allow the profiling of them as |
96 | * well): | |
97 | */ | |
1c432d89 | 98 | enum perf_sw_ids { |
a308444c IM |
99 | PERF_COUNT_SW_CPU_CLOCK = 0, |
100 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
101 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
102 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
103 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
104 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
105 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
106 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
107 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
108 | |
109 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
110 | }; |
111 | ||
8a057d84 | 112 | /* |
0d48696f | 113 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
114 | * in the overflow packets. |
115 | */ | |
cdd6c482 | 116 | enum perf_event_sample_format { |
a308444c IM |
117 | PERF_SAMPLE_IP = 1U << 0, |
118 | PERF_SAMPLE_TID = 1U << 1, | |
119 | PERF_SAMPLE_TIME = 1U << 2, | |
120 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 121 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
122 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
123 | PERF_SAMPLE_ID = 1U << 6, | |
124 | PERF_SAMPLE_CPU = 1U << 7, | |
125 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 126 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 127 | PERF_SAMPLE_RAW = 1U << 10, |
974802ea | 128 | |
f413cdb8 | 129 | PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ |
8a057d84 PZ |
130 | }; |
131 | ||
53cfbf59 | 132 | /* |
cdd6c482 | 133 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
134 | * as specified by attr.read_format: |
135 | * | |
136 | * struct read_format { | |
57c0c15b IM |
137 | * { u64 value; |
138 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
139 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
140 | * { u64 id; } && PERF_FORMAT_ID | |
141 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 142 | * |
57c0c15b IM |
143 | * { u64 nr; |
144 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
145 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
146 | * { u64 value; | |
147 | * { u64 id; } && PERF_FORMAT_ID | |
148 | * } cntr[nr]; | |
149 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 150 | * }; |
53cfbf59 | 151 | */ |
cdd6c482 | 152 | enum perf_event_read_format { |
a308444c IM |
153 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
154 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
155 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 156 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 157 | |
57c0c15b | 158 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
159 | }; |
160 | ||
974802ea PZ |
161 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
162 | ||
9f66a381 | 163 | /* |
cdd6c482 | 164 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 165 | */ |
cdd6c482 | 166 | struct perf_event_attr { |
974802ea | 167 | |
f4a2deb4 | 168 | /* |
a21ca2ca IM |
169 | * Major type: hardware/software/tracepoint/etc. |
170 | */ | |
171 | __u32 type; | |
974802ea PZ |
172 | |
173 | /* | |
174 | * Size of the attr structure, for fwd/bwd compat. | |
175 | */ | |
176 | __u32 size; | |
a21ca2ca IM |
177 | |
178 | /* | |
179 | * Type specific configuration information. | |
f4a2deb4 PZ |
180 | */ |
181 | __u64 config; | |
9f66a381 | 182 | |
60db5e09 | 183 | union { |
b23f3325 PZ |
184 | __u64 sample_period; |
185 | __u64 sample_freq; | |
60db5e09 PZ |
186 | }; |
187 | ||
b23f3325 PZ |
188 | __u64 sample_type; |
189 | __u64 read_format; | |
9f66a381 | 190 | |
2743a5b0 | 191 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
192 | inherit : 1, /* children inherit it */ |
193 | pinned : 1, /* must always be on PMU */ | |
194 | exclusive : 1, /* only group on PMU */ | |
195 | exclude_user : 1, /* don't count user */ | |
196 | exclude_kernel : 1, /* ditto kernel */ | |
197 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 198 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 199 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 200 | comm : 1, /* include comm data */ |
60db5e09 | 201 | freq : 1, /* use freq, not period */ |
bfbd3381 | 202 | inherit_stat : 1, /* per task counts */ |
57e7986e | 203 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 204 | task : 1, /* trace fork/exit */ |
2667de81 | 205 | watermark : 1, /* wakeup_watermark */ |
0475f9ea | 206 | |
2667de81 | 207 | __reserved_1 : 49; |
2743a5b0 | 208 | |
2667de81 PZ |
209 | union { |
210 | __u32 wakeup_events; /* wakeup every n events */ | |
211 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
212 | }; | |
24f1e32c | 213 | |
189f202e FW |
214 | struct { /* Hardware breakpoint info */ |
215 | __u64 bp_addr; | |
216 | __u32 bp_type; | |
217 | __u32 bp_len; | |
218 | __u64 __bp_reserved_1; | |
219 | __u64 __bp_reserved_2; | |
24f1e32c FW |
220 | }; |
221 | ||
974802ea | 222 | __u32 __reserved_2; |
9f66a381 | 223 | |
974802ea | 224 | __u64 __reserved_3; |
eab656ae TG |
225 | }; |
226 | ||
d859e29f | 227 | /* |
cdd6c482 | 228 | * Ioctls that can be done on a perf event fd: |
d859e29f | 229 | */ |
cdd6c482 | 230 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
231 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
232 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 233 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 234 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 235 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 236 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
237 | |
238 | enum perf_event_ioc_flags { | |
3df5edad PZ |
239 | PERF_IOC_FLAG_GROUP = 1U << 0, |
240 | }; | |
d859e29f | 241 | |
37d81828 PM |
242 | /* |
243 | * Structure of the page that can be mapped via mmap | |
244 | */ | |
cdd6c482 | 245 | struct perf_event_mmap_page { |
37d81828 PM |
246 | __u32 version; /* version number of this structure */ |
247 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
248 | |
249 | /* | |
cdd6c482 | 250 | * Bits needed to read the hw events in user-space. |
38ff667b | 251 | * |
92f22a38 PZ |
252 | * u32 seq; |
253 | * s64 count; | |
38ff667b | 254 | * |
a2e87d06 PZ |
255 | * do { |
256 | * seq = pc->lock; | |
38ff667b | 257 | * |
a2e87d06 PZ |
258 | * barrier() |
259 | * if (pc->index) { | |
260 | * count = pmc_read(pc->index - 1); | |
261 | * count += pc->offset; | |
262 | * } else | |
263 | * goto regular_read; | |
38ff667b | 264 | * |
a2e87d06 PZ |
265 | * barrier(); |
266 | * } while (pc->lock != seq); | |
38ff667b | 267 | * |
92f22a38 PZ |
268 | * NOTE: for obvious reason this only works on self-monitoring |
269 | * processes. | |
38ff667b | 270 | */ |
37d81828 | 271 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
272 | __u32 index; /* hardware event identifier */ |
273 | __s64 offset; /* add to hardware event value */ | |
274 | __u64 time_enabled; /* time event active */ | |
275 | __u64 time_running; /* time event on cpu */ | |
7b732a75 | 276 | |
41f95331 PZ |
277 | /* |
278 | * Hole for extension of the self monitor capabilities | |
279 | */ | |
280 | ||
7f8b4e4e | 281 | __u64 __reserved[123]; /* align to 1k */ |
41f95331 | 282 | |
38ff667b PZ |
283 | /* |
284 | * Control data for the mmap() data buffer. | |
285 | * | |
43a21ea8 PZ |
286 | * User-space reading the @data_head value should issue an rmb(), on |
287 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 288 | * perf_event_wakeup(). |
43a21ea8 PZ |
289 | * |
290 | * When the mapping is PROT_WRITE the @data_tail value should be | |
291 | * written by userspace to reflect the last read data. In this case | |
292 | * the kernel will not over-write unread data. | |
38ff667b | 293 | */ |
8e3747c1 | 294 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 295 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
296 | }; |
297 | ||
cdd6c482 IM |
298 | #define PERF_RECORD_MISC_CPUMODE_MASK (3 << 0) |
299 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) | |
300 | #define PERF_RECORD_MISC_KERNEL (1 << 0) | |
301 | #define PERF_RECORD_MISC_USER (2 << 0) | |
302 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
6fab0192 | 303 | |
5c148194 PZ |
304 | struct perf_event_header { |
305 | __u32 type; | |
6fab0192 PZ |
306 | __u16 misc; |
307 | __u16 size; | |
5c148194 PZ |
308 | }; |
309 | ||
310 | enum perf_event_type { | |
5ed00415 | 311 | |
0c593b34 PZ |
312 | /* |
313 | * The MMAP events record the PROT_EXEC mappings so that we can | |
314 | * correlate userspace IPs to code. They have the following structure: | |
315 | * | |
316 | * struct { | |
0127c3ea | 317 | * struct perf_event_header header; |
0c593b34 | 318 | * |
0127c3ea IM |
319 | * u32 pid, tid; |
320 | * u64 addr; | |
321 | * u64 len; | |
322 | * u64 pgoff; | |
323 | * char filename[]; | |
0c593b34 PZ |
324 | * }; |
325 | */ | |
cdd6c482 | 326 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 327 | |
43a21ea8 PZ |
328 | /* |
329 | * struct { | |
57c0c15b IM |
330 | * struct perf_event_header header; |
331 | * u64 id; | |
332 | * u64 lost; | |
43a21ea8 PZ |
333 | * }; |
334 | */ | |
cdd6c482 | 335 | PERF_RECORD_LOST = 2, |
43a21ea8 | 336 | |
8d1b2d93 PZ |
337 | /* |
338 | * struct { | |
0127c3ea | 339 | * struct perf_event_header header; |
8d1b2d93 | 340 | * |
0127c3ea IM |
341 | * u32 pid, tid; |
342 | * char comm[]; | |
8d1b2d93 PZ |
343 | * }; |
344 | */ | |
cdd6c482 | 345 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 346 | |
9f498cc5 PZ |
347 | /* |
348 | * struct { | |
349 | * struct perf_event_header header; | |
350 | * u32 pid, ppid; | |
351 | * u32 tid, ptid; | |
393b2ad8 | 352 | * u64 time; |
9f498cc5 PZ |
353 | * }; |
354 | */ | |
cdd6c482 | 355 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 356 | |
26b119bc PZ |
357 | /* |
358 | * struct { | |
0127c3ea IM |
359 | * struct perf_event_header header; |
360 | * u64 time; | |
689802b2 | 361 | * u64 id; |
7f453c24 | 362 | * u64 stream_id; |
a78ac325 PZ |
363 | * }; |
364 | */ | |
cdd6c482 IM |
365 | PERF_RECORD_THROTTLE = 5, |
366 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 367 | |
60313ebe PZ |
368 | /* |
369 | * struct { | |
a21ca2ca IM |
370 | * struct perf_event_header header; |
371 | * u32 pid, ppid; | |
9f498cc5 | 372 | * u32 tid, ptid; |
a6f10a2f | 373 | * u64 time; |
60313ebe PZ |
374 | * }; |
375 | */ | |
cdd6c482 | 376 | PERF_RECORD_FORK = 7, |
60313ebe | 377 | |
38b200d6 PZ |
378 | /* |
379 | * struct { | |
380 | * struct perf_event_header header; | |
381 | * u32 pid, tid; | |
3dab77fb PZ |
382 | * |
383 | * struct read_format values; | |
38b200d6 PZ |
384 | * }; |
385 | */ | |
cdd6c482 | 386 | PERF_RECORD_READ = 8, |
38b200d6 | 387 | |
8a057d84 | 388 | /* |
0c593b34 | 389 | * struct { |
0127c3ea | 390 | * struct perf_event_header header; |
0c593b34 | 391 | * |
43a21ea8 PZ |
392 | * { u64 ip; } && PERF_SAMPLE_IP |
393 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
394 | * { u64 time; } && PERF_SAMPLE_TIME | |
395 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 396 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 397 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 398 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 399 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 400 | * |
3dab77fb | 401 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 402 | * |
f9188e02 | 403 | * { u64 nr, |
43a21ea8 | 404 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 405 | * |
57c0c15b IM |
406 | * # |
407 | * # The RAW record below is opaque data wrt the ABI | |
408 | * # | |
409 | * # That is, the ABI doesn't make any promises wrt to | |
410 | * # the stability of its content, it may vary depending | |
411 | * # on event, hardware, kernel version and phase of | |
412 | * # the moon. | |
413 | * # | |
414 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
415 | * # | |
3dab77fb | 416 | * |
a044560c PZ |
417 | * { u32 size; |
418 | * char data[size];}&& PERF_SAMPLE_RAW | |
0c593b34 | 419 | * }; |
8a057d84 | 420 | */ |
cdd6c482 | 421 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 422 | |
cdd6c482 | 423 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
424 | }; |
425 | ||
f9188e02 PZ |
426 | enum perf_callchain_context { |
427 | PERF_CONTEXT_HV = (__u64)-32, | |
428 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
429 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 430 | |
f9188e02 PZ |
431 | PERF_CONTEXT_GUEST = (__u64)-2048, |
432 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
433 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
434 | ||
435 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
436 | }; |
437 | ||
a4be7c27 PZ |
438 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
439 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
440 | ||
f3dfd265 | 441 | #ifdef __KERNEL__ |
9f66a381 | 442 | /* |
f3dfd265 | 443 | * Kernel-internal data types and definitions: |
9f66a381 IM |
444 | */ |
445 | ||
cdd6c482 IM |
446 | #ifdef CONFIG_PERF_EVENTS |
447 | # include <asm/perf_event.h> | |
f3dfd265 PM |
448 | #endif |
449 | ||
2ff6cfd7 AB |
450 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
451 | #include <asm/hw_breakpoint.h> | |
452 | #endif | |
453 | ||
f3dfd265 PM |
454 | #include <linux/list.h> |
455 | #include <linux/mutex.h> | |
456 | #include <linux/rculist.h> | |
457 | #include <linux/rcupdate.h> | |
458 | #include <linux/spinlock.h> | |
d6d020e9 | 459 | #include <linux/hrtimer.h> |
3c446b3d | 460 | #include <linux/fs.h> |
709e50cf | 461 | #include <linux/pid_namespace.h> |
906010b2 | 462 | #include <linux/workqueue.h> |
f3dfd265 PM |
463 | #include <asm/atomic.h> |
464 | ||
f9188e02 PZ |
465 | #define PERF_MAX_STACK_DEPTH 255 |
466 | ||
467 | struct perf_callchain_entry { | |
468 | __u64 nr; | |
469 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
470 | }; | |
471 | ||
3a43ce68 FW |
472 | struct perf_raw_record { |
473 | u32 size; | |
474 | void *data; | |
f413cdb8 FW |
475 | }; |
476 | ||
f3dfd265 PM |
477 | struct task_struct; |
478 | ||
0793a61d | 479 | /** |
cdd6c482 | 480 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 481 | */ |
cdd6c482 IM |
482 | struct hw_perf_event { |
483 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
484 | union { |
485 | struct { /* hardware */ | |
a308444c IM |
486 | u64 config; |
487 | unsigned long config_base; | |
cdd6c482 | 488 | unsigned long event_base; |
a308444c | 489 | int idx; |
d6d020e9 | 490 | }; |
721a669b SS |
491 | struct { /* software */ |
492 | s64 remaining; | |
a308444c | 493 | struct hrtimer hrtimer; |
d6d020e9 | 494 | }; |
24f1e32c FW |
495 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
496 | union { /* breakpoint */ | |
497 | struct arch_hw_breakpoint info; | |
498 | }; | |
499 | #endif | |
d6d020e9 | 500 | }; |
ee06094f | 501 | atomic64_t prev_count; |
b23f3325 | 502 | u64 sample_period; |
9e350de3 | 503 | u64 last_period; |
ee06094f | 504 | atomic64_t period_left; |
60db5e09 | 505 | u64 interrupts; |
6a24ed6c PZ |
506 | |
507 | u64 freq_count; | |
508 | u64 freq_interrupts; | |
bd2b5b12 | 509 | u64 freq_stamp; |
ee06094f | 510 | #endif |
0793a61d TG |
511 | }; |
512 | ||
cdd6c482 | 513 | struct perf_event; |
621a01ea IM |
514 | |
515 | /** | |
4aeb0b42 | 516 | * struct pmu - generic performance monitoring unit |
621a01ea | 517 | */ |
4aeb0b42 | 518 | struct pmu { |
cdd6c482 IM |
519 | int (*enable) (struct perf_event *event); |
520 | void (*disable) (struct perf_event *event); | |
521 | void (*read) (struct perf_event *event); | |
522 | void (*unthrottle) (struct perf_event *event); | |
621a01ea IM |
523 | }; |
524 | ||
6a930700 | 525 | /** |
cdd6c482 | 526 | * enum perf_event_active_state - the states of a event |
6a930700 | 527 | */ |
cdd6c482 | 528 | enum perf_event_active_state { |
57c0c15b | 529 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
530 | PERF_EVENT_STATE_OFF = -1, |
531 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 532 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
533 | }; |
534 | ||
9b51f66d IM |
535 | struct file; |
536 | ||
7b732a75 PZ |
537 | struct perf_mmap_data { |
538 | struct rcu_head rcu_head; | |
906010b2 PZ |
539 | #ifdef CONFIG_PERF_USE_VMALLOC |
540 | struct work_struct work; | |
541 | #endif | |
542 | int data_order; | |
8740f941 | 543 | int nr_pages; /* nr of data pages */ |
43a21ea8 | 544 | int writable; /* are we writable */ |
c5078f78 | 545 | int nr_locked; /* nr pages mlocked */ |
8740f941 | 546 | |
c33a0bc4 | 547 | atomic_t poll; /* POLL_ for wakeups */ |
cdd6c482 | 548 | atomic_t events; /* event_id limit */ |
8740f941 | 549 | |
8e3747c1 PZ |
550 | atomic_long_t head; /* write position */ |
551 | atomic_long_t done_head; /* completed head */ | |
552 | ||
c33a0bc4 | 553 | atomic_t lock; /* concurrent writes */ |
c66de4a5 | 554 | atomic_t wakeup; /* needs a wakeup */ |
43a21ea8 | 555 | atomic_t lost; /* nr records lost */ |
c66de4a5 | 556 | |
2667de81 PZ |
557 | long watermark; /* wakeup watermark */ |
558 | ||
57c0c15b | 559 | struct perf_event_mmap_page *user_page; |
0127c3ea | 560 | void *data_pages[0]; |
7b732a75 PZ |
561 | }; |
562 | ||
671dec5d PZ |
563 | struct perf_pending_entry { |
564 | struct perf_pending_entry *next; | |
565 | void (*func)(struct perf_pending_entry *); | |
925d519a PZ |
566 | }; |
567 | ||
453f19ee PZ |
568 | struct perf_sample_data; |
569 | ||
b326e956 FW |
570 | typedef void (*perf_overflow_handler_t)(struct perf_event *, int, |
571 | struct perf_sample_data *, | |
572 | struct pt_regs *regs); | |
573 | ||
0793a61d | 574 | /** |
cdd6c482 | 575 | * struct perf_event - performance event kernel representation: |
0793a61d | 576 | */ |
cdd6c482 IM |
577 | struct perf_event { |
578 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 579 | struct list_head group_entry; |
592903cd | 580 | struct list_head event_entry; |
04289bb9 | 581 | struct list_head sibling_list; |
0127c3ea | 582 | int nr_siblings; |
cdd6c482 IM |
583 | struct perf_event *group_leader; |
584 | struct perf_event *output; | |
4aeb0b42 | 585 | const struct pmu *pmu; |
04289bb9 | 586 | |
cdd6c482 | 587 | enum perf_event_active_state state; |
0793a61d | 588 | atomic64_t count; |
ee06094f | 589 | |
53cfbf59 | 590 | /* |
cdd6c482 | 591 | * These are the total time in nanoseconds that the event |
53cfbf59 | 592 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 593 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
594 | * and running (scheduled onto the CPU), respectively. |
595 | * | |
596 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 597 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
598 | */ |
599 | u64 total_time_enabled; | |
600 | u64 total_time_running; | |
601 | ||
602 | /* | |
603 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 604 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
605 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
606 | * in time. | |
cdd6c482 IM |
607 | * tstamp_enabled: the notional time when the event was enabled |
608 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 609 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 610 | * event was scheduled off. |
53cfbf59 PM |
611 | */ |
612 | u64 tstamp_enabled; | |
613 | u64 tstamp_running; | |
614 | u64 tstamp_stopped; | |
615 | ||
24f1e32c | 616 | struct perf_event_attr attr; |
cdd6c482 | 617 | struct hw_perf_event hw; |
0793a61d | 618 | |
cdd6c482 | 619 | struct perf_event_context *ctx; |
9b51f66d | 620 | struct file *filp; |
0793a61d | 621 | |
53cfbf59 PM |
622 | /* |
623 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 624 | * events have been enabled and running, respectively. |
53cfbf59 PM |
625 | */ |
626 | atomic64_t child_total_time_enabled; | |
627 | atomic64_t child_total_time_running; | |
628 | ||
0793a61d | 629 | /* |
d859e29f | 630 | * Protect attach/detach and child_list: |
0793a61d | 631 | */ |
fccc714b PZ |
632 | struct mutex child_mutex; |
633 | struct list_head child_list; | |
cdd6c482 | 634 | struct perf_event *parent; |
0793a61d TG |
635 | |
636 | int oncpu; | |
637 | int cpu; | |
638 | ||
082ff5a2 PZ |
639 | struct list_head owner_entry; |
640 | struct task_struct *owner; | |
641 | ||
7b732a75 PZ |
642 | /* mmap bits */ |
643 | struct mutex mmap_mutex; | |
644 | atomic_t mmap_count; | |
645 | struct perf_mmap_data *data; | |
37d81828 | 646 | |
7b732a75 | 647 | /* poll related */ |
0793a61d | 648 | wait_queue_head_t waitq; |
3c446b3d | 649 | struct fasync_struct *fasync; |
79f14641 PZ |
650 | |
651 | /* delayed work for NMIs and such */ | |
652 | int pending_wakeup; | |
4c9e2542 | 653 | int pending_kill; |
79f14641 | 654 | int pending_disable; |
671dec5d | 655 | struct perf_pending_entry pending; |
592903cd | 656 | |
79f14641 PZ |
657 | atomic_t event_limit; |
658 | ||
cdd6c482 | 659 | void (*destroy)(struct perf_event *); |
592903cd | 660 | struct rcu_head rcu_head; |
709e50cf PZ |
661 | |
662 | struct pid_namespace *ns; | |
8e5799b1 | 663 | u64 id; |
6fb2915d | 664 | |
b326e956 | 665 | perf_overflow_handler_t overflow_handler; |
453f19ee | 666 | |
6fb2915d LZ |
667 | #ifdef CONFIG_EVENT_PROFILE |
668 | struct event_filter *filter; | |
ee06094f | 669 | #endif |
6fb2915d LZ |
670 | |
671 | #endif /* CONFIG_PERF_EVENTS */ | |
0793a61d TG |
672 | }; |
673 | ||
674 | /** | |
cdd6c482 | 675 | * struct perf_event_context - event context structure |
0793a61d | 676 | * |
cdd6c482 | 677 | * Used as a container for task events and CPU events as well: |
0793a61d | 678 | */ |
cdd6c482 | 679 | struct perf_event_context { |
0793a61d | 680 | /* |
cdd6c482 | 681 | * Protect the states of the events in the list, |
d859e29f | 682 | * nr_active, and the list: |
0793a61d | 683 | */ |
a308444c | 684 | spinlock_t lock; |
d859e29f | 685 | /* |
cdd6c482 | 686 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
687 | * is sufficient to ensure the list doesn't change; to change |
688 | * the list you need to lock both the mutex and the spinlock. | |
689 | */ | |
a308444c | 690 | struct mutex mutex; |
04289bb9 | 691 | |
65abc865 | 692 | struct list_head group_list; |
a308444c | 693 | struct list_head event_list; |
cdd6c482 | 694 | int nr_events; |
a308444c IM |
695 | int nr_active; |
696 | int is_active; | |
bfbd3381 | 697 | int nr_stat; |
a308444c IM |
698 | atomic_t refcount; |
699 | struct task_struct *task; | |
53cfbf59 PM |
700 | |
701 | /* | |
4af4998b | 702 | * Context clock, runs when context enabled. |
53cfbf59 | 703 | */ |
a308444c IM |
704 | u64 time; |
705 | u64 timestamp; | |
564c2b21 PM |
706 | |
707 | /* | |
708 | * These fields let us detect when two contexts have both | |
709 | * been cloned (inherited) from a common ancestor. | |
710 | */ | |
cdd6c482 | 711 | struct perf_event_context *parent_ctx; |
a308444c IM |
712 | u64 parent_gen; |
713 | u64 generation; | |
714 | int pin_count; | |
715 | struct rcu_head rcu_head; | |
0793a61d TG |
716 | }; |
717 | ||
718 | /** | |
cdd6c482 | 719 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
720 | */ |
721 | struct perf_cpu_context { | |
cdd6c482 IM |
722 | struct perf_event_context ctx; |
723 | struct perf_event_context *task_ctx; | |
0793a61d TG |
724 | int active_oncpu; |
725 | int max_pertask; | |
3b6f9e5c | 726 | int exclusive; |
96f6d444 PZ |
727 | |
728 | /* | |
729 | * Recursion avoidance: | |
730 | * | |
731 | * task, softirq, irq, nmi context | |
732 | */ | |
22a4f650 | 733 | int recursion[4]; |
0793a61d TG |
734 | }; |
735 | ||
5622f295 | 736 | struct perf_output_handle { |
57c0c15b IM |
737 | struct perf_event *event; |
738 | struct perf_mmap_data *data; | |
739 | unsigned long head; | |
740 | unsigned long offset; | |
741 | int nmi; | |
742 | int sample; | |
743 | int locked; | |
5622f295 MM |
744 | }; |
745 | ||
cdd6c482 | 746 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 747 | |
0793a61d TG |
748 | /* |
749 | * Set by architecture code: | |
750 | */ | |
cdd6c482 | 751 | extern int perf_max_events; |
0793a61d | 752 | |
cdd6c482 | 753 | extern const struct pmu *hw_perf_event_init(struct perf_event *event); |
621a01ea | 754 | |
cdd6c482 IM |
755 | extern void perf_event_task_sched_in(struct task_struct *task, int cpu); |
756 | extern void perf_event_task_sched_out(struct task_struct *task, | |
564c2b21 | 757 | struct task_struct *next, int cpu); |
cdd6c482 IM |
758 | extern void perf_event_task_tick(struct task_struct *task, int cpu); |
759 | extern int perf_event_init_task(struct task_struct *child); | |
760 | extern void perf_event_exit_task(struct task_struct *child); | |
761 | extern void perf_event_free_task(struct task_struct *task); | |
762 | extern void set_perf_event_pending(void); | |
763 | extern void perf_event_do_pending(void); | |
764 | extern void perf_event_print_debug(void); | |
9e35ad38 PZ |
765 | extern void __perf_disable(void); |
766 | extern bool __perf_enable(void); | |
767 | extern void perf_disable(void); | |
768 | extern void perf_enable(void); | |
cdd6c482 IM |
769 | extern int perf_event_task_disable(void); |
770 | extern int perf_event_task_enable(void); | |
771 | extern int hw_perf_group_sched_in(struct perf_event *group_leader, | |
3cbed429 | 772 | struct perf_cpu_context *cpuctx, |
cdd6c482 IM |
773 | struct perf_event_context *ctx, int cpu); |
774 | extern void perf_event_update_userpage(struct perf_event *event); | |
fb0459d7 AV |
775 | extern int perf_event_release_kernel(struct perf_event *event); |
776 | extern struct perf_event * | |
777 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
778 | int cpu, | |
97eaf530 | 779 | pid_t pid, |
b326e956 | 780 | perf_overflow_handler_t callback); |
59ed446f PZ |
781 | extern u64 perf_event_read_value(struct perf_event *event, |
782 | u64 *enabled, u64 *running); | |
5c92d124 | 783 | |
df1a132b | 784 | struct perf_sample_data { |
5622f295 MM |
785 | u64 type; |
786 | ||
787 | u64 ip; | |
788 | struct { | |
789 | u32 pid; | |
790 | u32 tid; | |
791 | } tid_entry; | |
792 | u64 time; | |
a308444c | 793 | u64 addr; |
5622f295 MM |
794 | u64 id; |
795 | u64 stream_id; | |
796 | struct { | |
797 | u32 cpu; | |
798 | u32 reserved; | |
799 | } cpu_entry; | |
a308444c | 800 | u64 period; |
5622f295 | 801 | struct perf_callchain_entry *callchain; |
3a43ce68 | 802 | struct perf_raw_record *raw; |
df1a132b PZ |
803 | }; |
804 | ||
5622f295 MM |
805 | extern void perf_output_sample(struct perf_output_handle *handle, |
806 | struct perf_event_header *header, | |
807 | struct perf_sample_data *data, | |
cdd6c482 | 808 | struct perf_event *event); |
5622f295 MM |
809 | extern void perf_prepare_sample(struct perf_event_header *header, |
810 | struct perf_sample_data *data, | |
cdd6c482 | 811 | struct perf_event *event, |
5622f295 MM |
812 | struct pt_regs *regs); |
813 | ||
cdd6c482 | 814 | extern int perf_event_overflow(struct perf_event *event, int nmi, |
5622f295 MM |
815 | struct perf_sample_data *data, |
816 | struct pt_regs *regs); | |
df1a132b | 817 | |
3b6f9e5c | 818 | /* |
cdd6c482 | 819 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 820 | */ |
cdd6c482 | 821 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 822 | { |
cdd6c482 IM |
823 | return (event->attr.type != PERF_TYPE_RAW) && |
824 | (event->attr.type != PERF_TYPE_HARDWARE) && | |
825 | (event->attr.type != PERF_TYPE_HW_CACHE); | |
3b6f9e5c PM |
826 | } |
827 | ||
cdd6c482 | 828 | extern atomic_t perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 829 | |
cdd6c482 | 830 | extern void __perf_sw_event(u32, u64, int, struct pt_regs *, u64); |
f29ac756 PZ |
831 | |
832 | static inline void | |
cdd6c482 | 833 | perf_sw_event(u32 event_id, u64 nr, int nmi, struct pt_regs *regs, u64 addr) |
f29ac756 | 834 | { |
cdd6c482 IM |
835 | if (atomic_read(&perf_swevent_enabled[event_id])) |
836 | __perf_sw_event(event_id, nr, nmi, regs, addr); | |
f29ac756 | 837 | } |
15dbf27c | 838 | |
cdd6c482 | 839 | extern void __perf_event_mmap(struct vm_area_struct *vma); |
089dd79d | 840 | |
cdd6c482 | 841 | static inline void perf_event_mmap(struct vm_area_struct *vma) |
089dd79d PZ |
842 | { |
843 | if (vma->vm_flags & VM_EXEC) | |
cdd6c482 | 844 | __perf_event_mmap(vma); |
089dd79d | 845 | } |
0a4a9391 | 846 | |
cdd6c482 IM |
847 | extern void perf_event_comm(struct task_struct *tsk); |
848 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 849 | |
394ee076 PZ |
850 | extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs); |
851 | ||
cdd6c482 IM |
852 | extern int sysctl_perf_event_paranoid; |
853 | extern int sysctl_perf_event_mlock; | |
854 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 855 | |
cdd6c482 IM |
856 | extern void perf_event_init(void); |
857 | extern void perf_tp_event(int event_id, u64 addr, u64 count, | |
f4b5ffcc | 858 | void *record, int entry_size); |
24f1e32c | 859 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 860 | |
9d23a90a | 861 | #ifndef perf_misc_flags |
cdd6c482 IM |
862 | #define perf_misc_flags(regs) (user_mode(regs) ? PERF_RECORD_MISC_USER : \ |
863 | PERF_RECORD_MISC_KERNEL) | |
9d23a90a PM |
864 | #define perf_instruction_pointer(regs) instruction_pointer(regs) |
865 | #endif | |
866 | ||
5622f295 | 867 | extern int perf_output_begin(struct perf_output_handle *handle, |
cdd6c482 | 868 | struct perf_event *event, unsigned int size, |
5622f295 MM |
869 | int nmi, int sample); |
870 | extern void perf_output_end(struct perf_output_handle *handle); | |
871 | extern void perf_output_copy(struct perf_output_handle *handle, | |
872 | const void *buf, unsigned int len); | |
4ed7c92d PZ |
873 | extern int perf_swevent_get_recursion_context(void); |
874 | extern void perf_swevent_put_recursion_context(int rctx); | |
0793a61d TG |
875 | #else |
876 | static inline void | |
cdd6c482 | 877 | perf_event_task_sched_in(struct task_struct *task, int cpu) { } |
0793a61d | 878 | static inline void |
cdd6c482 | 879 | perf_event_task_sched_out(struct task_struct *task, |
910431c7 | 880 | struct task_struct *next, int cpu) { } |
0793a61d | 881 | static inline void |
57c0c15b | 882 | perf_event_task_tick(struct task_struct *task, int cpu) { } |
cdd6c482 IM |
883 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
884 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
885 | static inline void perf_event_free_task(struct task_struct *task) { } | |
57c0c15b IM |
886 | static inline void perf_event_do_pending(void) { } |
887 | static inline void perf_event_print_debug(void) { } | |
9e35ad38 PZ |
888 | static inline void perf_disable(void) { } |
889 | static inline void perf_enable(void) { } | |
57c0c15b IM |
890 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
891 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
15dbf27c | 892 | |
925d519a | 893 | static inline void |
cdd6c482 | 894 | perf_sw_event(u32 event_id, u64 nr, int nmi, |
78f13e95 | 895 | struct pt_regs *regs, u64 addr) { } |
24f1e32c FW |
896 | static inline void |
897 | perf_bp_event(struct perf_event *event, void *data) { } | |
0a4a9391 | 898 | |
57c0c15b | 899 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
900 | static inline void perf_event_comm(struct task_struct *tsk) { } |
901 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
902 | static inline void perf_event_init(void) { } | |
4ed7c92d PZ |
903 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
904 | static inline void perf_swevent_put_recursion_context(int rctx) { } | |
5622f295 | 905 | |
0793a61d TG |
906 | #endif |
907 | ||
5622f295 MM |
908 | #define perf_output_put(handle, x) \ |
909 | perf_output_copy((handle), &(x), sizeof(x)) | |
910 | ||
f3dfd265 | 911 | #endif /* __KERNEL__ */ |
cdd6c482 | 912 | #endif /* _LINUX_PERF_EVENT_H */ |