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00db8189 1/*
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2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
19#include <linux/spinlock.h>
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20#include <linux/ethtool.h>
21#include <linux/mii.h>
3e3aaf64 22#include <linux/module.h>
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23#include <linux/timer.h>
24#include <linux/workqueue.h>
8626d3b4 25#include <linux/mod_devicetable.h>
00db8189 26
60063497 27#include <linux/atomic.h>
0ac49527 28
e9fbdf17 29#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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30 SUPPORTED_TP | \
31 SUPPORTED_MII)
32
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33#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
34 SUPPORTED_10baseT_Full)
35
36#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
37 SUPPORTED_100baseT_Full)
38
39#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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40 SUPPORTED_1000baseT_Full)
41
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42#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
43 PHY_100BT_FEATURES | \
44 PHY_DEFAULT_FEATURES)
45
46#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
47 PHY_1000BT_FEATURES)
48
49
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50/*
51 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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52 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
53 * the attached driver handles the interrupt
54 */
55#define PHY_POLL -1
56#define PHY_IGNORE_INTERRUPT -2
57
58#define PHY_HAS_INTERRUPT 0x00000001
59#define PHY_HAS_MAGICANEG 0x00000002
4284b6a5 60#define PHY_IS_INTERNAL 0x00000004
00db8189 61
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62/* Interface Mode definitions */
63typedef enum {
4157ef1b 64 PHY_INTERFACE_MODE_NA,
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65 PHY_INTERFACE_MODE_MII,
66 PHY_INTERFACE_MODE_GMII,
67 PHY_INTERFACE_MODE_SGMII,
68 PHY_INTERFACE_MODE_TBI,
2cc70ba4 69 PHY_INTERFACE_MODE_REVMII,
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70 PHY_INTERFACE_MODE_RMII,
71 PHY_INTERFACE_MODE_RGMII,
a999589c 72 PHY_INTERFACE_MODE_RGMII_ID,
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73 PHY_INTERFACE_MODE_RGMII_RXID,
74 PHY_INTERFACE_MODE_RGMII_TXID,
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75 PHY_INTERFACE_MODE_RTBI,
76 PHY_INTERFACE_MODE_SMII,
898dd0bd 77 PHY_INTERFACE_MODE_XGMII,
fd70f72c 78 PHY_INTERFACE_MODE_MOCA,
b9d12085 79 PHY_INTERFACE_MODE_QSGMII,
8a2fe56e 80 PHY_INTERFACE_MODE_MAX,
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81} phy_interface_t;
82
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83/**
84 * It maps 'enum phy_interface_t' found in include/linux/phy.h
85 * into the device tree binding of 'phy-mode', so that Ethernet
86 * device driver can get phy interface from device tree.
87 */
88static inline const char *phy_modes(phy_interface_t interface)
89{
90 switch (interface) {
91 case PHY_INTERFACE_MODE_NA:
92 return "";
93 case PHY_INTERFACE_MODE_MII:
94 return "mii";
95 case PHY_INTERFACE_MODE_GMII:
96 return "gmii";
97 case PHY_INTERFACE_MODE_SGMII:
98 return "sgmii";
99 case PHY_INTERFACE_MODE_TBI:
100 return "tbi";
101 case PHY_INTERFACE_MODE_REVMII:
102 return "rev-mii";
103 case PHY_INTERFACE_MODE_RMII:
104 return "rmii";
105 case PHY_INTERFACE_MODE_RGMII:
106 return "rgmii";
107 case PHY_INTERFACE_MODE_RGMII_ID:
108 return "rgmii-id";
109 case PHY_INTERFACE_MODE_RGMII_RXID:
110 return "rgmii-rxid";
111 case PHY_INTERFACE_MODE_RGMII_TXID:
112 return "rgmii-txid";
113 case PHY_INTERFACE_MODE_RTBI:
114 return "rtbi";
115 case PHY_INTERFACE_MODE_SMII:
116 return "smii";
117 case PHY_INTERFACE_MODE_XGMII:
118 return "xgmii";
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119 case PHY_INTERFACE_MODE_MOCA:
120 return "moca";
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121 case PHY_INTERFACE_MODE_QSGMII:
122 return "qsgmii";
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123 default:
124 return "unknown";
125 }
126}
127
00db8189 128
e8a2b6a4 129#define PHY_INIT_TIMEOUT 100000
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130#define PHY_STATE_TIME 1
131#define PHY_FORCE_TIMEOUT 10
132#define PHY_AN_TIMEOUT 10
133
e8a2b6a4 134#define PHY_MAX_ADDR 32
00db8189 135
a4d00f17 136/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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137#define PHY_ID_FMT "%s:%02x"
138
139/*
140 * Need to be a little smaller than phydev->dev.bus_id to leave room
141 * for the ":%02x"
142 */
8e401ecc 143#define MII_BUS_ID_SIZE (20 - 3)
a4d00f17 144
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145/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
146 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
147#define MII_ADDR_C45 (1<<30)
148
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149struct device;
150struct sk_buff;
151
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152/*
153 * The Bus class for PHYs. Devices which provide access to
154 * PHYs should register using this structure
155 */
00db8189 156struct mii_bus {
3e3aaf64 157 struct module *owner;
00db8189 158 const char *name;
9d9326d3 159 char id[MII_BUS_ID_SIZE];
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160 void *priv;
161 int (*read)(struct mii_bus *bus, int phy_id, int regnum);
162 int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val);
163 int (*reset)(struct mii_bus *bus);
164
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165 /*
166 * A lock to ensure that only one thing can read/write
167 * the MDIO bus at a time
168 */
35b5f6b1 169 struct mutex mdio_lock;
00db8189 170
18ee49dd 171 struct device *parent;
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172 enum {
173 MDIOBUS_ALLOCATED = 1,
174 MDIOBUS_REGISTERED,
175 MDIOBUS_UNREGISTERED,
176 MDIOBUS_RELEASED,
177 } state;
178 struct device dev;
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179
180 /* list of all PHYs on bus */
181 struct phy_device *phy_map[PHY_MAX_ADDR];
182
c6883996 183 /* PHY addresses to be ignored when probing */
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184 u32 phy_mask;
185
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186 /* PHY addresses to ignore the TA/read failure */
187 u32 phy_ignore_ta_mask;
188
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189 /*
190 * Pointer to an array of interrupts, each PHY's
191 * interrupt at the index matching its address
192 */
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193 int *irq;
194};
46abc021 195#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 196
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197struct mii_bus *mdiobus_alloc_size(size_t);
198static inline struct mii_bus *mdiobus_alloc(void)
199{
200 return mdiobus_alloc_size(0);
201}
202
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203int __mdiobus_register(struct mii_bus *bus, struct module *owner);
204#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
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205void mdiobus_unregister(struct mii_bus *bus);
206void mdiobus_free(struct mii_bus *bus);
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207struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
208static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
209{
210 return devm_mdiobus_alloc_size(dev, 0);
211}
212
213void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 214struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
abf35df2 215int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum);
21dd19fe 216int mdiobus_read_nested(struct mii_bus *bus, int addr, u32 regnum);
abf35df2 217int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
21dd19fe 218int mdiobus_write_nested(struct mii_bus *bus, int addr, u32 regnum, u16 val);
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219
220
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221#define PHY_INTERRUPT_DISABLED 0x0
222#define PHY_INTERRUPT_ENABLED 0x80000000
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223
224/* PHY state machine states:
225 *
226 * DOWN: PHY device and driver are not ready for anything. probe
227 * should be called if and only if the PHY is in this state,
228 * given that the PHY device exists.
229 * - PHY driver probe function will, depending on the PHY, set
230 * the state to STARTING or READY
231 *
232 * STARTING: PHY device is coming up, and the ethernet driver is
233 * not ready. PHY drivers may set this in the probe function.
234 * If they do, they are responsible for making sure the state is
235 * eventually set to indicate whether the PHY is UP or READY,
236 * depending on the state when the PHY is done starting up.
237 * - PHY driver will set the state to READY
238 * - start will set the state to PENDING
239 *
240 * READY: PHY is ready to send and receive packets, but the
241 * controller is not. By default, PHYs which do not implement
242 * probe will be set to this state by phy_probe(). If the PHY
243 * driver knows the PHY is ready, and the PHY state is STARTING,
244 * then it sets this STATE.
245 * - start will set the state to UP
246 *
247 * PENDING: PHY device is coming up, but the ethernet driver is
248 * ready. phy_start will set this state if the PHY state is
249 * STARTING.
250 * - PHY driver will set the state to UP when the PHY is ready
251 *
252 * UP: The PHY and attached device are ready to do work.
253 * Interrupts should be started here.
254 * - timer moves to AN
255 *
256 * AN: The PHY is currently negotiating the link state. Link is
257 * therefore down for now. phy_timer will set this state when it
258 * detects the state is UP. config_aneg will set this state
259 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
260 * - If autonegotiation finishes, but there's no link, it sets
261 * the state to NOLINK.
262 * - If aneg finishes with link, it sets the state to RUNNING,
263 * and calls adjust_link
264 * - If autonegotiation did not finish after an arbitrary amount
265 * of time, autonegotiation should be tried again if the PHY
266 * supports "magic" autonegotiation (back to AN)
267 * - If it didn't finish, and no magic_aneg, move to FORCING.
268 *
269 * NOLINK: PHY is up, but not currently plugged in.
270 * - If the timer notes that the link comes back, we move to RUNNING
271 * - config_aneg moves to AN
272 * - phy_stop moves to HALTED
273 *
274 * FORCING: PHY is being configured with forced settings
275 * - if link is up, move to RUNNING
276 * - If link is down, we drop to the next highest setting, and
277 * retry (FORCING) after a timeout
278 * - phy_stop moves to HALTED
279 *
280 * RUNNING: PHY is currently up, running, and possibly sending
281 * and/or receiving packets
282 * - timer will set CHANGELINK if we're polling (this ensures the
283 * link state is polled every other cycle of this state machine,
284 * which makes it every other second)
285 * - irq will set CHANGELINK
286 * - config_aneg will set AN
287 * - phy_stop moves to HALTED
288 *
289 * CHANGELINK: PHY experienced a change in link state
290 * - timer moves to RUNNING if link
291 * - timer moves to NOLINK if the link is down
292 * - phy_stop moves to HALTED
293 *
294 * HALTED: PHY is up, but no polling or interrupts are done. Or
295 * PHY is in an error state.
296 *
297 * - phy_start moves to RESUMING
298 *
299 * RESUMING: PHY was halted, but now wants to run again.
300 * - If we are forcing, or aneg is done, timer moves to RUNNING
301 * - If aneg is not done, timer moves to AN
302 * - phy_stop moves to HALTED
303 */
304enum phy_state {
4017b4d3 305 PHY_DOWN = 0,
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306 PHY_STARTING,
307 PHY_READY,
308 PHY_PENDING,
309 PHY_UP,
310 PHY_AN,
311 PHY_RUNNING,
312 PHY_NOLINK,
313 PHY_FORCING,
314 PHY_CHANGELINK,
315 PHY_HALTED,
316 PHY_RESUMING
317};
318
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319/**
320 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
321 * @devices_in_package: Bit vector of devices present.
322 * @device_ids: The device identifer for each present device.
323 */
324struct phy_c45_device_ids {
325 u32 devices_in_package;
326 u32 device_ids[8];
327};
c1f19b51 328
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329/* phy_device: An instance of a PHY
330 *
331 * drv: Pointer to the driver for this PHY instance
332 * bus: Pointer to the bus this PHY is on
333 * dev: driver model device structure for this PHY
334 * phy_id: UID for this device found during discovery
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335 * c45_ids: 802.3-c45 Device Identifers if is_c45.
336 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 337 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 338 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 339 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 340 * suspended: Set to true if this phy has been suspended successfully.
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341 * state: state of the PHY for management purposes
342 * dev_flags: Device-specific flags used by the PHY driver.
343 * addr: Bus address of PHY
344 * link_timeout: The number of timer firings to wait before the
345 * giving up on the current attempt at acquiring a link
346 * irq: IRQ number of the PHY's interrupt (-1 if none)
347 * phy_timer: The timer for handling the state machine
348 * phy_queue: A work_queue for the interrupt
349 * attached_dev: The attached enet driver's device instance ptr
350 * adjust_link: Callback for the enet controller to respond to
351 * changes in the link state.
00db8189 352 *
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353 * speed, duplex, pause, supported, advertising, lp_advertising,
354 * and autoneg are used like in mii_if_info
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355 *
356 * interrupts currently only supports enabled or disabled,
357 * but could be changed in the future to support enabling
358 * and disabling specific interrupts
359 *
360 * Contains some infrastructure for polling and interrupt
361 * handling, as well as handling shifts in PHY hardware state
362 */
363struct phy_device {
364 /* Information about the PHY type */
365 /* And management functions */
366 struct phy_driver *drv;
367
368 struct mii_bus *bus;
369
370 struct device dev;
371
372 u32 phy_id;
373
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374 struct phy_c45_device_ids c45_ids;
375 bool is_c45;
4284b6a5 376 bool is_internal;
5a11dd7d 377 bool is_pseudo_fixed_link;
b0ae009f 378 bool has_fixups;
8a477a6f 379 bool suspended;
ac28b9f8 380
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381 enum phy_state state;
382
383 u32 dev_flags;
384
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385 phy_interface_t interface;
386
c6883996 387 /* Bus address of the PHY (0-31) */
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388 int addr;
389
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390 /*
391 * forced speed & duplex (no autoneg)
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392 * partner speed & duplex & pause (autoneg)
393 */
394 int speed;
395 int duplex;
396 int pause;
397 int asym_pause;
398
399 /* The most recently read link state */
400 int link;
401
402 /* Enabled Interrupts */
403 u32 interrupts;
404
405 /* Union of PHY and Attached devices' supported modes */
406 /* See mii.h for more info */
407 u32 supported;
408 u32 advertising;
114002bc 409 u32 lp_advertising;
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410
411 int autoneg;
412
413 int link_timeout;
414
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415 /*
416 * Interrupt number for this PHY
417 * -1 means no interrupt
418 */
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419 int irq;
420
421 /* private data pointer */
422 /* For use by PHYs to maintain extra state */
423 void *priv;
424
425 /* Interrupt and Polling infrastructure */
426 struct work_struct phy_queue;
a390d1f3 427 struct delayed_work state_queue;
0ac49527 428 atomic_t irq_disable;
00db8189 429
35b5f6b1 430 struct mutex lock;
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431
432 struct net_device *attached_dev;
433
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434 u8 mdix;
435
00db8189 436 void (*adjust_link)(struct net_device *dev);
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437};
438#define to_phy_device(d) container_of(d, struct phy_device, dev)
439
440/* struct phy_driver: Driver structure for a particular PHY type
441 *
442 * phy_id: The result of reading the UID registers of this PHY
443 * type, and ANDing them with the phy_id_mask. This driver
444 * only works for PHYs with IDs which match this field
445 * name: The friendly name of this PHY type
446 * phy_id_mask: Defines the important bits of the phy_id
447 * features: A list of features (speed, duplex, etc) supported
448 * by this PHY
449 * flags: A bitfield defining certain other features this PHY
450 * supports (like interrupts)
860f6e9e 451 * driver_data: static driver data
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452 *
453 * The drivers must implement config_aneg and read_status. All
454 * other functions are optional. Note that none of these
455 * functions should be called from interrupt time. The goal is
456 * for the bus read/write functions to be able to block when the
457 * bus transaction is happening, and be freed up by an interrupt
458 * (The MPC85xx has this ability, though it is not currently
459 * supported in the driver).
460 */
461struct phy_driver {
462 u32 phy_id;
463 char *name;
464 unsigned int phy_id_mask;
465 u32 features;
466 u32 flags;
860f6e9e 467 const void *driver_data;
00db8189 468
c5e38a94 469 /*
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470 * Called to issue a PHY software reset
471 */
472 int (*soft_reset)(struct phy_device *phydev);
473
474 /*
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475 * Called to initialize the PHY,
476 * including after a reset
477 */
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478 int (*config_init)(struct phy_device *phydev);
479
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480 /*
481 * Called during discovery. Used to set
482 * up device-specific structures, if any
483 */
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484 int (*probe)(struct phy_device *phydev);
485
486 /* PHY Power Management */
487 int (*suspend)(struct phy_device *phydev);
488 int (*resume)(struct phy_device *phydev);
489
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490 /*
491 * Configures the advertisement and resets
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492 * autonegotiation if phydev->autoneg is on,
493 * forces the speed to the current settings in phydev
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494 * if phydev->autoneg is off
495 */
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496 int (*config_aneg)(struct phy_device *phydev);
497
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498 /* Determines the auto negotiation result */
499 int (*aneg_done)(struct phy_device *phydev);
500
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501 /* Determines the negotiated speed and duplex */
502 int (*read_status)(struct phy_device *phydev);
503
504 /* Clears any pending interrupts */
505 int (*ack_interrupt)(struct phy_device *phydev);
506
507 /* Enables or disables interrupts */
508 int (*config_intr)(struct phy_device *phydev);
509
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510 /*
511 * Checks if the PHY generated an interrupt.
512 * For multi-PHY devices with shared PHY interrupt pin
513 */
514 int (*did_interrupt)(struct phy_device *phydev);
515
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516 /* Clears up any memory if needed */
517 void (*remove)(struct phy_device *phydev);
518
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519 /* Returns true if this is a suitable driver for the given
520 * phydev. If NULL, matching is based on phy_id and
521 * phy_id_mask.
522 */
523 int (*match_phy_device)(struct phy_device *phydev);
524
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525 /* Handles ethtool queries for hardware time stamping. */
526 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
527
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528 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
529 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
530
531 /*
532 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
533 * the phy driver promises to deliver it using netif_rx() as
534 * soon as a timestamp becomes available. One of the
535 * PTP_CLASS_ values is passed in 'type'. The function must
536 * return true if the skb is accepted for delivery.
537 */
538 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
539
540 /*
541 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 542 * to deliver it using skb_complete_tx_timestamp() as soon as a
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543 * timestamp becomes available. One of the PTP_CLASS_ values
544 * is passed in 'type'.
545 */
546 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
547
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548 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
549 * enable Wake on LAN, so set_wol is provided to be called in the
550 * ethernet driver's set_wol function. */
551 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
552
553 /* See set_wol, but for checking whether Wake on LAN is enabled. */
554 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
555
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556 /*
557 * Called to inform a PHY device driver when the core is about to
558 * change the link state. This callback is supposed to be used as
559 * fixup hook for drivers that need to take action when the link
560 * state changes. Drivers are by no means allowed to mess with the
561 * PHY device structure in their implementations.
562 */
563 void (*link_change_notify)(struct phy_device *dev);
564
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565 /* A function provided by a phy specific driver to override the
566 * the PHY driver framework support for reading a MMD register
567 * from the PHY. If not supported, return -1. This function is
568 * optional for PHY specific drivers, if not provided then the
569 * default MMD read function is used by the PHY framework.
570 */
571 int (*read_mmd_indirect)(struct phy_device *dev, int ptrad,
572 int devnum, int regnum);
573
574 /* A function provided by a phy specific driver to override the
575 * the PHY driver framework support for writing a MMD register
576 * from the PHY. This function is optional for PHY specific drivers,
577 * if not provided then the default MMD read function is used by
578 * the PHY framework.
579 */
580 void (*write_mmd_indirect)(struct phy_device *dev, int ptrad,
581 int devnum, int regnum, u32 val);
582
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583 /* Get the size and type of the eeprom contained within a plug-in
584 * module */
585 int (*module_info)(struct phy_device *dev,
586 struct ethtool_modinfo *modinfo);
587
588 /* Get the eeprom information from the plug-in module */
589 int (*module_eeprom)(struct phy_device *dev,
590 struct ethtool_eeprom *ee, u8 *data);
591
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592 struct device_driver driver;
593};
594#define to_phy_driver(d) container_of(d, struct phy_driver, driver)
595
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596#define PHY_ANY_ID "MATCH ANY PHY"
597#define PHY_ANY_UID 0xffffffff
598
599/* A Structure for boards to register fixups with the PHY Lib */
600struct phy_fixup {
601 struct list_head list;
8e401ecc 602 char bus_id[20];
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603 u32 phy_uid;
604 u32 phy_uid_mask;
605 int (*run)(struct phy_device *phydev);
606};
607
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608/**
609 * phy_read_mmd - Convenience function for reading a register
610 * from an MMD on a given PHY.
611 * @phydev: The phy_device struct
612 * @devad: The MMD to read from
613 * @regnum: The register on the MMD to read
614 *
615 * Same rules as for phy_read();
616 */
617static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
618{
619 if (!phydev->is_c45)
620 return -EOPNOTSUPP;
621
622 return mdiobus_read(phydev->bus, phydev->addr,
623 MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff));
624}
625
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626/**
627 * phy_read_mmd_indirect - reads data from the MMD registers
628 * @phydev: The PHY device bus
629 * @prtad: MMD Address
630 * @devad: MMD DEVAD
631 * @addr: PHY address on the MII bus
632 *
633 * Description: it reads data from the MMD registers (clause 22 to access to
634 * clause 45) of the specified phy address.
635 */
636int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
637 int devad, int addr);
638
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639/**
640 * phy_read - Convenience function for reading a given PHY register
641 * @phydev: the phy_device struct
642 * @regnum: register number to read
643 *
644 * NOTE: MUST NOT be called from interrupt context,
645 * because the bus read/write functions may wait for an interrupt
646 * to conclude the operation.
647 */
abf35df2 648static inline int phy_read(struct phy_device *phydev, u32 regnum)
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649{
650 return mdiobus_read(phydev->bus, phydev->addr, regnum);
651}
652
653/**
654 * phy_write - Convenience function for writing a given PHY register
655 * @phydev: the phy_device struct
656 * @regnum: register number to write
657 * @val: value to write to @regnum
658 *
659 * NOTE: MUST NOT be called from interrupt context,
660 * because the bus read/write functions may wait for an interrupt
661 * to conclude the operation.
662 */
abf35df2 663static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
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664{
665 return mdiobus_write(phydev->bus, phydev->addr, regnum, val);
666}
667
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668/**
669 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
670 * @phydev: the phy_device struct
671 *
672 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
673 * PHY_IGNORE_INTERRUPT
674 */
675static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
676{
677 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
678}
679
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680/**
681 * phy_is_internal - Convenience function for testing if a PHY is internal
682 * @phydev: the phy_device struct
683 */
684static inline bool phy_is_internal(struct phy_device *phydev)
685{
686 return phydev->is_internal;
687}
688
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689/**
690 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
691 * is RGMII (all variants)
692 * @phydev: the phy_device struct
693 */
694static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
695{
696 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
697 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
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698};
699
700/*
701 * phy_is_pseudo_fixed_link - Convenience function for testing if this
702 * PHY is the CPU port facing side of an Ethernet switch, or similar.
703 * @phydev: the phy_device struct
704 */
705static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
706{
707 return phydev->is_pseudo_fixed_link;
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708}
709
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710/**
711 * phy_write_mmd - Convenience function for writing a register
712 * on an MMD on a given PHY.
713 * @phydev: The phy_device struct
714 * @devad: The MMD to read from
715 * @regnum: The register on the MMD to read
716 * @val: value to write to @regnum
717 *
718 * Same rules as for phy_write();
719 */
720static inline int phy_write_mmd(struct phy_device *phydev, int devad,
721 u32 regnum, u16 val)
722{
723 if (!phydev->is_c45)
724 return -EOPNOTSUPP;
725
726 regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff);
727
728 return mdiobus_write(phydev->bus, phydev->addr, regnum, val);
729}
730
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731/**
732 * phy_write_mmd_indirect - writes data to the MMD registers
733 * @phydev: The PHY device
734 * @prtad: MMD Address
735 * @devad: MMD DEVAD
736 * @addr: PHY address on the MII bus
737 * @data: data to write in the MMD register
738 *
739 * Description: Write data from the MMD registers of the specified
740 * phy address.
741 */
742void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
743 int devad, int addr, u32 data);
744
ac28b9f8 745struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
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746 bool is_c45,
747 struct phy_c45_device_ids *c45_ids);
ac28b9f8 748struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 749int phy_device_register(struct phy_device *phy);
38737e49 750void phy_device_remove(struct phy_device *phydev);
2f5cb434 751int phy_init_hw(struct phy_device *phydev);
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752int phy_suspend(struct phy_device *phydev);
753int phy_resume(struct phy_device *phydev);
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754struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
755 phy_interface_t interface);
f8f76db1 756struct phy_device *phy_find_first(struct mii_bus *bus);
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757int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
758 u32 flags, phy_interface_t interface);
fa94f6d9 759int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
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760 void (*handler)(struct net_device *),
761 phy_interface_t interface);
762struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
763 void (*handler)(struct net_device *),
764 phy_interface_t interface);
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765void phy_disconnect(struct phy_device *phydev);
766void phy_detach(struct phy_device *phydev);
767void phy_start(struct phy_device *phydev);
768void phy_stop(struct phy_device *phydev);
769int phy_start_aneg(struct phy_device *phydev);
770
e1393456 771int phy_stop_interrupts(struct phy_device *phydev);
00db8189 772
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773static inline int phy_read_status(struct phy_device *phydev)
774{
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775 return phydev->drv->read_status(phydev);
776}
777
af6b6967 778int genphy_config_init(struct phy_device *phydev);
3fb69bca 779int genphy_setup_forced(struct phy_device *phydev);
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780int genphy_restart_aneg(struct phy_device *phydev);
781int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 782int genphy_aneg_done(struct phy_device *phydev);
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783int genphy_update_link(struct phy_device *phydev);
784int genphy_read_status(struct phy_device *phydev);
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785int genphy_suspend(struct phy_device *phydev);
786int genphy_resume(struct phy_device *phydev);
797ac071 787int genphy_soft_reset(struct phy_device *phydev);
00db8189 788void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 789void phy_drivers_unregister(struct phy_driver *drv, int n);
00db8189 790int phy_driver_register(struct phy_driver *new_driver);
d5bf9071 791int phy_drivers_register(struct phy_driver *new_driver, int n);
4f9c85a1 792void phy_state_machine(struct work_struct *work);
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793void phy_change(struct work_struct *work);
794void phy_mac_interrupt(struct phy_device *phydev, int new_link);
29935aeb 795void phy_start_machine(struct phy_device *phydev);
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796void phy_stop_machine(struct phy_device *phydev);
797int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
798int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
4017b4d3 799int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
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800int phy_start_interrupts(struct phy_device *phydev);
801void phy_print_status(struct phy_device *phydev);
6f4a7f41 802void phy_device_free(struct phy_device *phydev);
f3a6bd39 803int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
00db8189 804
f62220d3 805int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 806 int (*run)(struct phy_device *));
f62220d3 807int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 808 int (*run)(struct phy_device *));
f62220d3 809int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 810 int (*run)(struct phy_device *));
f62220d3 811
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812int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
813int phy_get_eee_err(struct phy_device *phydev);
814int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
815int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 816int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
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817void phy_ethtool_get_wol(struct phy_device *phydev,
818 struct ethtool_wolinfo *wol);
a59a4d19 819
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820int __init mdio_bus_init(void);
821void mdio_bus_exit(void);
822
00db8189 823extern struct bus_type mdio_bus_type;
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824
825/**
826 * module_phy_driver() - Helper macro for registering PHY drivers
827 * @__phy_drivers: array of PHY drivers to register
828 *
829 * Helper macro for PHY drivers which do not do anything special in module
830 * init/exit. Each module may only use this macro once, and calling it
831 * replaces module_init() and module_exit().
832 */
833#define phy_module_driver(__phy_drivers, __count) \
834static int __init phy_module_init(void) \
835{ \
836 return phy_drivers_register(__phy_drivers, __count); \
837} \
838module_init(phy_module_init); \
839static void __exit phy_module_exit(void) \
840{ \
841 phy_drivers_unregister(__phy_drivers, __count); \
842} \
843module_exit(phy_module_exit)
844
845#define module_phy_driver(__phy_drivers) \
846 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
847
00db8189 848#endif /* __PHY_H */