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ACPI: fix acpi_find_child_device() invocation in acpi_preset_companion()
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00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
bac83c65 22#include <linux/mdio.h>
13df29f6 23#include <linux/mii.h>
3e3aaf64 24#include <linux/module.h>
13df29f6
MR
25#include <linux/timer.h>
26#include <linux/workqueue.h>
8626d3b4 27#include <linux/mod_devicetable.h>
00db8189 28
60063497 29#include <linux/atomic.h>
0ac49527 30
e9fbdf17 31#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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AF
32 SUPPORTED_TP | \
33 SUPPORTED_MII)
34
e9fbdf17
FF
35#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
36 SUPPORTED_10baseT_Full)
37
38#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
39 SUPPORTED_100baseT_Full)
40
41#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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42 SUPPORTED_1000baseT_Full)
43
e9fbdf17
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44#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
45 PHY_100BT_FEATURES | \
46 PHY_DEFAULT_FEATURES)
47
48#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
49 PHY_1000BT_FEATURES)
50
51
c5e38a94
AF
52/*
53 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
AF
54 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
55 * the attached driver handles the interrupt
56 */
57#define PHY_POLL -1
58#define PHY_IGNORE_INTERRUPT -2
59
60#define PHY_HAS_INTERRUPT 0x00000001
1b86f702 61#define PHY_IS_INTERNAL 0x00000002
a9049e0c 62#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 63
e8a2b6a4
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64/* Interface Mode definitions */
65typedef enum {
4157ef1b 66 PHY_INTERFACE_MODE_NA,
735d8a18 67 PHY_INTERFACE_MODE_INTERNAL,
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68 PHY_INTERFACE_MODE_MII,
69 PHY_INTERFACE_MODE_GMII,
70 PHY_INTERFACE_MODE_SGMII,
71 PHY_INTERFACE_MODE_TBI,
2cc70ba4 72 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
73 PHY_INTERFACE_MODE_RMII,
74 PHY_INTERFACE_MODE_RGMII,
a999589c 75 PHY_INTERFACE_MODE_RGMII_ID,
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76 PHY_INTERFACE_MODE_RGMII_RXID,
77 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
78 PHY_INTERFACE_MODE_RTBI,
79 PHY_INTERFACE_MODE_SMII,
898dd0bd 80 PHY_INTERFACE_MODE_XGMII,
fd70f72c 81 PHY_INTERFACE_MODE_MOCA,
b9d12085 82 PHY_INTERFACE_MODE_QSGMII,
572de608 83 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
84 PHY_INTERFACE_MODE_1000BASEX,
85 PHY_INTERFACE_MODE_2500BASEX,
86 PHY_INTERFACE_MODE_RXAUI,
c125ca09
RK
87 PHY_INTERFACE_MODE_XAUI,
88 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
89 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 90 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
91} phy_interface_t;
92
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93/**
94 * phy_supported_speeds - return all speeds currently supported by a phy device
95 * @phy: The phy device to return supported speeds of.
96 * @speeds: buffer to store supported speeds in.
97 * @size: size of speeds buffer.
98 *
99 * Description: Returns the number of supported speeds, and
100 * fills the speeds * buffer with the supported speeds. If speeds buffer is
101 * too small to contain * all currently supported speeds, will return as
102 * many speeds as can fit.
103 */
104unsigned int phy_supported_speeds(struct phy_device *phy,
105 unsigned int *speeds,
106 unsigned int size);
107
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108/**
109 * It maps 'enum phy_interface_t' found in include/linux/phy.h
110 * into the device tree binding of 'phy-mode', so that Ethernet
111 * device driver can get phy interface from device tree.
112 */
113static inline const char *phy_modes(phy_interface_t interface)
114{
115 switch (interface) {
116 case PHY_INTERFACE_MODE_NA:
117 return "";
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FF
118 case PHY_INTERFACE_MODE_INTERNAL:
119 return "internal";
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120 case PHY_INTERFACE_MODE_MII:
121 return "mii";
122 case PHY_INTERFACE_MODE_GMII:
123 return "gmii";
124 case PHY_INTERFACE_MODE_SGMII:
125 return "sgmii";
126 case PHY_INTERFACE_MODE_TBI:
127 return "tbi";
128 case PHY_INTERFACE_MODE_REVMII:
129 return "rev-mii";
130 case PHY_INTERFACE_MODE_RMII:
131 return "rmii";
132 case PHY_INTERFACE_MODE_RGMII:
133 return "rgmii";
134 case PHY_INTERFACE_MODE_RGMII_ID:
135 return "rgmii-id";
136 case PHY_INTERFACE_MODE_RGMII_RXID:
137 return "rgmii-rxid";
138 case PHY_INTERFACE_MODE_RGMII_TXID:
139 return "rgmii-txid";
140 case PHY_INTERFACE_MODE_RTBI:
141 return "rtbi";
142 case PHY_INTERFACE_MODE_SMII:
143 return "smii";
144 case PHY_INTERFACE_MODE_XGMII:
145 return "xgmii";
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146 case PHY_INTERFACE_MODE_MOCA:
147 return "moca";
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148 case PHY_INTERFACE_MODE_QSGMII:
149 return "qsgmii";
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150 case PHY_INTERFACE_MODE_TRGMII:
151 return "trgmii";
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AL
152 case PHY_INTERFACE_MODE_1000BASEX:
153 return "1000base-x";
154 case PHY_INTERFACE_MODE_2500BASEX:
155 return "2500base-x";
156 case PHY_INTERFACE_MODE_RXAUI:
157 return "rxaui";
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158 case PHY_INTERFACE_MODE_XAUI:
159 return "xaui";
160 case PHY_INTERFACE_MODE_10GKR:
161 return "10gbase-kr";
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162 default:
163 return "unknown";
164 }
165}
166
00db8189 167
e8a2b6a4 168#define PHY_INIT_TIMEOUT 100000
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169#define PHY_STATE_TIME 1
170#define PHY_FORCE_TIMEOUT 10
171#define PHY_AN_TIMEOUT 10
172
e8a2b6a4 173#define PHY_MAX_ADDR 32
00db8189 174
a4d00f17 175/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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AF
176#define PHY_ID_FMT "%s:%02x"
177
4567d686 178#define MII_BUS_ID_SIZE 61
a4d00f17 179
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180/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
181 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
182#define MII_ADDR_C45 (1<<30)
183
313162d0 184struct device;
9525ae83 185struct phylink;
313162d0
PG
186struct sk_buff;
187
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188/*
189 * The Bus class for PHYs. Devices which provide access to
190 * PHYs should register using this structure
191 */
00db8189 192struct mii_bus {
3e3aaf64 193 struct module *owner;
00db8189 194 const char *name;
9d9326d3 195 char id[MII_BUS_ID_SIZE];
00db8189 196 void *priv;
ccaa953e
AL
197 int (*read)(struct mii_bus *bus, int addr, int regnum);
198 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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199 int (*reset)(struct mii_bus *bus);
200
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201 /*
202 * A lock to ensure that only one thing can read/write
203 * the MDIO bus at a time
204 */
35b5f6b1 205 struct mutex mdio_lock;
00db8189 206
18ee49dd 207 struct device *parent;
46abc021
LB
208 enum {
209 MDIOBUS_ALLOCATED = 1,
210 MDIOBUS_REGISTERED,
211 MDIOBUS_UNREGISTERED,
212 MDIOBUS_RELEASED,
213 } state;
214 struct device dev;
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AF
215
216 /* list of all PHYs on bus */
7f854420 217 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 218
c6883996 219 /* PHY addresses to be ignored when probing */
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MP
220 u32 phy_mask;
221
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222 /* PHY addresses to ignore the TA/read failure */
223 u32 phy_ignore_ta_mask;
224
c5e38a94 225 /*
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226 * An array of interrupts, each PHY's interrupt at the index
227 * matching its address
c5e38a94 228 */
e7f4dc35 229 int irq[PHY_MAX_ADDR];
69226896
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230
231 /* GPIO reset pulse width in microseconds */
232 int reset_delay_us;
d396e84c
SS
233 /* RESET GPIO descriptor pointer */
234 struct gpio_desc *reset_gpiod;
00db8189 235};
46abc021 236#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 237
eb8a54a7
TT
238struct mii_bus *mdiobus_alloc_size(size_t);
239static inline struct mii_bus *mdiobus_alloc(void)
240{
241 return mdiobus_alloc_size(0);
242}
243
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RK
244int __mdiobus_register(struct mii_bus *bus, struct module *owner);
245#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
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246void mdiobus_unregister(struct mii_bus *bus);
247void mdiobus_free(struct mii_bus *bus);
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GS
248struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
249static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
250{
251 return devm_mdiobus_alloc_size(dev, 0);
252}
253
254void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 255struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 256
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257#define PHY_INTERRUPT_DISABLED 0x0
258#define PHY_INTERRUPT_ENABLED 0x80000000
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AF
259
260/* PHY state machine states:
261 *
262 * DOWN: PHY device and driver are not ready for anything. probe
263 * should be called if and only if the PHY is in this state,
264 * given that the PHY device exists.
265 * - PHY driver probe function will, depending on the PHY, set
266 * the state to STARTING or READY
267 *
268 * STARTING: PHY device is coming up, and the ethernet driver is
269 * not ready. PHY drivers may set this in the probe function.
270 * If they do, they are responsible for making sure the state is
271 * eventually set to indicate whether the PHY is UP or READY,
272 * depending on the state when the PHY is done starting up.
273 * - PHY driver will set the state to READY
274 * - start will set the state to PENDING
275 *
276 * READY: PHY is ready to send and receive packets, but the
277 * controller is not. By default, PHYs which do not implement
278 * probe will be set to this state by phy_probe(). If the PHY
279 * driver knows the PHY is ready, and the PHY state is STARTING,
280 * then it sets this STATE.
281 * - start will set the state to UP
282 *
283 * PENDING: PHY device is coming up, but the ethernet driver is
284 * ready. phy_start will set this state if the PHY state is
285 * STARTING.
286 * - PHY driver will set the state to UP when the PHY is ready
287 *
288 * UP: The PHY and attached device are ready to do work.
289 * Interrupts should be started here.
290 * - timer moves to AN
291 *
292 * AN: The PHY is currently negotiating the link state. Link is
293 * therefore down for now. phy_timer will set this state when it
294 * detects the state is UP. config_aneg will set this state
295 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
296 * - If autonegotiation finishes, but there's no link, it sets
297 * the state to NOLINK.
298 * - If aneg finishes with link, it sets the state to RUNNING,
299 * and calls adjust_link
300 * - If autonegotiation did not finish after an arbitrary amount
301 * of time, autonegotiation should be tried again if the PHY
302 * supports "magic" autonegotiation (back to AN)
303 * - If it didn't finish, and no magic_aneg, move to FORCING.
304 *
305 * NOLINK: PHY is up, but not currently plugged in.
306 * - If the timer notes that the link comes back, we move to RUNNING
307 * - config_aneg moves to AN
308 * - phy_stop moves to HALTED
309 *
310 * FORCING: PHY is being configured with forced settings
311 * - if link is up, move to RUNNING
312 * - If link is down, we drop to the next highest setting, and
313 * retry (FORCING) after a timeout
314 * - phy_stop moves to HALTED
315 *
316 * RUNNING: PHY is currently up, running, and possibly sending
317 * and/or receiving packets
318 * - timer will set CHANGELINK if we're polling (this ensures the
319 * link state is polled every other cycle of this state machine,
320 * which makes it every other second)
321 * - irq will set CHANGELINK
322 * - config_aneg will set AN
323 * - phy_stop moves to HALTED
324 *
325 * CHANGELINK: PHY experienced a change in link state
326 * - timer moves to RUNNING if link
327 * - timer moves to NOLINK if the link is down
328 * - phy_stop moves to HALTED
329 *
330 * HALTED: PHY is up, but no polling or interrupts are done. Or
331 * PHY is in an error state.
332 *
333 * - phy_start moves to RESUMING
334 *
335 * RESUMING: PHY was halted, but now wants to run again.
336 * - If we are forcing, or aneg is done, timer moves to RUNNING
337 * - If aneg is not done, timer moves to AN
338 * - phy_stop moves to HALTED
339 */
340enum phy_state {
4017b4d3 341 PHY_DOWN = 0,
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AF
342 PHY_STARTING,
343 PHY_READY,
344 PHY_PENDING,
345 PHY_UP,
346 PHY_AN,
347 PHY_RUNNING,
348 PHY_NOLINK,
349 PHY_FORCING,
350 PHY_CHANGELINK,
351 PHY_HALTED,
352 PHY_RESUMING
353};
354
ac28b9f8
DD
355/**
356 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
357 * @devices_in_package: Bit vector of devices present.
358 * @device_ids: The device identifer for each present device.
359 */
360struct phy_c45_device_ids {
361 u32 devices_in_package;
362 u32 device_ids[8];
363};
c1f19b51 364
00db8189
AF
365/* phy_device: An instance of a PHY
366 *
367 * drv: Pointer to the driver for this PHY instance
00db8189 368 * phy_id: UID for this device found during discovery
ac28b9f8
DD
369 * c45_ids: 802.3-c45 Device Identifers if is_c45.
370 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 371 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 372 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 373 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 374 * suspended: Set to true if this phy has been suspended successfully.
a3995460 375 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 376 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
377 * state: state of the PHY for management purposes
378 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
379 * link_timeout: The number of timer firings to wait before the
380 * giving up on the current attempt at acquiring a link
381 * irq: IRQ number of the PHY's interrupt (-1 if none)
382 * phy_timer: The timer for handling the state machine
664fcf12 383 * phy_queue: A work_queue for the phy_mac_interrupt
00db8189
AF
384 * attached_dev: The attached enet driver's device instance ptr
385 * adjust_link: Callback for the enet controller to respond to
386 * changes in the link state.
00db8189 387 *
114002bc
FF
388 * speed, duplex, pause, supported, advertising, lp_advertising,
389 * and autoneg are used like in mii_if_info
00db8189
AF
390 *
391 * interrupts currently only supports enabled or disabled,
392 * but could be changed in the future to support enabling
393 * and disabling specific interrupts
394 *
395 * Contains some infrastructure for polling and interrupt
396 * handling, as well as handling shifts in PHY hardware state
397 */
398struct phy_device {
e5a03bfd
AL
399 struct mdio_device mdio;
400
00db8189
AF
401 /* Information about the PHY type */
402 /* And management functions */
403 struct phy_driver *drv;
404
00db8189
AF
405 u32 phy_id;
406
ac28b9f8
DD
407 struct phy_c45_device_ids c45_ids;
408 bool is_c45;
4284b6a5 409 bool is_internal;
5a11dd7d 410 bool is_pseudo_fixed_link;
b0ae009f 411 bool has_fixups;
8a477a6f 412 bool suspended;
a3995460 413 bool sysfs_links;
f0f9b4ed 414 bool loopback_enabled;
ac28b9f8 415
00db8189
AF
416 enum phy_state state;
417
418 u32 dev_flags;
419
e8a2b6a4
AF
420 phy_interface_t interface;
421
c5e38a94
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422 /*
423 * forced speed & duplex (no autoneg)
00db8189
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424 * partner speed & duplex & pause (autoneg)
425 */
426 int speed;
427 int duplex;
428 int pause;
429 int asym_pause;
430
431 /* The most recently read link state */
432 int link;
433
434 /* Enabled Interrupts */
435 u32 interrupts;
436
437 /* Union of PHY and Attached devices' supported modes */
438 /* See mii.h for more info */
439 u32 supported;
440 u32 advertising;
114002bc 441 u32 lp_advertising;
00db8189 442
d853d145 443 /* Energy efficient ethernet modes which should be prohibited */
444 u32 eee_broken_modes;
445
00db8189
AF
446 int autoneg;
447
448 int link_timeout;
449
2e0bc452
ZB
450#ifdef CONFIG_LED_TRIGGER_PHY
451 struct phy_led_trigger *phy_led_triggers;
452 unsigned int phy_num_led_triggers;
453 struct phy_led_trigger *last_triggered;
3928ee64
MS
454
455 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
456#endif
457
c5e38a94
AF
458 /*
459 * Interrupt number for this PHY
460 * -1 means no interrupt
461 */
00db8189
AF
462 int irq;
463
464 /* private data pointer */
465 /* For use by PHYs to maintain extra state */
466 void *priv;
467
468 /* Interrupt and Polling infrastructure */
469 struct work_struct phy_queue;
a390d1f3 470 struct delayed_work state_queue;
00db8189 471
35b5f6b1 472 struct mutex lock;
00db8189 473
9525ae83 474 struct phylink *phylink;
00db8189
AF
475 struct net_device *attached_dev;
476
634ec36c 477 u8 mdix;
f4ed2fe3 478 u8 mdix_ctrl;
634ec36c 479
a81497be 480 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 481 void (*adjust_link)(struct net_device *dev);
00db8189 482};
e5a03bfd
AL
483#define to_phy_device(d) container_of(to_mdio_device(d), \
484 struct phy_device, mdio)
00db8189
AF
485
486/* struct phy_driver: Driver structure for a particular PHY type
487 *
a9049e0c 488 * driver_data: static driver data
00db8189
AF
489 * phy_id: The result of reading the UID registers of this PHY
490 * type, and ANDing them with the phy_id_mask. This driver
491 * only works for PHYs with IDs which match this field
492 * name: The friendly name of this PHY type
493 * phy_id_mask: Defines the important bits of the phy_id
494 * features: A list of features (speed, duplex, etc) supported
495 * by this PHY
496 * flags: A bitfield defining certain other features this PHY
497 * supports (like interrupts)
498 *
499 * The drivers must implement config_aneg and read_status. All
500 * other functions are optional. Note that none of these
501 * functions should be called from interrupt time. The goal is
502 * for the bus read/write functions to be able to block when the
503 * bus transaction is happening, and be freed up by an interrupt
504 * (The MPC85xx has this ability, though it is not currently
505 * supported in the driver).
506 */
507struct phy_driver {
a9049e0c 508 struct mdio_driver_common mdiodrv;
00db8189
AF
509 u32 phy_id;
510 char *name;
511 unsigned int phy_id_mask;
512 u32 features;
513 u32 flags;
860f6e9e 514 const void *driver_data;
00db8189 515
c5e38a94 516 /*
9df81dd7
FF
517 * Called to issue a PHY software reset
518 */
519 int (*soft_reset)(struct phy_device *phydev);
520
521 /*
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AF
522 * Called to initialize the PHY,
523 * including after a reset
524 */
00db8189
AF
525 int (*config_init)(struct phy_device *phydev);
526
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AF
527 /*
528 * Called during discovery. Used to set
529 * up device-specific structures, if any
530 */
00db8189
AF
531 int (*probe)(struct phy_device *phydev);
532
533 /* PHY Power Management */
534 int (*suspend)(struct phy_device *phydev);
535 int (*resume)(struct phy_device *phydev);
536
c5e38a94
AF
537 /*
538 * Configures the advertisement and resets
00db8189
AF
539 * autonegotiation if phydev->autoneg is on,
540 * forces the speed to the current settings in phydev
c5e38a94
AF
541 * if phydev->autoneg is off
542 */
00db8189
AF
543 int (*config_aneg)(struct phy_device *phydev);
544
76a423a3
FF
545 /* Determines the auto negotiation result */
546 int (*aneg_done)(struct phy_device *phydev);
547
00db8189
AF
548 /* Determines the negotiated speed and duplex */
549 int (*read_status)(struct phy_device *phydev);
550
551 /* Clears any pending interrupts */
552 int (*ack_interrupt)(struct phy_device *phydev);
553
554 /* Enables or disables interrupts */
555 int (*config_intr)(struct phy_device *phydev);
556
a8729eb3
AG
557 /*
558 * Checks if the PHY generated an interrupt.
559 * For multi-PHY devices with shared PHY interrupt pin
560 */
561 int (*did_interrupt)(struct phy_device *phydev);
562
00db8189
AF
563 /* Clears up any memory if needed */
564 void (*remove)(struct phy_device *phydev);
565
a30e2c18
DD
566 /* Returns true if this is a suitable driver for the given
567 * phydev. If NULL, matching is based on phy_id and
568 * phy_id_mask.
569 */
570 int (*match_phy_device)(struct phy_device *phydev);
571
c8f3a8c3
RC
572 /* Handles ethtool queries for hardware time stamping. */
573 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
574
c1f19b51
RC
575 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
576 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
577
578 /*
579 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
580 * the phy driver promises to deliver it using netif_rx() as
581 * soon as a timestamp becomes available. One of the
582 * PTP_CLASS_ values is passed in 'type'. The function must
583 * return true if the skb is accepted for delivery.
584 */
585 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
586
587 /*
588 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 589 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
590 * timestamp becomes available. One of the PTP_CLASS_ values
591 * is passed in 'type'.
592 */
593 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
594
42e836eb
MS
595 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
596 * enable Wake on LAN, so set_wol is provided to be called in the
597 * ethernet driver's set_wol function. */
598 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
599
600 /* See set_wol, but for checking whether Wake on LAN is enabled. */
601 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
602
2b8f2a28
DM
603 /*
604 * Called to inform a PHY device driver when the core is about to
605 * change the link state. This callback is supposed to be used as
606 * fixup hook for drivers that need to take action when the link
607 * state changes. Drivers are by no means allowed to mess with the
608 * PHY device structure in their implementations.
609 */
610 void (*link_change_notify)(struct phy_device *dev);
611
1ee6b9bc
RK
612 /*
613 * Phy specific driver override for reading a MMD register.
614 * This function is optional for PHY specific drivers. When
615 * not provided, the default MMD read function will be used
616 * by phy_read_mmd(), which will use either a direct read for
617 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
618 * devnum is the MMD device number within the PHY device,
619 * regnum is the register within the selected MMD device.
620 */
621 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
622
623 /*
624 * Phy specific driver override for writing a MMD register.
625 * This function is optional for PHY specific drivers. When
626 * not provided, the default MMD write function will be used
627 * by phy_write_mmd(), which will use either a direct write for
628 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
629 * devnum is the MMD device number within the PHY device,
630 * regnum is the register within the selected MMD device.
631 * val is the value to be written.
632 */
633 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
634 u16 val);
635
2f438366
ES
636 /* Get the size and type of the eeprom contained within a plug-in
637 * module */
638 int (*module_info)(struct phy_device *dev,
639 struct ethtool_modinfo *modinfo);
640
641 /* Get the eeprom information from the plug-in module */
642 int (*module_eeprom)(struct phy_device *dev,
643 struct ethtool_eeprom *ee, u8 *data);
644
f3a40945
AL
645 /* Get statistics from the phy using ethtool */
646 int (*get_sset_count)(struct phy_device *dev);
647 void (*get_strings)(struct phy_device *dev, u8 *data);
648 void (*get_stats)(struct phy_device *dev,
649 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
650
651 /* Get and Set PHY tunables */
652 int (*get_tunable)(struct phy_device *dev,
653 struct ethtool_tunable *tuna, void *data);
654 int (*set_tunable)(struct phy_device *dev,
655 struct ethtool_tunable *tuna,
656 const void *data);
f0f9b4ed 657 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 658};
a9049e0c
AL
659#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
660 struct phy_driver, mdiodrv)
00db8189 661
f62220d3
AF
662#define PHY_ANY_ID "MATCH ANY PHY"
663#define PHY_ANY_UID 0xffffffff
664
665/* A Structure for boards to register fixups with the PHY Lib */
666struct phy_fixup {
667 struct list_head list;
4567d686 668 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
669 u32 phy_uid;
670 u32 phy_uid_mask;
671 int (*run)(struct phy_device *phydev);
672};
673
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RK
674const char *phy_speed_to_str(int speed);
675const char *phy_duplex_to_str(unsigned int duplex);
676
0ccb4fc6
RK
677/* A structure for mapping a particular speed and duplex
678 * combination to a particular SUPPORTED and ADVERTISED value
679 */
680struct phy_setting {
681 u32 speed;
682 u8 duplex;
683 u8 bit;
684};
685
686const struct phy_setting *
687phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
688 size_t maxbit, bool exact);
689size_t phy_speeds(unsigned int *speeds, size_t size,
690 unsigned long *mask, size_t maxbit);
691
efabdfb9
AF
692/**
693 * phy_read_mmd - Convenience function for reading a register
694 * from an MMD on a given PHY.
695 * @phydev: The phy_device struct
696 * @devad: The MMD to read from
697 * @regnum: The register on the MMD to read
698 *
699 * Same rules as for phy_read();
700 */
9860118b 701int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 702
2e888103
LB
703/**
704 * phy_read - Convenience function for reading a given PHY register
705 * @phydev: the phy_device struct
706 * @regnum: register number to read
707 *
708 * NOTE: MUST NOT be called from interrupt context,
709 * because the bus read/write functions may wait for an interrupt
710 * to conclude the operation.
711 */
abf35df2 712static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 713{
e5a03bfd 714 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
715}
716
717/**
718 * phy_write - Convenience function for writing a given PHY register
719 * @phydev: the phy_device struct
720 * @regnum: register number to write
721 * @val: value to write to @regnum
722 *
723 * NOTE: MUST NOT be called from interrupt context,
724 * because the bus read/write functions may wait for an interrupt
725 * to conclude the operation.
726 */
abf35df2 727static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 728{
e5a03bfd 729 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
730}
731
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FF
732/**
733 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
734 * @phydev: the phy_device struct
735 *
736 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
737 * PHY_IGNORE_INTERRUPT
738 */
739static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
740{
741 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
742}
743
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FF
744/**
745 * phy_is_internal - Convenience function for testing if a PHY is internal
746 * @phydev: the phy_device struct
747 */
748static inline bool phy_is_internal(struct phy_device *phydev)
749{
750 return phydev->is_internal;
751}
752
32d0f783
IS
753/**
754 * phy_interface_mode_is_rgmii - Convenience function for testing if a
755 * PHY interface mode is RGMII (all variants)
756 * @mode: the phy_interface_t enum
757 */
758static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
759{
760 return mode >= PHY_INTERFACE_MODE_RGMII &&
761 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
762};
763
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FF
764/**
765 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
766 * is RGMII (all variants)
767 * @phydev: the phy_device struct
768 */
769static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
770{
32d0f783 771 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
772};
773
774/*
775 * phy_is_pseudo_fixed_link - Convenience function for testing if this
776 * PHY is the CPU port facing side of an Ethernet switch, or similar.
777 * @phydev: the phy_device struct
778 */
779static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
780{
781 return phydev->is_pseudo_fixed_link;
e463d88c
FF
782}
783
efabdfb9
AF
784/**
785 * phy_write_mmd - Convenience function for writing a register
786 * on an MMD on a given PHY.
787 * @phydev: The phy_device struct
788 * @devad: The MMD to read from
789 * @regnum: The register on the MMD to read
790 * @val: value to write to @regnum
791 *
792 * Same rules as for phy_write();
793 */
9860118b 794int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 795
ac28b9f8 796struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
797 bool is_c45,
798 struct phy_c45_device_ids *c45_ids);
90eff909 799#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 800struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 801int phy_device_register(struct phy_device *phy);
90eff909
FF
802void phy_device_free(struct phy_device *phydev);
803#else
804static inline
805struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
806{
807 return NULL;
808}
809
810static inline int phy_device_register(struct phy_device *phy)
811{
812 return 0;
813}
814
815static inline void phy_device_free(struct phy_device *phydev) { }
816#endif /* CONFIG_PHYLIB */
38737e49 817void phy_device_remove(struct phy_device *phydev);
2f5cb434 818int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
819int phy_suspend(struct phy_device *phydev);
820int phy_resume(struct phy_device *phydev);
71dfc117 821int __phy_resume(struct phy_device *phydev);
f0f9b4ed 822int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
823struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
824 phy_interface_t interface);
f8f76db1 825struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
826int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
827 u32 flags, phy_interface_t interface);
fa94f6d9 828int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
829 void (*handler)(struct net_device *),
830 phy_interface_t interface);
831struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
832 void (*handler)(struct net_device *),
833 phy_interface_t interface);
e1393456
AF
834void phy_disconnect(struct phy_device *phydev);
835void phy_detach(struct phy_device *phydev);
836void phy_start(struct phy_device *phydev);
837void phy_stop(struct phy_device *phydev);
838int phy_start_aneg(struct phy_device *phydev);
372788f9 839int phy_aneg_done(struct phy_device *phydev);
e1393456 840
e1393456 841int phy_stop_interrupts(struct phy_device *phydev);
002ba705 842int phy_restart_aneg(struct phy_device *phydev);
00db8189 843
4017b4d3
SS
844static inline int phy_read_status(struct phy_device *phydev)
845{
25149ef9
FF
846 if (!phydev->drv)
847 return -EIO;
848
00db8189
AF
849 return phydev->drv->read_status(phydev);
850}
851
72ba48be 852#define phydev_err(_phydev, format, args...) \
e5a03bfd 853 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be
AL
854
855#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 856 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 857
84eff6d1
AL
858static inline const char *phydev_name(const struct phy_device *phydev)
859{
e5a03bfd 860 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
861}
862
2220943a
AL
863void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
864 __printf(2, 3);
865void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
866
867/* Clause 22 PHY */
af6b6967 868int genphy_config_init(struct phy_device *phydev);
3fb69bca 869int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
870int genphy_restart_aneg(struct phy_device *phydev);
871int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 872int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
873int genphy_update_link(struct phy_device *phydev);
874int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
875int genphy_suspend(struct phy_device *phydev);
876int genphy_resume(struct phy_device *phydev);
f0f9b4ed 877int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 878int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
879static inline int genphy_no_soft_reset(struct phy_device *phydev)
880{
881 return 0;
882}
dc2ea342
KH
883int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
884 u16 regnum);
885int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
886 u16 regnum, u16 val);
5acde34a
RK
887
888/* Clause 45 PHY */
889int genphy_c45_restart_aneg(struct phy_device *phydev);
890int genphy_c45_aneg_done(struct phy_device *phydev);
891int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
892int genphy_c45_read_lpa(struct phy_device *phydev);
893int genphy_c45_read_pma(struct phy_device *phydev);
894int genphy_c45_pma_setup_forced(struct phy_device *phydev);
895int genphy_c45_an_disable_aneg(struct phy_device *phydev);
896
00db8189 897void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 898void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
899int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
900int phy_drivers_register(struct phy_driver *new_driver, int n,
901 struct module *owner);
4f9c85a1 902void phy_state_machine(struct work_struct *work);
664fcf12 903void phy_change_work(struct work_struct *work);
5ea94e76 904void phy_mac_interrupt(struct phy_device *phydev, int new_link);
29935aeb 905void phy_start_machine(struct phy_device *phydev);
00db8189 906void phy_stop_machine(struct phy_device *phydev);
f555f34f 907void phy_trigger_machine(struct phy_device *phydev, bool sync);
00db8189 908int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 909void phy_ethtool_ksettings_get(struct phy_device *phydev,
910 struct ethtool_link_ksettings *cmd);
2d55173e
PR
911int phy_ethtool_ksettings_set(struct phy_device *phydev,
912 const struct ethtool_link_ksettings *cmd);
4017b4d3 913int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
914int phy_start_interrupts(struct phy_device *phydev);
915void phy_print_status(struct phy_device *phydev);
f3a6bd39 916int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
00db8189 917
f62220d3 918int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 919 int (*run)(struct phy_device *));
f62220d3 920int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 921 int (*run)(struct phy_device *));
f62220d3 922int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 923 int (*run)(struct phy_device *));
f62220d3 924
f38e7a32
WH
925int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
926int phy_unregister_fixup_for_id(const char *bus_id);
927int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
928
a59a4d19
GC
929int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
930int phy_get_eee_err(struct phy_device *phydev);
931int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
932int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 933int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
934void phy_ethtool_get_wol(struct phy_device *phydev,
935 struct ethtool_wolinfo *wol);
9d9a77ce
PR
936int phy_ethtool_get_link_ksettings(struct net_device *ndev,
937 struct ethtool_link_ksettings *cmd);
938int phy_ethtool_set_link_ksettings(struct net_device *ndev,
939 const struct ethtool_link_ksettings *cmd);
e86a8987 940int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 941
90eff909 942#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
943int __init mdio_bus_init(void);
944void mdio_bus_exit(void);
90eff909 945#endif
9b9a8bfc 946
00db8189 947extern struct bus_type mdio_bus_type;
c31accd1 948
648ea013
FF
949struct mdio_board_info {
950 const char *bus_id;
951 char modalias[MDIO_NAME_SIZE];
952 int mdio_addr;
953 const void *platform_data;
954};
955
90eff909 956#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
957int mdiobus_register_board_info(const struct mdio_board_info *info,
958 unsigned int n);
959#else
960static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
961 unsigned int n)
962{
963 return 0;
964}
965#endif
966
967
c31accd1
JH
968/**
969 * module_phy_driver() - Helper macro for registering PHY drivers
970 * @__phy_drivers: array of PHY drivers to register
971 *
972 * Helper macro for PHY drivers which do not do anything special in module
973 * init/exit. Each module may only use this macro once, and calling it
974 * replaces module_init() and module_exit().
975 */
976#define phy_module_driver(__phy_drivers, __count) \
977static int __init phy_module_init(void) \
978{ \
be01da72 979 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
980} \
981module_init(phy_module_init); \
982static void __exit phy_module_exit(void) \
983{ \
984 phy_drivers_unregister(__phy_drivers, __count); \
985} \
986module_exit(phy_module_exit)
987
988#define module_phy_driver(__phy_drivers) \
989 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
990
00db8189 991#endif /* __PHY_H */