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00db8189 | 1 | /* |
00db8189 AF |
2 | * Framework and drivers for configuring and reading different PHYs |
3 | * Based on code in sungem_phy.c and gianfar_phy.c | |
4 | * | |
5 | * Author: Andy Fleming | |
6 | * | |
7 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #ifndef __PHY_H | |
17 | #define __PHY_H | |
18 | ||
2220943a | 19 | #include <linux/compiler.h> |
00db8189 | 20 | #include <linux/spinlock.h> |
13df29f6 | 21 | #include <linux/ethtool.h> |
b31cdffa | 22 | #include <linux/linkmode.h> |
bac83c65 | 23 | #include <linux/mdio.h> |
13df29f6 | 24 | #include <linux/mii.h> |
3e3aaf64 | 25 | #include <linux/module.h> |
13df29f6 MR |
26 | #include <linux/timer.h> |
27 | #include <linux/workqueue.h> | |
8626d3b4 | 28 | #include <linux/mod_devicetable.h> |
00db8189 | 29 | |
60063497 | 30 | #include <linux/atomic.h> |
0ac49527 | 31 | |
e9fbdf17 | 32 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
33 | SUPPORTED_TP | \ |
34 | SUPPORTED_MII) | |
35 | ||
e9fbdf17 FF |
36 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
37 | SUPPORTED_10baseT_Full) | |
38 | ||
39 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
40 | SUPPORTED_100baseT_Full) | |
41 | ||
42 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
43 | SUPPORTED_1000baseT_Full) |
44 | ||
719655a1 AL |
45 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; |
46 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; | |
47 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; | |
48 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; | |
49 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; | |
50 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; | |
51 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; | |
52 | ||
53 | #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) | |
54 | #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) | |
55 | #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) | |
56 | #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) | |
57 | #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) | |
58 | #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) | |
59 | #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) | |
e9fbdf17 | 60 | |
c5e38a94 AF |
61 | /* |
62 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
00db8189 AF |
63 | * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if |
64 | * the attached driver handles the interrupt | |
65 | */ | |
66 | #define PHY_POLL -1 | |
67 | #define PHY_IGNORE_INTERRUPT -2 | |
68 | ||
69 | #define PHY_HAS_INTERRUPT 0x00000001 | |
1b86f702 | 70 | #define PHY_IS_INTERNAL 0x00000002 |
a9668491 | 71 | #define PHY_RST_AFTER_CLK_EN 0x00000004 |
a9049e0c | 72 | #define MDIO_DEVICE_IS_PHY 0x80000000 |
00db8189 | 73 | |
e8a2b6a4 AF |
74 | /* Interface Mode definitions */ |
75 | typedef enum { | |
4157ef1b | 76 | PHY_INTERFACE_MODE_NA, |
735d8a18 | 77 | PHY_INTERFACE_MODE_INTERNAL, |
e8a2b6a4 AF |
78 | PHY_INTERFACE_MODE_MII, |
79 | PHY_INTERFACE_MODE_GMII, | |
80 | PHY_INTERFACE_MODE_SGMII, | |
81 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 82 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 AF |
83 | PHY_INTERFACE_MODE_RMII, |
84 | PHY_INTERFACE_MODE_RGMII, | |
a999589c | 85 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
86 | PHY_INTERFACE_MODE_RGMII_RXID, |
87 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
88 | PHY_INTERFACE_MODE_RTBI, |
89 | PHY_INTERFACE_MODE_SMII, | |
898dd0bd | 90 | PHY_INTERFACE_MODE_XGMII, |
fd70f72c | 91 | PHY_INTERFACE_MODE_MOCA, |
b9d12085 | 92 | PHY_INTERFACE_MODE_QSGMII, |
572de608 | 93 | PHY_INTERFACE_MODE_TRGMII, |
55601a88 AL |
94 | PHY_INTERFACE_MODE_1000BASEX, |
95 | PHY_INTERFACE_MODE_2500BASEX, | |
96 | PHY_INTERFACE_MODE_RXAUI, | |
c125ca09 RK |
97 | PHY_INTERFACE_MODE_XAUI, |
98 | /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ | |
99 | PHY_INTERFACE_MODE_10GKR, | |
8a2fe56e | 100 | PHY_INTERFACE_MODE_MAX, |
e8a2b6a4 AF |
101 | } phy_interface_t; |
102 | ||
1f9127ca ZB |
103 | /** |
104 | * phy_supported_speeds - return all speeds currently supported by a phy device | |
105 | * @phy: The phy device to return supported speeds of. | |
106 | * @speeds: buffer to store supported speeds in. | |
107 | * @size: size of speeds buffer. | |
108 | * | |
109 | * Description: Returns the number of supported speeds, and | |
110 | * fills the speeds * buffer with the supported speeds. If speeds buffer is | |
111 | * too small to contain * all currently supported speeds, will return as | |
112 | * many speeds as can fit. | |
113 | */ | |
114 | unsigned int phy_supported_speeds(struct phy_device *phy, | |
115 | unsigned int *speeds, | |
116 | unsigned int size); | |
117 | ||
8a2fe56e FF |
118 | /** |
119 | * It maps 'enum phy_interface_t' found in include/linux/phy.h | |
120 | * into the device tree binding of 'phy-mode', so that Ethernet | |
121 | * device driver can get phy interface from device tree. | |
122 | */ | |
123 | static inline const char *phy_modes(phy_interface_t interface) | |
124 | { | |
125 | switch (interface) { | |
126 | case PHY_INTERFACE_MODE_NA: | |
127 | return ""; | |
735d8a18 FF |
128 | case PHY_INTERFACE_MODE_INTERNAL: |
129 | return "internal"; | |
8a2fe56e FF |
130 | case PHY_INTERFACE_MODE_MII: |
131 | return "mii"; | |
132 | case PHY_INTERFACE_MODE_GMII: | |
133 | return "gmii"; | |
134 | case PHY_INTERFACE_MODE_SGMII: | |
135 | return "sgmii"; | |
136 | case PHY_INTERFACE_MODE_TBI: | |
137 | return "tbi"; | |
138 | case PHY_INTERFACE_MODE_REVMII: | |
139 | return "rev-mii"; | |
140 | case PHY_INTERFACE_MODE_RMII: | |
141 | return "rmii"; | |
142 | case PHY_INTERFACE_MODE_RGMII: | |
143 | return "rgmii"; | |
144 | case PHY_INTERFACE_MODE_RGMII_ID: | |
145 | return "rgmii-id"; | |
146 | case PHY_INTERFACE_MODE_RGMII_RXID: | |
147 | return "rgmii-rxid"; | |
148 | case PHY_INTERFACE_MODE_RGMII_TXID: | |
149 | return "rgmii-txid"; | |
150 | case PHY_INTERFACE_MODE_RTBI: | |
151 | return "rtbi"; | |
152 | case PHY_INTERFACE_MODE_SMII: | |
153 | return "smii"; | |
154 | case PHY_INTERFACE_MODE_XGMII: | |
155 | return "xgmii"; | |
fd70f72c FF |
156 | case PHY_INTERFACE_MODE_MOCA: |
157 | return "moca"; | |
b9d12085 TP |
158 | case PHY_INTERFACE_MODE_QSGMII: |
159 | return "qsgmii"; | |
572de608 SW |
160 | case PHY_INTERFACE_MODE_TRGMII: |
161 | return "trgmii"; | |
55601a88 AL |
162 | case PHY_INTERFACE_MODE_1000BASEX: |
163 | return "1000base-x"; | |
164 | case PHY_INTERFACE_MODE_2500BASEX: | |
165 | return "2500base-x"; | |
166 | case PHY_INTERFACE_MODE_RXAUI: | |
167 | return "rxaui"; | |
c125ca09 RK |
168 | case PHY_INTERFACE_MODE_XAUI: |
169 | return "xaui"; | |
170 | case PHY_INTERFACE_MODE_10GKR: | |
171 | return "10gbase-kr"; | |
8a2fe56e FF |
172 | default: |
173 | return "unknown"; | |
174 | } | |
175 | } | |
176 | ||
00db8189 | 177 | |
e8a2b6a4 | 178 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 AF |
179 | #define PHY_STATE_TIME 1 |
180 | #define PHY_FORCE_TIMEOUT 10 | |
181 | #define PHY_AN_TIMEOUT 10 | |
182 | ||
e8a2b6a4 | 183 | #define PHY_MAX_ADDR 32 |
00db8189 | 184 | |
a4d00f17 | 185 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
186 | #define PHY_ID_FMT "%s:%02x" |
187 | ||
4567d686 | 188 | #define MII_BUS_ID_SIZE 61 |
a4d00f17 | 189 | |
abf35df2 JG |
190 | /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit |
191 | IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ | |
192 | #define MII_ADDR_C45 (1<<30) | |
193 | ||
313162d0 | 194 | struct device; |
9525ae83 | 195 | struct phylink; |
313162d0 PG |
196 | struct sk_buff; |
197 | ||
c5e38a94 AF |
198 | /* |
199 | * The Bus class for PHYs. Devices which provide access to | |
200 | * PHYs should register using this structure | |
201 | */ | |
00db8189 | 202 | struct mii_bus { |
3e3aaf64 | 203 | struct module *owner; |
00db8189 | 204 | const char *name; |
9d9326d3 | 205 | char id[MII_BUS_ID_SIZE]; |
00db8189 | 206 | void *priv; |
ccaa953e AL |
207 | int (*read)(struct mii_bus *bus, int addr, int regnum); |
208 | int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); | |
00db8189 AF |
209 | int (*reset)(struct mii_bus *bus); |
210 | ||
c5e38a94 AF |
211 | /* |
212 | * A lock to ensure that only one thing can read/write | |
213 | * the MDIO bus at a time | |
214 | */ | |
35b5f6b1 | 215 | struct mutex mdio_lock; |
00db8189 | 216 | |
18ee49dd | 217 | struct device *parent; |
46abc021 LB |
218 | enum { |
219 | MDIOBUS_ALLOCATED = 1, | |
220 | MDIOBUS_REGISTERED, | |
221 | MDIOBUS_UNREGISTERED, | |
222 | MDIOBUS_RELEASED, | |
223 | } state; | |
224 | struct device dev; | |
00db8189 AF |
225 | |
226 | /* list of all PHYs on bus */ | |
7f854420 | 227 | struct mdio_device *mdio_map[PHY_MAX_ADDR]; |
00db8189 | 228 | |
c6883996 | 229 | /* PHY addresses to be ignored when probing */ |
f896424c MP |
230 | u32 phy_mask; |
231 | ||
922f2dd1 FF |
232 | /* PHY addresses to ignore the TA/read failure */ |
233 | u32 phy_ignore_ta_mask; | |
234 | ||
c5e38a94 | 235 | /* |
e7f4dc35 AL |
236 | * An array of interrupts, each PHY's interrupt at the index |
237 | * matching its address | |
c5e38a94 | 238 | */ |
e7f4dc35 | 239 | int irq[PHY_MAX_ADDR]; |
69226896 RQ |
240 | |
241 | /* GPIO reset pulse width in microseconds */ | |
242 | int reset_delay_us; | |
d396e84c SS |
243 | /* RESET GPIO descriptor pointer */ |
244 | struct gpio_desc *reset_gpiod; | |
00db8189 | 245 | }; |
46abc021 | 246 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 247 | |
eb8a54a7 TT |
248 | struct mii_bus *mdiobus_alloc_size(size_t); |
249 | static inline struct mii_bus *mdiobus_alloc(void) | |
250 | { | |
251 | return mdiobus_alloc_size(0); | |
252 | } | |
253 | ||
3e3aaf64 RK |
254 | int __mdiobus_register(struct mii_bus *bus, struct module *owner); |
255 | #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) | |
2e888103 LB |
256 | void mdiobus_unregister(struct mii_bus *bus); |
257 | void mdiobus_free(struct mii_bus *bus); | |
6d48f44b GS |
258 | struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); |
259 | static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) | |
260 | { | |
261 | return devm_mdiobus_alloc_size(dev, 0); | |
262 | } | |
263 | ||
264 | void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); | |
2e888103 | 265 | struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); |
2e888103 | 266 | |
e8a2b6a4 AF |
267 | #define PHY_INTERRUPT_DISABLED 0x0 |
268 | #define PHY_INTERRUPT_ENABLED 0x80000000 | |
00db8189 AF |
269 | |
270 | /* PHY state machine states: | |
271 | * | |
272 | * DOWN: PHY device and driver are not ready for anything. probe | |
273 | * should be called if and only if the PHY is in this state, | |
274 | * given that the PHY device exists. | |
275 | * - PHY driver probe function will, depending on the PHY, set | |
276 | * the state to STARTING or READY | |
277 | * | |
278 | * STARTING: PHY device is coming up, and the ethernet driver is | |
279 | * not ready. PHY drivers may set this in the probe function. | |
280 | * If they do, they are responsible for making sure the state is | |
281 | * eventually set to indicate whether the PHY is UP or READY, | |
282 | * depending on the state when the PHY is done starting up. | |
283 | * - PHY driver will set the state to READY | |
284 | * - start will set the state to PENDING | |
285 | * | |
286 | * READY: PHY is ready to send and receive packets, but the | |
287 | * controller is not. By default, PHYs which do not implement | |
288 | * probe will be set to this state by phy_probe(). If the PHY | |
289 | * driver knows the PHY is ready, and the PHY state is STARTING, | |
290 | * then it sets this STATE. | |
291 | * - start will set the state to UP | |
292 | * | |
293 | * PENDING: PHY device is coming up, but the ethernet driver is | |
294 | * ready. phy_start will set this state if the PHY state is | |
295 | * STARTING. | |
296 | * - PHY driver will set the state to UP when the PHY is ready | |
297 | * | |
298 | * UP: The PHY and attached device are ready to do work. | |
299 | * Interrupts should be started here. | |
300 | * - timer moves to AN | |
301 | * | |
302 | * AN: The PHY is currently negotiating the link state. Link is | |
303 | * therefore down for now. phy_timer will set this state when it | |
304 | * detects the state is UP. config_aneg will set this state | |
305 | * whenever called with phydev->autoneg set to AUTONEG_ENABLE. | |
306 | * - If autonegotiation finishes, but there's no link, it sets | |
307 | * the state to NOLINK. | |
308 | * - If aneg finishes with link, it sets the state to RUNNING, | |
309 | * and calls adjust_link | |
310 | * - If autonegotiation did not finish after an arbitrary amount | |
311 | * of time, autonegotiation should be tried again if the PHY | |
312 | * supports "magic" autonegotiation (back to AN) | |
313 | * - If it didn't finish, and no magic_aneg, move to FORCING. | |
314 | * | |
315 | * NOLINK: PHY is up, but not currently plugged in. | |
316 | * - If the timer notes that the link comes back, we move to RUNNING | |
317 | * - config_aneg moves to AN | |
318 | * - phy_stop moves to HALTED | |
319 | * | |
320 | * FORCING: PHY is being configured with forced settings | |
321 | * - if link is up, move to RUNNING | |
322 | * - If link is down, we drop to the next highest setting, and | |
323 | * retry (FORCING) after a timeout | |
324 | * - phy_stop moves to HALTED | |
325 | * | |
326 | * RUNNING: PHY is currently up, running, and possibly sending | |
327 | * and/or receiving packets | |
328 | * - timer will set CHANGELINK if we're polling (this ensures the | |
329 | * link state is polled every other cycle of this state machine, | |
330 | * which makes it every other second) | |
331 | * - irq will set CHANGELINK | |
332 | * - config_aneg will set AN | |
333 | * - phy_stop moves to HALTED | |
334 | * | |
335 | * CHANGELINK: PHY experienced a change in link state | |
336 | * - timer moves to RUNNING if link | |
337 | * - timer moves to NOLINK if the link is down | |
338 | * - phy_stop moves to HALTED | |
339 | * | |
340 | * HALTED: PHY is up, but no polling or interrupts are done. Or | |
341 | * PHY is in an error state. | |
342 | * | |
343 | * - phy_start moves to RESUMING | |
344 | * | |
345 | * RESUMING: PHY was halted, but now wants to run again. | |
346 | * - If we are forcing, or aneg is done, timer moves to RUNNING | |
347 | * - If aneg is not done, timer moves to AN | |
348 | * - phy_stop moves to HALTED | |
349 | */ | |
350 | enum phy_state { | |
4017b4d3 | 351 | PHY_DOWN = 0, |
00db8189 AF |
352 | PHY_STARTING, |
353 | PHY_READY, | |
354 | PHY_PENDING, | |
355 | PHY_UP, | |
356 | PHY_AN, | |
357 | PHY_RUNNING, | |
358 | PHY_NOLINK, | |
359 | PHY_FORCING, | |
360 | PHY_CHANGELINK, | |
361 | PHY_HALTED, | |
362 | PHY_RESUMING | |
363 | }; | |
364 | ||
ac28b9f8 DD |
365 | /** |
366 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
367 | * @devices_in_package: Bit vector of devices present. | |
368 | * @device_ids: The device identifer for each present device. | |
369 | */ | |
370 | struct phy_c45_device_ids { | |
371 | u32 devices_in_package; | |
372 | u32 device_ids[8]; | |
373 | }; | |
c1f19b51 | 374 | |
00db8189 AF |
375 | /* phy_device: An instance of a PHY |
376 | * | |
377 | * drv: Pointer to the driver for this PHY instance | |
00db8189 | 378 | * phy_id: UID for this device found during discovery |
ac28b9f8 DD |
379 | * c45_ids: 802.3-c45 Device Identifers if is_c45. |
380 | * is_c45: Set to true if this phy uses clause 45 addressing. | |
4284b6a5 | 381 | * is_internal: Set to true if this phy is internal to a MAC. |
5a11dd7d | 382 | * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. |
aae88261 | 383 | * has_fixups: Set to true if this phy has fixups/quirks. |
8a477a6f | 384 | * suspended: Set to true if this phy has been suspended successfully. |
a3995460 | 385 | * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. |
f0f9b4ed | 386 | * loopback_enabled: Set true if this phy has been loopbacked successfully. |
00db8189 AF |
387 | * state: state of the PHY for management purposes |
388 | * dev_flags: Device-specific flags used by the PHY driver. | |
00db8189 AF |
389 | * link_timeout: The number of timer firings to wait before the |
390 | * giving up on the current attempt at acquiring a link | |
391 | * irq: IRQ number of the PHY's interrupt (-1 if none) | |
392 | * phy_timer: The timer for handling the state machine | |
664fcf12 | 393 | * phy_queue: A work_queue for the phy_mac_interrupt |
00db8189 AF |
394 | * attached_dev: The attached enet driver's device instance ptr |
395 | * adjust_link: Callback for the enet controller to respond to | |
396 | * changes in the link state. | |
00db8189 | 397 | * |
114002bc FF |
398 | * speed, duplex, pause, supported, advertising, lp_advertising, |
399 | * and autoneg are used like in mii_if_info | |
00db8189 AF |
400 | * |
401 | * interrupts currently only supports enabled or disabled, | |
402 | * but could be changed in the future to support enabling | |
403 | * and disabling specific interrupts | |
404 | * | |
405 | * Contains some infrastructure for polling and interrupt | |
406 | * handling, as well as handling shifts in PHY hardware state | |
407 | */ | |
408 | struct phy_device { | |
e5a03bfd AL |
409 | struct mdio_device mdio; |
410 | ||
00db8189 AF |
411 | /* Information about the PHY type */ |
412 | /* And management functions */ | |
413 | struct phy_driver *drv; | |
414 | ||
00db8189 AF |
415 | u32 phy_id; |
416 | ||
ac28b9f8 | 417 | struct phy_c45_device_ids c45_ids; |
87e5808d HK |
418 | unsigned is_c45:1; |
419 | unsigned is_internal:1; | |
420 | unsigned is_pseudo_fixed_link:1; | |
421 | unsigned has_fixups:1; | |
422 | unsigned suspended:1; | |
423 | unsigned sysfs_links:1; | |
424 | unsigned loopback_enabled:1; | |
425 | ||
426 | unsigned autoneg:1; | |
427 | /* The most recently read link state */ | |
428 | unsigned link:1; | |
ac28b9f8 | 429 | |
00db8189 AF |
430 | enum phy_state state; |
431 | ||
432 | u32 dev_flags; | |
433 | ||
e8a2b6a4 AF |
434 | phy_interface_t interface; |
435 | ||
c5e38a94 AF |
436 | /* |
437 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
438 | * partner speed & duplex & pause (autoneg) |
439 | */ | |
440 | int speed; | |
441 | int duplex; | |
442 | int pause; | |
443 | int asym_pause; | |
444 | ||
00db8189 AF |
445 | /* Enabled Interrupts */ |
446 | u32 interrupts; | |
447 | ||
448 | /* Union of PHY and Attached devices' supported modes */ | |
449 | /* See mii.h for more info */ | |
450 | u32 supported; | |
451 | u32 advertising; | |
114002bc | 452 | u32 lp_advertising; |
00db8189 | 453 | |
d853d145 | 454 | /* Energy efficient ethernet modes which should be prohibited */ |
455 | u32 eee_broken_modes; | |
456 | ||
00db8189 AF |
457 | int link_timeout; |
458 | ||
2e0bc452 ZB |
459 | #ifdef CONFIG_LED_TRIGGER_PHY |
460 | struct phy_led_trigger *phy_led_triggers; | |
461 | unsigned int phy_num_led_triggers; | |
462 | struct phy_led_trigger *last_triggered; | |
3928ee64 MS |
463 | |
464 | struct phy_led_trigger *led_link_trigger; | |
2e0bc452 ZB |
465 | #endif |
466 | ||
c5e38a94 AF |
467 | /* |
468 | * Interrupt number for this PHY | |
469 | * -1 means no interrupt | |
470 | */ | |
00db8189 AF |
471 | int irq; |
472 | ||
473 | /* private data pointer */ | |
474 | /* For use by PHYs to maintain extra state */ | |
475 | void *priv; | |
476 | ||
477 | /* Interrupt and Polling infrastructure */ | |
478 | struct work_struct phy_queue; | |
a390d1f3 | 479 | struct delayed_work state_queue; |
00db8189 | 480 | |
35b5f6b1 | 481 | struct mutex lock; |
00db8189 | 482 | |
9525ae83 | 483 | struct phylink *phylink; |
00db8189 AF |
484 | struct net_device *attached_dev; |
485 | ||
634ec36c | 486 | u8 mdix; |
f4ed2fe3 | 487 | u8 mdix_ctrl; |
634ec36c | 488 | |
a81497be | 489 | void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); |
00db8189 | 490 | void (*adjust_link)(struct net_device *dev); |
00db8189 | 491 | }; |
e5a03bfd AL |
492 | #define to_phy_device(d) container_of(to_mdio_device(d), \ |
493 | struct phy_device, mdio) | |
00db8189 AF |
494 | |
495 | /* struct phy_driver: Driver structure for a particular PHY type | |
496 | * | |
a9049e0c | 497 | * driver_data: static driver data |
00db8189 AF |
498 | * phy_id: The result of reading the UID registers of this PHY |
499 | * type, and ANDing them with the phy_id_mask. This driver | |
500 | * only works for PHYs with IDs which match this field | |
501 | * name: The friendly name of this PHY type | |
502 | * phy_id_mask: Defines the important bits of the phy_id | |
503 | * features: A list of features (speed, duplex, etc) supported | |
504 | * by this PHY | |
505 | * flags: A bitfield defining certain other features this PHY | |
506 | * supports (like interrupts) | |
507 | * | |
00fde795 HK |
508 | * All functions are optional. If config_aneg or read_status |
509 | * are not implemented, the phy core uses the genphy versions. | |
510 | * Note that none of these functions should be called from | |
511 | * interrupt time. The goal is for the bus read/write functions | |
512 | * to be able to block when the bus transaction is happening, | |
513 | * and be freed up by an interrupt (The MPC85xx has this ability, | |
514 | * though it is not currently supported in the driver). | |
00db8189 AF |
515 | */ |
516 | struct phy_driver { | |
a9049e0c | 517 | struct mdio_driver_common mdiodrv; |
00db8189 AF |
518 | u32 phy_id; |
519 | char *name; | |
511e3036 | 520 | u32 phy_id_mask; |
719655a1 | 521 | const unsigned long * const features; |
00db8189 | 522 | u32 flags; |
860f6e9e | 523 | const void *driver_data; |
00db8189 | 524 | |
c5e38a94 | 525 | /* |
9df81dd7 FF |
526 | * Called to issue a PHY software reset |
527 | */ | |
528 | int (*soft_reset)(struct phy_device *phydev); | |
529 | ||
530 | /* | |
c5e38a94 AF |
531 | * Called to initialize the PHY, |
532 | * including after a reset | |
533 | */ | |
00db8189 AF |
534 | int (*config_init)(struct phy_device *phydev); |
535 | ||
c5e38a94 AF |
536 | /* |
537 | * Called during discovery. Used to set | |
538 | * up device-specific structures, if any | |
539 | */ | |
00db8189 AF |
540 | int (*probe)(struct phy_device *phydev); |
541 | ||
542 | /* PHY Power Management */ | |
543 | int (*suspend)(struct phy_device *phydev); | |
544 | int (*resume)(struct phy_device *phydev); | |
545 | ||
c5e38a94 AF |
546 | /* |
547 | * Configures the advertisement and resets | |
00db8189 AF |
548 | * autonegotiation if phydev->autoneg is on, |
549 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
550 | * if phydev->autoneg is off |
551 | */ | |
00db8189 AF |
552 | int (*config_aneg)(struct phy_device *phydev); |
553 | ||
76a423a3 FF |
554 | /* Determines the auto negotiation result */ |
555 | int (*aneg_done)(struct phy_device *phydev); | |
556 | ||
00db8189 AF |
557 | /* Determines the negotiated speed and duplex */ |
558 | int (*read_status)(struct phy_device *phydev); | |
559 | ||
560 | /* Clears any pending interrupts */ | |
561 | int (*ack_interrupt)(struct phy_device *phydev); | |
562 | ||
563 | /* Enables or disables interrupts */ | |
564 | int (*config_intr)(struct phy_device *phydev); | |
565 | ||
a8729eb3 AG |
566 | /* |
567 | * Checks if the PHY generated an interrupt. | |
568 | * For multi-PHY devices with shared PHY interrupt pin | |
569 | */ | |
570 | int (*did_interrupt)(struct phy_device *phydev); | |
571 | ||
00db8189 AF |
572 | /* Clears up any memory if needed */ |
573 | void (*remove)(struct phy_device *phydev); | |
574 | ||
a30e2c18 DD |
575 | /* Returns true if this is a suitable driver for the given |
576 | * phydev. If NULL, matching is based on phy_id and | |
577 | * phy_id_mask. | |
578 | */ | |
579 | int (*match_phy_device)(struct phy_device *phydev); | |
580 | ||
c8f3a8c3 RC |
581 | /* Handles ethtool queries for hardware time stamping. */ |
582 | int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); | |
583 | ||
c1f19b51 RC |
584 | /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ |
585 | int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); | |
586 | ||
587 | /* | |
588 | * Requests a Rx timestamp for 'skb'. If the skb is accepted, | |
589 | * the phy driver promises to deliver it using netif_rx() as | |
590 | * soon as a timestamp becomes available. One of the | |
591 | * PTP_CLASS_ values is passed in 'type'. The function must | |
592 | * return true if the skb is accepted for delivery. | |
593 | */ | |
594 | bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
595 | ||
596 | /* | |
597 | * Requests a Tx timestamp for 'skb'. The phy driver promises | |
da92b194 | 598 | * to deliver it using skb_complete_tx_timestamp() as soon as a |
c1f19b51 RC |
599 | * timestamp becomes available. One of the PTP_CLASS_ values |
600 | * is passed in 'type'. | |
601 | */ | |
602 | void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
603 | ||
42e836eb MS |
604 | /* Some devices (e.g. qnap TS-119P II) require PHY register changes to |
605 | * enable Wake on LAN, so set_wol is provided to be called in the | |
606 | * ethernet driver's set_wol function. */ | |
607 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
608 | ||
609 | /* See set_wol, but for checking whether Wake on LAN is enabled. */ | |
610 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
611 | ||
2b8f2a28 DM |
612 | /* |
613 | * Called to inform a PHY device driver when the core is about to | |
614 | * change the link state. This callback is supposed to be used as | |
615 | * fixup hook for drivers that need to take action when the link | |
616 | * state changes. Drivers are by no means allowed to mess with the | |
617 | * PHY device structure in their implementations. | |
618 | */ | |
619 | void (*link_change_notify)(struct phy_device *dev); | |
620 | ||
1ee6b9bc RK |
621 | /* |
622 | * Phy specific driver override for reading a MMD register. | |
623 | * This function is optional for PHY specific drivers. When | |
624 | * not provided, the default MMD read function will be used | |
625 | * by phy_read_mmd(), which will use either a direct read for | |
626 | * Clause 45 PHYs or an indirect read for Clause 22 PHYs. | |
627 | * devnum is the MMD device number within the PHY device, | |
628 | * regnum is the register within the selected MMD device. | |
629 | */ | |
630 | int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); | |
631 | ||
632 | /* | |
633 | * Phy specific driver override for writing a MMD register. | |
634 | * This function is optional for PHY specific drivers. When | |
635 | * not provided, the default MMD write function will be used | |
636 | * by phy_write_mmd(), which will use either a direct write for | |
637 | * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. | |
638 | * devnum is the MMD device number within the PHY device, | |
639 | * regnum is the register within the selected MMD device. | |
640 | * val is the value to be written. | |
641 | */ | |
642 | int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, | |
643 | u16 val); | |
644 | ||
78ffc4ac RK |
645 | int (*read_page)(struct phy_device *dev); |
646 | int (*write_page)(struct phy_device *dev, int page); | |
647 | ||
2f438366 ES |
648 | /* Get the size and type of the eeprom contained within a plug-in |
649 | * module */ | |
650 | int (*module_info)(struct phy_device *dev, | |
651 | struct ethtool_modinfo *modinfo); | |
652 | ||
653 | /* Get the eeprom information from the plug-in module */ | |
654 | int (*module_eeprom)(struct phy_device *dev, | |
655 | struct ethtool_eeprom *ee, u8 *data); | |
656 | ||
f3a40945 AL |
657 | /* Get statistics from the phy using ethtool */ |
658 | int (*get_sset_count)(struct phy_device *dev); | |
659 | void (*get_strings)(struct phy_device *dev, u8 *data); | |
660 | void (*get_stats)(struct phy_device *dev, | |
661 | struct ethtool_stats *stats, u64 *data); | |
968ad9da RL |
662 | |
663 | /* Get and Set PHY tunables */ | |
664 | int (*get_tunable)(struct phy_device *dev, | |
665 | struct ethtool_tunable *tuna, void *data); | |
666 | int (*set_tunable)(struct phy_device *dev, | |
667 | struct ethtool_tunable *tuna, | |
668 | const void *data); | |
f0f9b4ed | 669 | int (*set_loopback)(struct phy_device *dev, bool enable); |
00db8189 | 670 | }; |
a9049e0c AL |
671 | #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ |
672 | struct phy_driver, mdiodrv) | |
00db8189 | 673 | |
f62220d3 AF |
674 | #define PHY_ANY_ID "MATCH ANY PHY" |
675 | #define PHY_ANY_UID 0xffffffff | |
676 | ||
677 | /* A Structure for boards to register fixups with the PHY Lib */ | |
678 | struct phy_fixup { | |
679 | struct list_head list; | |
4567d686 | 680 | char bus_id[MII_BUS_ID_SIZE + 3]; |
f62220d3 AF |
681 | u32 phy_uid; |
682 | u32 phy_uid_mask; | |
683 | int (*run)(struct phy_device *phydev); | |
684 | }; | |
685 | ||
da4625ac RK |
686 | const char *phy_speed_to_str(int speed); |
687 | const char *phy_duplex_to_str(unsigned int duplex); | |
688 | ||
0ccb4fc6 RK |
689 | /* A structure for mapping a particular speed and duplex |
690 | * combination to a particular SUPPORTED and ADVERTISED value | |
691 | */ | |
692 | struct phy_setting { | |
693 | u32 speed; | |
694 | u8 duplex; | |
695 | u8 bit; | |
696 | }; | |
697 | ||
698 | const struct phy_setting * | |
699 | phy_lookup_setting(int speed, int duplex, const unsigned long *mask, | |
700 | size_t maxbit, bool exact); | |
701 | size_t phy_speeds(unsigned int *speeds, size_t size, | |
702 | unsigned long *mask, size_t maxbit); | |
703 | ||
8c5e850c RK |
704 | void phy_resolve_aneg_linkmode(struct phy_device *phydev); |
705 | ||
efabdfb9 AF |
706 | /** |
707 | * phy_read_mmd - Convenience function for reading a register | |
708 | * from an MMD on a given PHY. | |
709 | * @phydev: The phy_device struct | |
710 | * @devad: The MMD to read from | |
711 | * @regnum: The register on the MMD to read | |
712 | * | |
713 | * Same rules as for phy_read(); | |
714 | */ | |
9860118b | 715 | int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); |
efabdfb9 | 716 | |
2e888103 LB |
717 | /** |
718 | * phy_read - Convenience function for reading a given PHY register | |
719 | * @phydev: the phy_device struct | |
720 | * @regnum: register number to read | |
721 | * | |
722 | * NOTE: MUST NOT be called from interrupt context, | |
723 | * because the bus read/write functions may wait for an interrupt | |
724 | * to conclude the operation. | |
725 | */ | |
abf35df2 | 726 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 | 727 | { |
e5a03bfd | 728 | return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); |
2e888103 LB |
729 | } |
730 | ||
788f9933 RK |
731 | /** |
732 | * __phy_read - convenience function for reading a given PHY register | |
733 | * @phydev: the phy_device struct | |
734 | * @regnum: register number to read | |
735 | * | |
736 | * The caller must have taken the MDIO bus lock. | |
737 | */ | |
738 | static inline int __phy_read(struct phy_device *phydev, u32 regnum) | |
739 | { | |
740 | return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); | |
741 | } | |
742 | ||
2e888103 LB |
743 | /** |
744 | * phy_write - Convenience function for writing a given PHY register | |
745 | * @phydev: the phy_device struct | |
746 | * @regnum: register number to write | |
747 | * @val: value to write to @regnum | |
748 | * | |
749 | * NOTE: MUST NOT be called from interrupt context, | |
750 | * because the bus read/write functions may wait for an interrupt | |
751 | * to conclude the operation. | |
752 | */ | |
abf35df2 | 753 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 | 754 | { |
e5a03bfd | 755 | return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); |
2e888103 LB |
756 | } |
757 | ||
788f9933 RK |
758 | /** |
759 | * __phy_write - Convenience function for writing a given PHY register | |
760 | * @phydev: the phy_device struct | |
761 | * @regnum: register number to write | |
762 | * @val: value to write to @regnum | |
763 | * | |
764 | * The caller must have taken the MDIO bus lock. | |
765 | */ | |
766 | static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) | |
767 | { | |
768 | return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, | |
769 | val); | |
770 | } | |
771 | ||
772 | int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); | |
2b74e5be | 773 | int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
788f9933 | 774 | |
ac8322d8 HK |
775 | /** |
776 | * __phy_set_bits - Convenience function for setting bits in a PHY register | |
777 | * @phydev: the phy_device struct | |
778 | * @regnum: register number to write | |
779 | * @val: bits to set | |
780 | * | |
781 | * The caller must have taken the MDIO bus lock. | |
782 | */ | |
783 | static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
784 | { | |
785 | return __phy_modify(phydev, regnum, 0, val); | |
786 | } | |
787 | ||
788 | /** | |
789 | * __phy_clear_bits - Convenience function for clearing bits in a PHY register | |
790 | * @phydev: the phy_device struct | |
791 | * @regnum: register number to write | |
792 | * @val: bits to clear | |
793 | * | |
794 | * The caller must have taken the MDIO bus lock. | |
795 | */ | |
796 | static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, | |
797 | u16 val) | |
798 | { | |
799 | return __phy_modify(phydev, regnum, val, 0); | |
800 | } | |
801 | ||
802 | /** | |
803 | * phy_set_bits - Convenience function for setting bits in a PHY register | |
804 | * @phydev: the phy_device struct | |
805 | * @regnum: register number to write | |
806 | * @val: bits to set | |
807 | */ | |
808 | static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
809 | { | |
810 | return phy_modify(phydev, regnum, 0, val); | |
811 | } | |
812 | ||
813 | /** | |
814 | * phy_clear_bits - Convenience function for clearing bits in a PHY register | |
815 | * @phydev: the phy_device struct | |
816 | * @regnum: register number to write | |
817 | * @val: bits to clear | |
818 | */ | |
819 | static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
820 | { | |
821 | return phy_modify(phydev, regnum, val, 0); | |
822 | } | |
823 | ||
2c7b4921 FF |
824 | /** |
825 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
826 | * @phydev: the phy_device struct | |
827 | * | |
828 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
829 | * PHY_IGNORE_INTERRUPT | |
830 | */ | |
831 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
832 | { | |
833 | return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; | |
834 | } | |
835 | ||
3c507b8a HK |
836 | /** |
837 | * phy_polling_mode - Convenience function for testing whether polling is | |
838 | * used to detect PHY status changes | |
839 | * @phydev: the phy_device struct | |
840 | */ | |
841 | static inline bool phy_polling_mode(struct phy_device *phydev) | |
842 | { | |
843 | return phydev->irq == PHY_POLL; | |
844 | } | |
845 | ||
4284b6a5 FF |
846 | /** |
847 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
848 | * @phydev: the phy_device struct | |
849 | */ | |
850 | static inline bool phy_is_internal(struct phy_device *phydev) | |
851 | { | |
852 | return phydev->is_internal; | |
853 | } | |
854 | ||
32d0f783 IS |
855 | /** |
856 | * phy_interface_mode_is_rgmii - Convenience function for testing if a | |
857 | * PHY interface mode is RGMII (all variants) | |
858 | * @mode: the phy_interface_t enum | |
859 | */ | |
860 | static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) | |
861 | { | |
862 | return mode >= PHY_INTERFACE_MODE_RGMII && | |
863 | mode <= PHY_INTERFACE_MODE_RGMII_TXID; | |
864 | }; | |
865 | ||
365c1e64 RK |
866 | /** |
867 | * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z | |
868 | * negotiation | |
869 | * @mode: one of &enum phy_interface_t | |
870 | * | |
871 | * Returns true if the phy interface mode uses the 16-bit negotiation | |
872 | * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) | |
873 | */ | |
874 | static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) | |
875 | { | |
876 | return mode == PHY_INTERFACE_MODE_1000BASEX || | |
877 | mode == PHY_INTERFACE_MODE_2500BASEX; | |
878 | } | |
879 | ||
e463d88c FF |
880 | /** |
881 | * phy_interface_is_rgmii - Convenience function for testing if a PHY interface | |
882 | * is RGMII (all variants) | |
883 | * @phydev: the phy_device struct | |
884 | */ | |
885 | static inline bool phy_interface_is_rgmii(struct phy_device *phydev) | |
886 | { | |
32d0f783 | 887 | return phy_interface_mode_is_rgmii(phydev->interface); |
5a11dd7d FF |
888 | }; |
889 | ||
890 | /* | |
891 | * phy_is_pseudo_fixed_link - Convenience function for testing if this | |
892 | * PHY is the CPU port facing side of an Ethernet switch, or similar. | |
893 | * @phydev: the phy_device struct | |
894 | */ | |
895 | static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) | |
896 | { | |
897 | return phydev->is_pseudo_fixed_link; | |
e463d88c FF |
898 | } |
899 | ||
efabdfb9 AF |
900 | /** |
901 | * phy_write_mmd - Convenience function for writing a register | |
902 | * on an MMD on a given PHY. | |
903 | * @phydev: The phy_device struct | |
904 | * @devad: The MMD to read from | |
905 | * @regnum: The register on the MMD to read | |
906 | * @val: value to write to @regnum | |
907 | * | |
908 | * Same rules as for phy_write(); | |
909 | */ | |
9860118b | 910 | int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); |
efabdfb9 | 911 | |
78ffc4ac RK |
912 | int phy_save_page(struct phy_device *phydev); |
913 | int phy_select_page(struct phy_device *phydev, int page); | |
914 | int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); | |
915 | int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); | |
916 | int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); | |
917 | int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, | |
918 | u16 mask, u16 set); | |
919 | ||
ac28b9f8 | 920 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, |
4017b4d3 SS |
921 | bool is_c45, |
922 | struct phy_c45_device_ids *c45_ids); | |
90eff909 | 923 | #if IS_ENABLED(CONFIG_PHYLIB) |
ac28b9f8 | 924 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 925 | int phy_device_register(struct phy_device *phy); |
90eff909 FF |
926 | void phy_device_free(struct phy_device *phydev); |
927 | #else | |
928 | static inline | |
929 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) | |
930 | { | |
931 | return NULL; | |
932 | } | |
933 | ||
934 | static inline int phy_device_register(struct phy_device *phy) | |
935 | { | |
936 | return 0; | |
937 | } | |
938 | ||
939 | static inline void phy_device_free(struct phy_device *phydev) { } | |
940 | #endif /* CONFIG_PHYLIB */ | |
38737e49 | 941 | void phy_device_remove(struct phy_device *phydev); |
2f5cb434 | 942 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
943 | int phy_suspend(struct phy_device *phydev); |
944 | int phy_resume(struct phy_device *phydev); | |
9c2c2e62 | 945 | int __phy_resume(struct phy_device *phydev); |
f0f9b4ed | 946 | int phy_loopback(struct phy_device *phydev, bool enable); |
4017b4d3 SS |
947 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
948 | phy_interface_t interface); | |
f8f76db1 | 949 | struct phy_device *phy_find_first(struct mii_bus *bus); |
257184d7 AF |
950 | int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, |
951 | u32 flags, phy_interface_t interface); | |
fa94f6d9 | 952 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
953 | void (*handler)(struct net_device *), |
954 | phy_interface_t interface); | |
955 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
956 | void (*handler)(struct net_device *), | |
957 | phy_interface_t interface); | |
e1393456 AF |
958 | void phy_disconnect(struct phy_device *phydev); |
959 | void phy_detach(struct phy_device *phydev); | |
960 | void phy_start(struct phy_device *phydev); | |
961 | void phy_stop(struct phy_device *phydev); | |
962 | int phy_start_aneg(struct phy_device *phydev); | |
372788f9 | 963 | int phy_aneg_done(struct phy_device *phydev); |
2b9672dd HK |
964 | int phy_speed_down(struct phy_device *phydev, bool sync); |
965 | int phy_speed_up(struct phy_device *phydev); | |
e1393456 | 966 | |
e1393456 | 967 | int phy_stop_interrupts(struct phy_device *phydev); |
002ba705 | 968 | int phy_restart_aneg(struct phy_device *phydev); |
a9668491 | 969 | int phy_reset_after_clk_enable(struct phy_device *phydev); |
00db8189 | 970 | |
bafbdd52 SS |
971 | static inline void phy_device_reset(struct phy_device *phydev, int value) |
972 | { | |
973 | mdio_device_reset(&phydev->mdio, value); | |
974 | } | |
975 | ||
72ba48be | 976 | #define phydev_err(_phydev, format, args...) \ |
e5a03bfd | 977 | dev_err(&_phydev->mdio.dev, format, ##args) |
72ba48be | 978 | |
c4fabb8b AL |
979 | #define phydev_info(_phydev, format, args...) \ |
980 | dev_info(&_phydev->mdio.dev, format, ##args) | |
981 | ||
ab2a605f AL |
982 | #define phydev_warn(_phydev, format, args...) \ |
983 | dev_warn(&_phydev->mdio.dev, format, ##args) | |
984 | ||
72ba48be | 985 | #define phydev_dbg(_phydev, format, args...) \ |
2eaa38d9 | 986 | dev_dbg(&_phydev->mdio.dev, format, ##args) |
72ba48be | 987 | |
84eff6d1 AL |
988 | static inline const char *phydev_name(const struct phy_device *phydev) |
989 | { | |
e5a03bfd | 990 | return dev_name(&phydev->mdio.dev); |
84eff6d1 AL |
991 | } |
992 | ||
2220943a AL |
993 | void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) |
994 | __printf(2, 3); | |
995 | void phy_attached_info(struct phy_device *phydev); | |
5acde34a RK |
996 | |
997 | /* Clause 22 PHY */ | |
af6b6967 | 998 | int genphy_config_init(struct phy_device *phydev); |
3fb69bca | 999 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 AF |
1000 | int genphy_restart_aneg(struct phy_device *phydev); |
1001 | int genphy_config_aneg(struct phy_device *phydev); | |
a9fa6e6a | 1002 | int genphy_aneg_done(struct phy_device *phydev); |
00db8189 AF |
1003 | int genphy_update_link(struct phy_device *phydev); |
1004 | int genphy_read_status(struct phy_device *phydev); | |
0f0ca340 GC |
1005 | int genphy_suspend(struct phy_device *phydev); |
1006 | int genphy_resume(struct phy_device *phydev); | |
f0f9b4ed | 1007 | int genphy_loopback(struct phy_device *phydev, bool enable); |
797ac071 | 1008 | int genphy_soft_reset(struct phy_device *phydev); |
0878fff1 FF |
1009 | static inline int genphy_no_soft_reset(struct phy_device *phydev) |
1010 | { | |
1011 | return 0; | |
1012 | } | |
5df7af85 KH |
1013 | int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, |
1014 | u16 regnum); | |
1015 | int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, | |
1016 | u16 regnum, u16 val); | |
5acde34a RK |
1017 | |
1018 | /* Clause 45 PHY */ | |
1019 | int genphy_c45_restart_aneg(struct phy_device *phydev); | |
1020 | int genphy_c45_aneg_done(struct phy_device *phydev); | |
1021 | int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask); | |
1022 | int genphy_c45_read_lpa(struct phy_device *phydev); | |
1023 | int genphy_c45_read_pma(struct phy_device *phydev); | |
1024 | int genphy_c45_pma_setup_forced(struct phy_device *phydev); | |
1025 | int genphy_c45_an_disable_aneg(struct phy_device *phydev); | |
ea4efe25 | 1026 | int genphy_c45_read_mdix(struct phy_device *phydev); |
5acde34a | 1027 | |
e8a714e0 FF |
1028 | /* The gen10g_* functions are the old Clause 45 stub */ |
1029 | int gen10g_config_aneg(struct phy_device *phydev); | |
1030 | int gen10g_read_status(struct phy_device *phydev); | |
1031 | int gen10g_no_soft_reset(struct phy_device *phydev); | |
1032 | int gen10g_config_init(struct phy_device *phydev); | |
1033 | int gen10g_suspend(struct phy_device *phydev); | |
1034 | int gen10g_resume(struct phy_device *phydev); | |
1035 | ||
00fde795 HK |
1036 | static inline int phy_read_status(struct phy_device *phydev) |
1037 | { | |
1038 | if (!phydev->drv) | |
1039 | return -EIO; | |
1040 | ||
1041 | if (phydev->drv->read_status) | |
1042 | return phydev->drv->read_status(phydev); | |
1043 | else | |
1044 | return genphy_read_status(phydev); | |
1045 | } | |
1046 | ||
00db8189 | 1047 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 1048 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
be01da72 AL |
1049 | int phy_driver_register(struct phy_driver *new_driver, struct module *owner); |
1050 | int phy_drivers_register(struct phy_driver *new_driver, int n, | |
1051 | struct module *owner); | |
4f9c85a1 | 1052 | void phy_state_machine(struct work_struct *work); |
664fcf12 | 1053 | void phy_change_work(struct work_struct *work); |
28b2e0d2 | 1054 | void phy_mac_interrupt(struct phy_device *phydev); |
29935aeb | 1055 | void phy_start_machine(struct phy_device *phydev); |
00db8189 | 1056 | void phy_stop_machine(struct phy_device *phydev); |
9f2959b6 | 1057 | void phy_trigger_machine(struct phy_device *phydev); |
00db8189 | 1058 | int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); |
5514174f | 1059 | void phy_ethtool_ksettings_get(struct phy_device *phydev, |
1060 | struct ethtool_link_ksettings *cmd); | |
2d55173e PR |
1061 | int phy_ethtool_ksettings_set(struct phy_device *phydev, |
1062 | const struct ethtool_link_ksettings *cmd); | |
4017b4d3 | 1063 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
e1393456 AF |
1064 | int phy_start_interrupts(struct phy_device *phydev); |
1065 | void phy_print_status(struct phy_device *phydev); | |
f3a6bd39 | 1066 | int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); |
41124fa6 | 1067 | void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); |
c306ad36 | 1068 | void phy_support_sym_pause(struct phy_device *phydev); |
af8d9bb2 | 1069 | void phy_support_asym_pause(struct phy_device *phydev); |
0c122405 AL |
1070 | void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, |
1071 | bool autoneg); | |
70814e81 | 1072 | void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); |
22b7d299 AL |
1073 | bool phy_validate_pause(struct phy_device *phydev, |
1074 | struct ethtool_pauseparam *pp); | |
00db8189 | 1075 | |
f62220d3 | 1076 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1077 | int (*run)(struct phy_device *)); |
f62220d3 | 1078 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 1079 | int (*run)(struct phy_device *)); |
f62220d3 | 1080 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1081 | int (*run)(struct phy_device *)); |
f62220d3 | 1082 | |
f38e7a32 WH |
1083 | int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); |
1084 | int phy_unregister_fixup_for_id(const char *bus_id); | |
1085 | int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); | |
1086 | ||
a59a4d19 GC |
1087 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
1088 | int phy_get_eee_err(struct phy_device *phydev); | |
1089 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
1090 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
42e836eb | 1091 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
1092 | void phy_ethtool_get_wol(struct phy_device *phydev, |
1093 | struct ethtool_wolinfo *wol); | |
9d9a77ce PR |
1094 | int phy_ethtool_get_link_ksettings(struct net_device *ndev, |
1095 | struct ethtool_link_ksettings *cmd); | |
1096 | int phy_ethtool_set_link_ksettings(struct net_device *ndev, | |
1097 | const struct ethtool_link_ksettings *cmd); | |
e86a8987 | 1098 | int phy_ethtool_nway_reset(struct net_device *ndev); |
a59a4d19 | 1099 | |
90eff909 | 1100 | #if IS_ENABLED(CONFIG_PHYLIB) |
9b9a8bfc AF |
1101 | int __init mdio_bus_init(void); |
1102 | void mdio_bus_exit(void); | |
9e8d438e FF |
1103 | #endif |
1104 | ||
1105 | /* Inline function for use within net/core/ethtool.c (built-in) */ | |
1106 | static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) | |
c59530d0 | 1107 | { |
9e8d438e FF |
1108 | if (!phydev->drv) |
1109 | return -EIO; | |
1110 | ||
1111 | mutex_lock(&phydev->lock); | |
1112 | phydev->drv->get_strings(phydev, data); | |
1113 | mutex_unlock(&phydev->lock); | |
1114 | ||
1115 | return 0; | |
c59530d0 FF |
1116 | } |
1117 | ||
9e8d438e | 1118 | static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) |
c59530d0 | 1119 | { |
9e8d438e FF |
1120 | int ret; |
1121 | ||
1122 | if (!phydev->drv) | |
1123 | return -EIO; | |
1124 | ||
1125 | if (phydev->drv->get_sset_count && | |
1126 | phydev->drv->get_strings && | |
1127 | phydev->drv->get_stats) { | |
1128 | mutex_lock(&phydev->lock); | |
1129 | ret = phydev->drv->get_sset_count(phydev); | |
1130 | mutex_unlock(&phydev->lock); | |
1131 | ||
1132 | return ret; | |
1133 | } | |
1134 | ||
c59530d0 FF |
1135 | return -EOPNOTSUPP; |
1136 | } | |
1137 | ||
9e8d438e FF |
1138 | static inline int phy_ethtool_get_stats(struct phy_device *phydev, |
1139 | struct ethtool_stats *stats, u64 *data) | |
c59530d0 | 1140 | { |
9e8d438e FF |
1141 | if (!phydev->drv) |
1142 | return -EIO; | |
1143 | ||
1144 | mutex_lock(&phydev->lock); | |
1145 | phydev->drv->get_stats(phydev, stats, data); | |
1146 | mutex_unlock(&phydev->lock); | |
1147 | ||
1148 | return 0; | |
c59530d0 | 1149 | } |
9b9a8bfc | 1150 | |
00db8189 | 1151 | extern struct bus_type mdio_bus_type; |
c31accd1 | 1152 | |
648ea013 FF |
1153 | struct mdio_board_info { |
1154 | const char *bus_id; | |
1155 | char modalias[MDIO_NAME_SIZE]; | |
1156 | int mdio_addr; | |
1157 | const void *platform_data; | |
1158 | }; | |
1159 | ||
90eff909 | 1160 | #if IS_ENABLED(CONFIG_MDIO_DEVICE) |
648ea013 FF |
1161 | int mdiobus_register_board_info(const struct mdio_board_info *info, |
1162 | unsigned int n); | |
1163 | #else | |
1164 | static inline int mdiobus_register_board_info(const struct mdio_board_info *i, | |
1165 | unsigned int n) | |
1166 | { | |
1167 | return 0; | |
1168 | } | |
1169 | #endif | |
1170 | ||
1171 | ||
c31accd1 JH |
1172 | /** |
1173 | * module_phy_driver() - Helper macro for registering PHY drivers | |
1174 | * @__phy_drivers: array of PHY drivers to register | |
1175 | * | |
1176 | * Helper macro for PHY drivers which do not do anything special in module | |
1177 | * init/exit. Each module may only use this macro once, and calling it | |
1178 | * replaces module_init() and module_exit(). | |
1179 | */ | |
1180 | #define phy_module_driver(__phy_drivers, __count) \ | |
1181 | static int __init phy_module_init(void) \ | |
1182 | { \ | |
be01da72 | 1183 | return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ |
c31accd1 JH |
1184 | } \ |
1185 | module_init(phy_module_init); \ | |
1186 | static void __exit phy_module_exit(void) \ | |
1187 | { \ | |
1188 | phy_drivers_unregister(__phy_drivers, __count); \ | |
1189 | } \ | |
1190 | module_exit(phy_module_exit) | |
1191 | ||
1192 | #define module_phy_driver(__phy_drivers) \ | |
1193 | phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) | |
1194 | ||
00db8189 | 1195 | #endif /* __PHY_H */ |