]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - include/linux/phy.h
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[mirror_ubuntu-artful-kernel.git] / include / linux / phy.h
CommitLineData
00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
bac83c65 22#include <linux/mdio.h>
13df29f6 23#include <linux/mii.h>
3e3aaf64 24#include <linux/module.h>
13df29f6
MR
25#include <linux/timer.h>
26#include <linux/workqueue.h>
8626d3b4 27#include <linux/mod_devicetable.h>
00db8189 28
60063497 29#include <linux/atomic.h>
0ac49527 30
e9fbdf17 31#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
00db8189
AF
32 SUPPORTED_TP | \
33 SUPPORTED_MII)
34
e9fbdf17
FF
35#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
36 SUPPORTED_10baseT_Full)
37
38#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
39 SUPPORTED_100baseT_Full)
40
41#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
00db8189
AF
42 SUPPORTED_1000baseT_Full)
43
e9fbdf17
FF
44#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
45 PHY_100BT_FEATURES | \
46 PHY_DEFAULT_FEATURES)
47
48#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
49 PHY_1000BT_FEATURES)
50
51
c5e38a94
AF
52/*
53 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
AF
54 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
55 * the attached driver handles the interrupt
56 */
57#define PHY_POLL -1
58#define PHY_IGNORE_INTERRUPT -2
59
60#define PHY_HAS_INTERRUPT 0x00000001
61#define PHY_HAS_MAGICANEG 0x00000002
4284b6a5 62#define PHY_IS_INTERNAL 0x00000004
a9049e0c 63#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 64
e8a2b6a4
AF
65/* Interface Mode definitions */
66typedef enum {
4157ef1b 67 PHY_INTERFACE_MODE_NA,
e8a2b6a4
AF
68 PHY_INTERFACE_MODE_MII,
69 PHY_INTERFACE_MODE_GMII,
70 PHY_INTERFACE_MODE_SGMII,
71 PHY_INTERFACE_MODE_TBI,
2cc70ba4 72 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
73 PHY_INTERFACE_MODE_RMII,
74 PHY_INTERFACE_MODE_RGMII,
a999589c 75 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
76 PHY_INTERFACE_MODE_RGMII_RXID,
77 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
78 PHY_INTERFACE_MODE_RTBI,
79 PHY_INTERFACE_MODE_SMII,
898dd0bd 80 PHY_INTERFACE_MODE_XGMII,
fd70f72c 81 PHY_INTERFACE_MODE_MOCA,
b9d12085 82 PHY_INTERFACE_MODE_QSGMII,
572de608 83 PHY_INTERFACE_MODE_TRGMII,
8a2fe56e 84 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
85} phy_interface_t;
86
1f9127ca
ZB
87/**
88 * phy_supported_speeds - return all speeds currently supported by a phy device
89 * @phy: The phy device to return supported speeds of.
90 * @speeds: buffer to store supported speeds in.
91 * @size: size of speeds buffer.
92 *
93 * Description: Returns the number of supported speeds, and
94 * fills the speeds * buffer with the supported speeds. If speeds buffer is
95 * too small to contain * all currently supported speeds, will return as
96 * many speeds as can fit.
97 */
98unsigned int phy_supported_speeds(struct phy_device *phy,
99 unsigned int *speeds,
100 unsigned int size);
101
8a2fe56e
FF
102/**
103 * It maps 'enum phy_interface_t' found in include/linux/phy.h
104 * into the device tree binding of 'phy-mode', so that Ethernet
105 * device driver can get phy interface from device tree.
106 */
107static inline const char *phy_modes(phy_interface_t interface)
108{
109 switch (interface) {
110 case PHY_INTERFACE_MODE_NA:
111 return "";
112 case PHY_INTERFACE_MODE_MII:
113 return "mii";
114 case PHY_INTERFACE_MODE_GMII:
115 return "gmii";
116 case PHY_INTERFACE_MODE_SGMII:
117 return "sgmii";
118 case PHY_INTERFACE_MODE_TBI:
119 return "tbi";
120 case PHY_INTERFACE_MODE_REVMII:
121 return "rev-mii";
122 case PHY_INTERFACE_MODE_RMII:
123 return "rmii";
124 case PHY_INTERFACE_MODE_RGMII:
125 return "rgmii";
126 case PHY_INTERFACE_MODE_RGMII_ID:
127 return "rgmii-id";
128 case PHY_INTERFACE_MODE_RGMII_RXID:
129 return "rgmii-rxid";
130 case PHY_INTERFACE_MODE_RGMII_TXID:
131 return "rgmii-txid";
132 case PHY_INTERFACE_MODE_RTBI:
133 return "rtbi";
134 case PHY_INTERFACE_MODE_SMII:
135 return "smii";
136 case PHY_INTERFACE_MODE_XGMII:
137 return "xgmii";
fd70f72c
FF
138 case PHY_INTERFACE_MODE_MOCA:
139 return "moca";
b9d12085
TP
140 case PHY_INTERFACE_MODE_QSGMII:
141 return "qsgmii";
572de608
SW
142 case PHY_INTERFACE_MODE_TRGMII:
143 return "trgmii";
8a2fe56e
FF
144 default:
145 return "unknown";
146 }
147}
148
00db8189 149
e8a2b6a4 150#define PHY_INIT_TIMEOUT 100000
00db8189
AF
151#define PHY_STATE_TIME 1
152#define PHY_FORCE_TIMEOUT 10
153#define PHY_AN_TIMEOUT 10
154
e8a2b6a4 155#define PHY_MAX_ADDR 32
00db8189 156
a4d00f17 157/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
9d9326d3
AF
158#define PHY_ID_FMT "%s:%02x"
159
4567d686 160#define MII_BUS_ID_SIZE 61
a4d00f17 161
abf35df2
JG
162/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
163 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
164#define MII_ADDR_C45 (1<<30)
165
313162d0
PG
166struct device;
167struct sk_buff;
168
c5e38a94
AF
169/*
170 * The Bus class for PHYs. Devices which provide access to
171 * PHYs should register using this structure
172 */
00db8189 173struct mii_bus {
3e3aaf64 174 struct module *owner;
00db8189 175 const char *name;
9d9326d3 176 char id[MII_BUS_ID_SIZE];
00db8189 177 void *priv;
ccaa953e
AL
178 int (*read)(struct mii_bus *bus, int addr, int regnum);
179 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
00db8189
AF
180 int (*reset)(struct mii_bus *bus);
181
c5e38a94
AF
182 /*
183 * A lock to ensure that only one thing can read/write
184 * the MDIO bus at a time
185 */
35b5f6b1 186 struct mutex mdio_lock;
00db8189 187
18ee49dd 188 struct device *parent;
46abc021
LB
189 enum {
190 MDIOBUS_ALLOCATED = 1,
191 MDIOBUS_REGISTERED,
192 MDIOBUS_UNREGISTERED,
193 MDIOBUS_RELEASED,
194 } state;
195 struct device dev;
00db8189
AF
196
197 /* list of all PHYs on bus */
7f854420 198 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 199
c6883996 200 /* PHY addresses to be ignored when probing */
f896424c
MP
201 u32 phy_mask;
202
922f2dd1
FF
203 /* PHY addresses to ignore the TA/read failure */
204 u32 phy_ignore_ta_mask;
205
c5e38a94 206 /*
e7f4dc35
AL
207 * An array of interrupts, each PHY's interrupt at the index
208 * matching its address
c5e38a94 209 */
e7f4dc35 210 int irq[PHY_MAX_ADDR];
00db8189 211};
46abc021 212#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 213
eb8a54a7
TT
214struct mii_bus *mdiobus_alloc_size(size_t);
215static inline struct mii_bus *mdiobus_alloc(void)
216{
217 return mdiobus_alloc_size(0);
218}
219
3e3aaf64
RK
220int __mdiobus_register(struct mii_bus *bus, struct module *owner);
221#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
2e888103
LB
222void mdiobus_unregister(struct mii_bus *bus);
223void mdiobus_free(struct mii_bus *bus);
6d48f44b
GS
224struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
225static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
226{
227 return devm_mdiobus_alloc_size(dev, 0);
228}
229
230void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 231struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 232
e8a2b6a4
AF
233#define PHY_INTERRUPT_DISABLED 0x0
234#define PHY_INTERRUPT_ENABLED 0x80000000
00db8189
AF
235
236/* PHY state machine states:
237 *
238 * DOWN: PHY device and driver are not ready for anything. probe
239 * should be called if and only if the PHY is in this state,
240 * given that the PHY device exists.
241 * - PHY driver probe function will, depending on the PHY, set
242 * the state to STARTING or READY
243 *
244 * STARTING: PHY device is coming up, and the ethernet driver is
245 * not ready. PHY drivers may set this in the probe function.
246 * If they do, they are responsible for making sure the state is
247 * eventually set to indicate whether the PHY is UP or READY,
248 * depending on the state when the PHY is done starting up.
249 * - PHY driver will set the state to READY
250 * - start will set the state to PENDING
251 *
252 * READY: PHY is ready to send and receive packets, but the
253 * controller is not. By default, PHYs which do not implement
254 * probe will be set to this state by phy_probe(). If the PHY
255 * driver knows the PHY is ready, and the PHY state is STARTING,
256 * then it sets this STATE.
257 * - start will set the state to UP
258 *
259 * PENDING: PHY device is coming up, but the ethernet driver is
260 * ready. phy_start will set this state if the PHY state is
261 * STARTING.
262 * - PHY driver will set the state to UP when the PHY is ready
263 *
264 * UP: The PHY and attached device are ready to do work.
265 * Interrupts should be started here.
266 * - timer moves to AN
267 *
268 * AN: The PHY is currently negotiating the link state. Link is
269 * therefore down for now. phy_timer will set this state when it
270 * detects the state is UP. config_aneg will set this state
271 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
272 * - If autonegotiation finishes, but there's no link, it sets
273 * the state to NOLINK.
274 * - If aneg finishes with link, it sets the state to RUNNING,
275 * and calls adjust_link
276 * - If autonegotiation did not finish after an arbitrary amount
277 * of time, autonegotiation should be tried again if the PHY
278 * supports "magic" autonegotiation (back to AN)
279 * - If it didn't finish, and no magic_aneg, move to FORCING.
280 *
281 * NOLINK: PHY is up, but not currently plugged in.
282 * - If the timer notes that the link comes back, we move to RUNNING
283 * - config_aneg moves to AN
284 * - phy_stop moves to HALTED
285 *
286 * FORCING: PHY is being configured with forced settings
287 * - if link is up, move to RUNNING
288 * - If link is down, we drop to the next highest setting, and
289 * retry (FORCING) after a timeout
290 * - phy_stop moves to HALTED
291 *
292 * RUNNING: PHY is currently up, running, and possibly sending
293 * and/or receiving packets
294 * - timer will set CHANGELINK if we're polling (this ensures the
295 * link state is polled every other cycle of this state machine,
296 * which makes it every other second)
297 * - irq will set CHANGELINK
298 * - config_aneg will set AN
299 * - phy_stop moves to HALTED
300 *
301 * CHANGELINK: PHY experienced a change in link state
302 * - timer moves to RUNNING if link
303 * - timer moves to NOLINK if the link is down
304 * - phy_stop moves to HALTED
305 *
306 * HALTED: PHY is up, but no polling or interrupts are done. Or
307 * PHY is in an error state.
308 *
309 * - phy_start moves to RESUMING
310 *
311 * RESUMING: PHY was halted, but now wants to run again.
312 * - If we are forcing, or aneg is done, timer moves to RUNNING
313 * - If aneg is not done, timer moves to AN
314 * - phy_stop moves to HALTED
315 */
316enum phy_state {
4017b4d3 317 PHY_DOWN = 0,
00db8189
AF
318 PHY_STARTING,
319 PHY_READY,
320 PHY_PENDING,
321 PHY_UP,
322 PHY_AN,
323 PHY_RUNNING,
324 PHY_NOLINK,
325 PHY_FORCING,
326 PHY_CHANGELINK,
327 PHY_HALTED,
328 PHY_RESUMING
329};
330
ac28b9f8
DD
331/**
332 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
333 * @devices_in_package: Bit vector of devices present.
334 * @device_ids: The device identifer for each present device.
335 */
336struct phy_c45_device_ids {
337 u32 devices_in_package;
338 u32 device_ids[8];
339};
c1f19b51 340
00db8189
AF
341/* phy_device: An instance of a PHY
342 *
343 * drv: Pointer to the driver for this PHY instance
00db8189 344 * phy_id: UID for this device found during discovery
ac28b9f8
DD
345 * c45_ids: 802.3-c45 Device Identifers if is_c45.
346 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 347 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 348 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 349 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 350 * suspended: Set to true if this phy has been suspended successfully.
00db8189
AF
351 * state: state of the PHY for management purposes
352 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
353 * link_timeout: The number of timer firings to wait before the
354 * giving up on the current attempt at acquiring a link
355 * irq: IRQ number of the PHY's interrupt (-1 if none)
356 * phy_timer: The timer for handling the state machine
664fcf12 357 * phy_queue: A work_queue for the phy_mac_interrupt
00db8189
AF
358 * attached_dev: The attached enet driver's device instance ptr
359 * adjust_link: Callback for the enet controller to respond to
360 * changes in the link state.
00db8189 361 *
114002bc
FF
362 * speed, duplex, pause, supported, advertising, lp_advertising,
363 * and autoneg are used like in mii_if_info
00db8189
AF
364 *
365 * interrupts currently only supports enabled or disabled,
366 * but could be changed in the future to support enabling
367 * and disabling specific interrupts
368 *
369 * Contains some infrastructure for polling and interrupt
370 * handling, as well as handling shifts in PHY hardware state
371 */
372struct phy_device {
e5a03bfd
AL
373 struct mdio_device mdio;
374
00db8189
AF
375 /* Information about the PHY type */
376 /* And management functions */
377 struct phy_driver *drv;
378
00db8189
AF
379 u32 phy_id;
380
ac28b9f8
DD
381 struct phy_c45_device_ids c45_ids;
382 bool is_c45;
4284b6a5 383 bool is_internal;
5a11dd7d 384 bool is_pseudo_fixed_link;
b0ae009f 385 bool has_fixups;
8a477a6f 386 bool suspended;
ac28b9f8 387
00db8189
AF
388 enum phy_state state;
389
390 u32 dev_flags;
391
e8a2b6a4
AF
392 phy_interface_t interface;
393
c5e38a94
AF
394 /*
395 * forced speed & duplex (no autoneg)
00db8189
AF
396 * partner speed & duplex & pause (autoneg)
397 */
398 int speed;
399 int duplex;
400 int pause;
401 int asym_pause;
402
403 /* The most recently read link state */
404 int link;
405
406 /* Enabled Interrupts */
407 u32 interrupts;
408
409 /* Union of PHY and Attached devices' supported modes */
410 /* See mii.h for more info */
411 u32 supported;
412 u32 advertising;
114002bc 413 u32 lp_advertising;
00db8189 414
d853d145 415 /* Energy efficient ethernet modes which should be prohibited */
416 u32 eee_broken_modes;
417
00db8189
AF
418 int autoneg;
419
420 int link_timeout;
421
2e0bc452
ZB
422#ifdef CONFIG_LED_TRIGGER_PHY
423 struct phy_led_trigger *phy_led_triggers;
424 unsigned int phy_num_led_triggers;
425 struct phy_led_trigger *last_triggered;
426#endif
427
c5e38a94
AF
428 /*
429 * Interrupt number for this PHY
430 * -1 means no interrupt
431 */
00db8189
AF
432 int irq;
433
434 /* private data pointer */
435 /* For use by PHYs to maintain extra state */
436 void *priv;
437
438 /* Interrupt and Polling infrastructure */
439 struct work_struct phy_queue;
a390d1f3 440 struct delayed_work state_queue;
0ac49527 441 atomic_t irq_disable;
00db8189 442
35b5f6b1 443 struct mutex lock;
00db8189
AF
444
445 struct net_device *attached_dev;
446
634ec36c 447 u8 mdix;
f4ed2fe3 448 u8 mdix_ctrl;
634ec36c 449
00db8189 450 void (*adjust_link)(struct net_device *dev);
00db8189 451};
e5a03bfd
AL
452#define to_phy_device(d) container_of(to_mdio_device(d), \
453 struct phy_device, mdio)
00db8189
AF
454
455/* struct phy_driver: Driver structure for a particular PHY type
456 *
a9049e0c 457 * driver_data: static driver data
00db8189
AF
458 * phy_id: The result of reading the UID registers of this PHY
459 * type, and ANDing them with the phy_id_mask. This driver
460 * only works for PHYs with IDs which match this field
461 * name: The friendly name of this PHY type
462 * phy_id_mask: Defines the important bits of the phy_id
463 * features: A list of features (speed, duplex, etc) supported
464 * by this PHY
465 * flags: A bitfield defining certain other features this PHY
466 * supports (like interrupts)
467 *
468 * The drivers must implement config_aneg and read_status. All
469 * other functions are optional. Note that none of these
470 * functions should be called from interrupt time. The goal is
471 * for the bus read/write functions to be able to block when the
472 * bus transaction is happening, and be freed up by an interrupt
473 * (The MPC85xx has this ability, though it is not currently
474 * supported in the driver).
475 */
476struct phy_driver {
a9049e0c 477 struct mdio_driver_common mdiodrv;
00db8189
AF
478 u32 phy_id;
479 char *name;
480 unsigned int phy_id_mask;
481 u32 features;
482 u32 flags;
860f6e9e 483 const void *driver_data;
00db8189 484
c5e38a94 485 /*
9df81dd7
FF
486 * Called to issue a PHY software reset
487 */
488 int (*soft_reset)(struct phy_device *phydev);
489
490 /*
c5e38a94
AF
491 * Called to initialize the PHY,
492 * including after a reset
493 */
00db8189
AF
494 int (*config_init)(struct phy_device *phydev);
495
c5e38a94
AF
496 /*
497 * Called during discovery. Used to set
498 * up device-specific structures, if any
499 */
00db8189
AF
500 int (*probe)(struct phy_device *phydev);
501
502 /* PHY Power Management */
503 int (*suspend)(struct phy_device *phydev);
504 int (*resume)(struct phy_device *phydev);
505
c5e38a94
AF
506 /*
507 * Configures the advertisement and resets
00db8189
AF
508 * autonegotiation if phydev->autoneg is on,
509 * forces the speed to the current settings in phydev
c5e38a94
AF
510 * if phydev->autoneg is off
511 */
00db8189
AF
512 int (*config_aneg)(struct phy_device *phydev);
513
76a423a3
FF
514 /* Determines the auto negotiation result */
515 int (*aneg_done)(struct phy_device *phydev);
516
00db8189
AF
517 /* Determines the negotiated speed and duplex */
518 int (*read_status)(struct phy_device *phydev);
519
520 /* Clears any pending interrupts */
521 int (*ack_interrupt)(struct phy_device *phydev);
522
523 /* Enables or disables interrupts */
524 int (*config_intr)(struct phy_device *phydev);
525
a8729eb3
AG
526 /*
527 * Checks if the PHY generated an interrupt.
528 * For multi-PHY devices with shared PHY interrupt pin
529 */
530 int (*did_interrupt)(struct phy_device *phydev);
531
00db8189
AF
532 /* Clears up any memory if needed */
533 void (*remove)(struct phy_device *phydev);
534
a30e2c18
DD
535 /* Returns true if this is a suitable driver for the given
536 * phydev. If NULL, matching is based on phy_id and
537 * phy_id_mask.
538 */
539 int (*match_phy_device)(struct phy_device *phydev);
540
c8f3a8c3
RC
541 /* Handles ethtool queries for hardware time stamping. */
542 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
543
c1f19b51
RC
544 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
545 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
546
547 /*
548 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
549 * the phy driver promises to deliver it using netif_rx() as
550 * soon as a timestamp becomes available. One of the
551 * PTP_CLASS_ values is passed in 'type'. The function must
552 * return true if the skb is accepted for delivery.
553 */
554 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
555
556 /*
557 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 558 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
559 * timestamp becomes available. One of the PTP_CLASS_ values
560 * is passed in 'type'.
561 */
562 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
563
42e836eb
MS
564 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
565 * enable Wake on LAN, so set_wol is provided to be called in the
566 * ethernet driver's set_wol function. */
567 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
568
569 /* See set_wol, but for checking whether Wake on LAN is enabled. */
570 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
571
2b8f2a28
DM
572 /*
573 * Called to inform a PHY device driver when the core is about to
574 * change the link state. This callback is supposed to be used as
575 * fixup hook for drivers that need to take action when the link
576 * state changes. Drivers are by no means allowed to mess with the
577 * PHY device structure in their implementations.
578 */
579 void (*link_change_notify)(struct phy_device *dev);
580
0c1d77df
VB
581 /* A function provided by a phy specific driver to override the
582 * the PHY driver framework support for reading a MMD register
583 * from the PHY. If not supported, return -1. This function is
584 * optional for PHY specific drivers, if not provided then the
585 * default MMD read function is used by the PHY framework.
586 */
587 int (*read_mmd_indirect)(struct phy_device *dev, int ptrad,
588 int devnum, int regnum);
589
590 /* A function provided by a phy specific driver to override the
591 * the PHY driver framework support for writing a MMD register
592 * from the PHY. This function is optional for PHY specific drivers,
593 * if not provided then the default MMD read function is used by
594 * the PHY framework.
595 */
596 void (*write_mmd_indirect)(struct phy_device *dev, int ptrad,
597 int devnum, int regnum, u32 val);
598
2f438366
ES
599 /* Get the size and type of the eeprom contained within a plug-in
600 * module */
601 int (*module_info)(struct phy_device *dev,
602 struct ethtool_modinfo *modinfo);
603
604 /* Get the eeprom information from the plug-in module */
605 int (*module_eeprom)(struct phy_device *dev,
606 struct ethtool_eeprom *ee, u8 *data);
607
f3a40945
AL
608 /* Get statistics from the phy using ethtool */
609 int (*get_sset_count)(struct phy_device *dev);
610 void (*get_strings)(struct phy_device *dev, u8 *data);
611 void (*get_stats)(struct phy_device *dev,
612 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
613
614 /* Get and Set PHY tunables */
615 int (*get_tunable)(struct phy_device *dev,
616 struct ethtool_tunable *tuna, void *data);
617 int (*set_tunable)(struct phy_device *dev,
618 struct ethtool_tunable *tuna,
619 const void *data);
00db8189 620};
a9049e0c
AL
621#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
622 struct phy_driver, mdiodrv)
00db8189 623
f62220d3
AF
624#define PHY_ANY_ID "MATCH ANY PHY"
625#define PHY_ANY_UID 0xffffffff
626
627/* A Structure for boards to register fixups with the PHY Lib */
628struct phy_fixup {
629 struct list_head list;
4567d686 630 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
631 u32 phy_uid;
632 u32 phy_uid_mask;
633 int (*run)(struct phy_device *phydev);
634};
635
efabdfb9
AF
636/**
637 * phy_read_mmd - Convenience function for reading a register
638 * from an MMD on a given PHY.
639 * @phydev: The phy_device struct
640 * @devad: The MMD to read from
641 * @regnum: The register on the MMD to read
642 *
643 * Same rules as for phy_read();
644 */
645static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
646{
647 if (!phydev->is_c45)
648 return -EOPNOTSUPP;
649
e5a03bfd 650 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr,
efabdfb9
AF
651 MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff));
652}
653
66ce7fb9
FF
654/**
655 * phy_read_mmd_indirect - reads data from the MMD registers
656 * @phydev: The PHY device bus
657 * @prtad: MMD Address
66ce7fb9
FF
658 * @addr: PHY address on the MII bus
659 *
660 * Description: it reads data from the MMD registers (clause 22 to access to
661 * clause 45) of the specified phy address.
662 */
053e7e16 663int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad);
66ce7fb9 664
2e888103
LB
665/**
666 * phy_read - Convenience function for reading a given PHY register
667 * @phydev: the phy_device struct
668 * @regnum: register number to read
669 *
670 * NOTE: MUST NOT be called from interrupt context,
671 * because the bus read/write functions may wait for an interrupt
672 * to conclude the operation.
673 */
abf35df2 674static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 675{
e5a03bfd 676 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
677}
678
679/**
680 * phy_write - Convenience function for writing a given PHY register
681 * @phydev: the phy_device struct
682 * @regnum: register number to write
683 * @val: value to write to @regnum
684 *
685 * NOTE: MUST NOT be called from interrupt context,
686 * because the bus read/write functions may wait for an interrupt
687 * to conclude the operation.
688 */
abf35df2 689static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 690{
e5a03bfd 691 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
692}
693
2c7b4921
FF
694/**
695 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
696 * @phydev: the phy_device struct
697 *
698 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
699 * PHY_IGNORE_INTERRUPT
700 */
701static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
702{
703 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
704}
705
4284b6a5
FF
706/**
707 * phy_is_internal - Convenience function for testing if a PHY is internal
708 * @phydev: the phy_device struct
709 */
710static inline bool phy_is_internal(struct phy_device *phydev)
711{
712 return phydev->is_internal;
713}
714
e463d88c
FF
715/**
716 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
717 * is RGMII (all variants)
718 * @phydev: the phy_device struct
719 */
720static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
721{
722 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
723 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
5a11dd7d
FF
724};
725
726/*
727 * phy_is_pseudo_fixed_link - Convenience function for testing if this
728 * PHY is the CPU port facing side of an Ethernet switch, or similar.
729 * @phydev: the phy_device struct
730 */
731static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
732{
733 return phydev->is_pseudo_fixed_link;
e463d88c
FF
734}
735
efabdfb9
AF
736/**
737 * phy_write_mmd - Convenience function for writing a register
738 * on an MMD on a given PHY.
739 * @phydev: The phy_device struct
740 * @devad: The MMD to read from
741 * @regnum: The register on the MMD to read
742 * @val: value to write to @regnum
743 *
744 * Same rules as for phy_write();
745 */
746static inline int phy_write_mmd(struct phy_device *phydev, int devad,
747 u32 regnum, u16 val)
748{
749 if (!phydev->is_c45)
750 return -EOPNOTSUPP;
751
752 regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff);
753
e5a03bfd 754 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
efabdfb9
AF
755}
756
66ce7fb9
FF
757/**
758 * phy_write_mmd_indirect - writes data to the MMD registers
759 * @phydev: The PHY device
760 * @prtad: MMD Address
761 * @devad: MMD DEVAD
66ce7fb9
FF
762 * @data: data to write in the MMD register
763 *
764 * Description: Write data from the MMD registers of the specified
765 * phy address.
766 */
767void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
053e7e16 768 int devad, u32 data);
66ce7fb9 769
ac28b9f8 770struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
771 bool is_c45,
772 struct phy_c45_device_ids *c45_ids);
ac28b9f8 773struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 774int phy_device_register(struct phy_device *phy);
38737e49 775void phy_device_remove(struct phy_device *phydev);
2f5cb434 776int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
777int phy_suspend(struct phy_device *phydev);
778int phy_resume(struct phy_device *phydev);
4017b4d3
SS
779struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
780 phy_interface_t interface);
f8f76db1 781struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
782int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
783 u32 flags, phy_interface_t interface);
fa94f6d9 784int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
785 void (*handler)(struct net_device *),
786 phy_interface_t interface);
787struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
788 void (*handler)(struct net_device *),
789 phy_interface_t interface);
e1393456
AF
790void phy_disconnect(struct phy_device *phydev);
791void phy_detach(struct phy_device *phydev);
792void phy_start(struct phy_device *phydev);
793void phy_stop(struct phy_device *phydev);
794int phy_start_aneg(struct phy_device *phydev);
372788f9 795int phy_aneg_done(struct phy_device *phydev);
e1393456 796
e1393456 797int phy_stop_interrupts(struct phy_device *phydev);
00db8189 798
4017b4d3
SS
799static inline int phy_read_status(struct phy_device *phydev)
800{
00db8189
AF
801 return phydev->drv->read_status(phydev);
802}
803
72ba48be 804#define phydev_err(_phydev, format, args...) \
e5a03bfd 805 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be
AL
806
807#define phydev_dbg(_phydev, format, args...) \
e5a03bfd 808 dev_dbg(&_phydev->mdio.dev, format, ##args);
72ba48be 809
84eff6d1
AL
810static inline const char *phydev_name(const struct phy_device *phydev)
811{
e5a03bfd 812 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
813}
814
2220943a
AL
815void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
816 __printf(2, 3);
817void phy_attached_info(struct phy_device *phydev);
af6b6967 818int genphy_config_init(struct phy_device *phydev);
3fb69bca 819int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
820int genphy_restart_aneg(struct phy_device *phydev);
821int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 822int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
823int genphy_update_link(struct phy_device *phydev);
824int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
825int genphy_suspend(struct phy_device *phydev);
826int genphy_resume(struct phy_device *phydev);
797ac071 827int genphy_soft_reset(struct phy_device *phydev);
00db8189 828void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 829void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
830int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
831int phy_drivers_register(struct phy_driver *new_driver, int n,
832 struct module *owner);
4f9c85a1 833void phy_state_machine(struct work_struct *work);
664fcf12
AL
834void phy_change(struct phy_device *phydev);
835void phy_change_work(struct work_struct *work);
5ea94e76 836void phy_mac_interrupt(struct phy_device *phydev, int new_link);
29935aeb 837void phy_start_machine(struct phy_device *phydev);
00db8189
AF
838void phy_stop_machine(struct phy_device *phydev);
839int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
840int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
2d55173e
PR
841int phy_ethtool_ksettings_get(struct phy_device *phydev,
842 struct ethtool_link_ksettings *cmd);
843int phy_ethtool_ksettings_set(struct phy_device *phydev,
844 const struct ethtool_link_ksettings *cmd);
4017b4d3 845int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
846int phy_start_interrupts(struct phy_device *phydev);
847void phy_print_status(struct phy_device *phydev);
6f4a7f41 848void phy_device_free(struct phy_device *phydev);
f3a6bd39 849int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
00db8189 850
f62220d3 851int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 852 int (*run)(struct phy_device *));
f62220d3 853int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 854 int (*run)(struct phy_device *));
f62220d3 855int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 856 int (*run)(struct phy_device *));
f62220d3 857
f38e7a32
WH
858int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
859int phy_unregister_fixup_for_id(const char *bus_id);
860int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
861
a59a4d19
GC
862int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
863int phy_get_eee_err(struct phy_device *phydev);
864int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
865int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 866int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
867void phy_ethtool_get_wol(struct phy_device *phydev,
868 struct ethtool_wolinfo *wol);
9d9a77ce
PR
869int phy_ethtool_get_link_ksettings(struct net_device *ndev,
870 struct ethtool_link_ksettings *cmd);
871int phy_ethtool_set_link_ksettings(struct net_device *ndev,
872 const struct ethtool_link_ksettings *cmd);
e86a8987 873int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 874
9b9a8bfc
AF
875int __init mdio_bus_init(void);
876void mdio_bus_exit(void);
877
00db8189 878extern struct bus_type mdio_bus_type;
c31accd1
JH
879
880/**
881 * module_phy_driver() - Helper macro for registering PHY drivers
882 * @__phy_drivers: array of PHY drivers to register
883 *
884 * Helper macro for PHY drivers which do not do anything special in module
885 * init/exit. Each module may only use this macro once, and calling it
886 * replaces module_init() and module_exit().
887 */
888#define phy_module_driver(__phy_drivers, __count) \
889static int __init phy_module_init(void) \
890{ \
be01da72 891 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
892} \
893module_init(phy_module_init); \
894static void __exit phy_module_exit(void) \
895{ \
896 phy_drivers_unregister(__phy_drivers, __count); \
897} \
898module_exit(phy_module_exit)
899
900#define module_phy_driver(__phy_drivers) \
901 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
902
00db8189 903#endif /* __PHY_H */