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00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
bac83c65 22#include <linux/mdio.h>
13df29f6 23#include <linux/mii.h>
3e3aaf64 24#include <linux/module.h>
13df29f6
MR
25#include <linux/timer.h>
26#include <linux/workqueue.h>
8626d3b4 27#include <linux/mod_devicetable.h>
00db8189 28
60063497 29#include <linux/atomic.h>
0ac49527 30
e9fbdf17 31#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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32 SUPPORTED_TP | \
33 SUPPORTED_MII)
34
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35#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
36 SUPPORTED_10baseT_Full)
37
38#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
39 SUPPORTED_100baseT_Full)
40
41#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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42 SUPPORTED_1000baseT_Full)
43
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44#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
45 PHY_100BT_FEATURES | \
46 PHY_DEFAULT_FEATURES)
47
48#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
49 PHY_1000BT_FEATURES)
50
51
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52/*
53 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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54 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
55 * the attached driver handles the interrupt
56 */
57#define PHY_POLL -1
58#define PHY_IGNORE_INTERRUPT -2
59
60#define PHY_HAS_INTERRUPT 0x00000001
61#define PHY_HAS_MAGICANEG 0x00000002
4284b6a5 62#define PHY_IS_INTERNAL 0x00000004
a9049e0c 63#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 64
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65/* Interface Mode definitions */
66typedef enum {
4157ef1b 67 PHY_INTERFACE_MODE_NA,
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68 PHY_INTERFACE_MODE_MII,
69 PHY_INTERFACE_MODE_GMII,
70 PHY_INTERFACE_MODE_SGMII,
71 PHY_INTERFACE_MODE_TBI,
2cc70ba4 72 PHY_INTERFACE_MODE_REVMII,
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73 PHY_INTERFACE_MODE_RMII,
74 PHY_INTERFACE_MODE_RGMII,
a999589c 75 PHY_INTERFACE_MODE_RGMII_ID,
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76 PHY_INTERFACE_MODE_RGMII_RXID,
77 PHY_INTERFACE_MODE_RGMII_TXID,
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78 PHY_INTERFACE_MODE_RTBI,
79 PHY_INTERFACE_MODE_SMII,
898dd0bd 80 PHY_INTERFACE_MODE_XGMII,
fd70f72c 81 PHY_INTERFACE_MODE_MOCA,
b9d12085 82 PHY_INTERFACE_MODE_QSGMII,
572de608 83 PHY_INTERFACE_MODE_TRGMII,
55601a88
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84 PHY_INTERFACE_MODE_1000BASEX,
85 PHY_INTERFACE_MODE_2500BASEX,
86 PHY_INTERFACE_MODE_RXAUI,
8a2fe56e 87 PHY_INTERFACE_MODE_MAX,
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88} phy_interface_t;
89
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90/**
91 * phy_supported_speeds - return all speeds currently supported by a phy device
92 * @phy: The phy device to return supported speeds of.
93 * @speeds: buffer to store supported speeds in.
94 * @size: size of speeds buffer.
95 *
96 * Description: Returns the number of supported speeds, and
97 * fills the speeds * buffer with the supported speeds. If speeds buffer is
98 * too small to contain * all currently supported speeds, will return as
99 * many speeds as can fit.
100 */
101unsigned int phy_supported_speeds(struct phy_device *phy,
102 unsigned int *speeds,
103 unsigned int size);
104
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105/**
106 * It maps 'enum phy_interface_t' found in include/linux/phy.h
107 * into the device tree binding of 'phy-mode', so that Ethernet
108 * device driver can get phy interface from device tree.
109 */
110static inline const char *phy_modes(phy_interface_t interface)
111{
112 switch (interface) {
113 case PHY_INTERFACE_MODE_NA:
114 return "";
115 case PHY_INTERFACE_MODE_MII:
116 return "mii";
117 case PHY_INTERFACE_MODE_GMII:
118 return "gmii";
119 case PHY_INTERFACE_MODE_SGMII:
120 return "sgmii";
121 case PHY_INTERFACE_MODE_TBI:
122 return "tbi";
123 case PHY_INTERFACE_MODE_REVMII:
124 return "rev-mii";
125 case PHY_INTERFACE_MODE_RMII:
126 return "rmii";
127 case PHY_INTERFACE_MODE_RGMII:
128 return "rgmii";
129 case PHY_INTERFACE_MODE_RGMII_ID:
130 return "rgmii-id";
131 case PHY_INTERFACE_MODE_RGMII_RXID:
132 return "rgmii-rxid";
133 case PHY_INTERFACE_MODE_RGMII_TXID:
134 return "rgmii-txid";
135 case PHY_INTERFACE_MODE_RTBI:
136 return "rtbi";
137 case PHY_INTERFACE_MODE_SMII:
138 return "smii";
139 case PHY_INTERFACE_MODE_XGMII:
140 return "xgmii";
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141 case PHY_INTERFACE_MODE_MOCA:
142 return "moca";
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143 case PHY_INTERFACE_MODE_QSGMII:
144 return "qsgmii";
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145 case PHY_INTERFACE_MODE_TRGMII:
146 return "trgmii";
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147 case PHY_INTERFACE_MODE_1000BASEX:
148 return "1000base-x";
149 case PHY_INTERFACE_MODE_2500BASEX:
150 return "2500base-x";
151 case PHY_INTERFACE_MODE_RXAUI:
152 return "rxaui";
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153 default:
154 return "unknown";
155 }
156}
157
00db8189 158
e8a2b6a4 159#define PHY_INIT_TIMEOUT 100000
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160#define PHY_STATE_TIME 1
161#define PHY_FORCE_TIMEOUT 10
162#define PHY_AN_TIMEOUT 10
163
e8a2b6a4 164#define PHY_MAX_ADDR 32
00db8189 165
a4d00f17 166/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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167#define PHY_ID_FMT "%s:%02x"
168
4567d686 169#define MII_BUS_ID_SIZE 61
a4d00f17 170
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171/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
172 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
173#define MII_ADDR_C45 (1<<30)
174
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175struct device;
176struct sk_buff;
177
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178/*
179 * The Bus class for PHYs. Devices which provide access to
180 * PHYs should register using this structure
181 */
00db8189 182struct mii_bus {
3e3aaf64 183 struct module *owner;
00db8189 184 const char *name;
9d9326d3 185 char id[MII_BUS_ID_SIZE];
00db8189 186 void *priv;
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187 int (*read)(struct mii_bus *bus, int addr, int regnum);
188 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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189 int (*reset)(struct mii_bus *bus);
190
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191 /*
192 * A lock to ensure that only one thing can read/write
193 * the MDIO bus at a time
194 */
35b5f6b1 195 struct mutex mdio_lock;
00db8189 196
18ee49dd 197 struct device *parent;
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LB
198 enum {
199 MDIOBUS_ALLOCATED = 1,
200 MDIOBUS_REGISTERED,
201 MDIOBUS_UNREGISTERED,
202 MDIOBUS_RELEASED,
203 } state;
204 struct device dev;
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205
206 /* list of all PHYs on bus */
7f854420 207 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 208
c6883996 209 /* PHY addresses to be ignored when probing */
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210 u32 phy_mask;
211
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212 /* PHY addresses to ignore the TA/read failure */
213 u32 phy_ignore_ta_mask;
214
c5e38a94 215 /*
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216 * An array of interrupts, each PHY's interrupt at the index
217 * matching its address
c5e38a94 218 */
e7f4dc35 219 int irq[PHY_MAX_ADDR];
00db8189 220};
46abc021 221#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 222
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223struct mii_bus *mdiobus_alloc_size(size_t);
224static inline struct mii_bus *mdiobus_alloc(void)
225{
226 return mdiobus_alloc_size(0);
227}
228
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229int __mdiobus_register(struct mii_bus *bus, struct module *owner);
230#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
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231void mdiobus_unregister(struct mii_bus *bus);
232void mdiobus_free(struct mii_bus *bus);
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233struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
234static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
235{
236 return devm_mdiobus_alloc_size(dev, 0);
237}
238
239void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 240struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 241
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242#define PHY_INTERRUPT_DISABLED 0x0
243#define PHY_INTERRUPT_ENABLED 0x80000000
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244
245/* PHY state machine states:
246 *
247 * DOWN: PHY device and driver are not ready for anything. probe
248 * should be called if and only if the PHY is in this state,
249 * given that the PHY device exists.
250 * - PHY driver probe function will, depending on the PHY, set
251 * the state to STARTING or READY
252 *
253 * STARTING: PHY device is coming up, and the ethernet driver is
254 * not ready. PHY drivers may set this in the probe function.
255 * If they do, they are responsible for making sure the state is
256 * eventually set to indicate whether the PHY is UP or READY,
257 * depending on the state when the PHY is done starting up.
258 * - PHY driver will set the state to READY
259 * - start will set the state to PENDING
260 *
261 * READY: PHY is ready to send and receive packets, but the
262 * controller is not. By default, PHYs which do not implement
263 * probe will be set to this state by phy_probe(). If the PHY
264 * driver knows the PHY is ready, and the PHY state is STARTING,
265 * then it sets this STATE.
266 * - start will set the state to UP
267 *
268 * PENDING: PHY device is coming up, but the ethernet driver is
269 * ready. phy_start will set this state if the PHY state is
270 * STARTING.
271 * - PHY driver will set the state to UP when the PHY is ready
272 *
273 * UP: The PHY and attached device are ready to do work.
274 * Interrupts should be started here.
275 * - timer moves to AN
276 *
277 * AN: The PHY is currently negotiating the link state. Link is
278 * therefore down for now. phy_timer will set this state when it
279 * detects the state is UP. config_aneg will set this state
280 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
281 * - If autonegotiation finishes, but there's no link, it sets
282 * the state to NOLINK.
283 * - If aneg finishes with link, it sets the state to RUNNING,
284 * and calls adjust_link
285 * - If autonegotiation did not finish after an arbitrary amount
286 * of time, autonegotiation should be tried again if the PHY
287 * supports "magic" autonegotiation (back to AN)
288 * - If it didn't finish, and no magic_aneg, move to FORCING.
289 *
290 * NOLINK: PHY is up, but not currently plugged in.
291 * - If the timer notes that the link comes back, we move to RUNNING
292 * - config_aneg moves to AN
293 * - phy_stop moves to HALTED
294 *
295 * FORCING: PHY is being configured with forced settings
296 * - if link is up, move to RUNNING
297 * - If link is down, we drop to the next highest setting, and
298 * retry (FORCING) after a timeout
299 * - phy_stop moves to HALTED
300 *
301 * RUNNING: PHY is currently up, running, and possibly sending
302 * and/or receiving packets
303 * - timer will set CHANGELINK if we're polling (this ensures the
304 * link state is polled every other cycle of this state machine,
305 * which makes it every other second)
306 * - irq will set CHANGELINK
307 * - config_aneg will set AN
308 * - phy_stop moves to HALTED
309 *
310 * CHANGELINK: PHY experienced a change in link state
311 * - timer moves to RUNNING if link
312 * - timer moves to NOLINK if the link is down
313 * - phy_stop moves to HALTED
314 *
315 * HALTED: PHY is up, but no polling or interrupts are done. Or
316 * PHY is in an error state.
317 *
318 * - phy_start moves to RESUMING
319 *
320 * RESUMING: PHY was halted, but now wants to run again.
321 * - If we are forcing, or aneg is done, timer moves to RUNNING
322 * - If aneg is not done, timer moves to AN
323 * - phy_stop moves to HALTED
324 */
325enum phy_state {
4017b4d3 326 PHY_DOWN = 0,
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AF
327 PHY_STARTING,
328 PHY_READY,
329 PHY_PENDING,
330 PHY_UP,
331 PHY_AN,
332 PHY_RUNNING,
333 PHY_NOLINK,
334 PHY_FORCING,
335 PHY_CHANGELINK,
336 PHY_HALTED,
337 PHY_RESUMING
338};
339
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DD
340/**
341 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
342 * @devices_in_package: Bit vector of devices present.
343 * @device_ids: The device identifer for each present device.
344 */
345struct phy_c45_device_ids {
346 u32 devices_in_package;
347 u32 device_ids[8];
348};
c1f19b51 349
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350/* phy_device: An instance of a PHY
351 *
352 * drv: Pointer to the driver for this PHY instance
00db8189 353 * phy_id: UID for this device found during discovery
ac28b9f8
DD
354 * c45_ids: 802.3-c45 Device Identifers if is_c45.
355 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 356 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 357 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 358 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 359 * suspended: Set to true if this phy has been suspended successfully.
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AF
360 * state: state of the PHY for management purposes
361 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
362 * link_timeout: The number of timer firings to wait before the
363 * giving up on the current attempt at acquiring a link
364 * irq: IRQ number of the PHY's interrupt (-1 if none)
365 * phy_timer: The timer for handling the state machine
664fcf12 366 * phy_queue: A work_queue for the phy_mac_interrupt
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AF
367 * attached_dev: The attached enet driver's device instance ptr
368 * adjust_link: Callback for the enet controller to respond to
369 * changes in the link state.
00db8189 370 *
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FF
371 * speed, duplex, pause, supported, advertising, lp_advertising,
372 * and autoneg are used like in mii_if_info
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AF
373 *
374 * interrupts currently only supports enabled or disabled,
375 * but could be changed in the future to support enabling
376 * and disabling specific interrupts
377 *
378 * Contains some infrastructure for polling and interrupt
379 * handling, as well as handling shifts in PHY hardware state
380 */
381struct phy_device {
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AL
382 struct mdio_device mdio;
383
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384 /* Information about the PHY type */
385 /* And management functions */
386 struct phy_driver *drv;
387
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388 u32 phy_id;
389
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DD
390 struct phy_c45_device_ids c45_ids;
391 bool is_c45;
4284b6a5 392 bool is_internal;
5a11dd7d 393 bool is_pseudo_fixed_link;
b0ae009f 394 bool has_fixups;
8a477a6f 395 bool suspended;
ac28b9f8 396
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397 enum phy_state state;
398
399 u32 dev_flags;
400
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401 phy_interface_t interface;
402
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403 /*
404 * forced speed & duplex (no autoneg)
00db8189
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405 * partner speed & duplex & pause (autoneg)
406 */
407 int speed;
408 int duplex;
409 int pause;
410 int asym_pause;
411
412 /* The most recently read link state */
413 int link;
414
415 /* Enabled Interrupts */
416 u32 interrupts;
417
418 /* Union of PHY and Attached devices' supported modes */
419 /* See mii.h for more info */
420 u32 supported;
421 u32 advertising;
114002bc 422 u32 lp_advertising;
00db8189 423
d853d145 424 /* Energy efficient ethernet modes which should be prohibited */
425 u32 eee_broken_modes;
426
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AF
427 int autoneg;
428
429 int link_timeout;
430
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ZB
431#ifdef CONFIG_LED_TRIGGER_PHY
432 struct phy_led_trigger *phy_led_triggers;
433 unsigned int phy_num_led_triggers;
434 struct phy_led_trigger *last_triggered;
435#endif
436
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437 /*
438 * Interrupt number for this PHY
439 * -1 means no interrupt
440 */
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441 int irq;
442
443 /* private data pointer */
444 /* For use by PHYs to maintain extra state */
445 void *priv;
446
447 /* Interrupt and Polling infrastructure */
448 struct work_struct phy_queue;
a390d1f3 449 struct delayed_work state_queue;
0ac49527 450 atomic_t irq_disable;
00db8189 451
35b5f6b1 452 struct mutex lock;
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AF
453
454 struct net_device *attached_dev;
455
634ec36c 456 u8 mdix;
f4ed2fe3 457 u8 mdix_ctrl;
634ec36c 458
00db8189 459 void (*adjust_link)(struct net_device *dev);
00db8189 460};
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461#define to_phy_device(d) container_of(to_mdio_device(d), \
462 struct phy_device, mdio)
00db8189
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463
464/* struct phy_driver: Driver structure for a particular PHY type
465 *
a9049e0c 466 * driver_data: static driver data
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467 * phy_id: The result of reading the UID registers of this PHY
468 * type, and ANDing them with the phy_id_mask. This driver
469 * only works for PHYs with IDs which match this field
470 * name: The friendly name of this PHY type
471 * phy_id_mask: Defines the important bits of the phy_id
472 * features: A list of features (speed, duplex, etc) supported
473 * by this PHY
474 * flags: A bitfield defining certain other features this PHY
475 * supports (like interrupts)
476 *
477 * The drivers must implement config_aneg and read_status. All
478 * other functions are optional. Note that none of these
479 * functions should be called from interrupt time. The goal is
480 * for the bus read/write functions to be able to block when the
481 * bus transaction is happening, and be freed up by an interrupt
482 * (The MPC85xx has this ability, though it is not currently
483 * supported in the driver).
484 */
485struct phy_driver {
a9049e0c 486 struct mdio_driver_common mdiodrv;
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AF
487 u32 phy_id;
488 char *name;
489 unsigned int phy_id_mask;
490 u32 features;
491 u32 flags;
860f6e9e 492 const void *driver_data;
00db8189 493
c5e38a94 494 /*
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495 * Called to issue a PHY software reset
496 */
497 int (*soft_reset)(struct phy_device *phydev);
498
499 /*
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AF
500 * Called to initialize the PHY,
501 * including after a reset
502 */
00db8189
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503 int (*config_init)(struct phy_device *phydev);
504
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505 /*
506 * Called during discovery. Used to set
507 * up device-specific structures, if any
508 */
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509 int (*probe)(struct phy_device *phydev);
510
511 /* PHY Power Management */
512 int (*suspend)(struct phy_device *phydev);
513 int (*resume)(struct phy_device *phydev);
514
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515 /*
516 * Configures the advertisement and resets
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517 * autonegotiation if phydev->autoneg is on,
518 * forces the speed to the current settings in phydev
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519 * if phydev->autoneg is off
520 */
00db8189
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521 int (*config_aneg)(struct phy_device *phydev);
522
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FF
523 /* Determines the auto negotiation result */
524 int (*aneg_done)(struct phy_device *phydev);
525
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526 /* Determines the negotiated speed and duplex */
527 int (*read_status)(struct phy_device *phydev);
528
529 /* Clears any pending interrupts */
530 int (*ack_interrupt)(struct phy_device *phydev);
531
532 /* Enables or disables interrupts */
533 int (*config_intr)(struct phy_device *phydev);
534
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AG
535 /*
536 * Checks if the PHY generated an interrupt.
537 * For multi-PHY devices with shared PHY interrupt pin
538 */
539 int (*did_interrupt)(struct phy_device *phydev);
540
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AF
541 /* Clears up any memory if needed */
542 void (*remove)(struct phy_device *phydev);
543
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DD
544 /* Returns true if this is a suitable driver for the given
545 * phydev. If NULL, matching is based on phy_id and
546 * phy_id_mask.
547 */
548 int (*match_phy_device)(struct phy_device *phydev);
549
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550 /* Handles ethtool queries for hardware time stamping. */
551 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
552
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RC
553 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
554 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
555
556 /*
557 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
558 * the phy driver promises to deliver it using netif_rx() as
559 * soon as a timestamp becomes available. One of the
560 * PTP_CLASS_ values is passed in 'type'. The function must
561 * return true if the skb is accepted for delivery.
562 */
563 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
564
565 /*
566 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 567 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
568 * timestamp becomes available. One of the PTP_CLASS_ values
569 * is passed in 'type'.
570 */
571 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
572
42e836eb
MS
573 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
574 * enable Wake on LAN, so set_wol is provided to be called in the
575 * ethernet driver's set_wol function. */
576 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
577
578 /* See set_wol, but for checking whether Wake on LAN is enabled. */
579 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
580
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DM
581 /*
582 * Called to inform a PHY device driver when the core is about to
583 * change the link state. This callback is supposed to be used as
584 * fixup hook for drivers that need to take action when the link
585 * state changes. Drivers are by no means allowed to mess with the
586 * PHY device structure in their implementations.
587 */
588 void (*link_change_notify)(struct phy_device *dev);
589
0c1d77df
VB
590 /* A function provided by a phy specific driver to override the
591 * the PHY driver framework support for reading a MMD register
592 * from the PHY. If not supported, return -1. This function is
593 * optional for PHY specific drivers, if not provided then the
594 * default MMD read function is used by the PHY framework.
595 */
596 int (*read_mmd_indirect)(struct phy_device *dev, int ptrad,
597 int devnum, int regnum);
598
599 /* A function provided by a phy specific driver to override the
600 * the PHY driver framework support for writing a MMD register
601 * from the PHY. This function is optional for PHY specific drivers,
602 * if not provided then the default MMD read function is used by
603 * the PHY framework.
604 */
605 void (*write_mmd_indirect)(struct phy_device *dev, int ptrad,
606 int devnum, int regnum, u32 val);
607
2f438366
ES
608 /* Get the size and type of the eeprom contained within a plug-in
609 * module */
610 int (*module_info)(struct phy_device *dev,
611 struct ethtool_modinfo *modinfo);
612
613 /* Get the eeprom information from the plug-in module */
614 int (*module_eeprom)(struct phy_device *dev,
615 struct ethtool_eeprom *ee, u8 *data);
616
f3a40945
AL
617 /* Get statistics from the phy using ethtool */
618 int (*get_sset_count)(struct phy_device *dev);
619 void (*get_strings)(struct phy_device *dev, u8 *data);
620 void (*get_stats)(struct phy_device *dev,
621 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
622
623 /* Get and Set PHY tunables */
624 int (*get_tunable)(struct phy_device *dev,
625 struct ethtool_tunable *tuna, void *data);
626 int (*set_tunable)(struct phy_device *dev,
627 struct ethtool_tunable *tuna,
628 const void *data);
00db8189 629};
a9049e0c
AL
630#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
631 struct phy_driver, mdiodrv)
00db8189 632
f62220d3
AF
633#define PHY_ANY_ID "MATCH ANY PHY"
634#define PHY_ANY_UID 0xffffffff
635
636/* A Structure for boards to register fixups with the PHY Lib */
637struct phy_fixup {
638 struct list_head list;
4567d686 639 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
640 u32 phy_uid;
641 u32 phy_uid_mask;
642 int (*run)(struct phy_device *phydev);
643};
644
efabdfb9
AF
645/**
646 * phy_read_mmd - Convenience function for reading a register
647 * from an MMD on a given PHY.
648 * @phydev: The phy_device struct
649 * @devad: The MMD to read from
650 * @regnum: The register on the MMD to read
651 *
652 * Same rules as for phy_read();
653 */
654static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
655{
656 if (!phydev->is_c45)
657 return -EOPNOTSUPP;
658
e5a03bfd 659 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr,
efabdfb9
AF
660 MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff));
661}
662
66ce7fb9
FF
663/**
664 * phy_read_mmd_indirect - reads data from the MMD registers
665 * @phydev: The PHY device bus
666 * @prtad: MMD Address
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FF
667 * @addr: PHY address on the MII bus
668 *
669 * Description: it reads data from the MMD registers (clause 22 to access to
670 * clause 45) of the specified phy address.
671 */
053e7e16 672int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad);
66ce7fb9 673
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LB
674/**
675 * phy_read - Convenience function for reading a given PHY register
676 * @phydev: the phy_device struct
677 * @regnum: register number to read
678 *
679 * NOTE: MUST NOT be called from interrupt context,
680 * because the bus read/write functions may wait for an interrupt
681 * to conclude the operation.
682 */
abf35df2 683static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 684{
e5a03bfd 685 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
686}
687
688/**
689 * phy_write - Convenience function for writing a given PHY register
690 * @phydev: the phy_device struct
691 * @regnum: register number to write
692 * @val: value to write to @regnum
693 *
694 * NOTE: MUST NOT be called from interrupt context,
695 * because the bus read/write functions may wait for an interrupt
696 * to conclude the operation.
697 */
abf35df2 698static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 699{
e5a03bfd 700 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
701}
702
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FF
703/**
704 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
705 * @phydev: the phy_device struct
706 *
707 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
708 * PHY_IGNORE_INTERRUPT
709 */
710static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
711{
712 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
713}
714
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715/**
716 * phy_is_internal - Convenience function for testing if a PHY is internal
717 * @phydev: the phy_device struct
718 */
719static inline bool phy_is_internal(struct phy_device *phydev)
720{
721 return phydev->is_internal;
722}
723
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FF
724/**
725 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
726 * is RGMII (all variants)
727 * @phydev: the phy_device struct
728 */
729static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
730{
731 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
732 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
5a11dd7d
FF
733};
734
735/*
736 * phy_is_pseudo_fixed_link - Convenience function for testing if this
737 * PHY is the CPU port facing side of an Ethernet switch, or similar.
738 * @phydev: the phy_device struct
739 */
740static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
741{
742 return phydev->is_pseudo_fixed_link;
e463d88c
FF
743}
744
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AF
745/**
746 * phy_write_mmd - Convenience function for writing a register
747 * on an MMD on a given PHY.
748 * @phydev: The phy_device struct
749 * @devad: The MMD to read from
750 * @regnum: The register on the MMD to read
751 * @val: value to write to @regnum
752 *
753 * Same rules as for phy_write();
754 */
755static inline int phy_write_mmd(struct phy_device *phydev, int devad,
756 u32 regnum, u16 val)
757{
758 if (!phydev->is_c45)
759 return -EOPNOTSUPP;
760
761 regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff);
762
e5a03bfd 763 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
efabdfb9
AF
764}
765
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766/**
767 * phy_write_mmd_indirect - writes data to the MMD registers
768 * @phydev: The PHY device
769 * @prtad: MMD Address
770 * @devad: MMD DEVAD
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FF
771 * @data: data to write in the MMD register
772 *
773 * Description: Write data from the MMD registers of the specified
774 * phy address.
775 */
776void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
053e7e16 777 int devad, u32 data);
66ce7fb9 778
ac28b9f8 779struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
780 bool is_c45,
781 struct phy_c45_device_ids *c45_ids);
ac28b9f8 782struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 783int phy_device_register(struct phy_device *phy);
38737e49 784void phy_device_remove(struct phy_device *phydev);
2f5cb434 785int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
786int phy_suspend(struct phy_device *phydev);
787int phy_resume(struct phy_device *phydev);
4017b4d3
SS
788struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
789 phy_interface_t interface);
f8f76db1 790struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
791int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
792 u32 flags, phy_interface_t interface);
fa94f6d9 793int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
794 void (*handler)(struct net_device *),
795 phy_interface_t interface);
796struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
797 void (*handler)(struct net_device *),
798 phy_interface_t interface);
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AF
799void phy_disconnect(struct phy_device *phydev);
800void phy_detach(struct phy_device *phydev);
801void phy_start(struct phy_device *phydev);
802void phy_stop(struct phy_device *phydev);
803int phy_start_aneg(struct phy_device *phydev);
372788f9 804int phy_aneg_done(struct phy_device *phydev);
e1393456 805
e1393456 806int phy_stop_interrupts(struct phy_device *phydev);
00db8189 807
4017b4d3
SS
808static inline int phy_read_status(struct phy_device *phydev)
809{
25149ef9
FF
810 if (!phydev->drv)
811 return -EIO;
812
00db8189
AF
813 return phydev->drv->read_status(phydev);
814}
815
72ba48be 816#define phydev_err(_phydev, format, args...) \
e5a03bfd 817 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be
AL
818
819#define phydev_dbg(_phydev, format, args...) \
e5a03bfd 820 dev_dbg(&_phydev->mdio.dev, format, ##args);
72ba48be 821
84eff6d1
AL
822static inline const char *phydev_name(const struct phy_device *phydev)
823{
e5a03bfd 824 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
825}
826
2220943a
AL
827void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
828 __printf(2, 3);
829void phy_attached_info(struct phy_device *phydev);
af6b6967 830int genphy_config_init(struct phy_device *phydev);
3fb69bca 831int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
832int genphy_restart_aneg(struct phy_device *phydev);
833int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 834int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
835int genphy_update_link(struct phy_device *phydev);
836int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
837int genphy_suspend(struct phy_device *phydev);
838int genphy_resume(struct phy_device *phydev);
797ac071 839int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
840static inline int genphy_no_soft_reset(struct phy_device *phydev)
841{
842 return 0;
843}
00db8189 844void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 845void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
846int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
847int phy_drivers_register(struct phy_driver *new_driver, int n,
848 struct module *owner);
4f9c85a1 849void phy_state_machine(struct work_struct *work);
664fcf12
AL
850void phy_change(struct phy_device *phydev);
851void phy_change_work(struct work_struct *work);
5ea94e76 852void phy_mac_interrupt(struct phy_device *phydev, int new_link);
29935aeb 853void phy_start_machine(struct phy_device *phydev);
00db8189
AF
854void phy_stop_machine(struct phy_device *phydev);
855int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
856int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
2d55173e
PR
857int phy_ethtool_ksettings_get(struct phy_device *phydev,
858 struct ethtool_link_ksettings *cmd);
859int phy_ethtool_ksettings_set(struct phy_device *phydev,
860 const struct ethtool_link_ksettings *cmd);
4017b4d3 861int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
862int phy_start_interrupts(struct phy_device *phydev);
863void phy_print_status(struct phy_device *phydev);
6f4a7f41 864void phy_device_free(struct phy_device *phydev);
f3a6bd39 865int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
00db8189 866
f62220d3 867int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 868 int (*run)(struct phy_device *));
f62220d3 869int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 870 int (*run)(struct phy_device *));
f62220d3 871int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 872 int (*run)(struct phy_device *));
f62220d3 873
f38e7a32
WH
874int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
875int phy_unregister_fixup_for_id(const char *bus_id);
876int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
877
a59a4d19
GC
878int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
879int phy_get_eee_err(struct phy_device *phydev);
880int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
881int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 882int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
883void phy_ethtool_get_wol(struct phy_device *phydev,
884 struct ethtool_wolinfo *wol);
9d9a77ce
PR
885int phy_ethtool_get_link_ksettings(struct net_device *ndev,
886 struct ethtool_link_ksettings *cmd);
887int phy_ethtool_set_link_ksettings(struct net_device *ndev,
888 const struct ethtool_link_ksettings *cmd);
e86a8987 889int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 890
9b9a8bfc
AF
891int __init mdio_bus_init(void);
892void mdio_bus_exit(void);
893
00db8189 894extern struct bus_type mdio_bus_type;
c31accd1 895
648ea013
FF
896struct mdio_board_info {
897 const char *bus_id;
898 char modalias[MDIO_NAME_SIZE];
899 int mdio_addr;
900 const void *platform_data;
901};
902
903#if IS_ENABLED(CONFIG_PHYLIB)
904int mdiobus_register_board_info(const struct mdio_board_info *info,
905 unsigned int n);
906#else
907static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
908 unsigned int n)
909{
910 return 0;
911}
912#endif
913
914
c31accd1
JH
915/**
916 * module_phy_driver() - Helper macro for registering PHY drivers
917 * @__phy_drivers: array of PHY drivers to register
918 *
919 * Helper macro for PHY drivers which do not do anything special in module
920 * init/exit. Each module may only use this macro once, and calling it
921 * replaces module_init() and module_exit().
922 */
923#define phy_module_driver(__phy_drivers, __count) \
924static int __init phy_module_init(void) \
925{ \
be01da72 926 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
927} \
928module_init(phy_module_init); \
929static void __exit phy_module_exit(void) \
930{ \
931 phy_drivers_unregister(__phy_drivers, __count); \
932} \
933module_exit(phy_module_exit)
934
935#define module_phy_driver(__phy_drivers) \
936 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
937
00db8189 938#endif /* __PHY_H */