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2874c5fd 1/* SPDX-License-Identifier: GPL-2.0-or-later */
00db8189 2/*
00db8189 3 * Framework and drivers for configuring and reading different PHYs
d8de01b7 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
00db8189
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5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
00db8189
AF
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
2220943a 14#include <linux/compiler.h>
00db8189 15#include <linux/spinlock.h>
13df29f6 16#include <linux/ethtool.h>
b31cdffa 17#include <linux/linkmode.h>
bac83c65 18#include <linux/mdio.h>
13df29f6 19#include <linux/mii.h>
3e3aaf64 20#include <linux/module.h>
13df29f6
MR
21#include <linux/timer.h>
22#include <linux/workqueue.h>
8626d3b4 23#include <linux/mod_devicetable.h>
00db8189 24
60063497 25#include <linux/atomic.h>
0ac49527 26
e9fbdf17 27#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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28 SUPPORTED_TP | \
29 SUPPORTED_MII)
30
e9fbdf17
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31#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
32 SUPPORTED_10baseT_Full)
33
34#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
35 SUPPORTED_100baseT_Full)
36
37#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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38 SUPPORTED_1000baseT_Full)
39
719655a1
AL
40extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
41extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
42extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
43extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
44extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
9e857a40 46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
719655a1
AL
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
48
49#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
50#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
51#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
52#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
53#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
54#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
9e857a40 55#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
719655a1 56#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 57
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58extern const int phy_10_100_features_array[4];
59extern const int phy_basic_t1_features_array[2];
60extern const int phy_gbit_features_array[2];
61extern const int phy_10gbit_features_array[1];
62
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63/*
64 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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65 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
66 * the attached driver handles the interrupt
67 */
68#define PHY_POLL -1
69#define PHY_IGNORE_INTERRUPT -2
70
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71#define PHY_IS_INTERNAL 0x00000001
72#define PHY_RST_AFTER_CLK_EN 0x00000002
a9049e0c 73#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 74
e8a2b6a4
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75/* Interface Mode definitions */
76typedef enum {
4157ef1b 77 PHY_INTERFACE_MODE_NA,
735d8a18 78 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
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79 PHY_INTERFACE_MODE_MII,
80 PHY_INTERFACE_MODE_GMII,
81 PHY_INTERFACE_MODE_SGMII,
82 PHY_INTERFACE_MODE_TBI,
2cc70ba4 83 PHY_INTERFACE_MODE_REVMII,
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84 PHY_INTERFACE_MODE_RMII,
85 PHY_INTERFACE_MODE_RGMII,
a999589c 86 PHY_INTERFACE_MODE_RGMII_ID,
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87 PHY_INTERFACE_MODE_RGMII_RXID,
88 PHY_INTERFACE_MODE_RGMII_TXID,
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89 PHY_INTERFACE_MODE_RTBI,
90 PHY_INTERFACE_MODE_SMII,
898dd0bd 91 PHY_INTERFACE_MODE_XGMII,
fd70f72c 92 PHY_INTERFACE_MODE_MOCA,
b9d12085 93 PHY_INTERFACE_MODE_QSGMII,
572de608 94 PHY_INTERFACE_MODE_TRGMII,
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95 PHY_INTERFACE_MODE_1000BASEX,
96 PHY_INTERFACE_MODE_2500BASEX,
97 PHY_INTERFACE_MODE_RXAUI,
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98 PHY_INTERFACE_MODE_XAUI,
99 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
100 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 101 PHY_INTERFACE_MODE_MAX,
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102} phy_interface_t;
103
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104/**
105 * phy_supported_speeds - return all speeds currently supported by a phy device
106 * @phy: The phy device to return supported speeds of.
107 * @speeds: buffer to store supported speeds in.
108 * @size: size of speeds buffer.
109 *
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110 * Description: Returns the number of supported speeds, and fills
111 * the speeds buffer with the supported speeds. If speeds buffer is
112 * too small to contain all currently supported speeds, will return as
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113 * many speeds as can fit.
114 */
115unsigned int phy_supported_speeds(struct phy_device *phy,
116 unsigned int *speeds,
117 unsigned int size);
118
8a2fe56e 119/**
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120 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
121 * @interface: enum phy_interface_t value
122 *
123 * Description: maps 'enum phy_interface_t' defined in this file
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124 * into the device tree binding of 'phy-mode', so that Ethernet
125 * device driver can get phy interface from device tree.
126 */
127static inline const char *phy_modes(phy_interface_t interface)
128{
129 switch (interface) {
130 case PHY_INTERFACE_MODE_NA:
131 return "";
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132 case PHY_INTERFACE_MODE_INTERNAL:
133 return "internal";
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134 case PHY_INTERFACE_MODE_MII:
135 return "mii";
136 case PHY_INTERFACE_MODE_GMII:
137 return "gmii";
138 case PHY_INTERFACE_MODE_SGMII:
139 return "sgmii";
140 case PHY_INTERFACE_MODE_TBI:
141 return "tbi";
142 case PHY_INTERFACE_MODE_REVMII:
143 return "rev-mii";
144 case PHY_INTERFACE_MODE_RMII:
145 return "rmii";
146 case PHY_INTERFACE_MODE_RGMII:
147 return "rgmii";
148 case PHY_INTERFACE_MODE_RGMII_ID:
149 return "rgmii-id";
150 case PHY_INTERFACE_MODE_RGMII_RXID:
151 return "rgmii-rxid";
152 case PHY_INTERFACE_MODE_RGMII_TXID:
153 return "rgmii-txid";
154 case PHY_INTERFACE_MODE_RTBI:
155 return "rtbi";
156 case PHY_INTERFACE_MODE_SMII:
157 return "smii";
158 case PHY_INTERFACE_MODE_XGMII:
159 return "xgmii";
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160 case PHY_INTERFACE_MODE_MOCA:
161 return "moca";
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162 case PHY_INTERFACE_MODE_QSGMII:
163 return "qsgmii";
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164 case PHY_INTERFACE_MODE_TRGMII:
165 return "trgmii";
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166 case PHY_INTERFACE_MODE_1000BASEX:
167 return "1000base-x";
168 case PHY_INTERFACE_MODE_2500BASEX:
169 return "2500base-x";
170 case PHY_INTERFACE_MODE_RXAUI:
171 return "rxaui";
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172 case PHY_INTERFACE_MODE_XAUI:
173 return "xaui";
174 case PHY_INTERFACE_MODE_10GKR:
175 return "10gbase-kr";
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176 default:
177 return "unknown";
178 }
179}
180
00db8189 181
e8a2b6a4 182#define PHY_INIT_TIMEOUT 100000
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183#define PHY_STATE_TIME 1
184#define PHY_FORCE_TIMEOUT 10
00db8189 185
e8a2b6a4 186#define PHY_MAX_ADDR 32
00db8189 187
a4d00f17 188/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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189#define PHY_ID_FMT "%s:%02x"
190
4567d686 191#define MII_BUS_ID_SIZE 61
a4d00f17 192
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193/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
194 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
195#define MII_ADDR_C45 (1<<30)
196
313162d0 197struct device;
9525ae83 198struct phylink;
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199struct sk_buff;
200
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201/*
202 * The Bus class for PHYs. Devices which provide access to
203 * PHYs should register using this structure
204 */
00db8189 205struct mii_bus {
3e3aaf64 206 struct module *owner;
00db8189 207 const char *name;
9d9326d3 208 char id[MII_BUS_ID_SIZE];
00db8189 209 void *priv;
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210 int (*read)(struct mii_bus *bus, int addr, int regnum);
211 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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212 int (*reset)(struct mii_bus *bus);
213
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214 /*
215 * A lock to ensure that only one thing can read/write
216 * the MDIO bus at a time
217 */
35b5f6b1 218 struct mutex mdio_lock;
00db8189 219
18ee49dd 220 struct device *parent;
46abc021
LB
221 enum {
222 MDIOBUS_ALLOCATED = 1,
223 MDIOBUS_REGISTERED,
224 MDIOBUS_UNREGISTERED,
225 MDIOBUS_RELEASED,
226 } state;
227 struct device dev;
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228
229 /* list of all PHYs on bus */
7f854420 230 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 231
c6883996 232 /* PHY addresses to be ignored when probing */
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233 u32 phy_mask;
234
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235 /* PHY addresses to ignore the TA/read failure */
236 u32 phy_ignore_ta_mask;
237
c5e38a94 238 /*
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239 * An array of interrupts, each PHY's interrupt at the index
240 * matching its address
c5e38a94 241 */
e7f4dc35 242 int irq[PHY_MAX_ADDR];
69226896
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243
244 /* GPIO reset pulse width in microseconds */
245 int reset_delay_us;
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246 /* RESET GPIO descriptor pointer */
247 struct gpio_desc *reset_gpiod;
00db8189 248};
46abc021 249#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 250
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251struct mii_bus *mdiobus_alloc_size(size_t);
252static inline struct mii_bus *mdiobus_alloc(void)
253{
254 return mdiobus_alloc_size(0);
255}
256
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257int __mdiobus_register(struct mii_bus *bus, struct module *owner);
258#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
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259void mdiobus_unregister(struct mii_bus *bus);
260void mdiobus_free(struct mii_bus *bus);
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261struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
262static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
263{
264 return devm_mdiobus_alloc_size(dev, 0);
265}
266
267void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 268struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 269
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270#define PHY_INTERRUPT_DISABLED false
271#define PHY_INTERRUPT_ENABLED true
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272
273/* PHY state machine states:
274 *
275 * DOWN: PHY device and driver are not ready for anything. probe
276 * should be called if and only if the PHY is in this state,
277 * given that the PHY device exists.
899a3cbb 278 * - PHY driver probe function will set the state to READY
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279 *
280 * READY: PHY is ready to send and receive packets, but the
281 * controller is not. By default, PHYs which do not implement
899a3cbb 282 * probe will be set to this state by phy_probe().
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283 * - start will set the state to UP
284 *
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285 * UP: The PHY and attached device are ready to do work.
286 * Interrupts should be started here.
85a1f31d 287 * - timer moves to NOLINK or RUNNING
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288 *
289 * NOLINK: PHY is up, but not currently plugged in.
8deeb630 290 * - irq or timer will set RUNNING if link comes back
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291 * - phy_stop moves to HALTED
292 *
293 * FORCING: PHY is being configured with forced settings
294 * - if link is up, move to RUNNING
295 * - If link is down, we drop to the next highest setting, and
296 * retry (FORCING) after a timeout
297 * - phy_stop moves to HALTED
298 *
299 * RUNNING: PHY is currently up, running, and possibly sending
300 * and/or receiving packets
8deeb630 301 * - irq or timer will set NOLINK if link goes down
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302 * - phy_stop moves to HALTED
303 *
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304 * HALTED: PHY is up, but no polling or interrupts are done. Or
305 * PHY is in an error state.
f24098f8 306 * - phy_start moves to UP
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307 */
308enum phy_state {
4017b4d3 309 PHY_DOWN = 0,
00db8189 310 PHY_READY,
2b3e88ea 311 PHY_HALTED,
00db8189 312 PHY_UP,
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313 PHY_RUNNING,
314 PHY_NOLINK,
315 PHY_FORCING,
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316};
317
ac28b9f8
DD
318/**
319 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
320 * @devices_in_package: Bit vector of devices present.
321 * @device_ids: The device identifer for each present device.
322 */
323struct phy_c45_device_ids {
324 u32 devices_in_package;
325 u32 device_ids[8];
326};
c1f19b51 327
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328/* phy_device: An instance of a PHY
329 *
330 * drv: Pointer to the driver for this PHY instance
00db8189 331 * phy_id: UID for this device found during discovery
ac28b9f8
DD
332 * c45_ids: 802.3-c45 Device Identifers if is_c45.
333 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 334 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 335 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
3b8b11f9 336 * is_gigabit_capable: Set to true if PHY supports 1000Mbps
aae88261 337 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 338 * suspended: Set to true if this phy has been suspended successfully.
a3995460 339 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 340 * loopback_enabled: Set true if this phy has been loopbacked successfully.
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341 * state: state of the PHY for management purposes
342 * dev_flags: Device-specific flags used by the PHY driver.
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343 * link_timeout: The number of timer firings to wait before the
344 * giving up on the current attempt at acquiring a link
345 * irq: IRQ number of the PHY's interrupt (-1 if none)
346 * phy_timer: The timer for handling the state machine
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347 * attached_dev: The attached enet driver's device instance ptr
348 * adjust_link: Callback for the enet controller to respond to
349 * changes in the link state.
00db8189 350 *
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FF
351 * speed, duplex, pause, supported, advertising, lp_advertising,
352 * and autoneg are used like in mii_if_info
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353 *
354 * interrupts currently only supports enabled or disabled,
355 * but could be changed in the future to support enabling
356 * and disabling specific interrupts
357 *
358 * Contains some infrastructure for polling and interrupt
359 * handling, as well as handling shifts in PHY hardware state
360 */
361struct phy_device {
e5a03bfd
AL
362 struct mdio_device mdio;
363
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364 /* Information about the PHY type */
365 /* And management functions */
366 struct phy_driver *drv;
367
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368 u32 phy_id;
369
ac28b9f8 370 struct phy_c45_device_ids c45_ids;
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371 unsigned is_c45:1;
372 unsigned is_internal:1;
373 unsigned is_pseudo_fixed_link:1;
3b8b11f9 374 unsigned is_gigabit_capable:1;
87e5808d
HK
375 unsigned has_fixups:1;
376 unsigned suspended:1;
377 unsigned sysfs_links:1;
378 unsigned loopback_enabled:1;
379
380 unsigned autoneg:1;
381 /* The most recently read link state */
382 unsigned link:1;
4950c2ba 383 unsigned autoneg_complete:1;
ac28b9f8 384
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385 /* Interrupts are enabled */
386 unsigned interrupts:1;
387
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388 enum phy_state state;
389
390 u32 dev_flags;
391
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392 phy_interface_t interface;
393
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394 /*
395 * forced speed & duplex (no autoneg)
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396 * partner speed & duplex & pause (autoneg)
397 */
398 int speed;
399 int duplex;
400 int pause;
401 int asym_pause;
402
3c1bcc86
AL
403 /* Union of PHY and Attached devices' supported link modes */
404 /* See ethtool.h for more info */
405 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
406 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
c0ec3c27 407 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
00db8189 408
d853d145 409 /* Energy efficient ethernet modes which should be prohibited */
410 u32 eee_broken_modes;
411
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412 int link_timeout;
413
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414#ifdef CONFIG_LED_TRIGGER_PHY
415 struct phy_led_trigger *phy_led_triggers;
416 unsigned int phy_num_led_triggers;
417 struct phy_led_trigger *last_triggered;
3928ee64
MS
418
419 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
420#endif
421
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422 /*
423 * Interrupt number for this PHY
424 * -1 means no interrupt
425 */
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426 int irq;
427
428 /* private data pointer */
429 /* For use by PHYs to maintain extra state */
430 void *priv;
431
432 /* Interrupt and Polling infrastructure */
a390d1f3 433 struct delayed_work state_queue;
00db8189 434
35b5f6b1 435 struct mutex lock;
00db8189 436
9525ae83 437 struct phylink *phylink;
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AF
438 struct net_device *attached_dev;
439
634ec36c 440 u8 mdix;
f4ed2fe3 441 u8 mdix_ctrl;
634ec36c 442
a81497be 443 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 444 void (*adjust_link)(struct net_device *dev);
00db8189 445};
e5a03bfd
AL
446#define to_phy_device(d) container_of(to_mdio_device(d), \
447 struct phy_device, mdio)
00db8189
AF
448
449/* struct phy_driver: Driver structure for a particular PHY type
450 *
a9049e0c 451 * driver_data: static driver data
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452 * phy_id: The result of reading the UID registers of this PHY
453 * type, and ANDing them with the phy_id_mask. This driver
454 * only works for PHYs with IDs which match this field
455 * name: The friendly name of this PHY type
456 * phy_id_mask: Defines the important bits of the phy_id
3e64cf7a
CG
457 * features: A mandatory list of features (speed, duplex, etc)
458 * supported by this PHY
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459 * flags: A bitfield defining certain other features this PHY
460 * supports (like interrupts)
461 *
00fde795
HK
462 * All functions are optional. If config_aneg or read_status
463 * are not implemented, the phy core uses the genphy versions.
464 * Note that none of these functions should be called from
465 * interrupt time. The goal is for the bus read/write functions
466 * to be able to block when the bus transaction is happening,
467 * and be freed up by an interrupt (The MPC85xx has this ability,
468 * though it is not currently supported in the driver).
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469 */
470struct phy_driver {
a9049e0c 471 struct mdio_driver_common mdiodrv;
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472 u32 phy_id;
473 char *name;
511e3036 474 u32 phy_id_mask;
719655a1 475 const unsigned long * const features;
00db8189 476 u32 flags;
860f6e9e 477 const void *driver_data;
00db8189 478
c5e38a94 479 /*
9df81dd7
FF
480 * Called to issue a PHY software reset
481 */
482 int (*soft_reset)(struct phy_device *phydev);
483
484 /*
c5e38a94
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485 * Called to initialize the PHY,
486 * including after a reset
487 */
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488 int (*config_init)(struct phy_device *phydev);
489
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490 /*
491 * Called during discovery. Used to set
492 * up device-specific structures, if any
493 */
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494 int (*probe)(struct phy_device *phydev);
495
efbdfdc2
AL
496 /*
497 * Probe the hardware to determine what abilities it has.
498 * Should only set phydev->supported.
499 */
500 int (*get_features)(struct phy_device *phydev);
501
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502 /* PHY Power Management */
503 int (*suspend)(struct phy_device *phydev);
504 int (*resume)(struct phy_device *phydev);
505
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506 /*
507 * Configures the advertisement and resets
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508 * autonegotiation if phydev->autoneg is on,
509 * forces the speed to the current settings in phydev
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510 * if phydev->autoneg is off
511 */
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512 int (*config_aneg)(struct phy_device *phydev);
513
76a423a3
FF
514 /* Determines the auto negotiation result */
515 int (*aneg_done)(struct phy_device *phydev);
516
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517 /* Determines the negotiated speed and duplex */
518 int (*read_status)(struct phy_device *phydev);
519
520 /* Clears any pending interrupts */
521 int (*ack_interrupt)(struct phy_device *phydev);
522
523 /* Enables or disables interrupts */
524 int (*config_intr)(struct phy_device *phydev);
525
a8729eb3
AG
526 /*
527 * Checks if the PHY generated an interrupt.
528 * For multi-PHY devices with shared PHY interrupt pin
529 */
530 int (*did_interrupt)(struct phy_device *phydev);
531
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532 /* Clears up any memory if needed */
533 void (*remove)(struct phy_device *phydev);
534
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DD
535 /* Returns true if this is a suitable driver for the given
536 * phydev. If NULL, matching is based on phy_id and
537 * phy_id_mask.
538 */
539 int (*match_phy_device)(struct phy_device *phydev);
540
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541 /* Handles ethtool queries for hardware time stamping. */
542 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
543
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544 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
545 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
546
547 /*
548 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
549 * the phy driver promises to deliver it using netif_rx() as
550 * soon as a timestamp becomes available. One of the
551 * PTP_CLASS_ values is passed in 'type'. The function must
552 * return true if the skb is accepted for delivery.
553 */
554 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
555
556 /*
557 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 558 * to deliver it using skb_complete_tx_timestamp() as soon as a
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559 * timestamp becomes available. One of the PTP_CLASS_ values
560 * is passed in 'type'.
561 */
562 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
563
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564 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
565 * enable Wake on LAN, so set_wol is provided to be called in the
566 * ethernet driver's set_wol function. */
567 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
568
569 /* See set_wol, but for checking whether Wake on LAN is enabled. */
570 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
571
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572 /*
573 * Called to inform a PHY device driver when the core is about to
574 * change the link state. This callback is supposed to be used as
575 * fixup hook for drivers that need to take action when the link
576 * state changes. Drivers are by no means allowed to mess with the
577 * PHY device structure in their implementations.
578 */
579 void (*link_change_notify)(struct phy_device *dev);
580
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581 /*
582 * Phy specific driver override for reading a MMD register.
583 * This function is optional for PHY specific drivers. When
584 * not provided, the default MMD read function will be used
585 * by phy_read_mmd(), which will use either a direct read for
586 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
587 * devnum is the MMD device number within the PHY device,
588 * regnum is the register within the selected MMD device.
589 */
590 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
591
592 /*
593 * Phy specific driver override for writing a MMD register.
594 * This function is optional for PHY specific drivers. When
595 * not provided, the default MMD write function will be used
596 * by phy_write_mmd(), which will use either a direct write for
597 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
598 * devnum is the MMD device number within the PHY device,
599 * regnum is the register within the selected MMD device.
600 * val is the value to be written.
601 */
602 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
603 u16 val);
604
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605 int (*read_page)(struct phy_device *dev);
606 int (*write_page)(struct phy_device *dev, int page);
607
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608 /* Get the size and type of the eeprom contained within a plug-in
609 * module */
610 int (*module_info)(struct phy_device *dev,
611 struct ethtool_modinfo *modinfo);
612
613 /* Get the eeprom information from the plug-in module */
614 int (*module_eeprom)(struct phy_device *dev,
615 struct ethtool_eeprom *ee, u8 *data);
616
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617 /* Get statistics from the phy using ethtool */
618 int (*get_sset_count)(struct phy_device *dev);
619 void (*get_strings)(struct phy_device *dev, u8 *data);
620 void (*get_stats)(struct phy_device *dev,
621 struct ethtool_stats *stats, u64 *data);
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622
623 /* Get and Set PHY tunables */
624 int (*get_tunable)(struct phy_device *dev,
625 struct ethtool_tunable *tuna, void *data);
626 int (*set_tunable)(struct phy_device *dev,
627 struct ethtool_tunable *tuna,
628 const void *data);
f0f9b4ed 629 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 630};
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AL
631#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
632 struct phy_driver, mdiodrv)
00db8189 633
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AF
634#define PHY_ANY_ID "MATCH ANY PHY"
635#define PHY_ANY_UID 0xffffffff
636
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HK
637#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
638#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
639#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
640
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AF
641/* A Structure for boards to register fixups with the PHY Lib */
642struct phy_fixup {
643 struct list_head list;
4567d686 644 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
645 u32 phy_uid;
646 u32 phy_uid_mask;
647 int (*run)(struct phy_device *phydev);
648};
649
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650const char *phy_speed_to_str(int speed);
651const char *phy_duplex_to_str(unsigned int duplex);
652
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653/* A structure for mapping a particular speed and duplex
654 * combination to a particular SUPPORTED and ADVERTISED value
655 */
656struct phy_setting {
657 u32 speed;
658 u8 duplex;
659 u8 bit;
660};
661
662const struct phy_setting *
663phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
3c1bcc86 664 bool exact);
0ccb4fc6 665size_t phy_speeds(unsigned int *speeds, size_t size,
3c1bcc86 666 unsigned long *mask);
a4eaed9f 667void of_set_phy_supported(struct phy_device *phydev);
3feb9b23 668void of_set_phy_eee_broken(struct phy_device *phydev);
0ccb4fc6 669
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HK
670/**
671 * phy_is_started - Convenience function to check whether PHY is started
672 * @phydev: The phy_device struct
673 */
674static inline bool phy_is_started(struct phy_device *phydev)
675{
a2fc9d7e 676 return phydev->state >= PHY_UP;
2b3e88ea
HK
677}
678
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RK
679void phy_resolve_aneg_linkmode(struct phy_device *phydev);
680
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LB
681/**
682 * phy_read - Convenience function for reading a given PHY register
683 * @phydev: the phy_device struct
684 * @regnum: register number to read
685 *
686 * NOTE: MUST NOT be called from interrupt context,
687 * because the bus read/write functions may wait for an interrupt
688 * to conclude the operation.
689 */
abf35df2 690static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 691{
e5a03bfd 692 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
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LB
693}
694
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RK
695/**
696 * __phy_read - convenience function for reading a given PHY register
697 * @phydev: the phy_device struct
698 * @regnum: register number to read
699 *
700 * The caller must have taken the MDIO bus lock.
701 */
702static inline int __phy_read(struct phy_device *phydev, u32 regnum)
703{
704 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
705}
706
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LB
707/**
708 * phy_write - Convenience function for writing a given PHY register
709 * @phydev: the phy_device struct
710 * @regnum: register number to write
711 * @val: value to write to @regnum
712 *
713 * NOTE: MUST NOT be called from interrupt context,
714 * because the bus read/write functions may wait for an interrupt
715 * to conclude the operation.
716 */
abf35df2 717static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 718{
e5a03bfd 719 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
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LB
720}
721
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RK
722/**
723 * __phy_write - Convenience function for writing a given PHY register
724 * @phydev: the phy_device struct
725 * @regnum: register number to write
726 * @val: value to write to @regnum
727 *
728 * The caller must have taken the MDIO bus lock.
729 */
730static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
731{
732 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
733 val);
734}
735
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NY
736/**
737 * phy_read_mmd - Convenience function for reading a register
738 * from an MMD on a given PHY.
739 * @phydev: The phy_device struct
740 * @devad: The MMD to read from
741 * @regnum: The register on the MMD to read
742 *
743 * Same rules as for phy_read();
744 */
745int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
746
747/**
748 * __phy_read_mmd - Convenience function for reading a register
749 * from an MMD on a given PHY.
750 * @phydev: The phy_device struct
751 * @devad: The MMD to read from
752 * @regnum: The register on the MMD to read
753 *
754 * Same rules as for __phy_read();
755 */
756int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
757
758/**
759 * phy_write_mmd - Convenience function for writing a register
760 * on an MMD on a given PHY.
761 * @phydev: The phy_device struct
762 * @devad: The MMD to write to
763 * @regnum: The register on the MMD to read
764 * @val: value to write to @regnum
765 *
766 * Same rules as for phy_write();
767 */
768int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
769
770/**
771 * __phy_write_mmd - Convenience function for writing a register
772 * on an MMD on a given PHY.
773 * @phydev: The phy_device struct
774 * @devad: The MMD to write to
775 * @regnum: The register on the MMD to read
776 * @val: value to write to @regnum
777 *
778 * Same rules as for __phy_write();
779 */
780int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
781
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782int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
783 u16 set);
784int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
785 u16 set);
788f9933 786int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 787int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 788
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HK
789int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
790 u16 mask, u16 set);
791int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
792 u16 mask, u16 set);
1878f0dc 793int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 794 u16 mask, u16 set);
1878f0dc 795int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 796 u16 mask, u16 set);
1878f0dc 797
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HK
798/**
799 * __phy_set_bits - Convenience function for setting bits in a PHY register
800 * @phydev: the phy_device struct
801 * @regnum: register number to write
802 * @val: bits to set
803 *
804 * The caller must have taken the MDIO bus lock.
805 */
806static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
807{
808 return __phy_modify(phydev, regnum, 0, val);
809}
810
811/**
812 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
813 * @phydev: the phy_device struct
814 * @regnum: register number to write
815 * @val: bits to clear
816 *
817 * The caller must have taken the MDIO bus lock.
818 */
819static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
820 u16 val)
821{
822 return __phy_modify(phydev, regnum, val, 0);
823}
824
825/**
826 * phy_set_bits - Convenience function for setting bits in a PHY register
827 * @phydev: the phy_device struct
828 * @regnum: register number to write
829 * @val: bits to set
830 */
831static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
832{
833 return phy_modify(phydev, regnum, 0, val);
834}
835
836/**
837 * phy_clear_bits - Convenience function for clearing bits in a PHY register
838 * @phydev: the phy_device struct
839 * @regnum: register number to write
840 * @val: bits to clear
841 */
842static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
843{
844 return phy_modify(phydev, regnum, val, 0);
845}
846
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847/**
848 * __phy_set_bits_mmd - Convenience function for setting bits in a register
849 * on MMD
850 * @phydev: the phy_device struct
851 * @devad: the MMD containing register to modify
852 * @regnum: register number to modify
853 * @val: bits to set
854 *
855 * The caller must have taken the MDIO bus lock.
856 */
857static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
858 u32 regnum, u16 val)
859{
860 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
861}
862
863/**
864 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
865 * on MMD
866 * @phydev: the phy_device struct
867 * @devad: the MMD containing register to modify
868 * @regnum: register number to modify
869 * @val: bits to clear
870 *
871 * The caller must have taken the MDIO bus lock.
872 */
873static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
874 u32 regnum, u16 val)
875{
876 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
877}
878
879/**
880 * phy_set_bits_mmd - Convenience function for setting bits in a register
881 * on MMD
882 * @phydev: the phy_device struct
883 * @devad: the MMD containing register to modify
884 * @regnum: register number to modify
885 * @val: bits to set
886 */
887static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
888 u32 regnum, u16 val)
889{
890 return phy_modify_mmd(phydev, devad, regnum, 0, val);
891}
892
893/**
894 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
895 * on MMD
896 * @phydev: the phy_device struct
897 * @devad: the MMD containing register to modify
898 * @regnum: register number to modify
899 * @val: bits to clear
900 */
901static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
902 u32 regnum, u16 val)
903{
904 return phy_modify_mmd(phydev, devad, regnum, val, 0);
905}
906
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907/**
908 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
909 * @phydev: the phy_device struct
910 *
911 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
912 * PHY_IGNORE_INTERRUPT
913 */
914static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
915{
916 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
917}
918
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919/**
920 * phy_polling_mode - Convenience function for testing whether polling is
921 * used to detect PHY status changes
922 * @phydev: the phy_device struct
923 */
924static inline bool phy_polling_mode(struct phy_device *phydev)
925{
926 return phydev->irq == PHY_POLL;
927}
928
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FF
929/**
930 * phy_is_internal - Convenience function for testing if a PHY is internal
931 * @phydev: the phy_device struct
932 */
933static inline bool phy_is_internal(struct phy_device *phydev)
934{
935 return phydev->is_internal;
936}
937
32d0f783
IS
938/**
939 * phy_interface_mode_is_rgmii - Convenience function for testing if a
940 * PHY interface mode is RGMII (all variants)
941 * @mode: the phy_interface_t enum
942 */
943static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
944{
945 return mode >= PHY_INTERFACE_MODE_RGMII &&
946 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
947};
948
365c1e64
RK
949/**
950 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
951 * negotiation
952 * @mode: one of &enum phy_interface_t
953 *
954 * Returns true if the phy interface mode uses the 16-bit negotiation
955 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
956 */
957static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
958{
959 return mode == PHY_INTERFACE_MODE_1000BASEX ||
960 mode == PHY_INTERFACE_MODE_2500BASEX;
961}
962
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FF
963/**
964 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
965 * is RGMII (all variants)
966 * @phydev: the phy_device struct
967 */
968static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
969{
32d0f783 970 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
971};
972
973/*
974 * phy_is_pseudo_fixed_link - Convenience function for testing if this
975 * PHY is the CPU port facing side of an Ethernet switch, or similar.
976 * @phydev: the phy_device struct
977 */
978static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
979{
980 return phydev->is_pseudo_fixed_link;
e463d88c
FF
981}
982
78ffc4ac
RK
983int phy_save_page(struct phy_device *phydev);
984int phy_select_page(struct phy_device *phydev, int page);
985int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
986int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
987int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
988int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
989 u16 mask, u16 set);
990
ac28b9f8 991struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
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SS
992 bool is_c45,
993 struct phy_c45_device_ids *c45_ids);
90eff909 994#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 995struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 996int phy_device_register(struct phy_device *phy);
90eff909
FF
997void phy_device_free(struct phy_device *phydev);
998#else
999static inline
1000struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1001{
1002 return NULL;
1003}
1004
1005static inline int phy_device_register(struct phy_device *phy)
1006{
1007 return 0;
1008}
1009
1010static inline void phy_device_free(struct phy_device *phydev) { }
1011#endif /* CONFIG_PHYLIB */
38737e49 1012void phy_device_remove(struct phy_device *phydev);
2f5cb434 1013int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
1014int phy_suspend(struct phy_device *phydev);
1015int phy_resume(struct phy_device *phydev);
9c2c2e62 1016int __phy_resume(struct phy_device *phydev);
f0f9b4ed 1017int phy_loopback(struct phy_device *phydev, bool enable);
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SS
1018struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1019 phy_interface_t interface);
f8f76db1 1020struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
1021int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1022 u32 flags, phy_interface_t interface);
fa94f6d9 1023int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
1024 void (*handler)(struct net_device *),
1025 phy_interface_t interface);
1026struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1027 void (*handler)(struct net_device *),
1028 phy_interface_t interface);
e1393456
AF
1029void phy_disconnect(struct phy_device *phydev);
1030void phy_detach(struct phy_device *phydev);
1031void phy_start(struct phy_device *phydev);
1032void phy_stop(struct phy_device *phydev);
1033int phy_start_aneg(struct phy_device *phydev);
372788f9 1034int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
1035int phy_speed_down(struct phy_device *phydev, bool sync);
1036int phy_speed_up(struct phy_device *phydev);
e1393456 1037
002ba705 1038int phy_restart_aneg(struct phy_device *phydev);
a9668491 1039int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 1040
bafbdd52
SS
1041static inline void phy_device_reset(struct phy_device *phydev, int value)
1042{
1043 mdio_device_reset(&phydev->mdio, value);
1044}
1045
72ba48be 1046#define phydev_err(_phydev, format, args...) \
e5a03bfd 1047 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 1048
c4fabb8b
AL
1049#define phydev_info(_phydev, format, args...) \
1050 dev_info(&_phydev->mdio.dev, format, ##args)
1051
ab2a605f
AL
1052#define phydev_warn(_phydev, format, args...) \
1053 dev_warn(&_phydev->mdio.dev, format, ##args)
1054
72ba48be 1055#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 1056 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 1057
84eff6d1
AL
1058static inline const char *phydev_name(const struct phy_device *phydev)
1059{
e5a03bfd 1060 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
1061}
1062
2220943a
AL
1063void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1064 __printf(2, 3);
1065void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
1066
1067/* Clause 22 PHY */
af6b6967 1068int genphy_config_init(struct phy_device *phydev);
045925e3 1069int genphy_read_abilities(struct phy_device *phydev);
3fb69bca 1070int genphy_setup_forced(struct phy_device *phydev);
00db8189 1071int genphy_restart_aneg(struct phy_device *phydev);
cd34499c 1072int genphy_config_eee_advert(struct phy_device *phydev);
00db8189 1073int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 1074int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
1075int genphy_update_link(struct phy_device *phydev);
1076int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
1077int genphy_suspend(struct phy_device *phydev);
1078int genphy_resume(struct phy_device *phydev);
f0f9b4ed 1079int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 1080int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
1081static inline int genphy_no_soft_reset(struct phy_device *phydev)
1082{
1083 return 0;
1084}
4c8e0459
LW
1085static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1086{
1087 return 0;
1088}
1089static inline int genphy_no_config_intr(struct phy_device *phydev)
1090{
1091 return 0;
1092}
5df7af85
KH
1093int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1094 u16 regnum);
1095int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1096 u16 regnum, u16 val);
5acde34a
RK
1097
1098/* Clause 45 PHY */
1099int genphy_c45_restart_aneg(struct phy_device *phydev);
1af9f168 1100int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
5acde34a 1101int genphy_c45_aneg_done(struct phy_device *phydev);
998a8a83 1102int genphy_c45_read_link(struct phy_device *phydev);
5acde34a
RK
1103int genphy_c45_read_lpa(struct phy_device *phydev);
1104int genphy_c45_read_pma(struct phy_device *phydev);
1105int genphy_c45_pma_setup_forced(struct phy_device *phydev);
9a5dc8af 1106int genphy_c45_an_config_aneg(struct phy_device *phydev);
5acde34a 1107int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1108int genphy_c45_read_mdix(struct phy_device *phydev);
ac3f5533 1109int genphy_c45_pma_read_abilities(struct phy_device *phydev);
70fa3a96 1110int genphy_c45_read_status(struct phy_device *phydev);
5acde34a 1111
e8a714e0
FF
1112/* The gen10g_* functions are the old Clause 45 stub */
1113int gen10g_config_aneg(struct phy_device *phydev);
e8a714e0 1114
00fde795
HK
1115static inline int phy_read_status(struct phy_device *phydev)
1116{
1117 if (!phydev->drv)
1118 return -EIO;
1119
1120 if (phydev->drv->read_status)
1121 return phydev->drv->read_status(phydev);
1122 else
1123 return genphy_read_status(phydev);
1124}
1125
00db8189 1126void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1127void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1128int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1129int phy_drivers_register(struct phy_driver *new_driver, int n,
1130 struct module *owner);
4f9c85a1 1131void phy_state_machine(struct work_struct *work);
28b2e0d2 1132void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1133void phy_start_machine(struct phy_device *phydev);
00db8189
AF
1134void phy_stop_machine(struct phy_device *phydev);
1135int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 1136void phy_ethtool_ksettings_get(struct phy_device *phydev,
1137 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1138int phy_ethtool_ksettings_set(struct phy_device *phydev,
1139 const struct ethtool_link_ksettings *cmd);
4017b4d3 1140int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
434a4315 1141void phy_request_interrupt(struct phy_device *phydev);
e1393456 1142void phy_print_status(struct phy_device *phydev);
f3a6bd39 1143int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1144void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
22c0ef6b 1145void phy_advertise_supported(struct phy_device *phydev);
c306ad36 1146void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1147void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1148void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1149 bool autoneg);
70814e81 1150void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1151bool phy_validate_pause(struct phy_device *phydev,
1152 struct ethtool_pauseparam *pp);
00db8189 1153
f62220d3 1154int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1155 int (*run)(struct phy_device *));
f62220d3 1156int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1157 int (*run)(struct phy_device *));
f62220d3 1158int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1159 int (*run)(struct phy_device *));
f62220d3 1160
f38e7a32
WH
1161int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1162int phy_unregister_fixup_for_id(const char *bus_id);
1163int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1164
a59a4d19
GC
1165int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1166int phy_get_eee_err(struct phy_device *phydev);
1167int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1168int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1169int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1170void phy_ethtool_get_wol(struct phy_device *phydev,
1171 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1172int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1173 struct ethtool_link_ksettings *cmd);
1174int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1175 const struct ethtool_link_ksettings *cmd);
e86a8987 1176int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1177
90eff909 1178#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1179int __init mdio_bus_init(void);
1180void mdio_bus_exit(void);
9e8d438e
FF
1181#endif
1182
1183/* Inline function for use within net/core/ethtool.c (built-in) */
1184static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1185{
9e8d438e
FF
1186 if (!phydev->drv)
1187 return -EIO;
1188
1189 mutex_lock(&phydev->lock);
1190 phydev->drv->get_strings(phydev, data);
1191 mutex_unlock(&phydev->lock);
1192
1193 return 0;
c59530d0
FF
1194}
1195
9e8d438e 1196static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1197{
9e8d438e
FF
1198 int ret;
1199
1200 if (!phydev->drv)
1201 return -EIO;
1202
1203 if (phydev->drv->get_sset_count &&
1204 phydev->drv->get_strings &&
1205 phydev->drv->get_stats) {
1206 mutex_lock(&phydev->lock);
1207 ret = phydev->drv->get_sset_count(phydev);
1208 mutex_unlock(&phydev->lock);
1209
1210 return ret;
1211 }
1212
c59530d0
FF
1213 return -EOPNOTSUPP;
1214}
1215
9e8d438e
FF
1216static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1217 struct ethtool_stats *stats, u64 *data)
c59530d0 1218{
9e8d438e
FF
1219 if (!phydev->drv)
1220 return -EIO;
1221
1222 mutex_lock(&phydev->lock);
1223 phydev->drv->get_stats(phydev, stats, data);
1224 mutex_unlock(&phydev->lock);
1225
1226 return 0;
c59530d0 1227}
9b9a8bfc 1228
00db8189 1229extern struct bus_type mdio_bus_type;
c31accd1 1230
648ea013
FF
1231struct mdio_board_info {
1232 const char *bus_id;
1233 char modalias[MDIO_NAME_SIZE];
1234 int mdio_addr;
1235 const void *platform_data;
1236};
1237
90eff909 1238#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1239int mdiobus_register_board_info(const struct mdio_board_info *info,
1240 unsigned int n);
1241#else
1242static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1243 unsigned int n)
1244{
1245 return 0;
1246}
1247#endif
1248
1249
c31accd1
JH
1250/**
1251 * module_phy_driver() - Helper macro for registering PHY drivers
1252 * @__phy_drivers: array of PHY drivers to register
1253 *
1254 * Helper macro for PHY drivers which do not do anything special in module
1255 * init/exit. Each module may only use this macro once, and calling it
1256 * replaces module_init() and module_exit().
1257 */
1258#define phy_module_driver(__phy_drivers, __count) \
1259static int __init phy_module_init(void) \
1260{ \
be01da72 1261 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1262} \
1263module_init(phy_module_init); \
1264static void __exit phy_module_exit(void) \
1265{ \
1266 phy_drivers_unregister(__phy_drivers, __count); \
1267} \
1268module_exit(phy_module_exit)
1269
1270#define module_phy_driver(__phy_drivers) \
1271 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1272
5db5ea99
FF
1273bool phy_driver_is_genphy(struct phy_device *phydev);
1274bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1275
00db8189 1276#endif /* __PHY_H */