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1/*
2 * include/linux/phy.h
3 *
4 * Framework and drivers for configuring and reading different PHYs
5 * Based on code in sungem_phy.c and gianfar_phy.c
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 */
17
18#ifndef __PHY_H
19#define __PHY_H
20
21#include <linux/spinlock.h>
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22#include <linux/ethtool.h>
23#include <linux/mii.h>
24#include <linux/timer.h>
25#include <linux/workqueue.h>
8626d3b4 26#include <linux/mod_devicetable.h>
00db8189 27
60063497 28#include <linux/atomic.h>
0ac49527 29
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30#define PHY_BASIC_FEATURES (SUPPORTED_10baseT_Half | \
31 SUPPORTED_10baseT_Full | \
32 SUPPORTED_100baseT_Half | \
33 SUPPORTED_100baseT_Full | \
34 SUPPORTED_Autoneg | \
35 SUPPORTED_TP | \
36 SUPPORTED_MII)
37
38#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
39 SUPPORTED_1000baseT_Half | \
40 SUPPORTED_1000baseT_Full)
41
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42/*
43 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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44 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
45 * the attached driver handles the interrupt
46 */
47#define PHY_POLL -1
48#define PHY_IGNORE_INTERRUPT -2
49
50#define PHY_HAS_INTERRUPT 0x00000001
51#define PHY_HAS_MAGICANEG 0x00000002
4284b6a5 52#define PHY_IS_INTERNAL 0x00000004
00db8189 53
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54/* Interface Mode definitions */
55typedef enum {
4157ef1b 56 PHY_INTERFACE_MODE_NA,
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57 PHY_INTERFACE_MODE_MII,
58 PHY_INTERFACE_MODE_GMII,
59 PHY_INTERFACE_MODE_SGMII,
60 PHY_INTERFACE_MODE_TBI,
2cc70ba4 61 PHY_INTERFACE_MODE_REVMII,
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62 PHY_INTERFACE_MODE_RMII,
63 PHY_INTERFACE_MODE_RGMII,
a999589c 64 PHY_INTERFACE_MODE_RGMII_ID,
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65 PHY_INTERFACE_MODE_RGMII_RXID,
66 PHY_INTERFACE_MODE_RGMII_TXID,
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67 PHY_INTERFACE_MODE_RTBI,
68 PHY_INTERFACE_MODE_SMII,
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69} phy_interface_t;
70
00db8189 71
e8a2b6a4 72#define PHY_INIT_TIMEOUT 100000
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73#define PHY_STATE_TIME 1
74#define PHY_FORCE_TIMEOUT 10
75#define PHY_AN_TIMEOUT 10
76
e8a2b6a4 77#define PHY_MAX_ADDR 32
00db8189 78
a4d00f17 79/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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80#define PHY_ID_FMT "%s:%02x"
81
82/*
83 * Need to be a little smaller than phydev->dev.bus_id to leave room
84 * for the ":%02x"
85 */
8e401ecc 86#define MII_BUS_ID_SIZE (20 - 3)
a4d00f17 87
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88/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
89 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
90#define MII_ADDR_C45 (1<<30)
91
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92struct device;
93struct sk_buff;
94
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95/*
96 * The Bus class for PHYs. Devices which provide access to
97 * PHYs should register using this structure
98 */
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99struct mii_bus {
100 const char *name;
9d9326d3 101 char id[MII_BUS_ID_SIZE];
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102 void *priv;
103 int (*read)(struct mii_bus *bus, int phy_id, int regnum);
104 int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val);
105 int (*reset)(struct mii_bus *bus);
106
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107 /*
108 * A lock to ensure that only one thing can read/write
109 * the MDIO bus at a time
110 */
35b5f6b1 111 struct mutex mdio_lock;
00db8189 112
18ee49dd 113 struct device *parent;
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114 enum {
115 MDIOBUS_ALLOCATED = 1,
116 MDIOBUS_REGISTERED,
117 MDIOBUS_UNREGISTERED,
118 MDIOBUS_RELEASED,
119 } state;
120 struct device dev;
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121
122 /* list of all PHYs on bus */
123 struct phy_device *phy_map[PHY_MAX_ADDR];
124
c6883996 125 /* PHY addresses to be ignored when probing */
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126 u32 phy_mask;
127
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128 /*
129 * Pointer to an array of interrupts, each PHY's
130 * interrupt at the index matching its address
131 */
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132 int *irq;
133};
46abc021 134#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 135
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136struct mii_bus *mdiobus_alloc_size(size_t);
137static inline struct mii_bus *mdiobus_alloc(void)
138{
139 return mdiobus_alloc_size(0);
140}
141
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142int mdiobus_register(struct mii_bus *bus);
143void mdiobus_unregister(struct mii_bus *bus);
144void mdiobus_free(struct mii_bus *bus);
145struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
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146int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum);
147int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
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148
149
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150#define PHY_INTERRUPT_DISABLED 0x0
151#define PHY_INTERRUPT_ENABLED 0x80000000
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152
153/* PHY state machine states:
154 *
155 * DOWN: PHY device and driver are not ready for anything. probe
156 * should be called if and only if the PHY is in this state,
157 * given that the PHY device exists.
158 * - PHY driver probe function will, depending on the PHY, set
159 * the state to STARTING or READY
160 *
161 * STARTING: PHY device is coming up, and the ethernet driver is
162 * not ready. PHY drivers may set this in the probe function.
163 * If they do, they are responsible for making sure the state is
164 * eventually set to indicate whether the PHY is UP or READY,
165 * depending on the state when the PHY is done starting up.
166 * - PHY driver will set the state to READY
167 * - start will set the state to PENDING
168 *
169 * READY: PHY is ready to send and receive packets, but the
170 * controller is not. By default, PHYs which do not implement
171 * probe will be set to this state by phy_probe(). If the PHY
172 * driver knows the PHY is ready, and the PHY state is STARTING,
173 * then it sets this STATE.
174 * - start will set the state to UP
175 *
176 * PENDING: PHY device is coming up, but the ethernet driver is
177 * ready. phy_start will set this state if the PHY state is
178 * STARTING.
179 * - PHY driver will set the state to UP when the PHY is ready
180 *
181 * UP: The PHY and attached device are ready to do work.
182 * Interrupts should be started here.
183 * - timer moves to AN
184 *
185 * AN: The PHY is currently negotiating the link state. Link is
186 * therefore down for now. phy_timer will set this state when it
187 * detects the state is UP. config_aneg will set this state
188 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
189 * - If autonegotiation finishes, but there's no link, it sets
190 * the state to NOLINK.
191 * - If aneg finishes with link, it sets the state to RUNNING,
192 * and calls adjust_link
193 * - If autonegotiation did not finish after an arbitrary amount
194 * of time, autonegotiation should be tried again if the PHY
195 * supports "magic" autonegotiation (back to AN)
196 * - If it didn't finish, and no magic_aneg, move to FORCING.
197 *
198 * NOLINK: PHY is up, but not currently plugged in.
199 * - If the timer notes that the link comes back, we move to RUNNING
200 * - config_aneg moves to AN
201 * - phy_stop moves to HALTED
202 *
203 * FORCING: PHY is being configured with forced settings
204 * - if link is up, move to RUNNING
205 * - If link is down, we drop to the next highest setting, and
206 * retry (FORCING) after a timeout
207 * - phy_stop moves to HALTED
208 *
209 * RUNNING: PHY is currently up, running, and possibly sending
210 * and/or receiving packets
211 * - timer will set CHANGELINK if we're polling (this ensures the
212 * link state is polled every other cycle of this state machine,
213 * which makes it every other second)
214 * - irq will set CHANGELINK
215 * - config_aneg will set AN
216 * - phy_stop moves to HALTED
217 *
218 * CHANGELINK: PHY experienced a change in link state
219 * - timer moves to RUNNING if link
220 * - timer moves to NOLINK if the link is down
221 * - phy_stop moves to HALTED
222 *
223 * HALTED: PHY is up, but no polling or interrupts are done. Or
224 * PHY is in an error state.
225 *
226 * - phy_start moves to RESUMING
227 *
228 * RESUMING: PHY was halted, but now wants to run again.
229 * - If we are forcing, or aneg is done, timer moves to RUNNING
230 * - If aneg is not done, timer moves to AN
231 * - phy_stop moves to HALTED
232 */
233enum phy_state {
234 PHY_DOWN=0,
235 PHY_STARTING,
236 PHY_READY,
237 PHY_PENDING,
238 PHY_UP,
239 PHY_AN,
240 PHY_RUNNING,
241 PHY_NOLINK,
242 PHY_FORCING,
243 PHY_CHANGELINK,
244 PHY_HALTED,
245 PHY_RESUMING
246};
247
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248/**
249 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
250 * @devices_in_package: Bit vector of devices present.
251 * @device_ids: The device identifer for each present device.
252 */
253struct phy_c45_device_ids {
254 u32 devices_in_package;
255 u32 device_ids[8];
256};
c1f19b51 257
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258/* phy_device: An instance of a PHY
259 *
260 * drv: Pointer to the driver for this PHY instance
261 * bus: Pointer to the bus this PHY is on
262 * dev: driver model device structure for this PHY
263 * phy_id: UID for this device found during discovery
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264 * c45_ids: 802.3-c45 Device Identifers if is_c45.
265 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 266 * is_internal: Set to true if this phy is internal to a MAC.
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267 * state: state of the PHY for management purposes
268 * dev_flags: Device-specific flags used by the PHY driver.
269 * addr: Bus address of PHY
270 * link_timeout: The number of timer firings to wait before the
271 * giving up on the current attempt at acquiring a link
272 * irq: IRQ number of the PHY's interrupt (-1 if none)
273 * phy_timer: The timer for handling the state machine
274 * phy_queue: A work_queue for the interrupt
275 * attached_dev: The attached enet driver's device instance ptr
276 * adjust_link: Callback for the enet controller to respond to
277 * changes in the link state.
278 * adjust_state: Callback for the enet driver to respond to
279 * changes in the state machine.
280 *
281 * speed, duplex, pause, supported, advertising, and
282 * autoneg are used like in mii_if_info
283 *
284 * interrupts currently only supports enabled or disabled,
285 * but could be changed in the future to support enabling
286 * and disabling specific interrupts
287 *
288 * Contains some infrastructure for polling and interrupt
289 * handling, as well as handling shifts in PHY hardware state
290 */
291struct phy_device {
292 /* Information about the PHY type */
293 /* And management functions */
294 struct phy_driver *drv;
295
296 struct mii_bus *bus;
297
298 struct device dev;
299
300 u32 phy_id;
301
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302 struct phy_c45_device_ids c45_ids;
303 bool is_c45;
4284b6a5 304 bool is_internal;
ac28b9f8 305
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306 enum phy_state state;
307
308 u32 dev_flags;
309
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310 phy_interface_t interface;
311
c6883996 312 /* Bus address of the PHY (0-31) */
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313 int addr;
314
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315 /*
316 * forced speed & duplex (no autoneg)
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317 * partner speed & duplex & pause (autoneg)
318 */
319 int speed;
320 int duplex;
321 int pause;
322 int asym_pause;
323
324 /* The most recently read link state */
325 int link;
326
327 /* Enabled Interrupts */
328 u32 interrupts;
329
330 /* Union of PHY and Attached devices' supported modes */
331 /* See mii.h for more info */
332 u32 supported;
333 u32 advertising;
334
335 int autoneg;
336
337 int link_timeout;
338
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339 /*
340 * Interrupt number for this PHY
341 * -1 means no interrupt
342 */
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343 int irq;
344
345 /* private data pointer */
346 /* For use by PHYs to maintain extra state */
347 void *priv;
348
349 /* Interrupt and Polling infrastructure */
350 struct work_struct phy_queue;
a390d1f3 351 struct delayed_work state_queue;
0ac49527 352 atomic_t irq_disable;
00db8189 353
35b5f6b1 354 struct mutex lock;
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355
356 struct net_device *attached_dev;
357
358 void (*adjust_link)(struct net_device *dev);
359
360 void (*adjust_state)(struct net_device *dev);
361};
362#define to_phy_device(d) container_of(d, struct phy_device, dev)
363
364/* struct phy_driver: Driver structure for a particular PHY type
365 *
366 * phy_id: The result of reading the UID registers of this PHY
367 * type, and ANDing them with the phy_id_mask. This driver
368 * only works for PHYs with IDs which match this field
369 * name: The friendly name of this PHY type
370 * phy_id_mask: Defines the important bits of the phy_id
371 * features: A list of features (speed, duplex, etc) supported
372 * by this PHY
373 * flags: A bitfield defining certain other features this PHY
374 * supports (like interrupts)
375 *
376 * The drivers must implement config_aneg and read_status. All
377 * other functions are optional. Note that none of these
378 * functions should be called from interrupt time. The goal is
379 * for the bus read/write functions to be able to block when the
380 * bus transaction is happening, and be freed up by an interrupt
381 * (The MPC85xx has this ability, though it is not currently
382 * supported in the driver).
383 */
384struct phy_driver {
385 u32 phy_id;
386 char *name;
387 unsigned int phy_id_mask;
388 u32 features;
389 u32 flags;
390
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391 /*
392 * Called to initialize the PHY,
393 * including after a reset
394 */
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395 int (*config_init)(struct phy_device *phydev);
396
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397 /*
398 * Called during discovery. Used to set
399 * up device-specific structures, if any
400 */
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401 int (*probe)(struct phy_device *phydev);
402
403 /* PHY Power Management */
404 int (*suspend)(struct phy_device *phydev);
405 int (*resume)(struct phy_device *phydev);
406
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407 /*
408 * Configures the advertisement and resets
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409 * autonegotiation if phydev->autoneg is on,
410 * forces the speed to the current settings in phydev
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411 * if phydev->autoneg is off
412 */
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413 int (*config_aneg)(struct phy_device *phydev);
414
415 /* Determines the negotiated speed and duplex */
416 int (*read_status)(struct phy_device *phydev);
417
418 /* Clears any pending interrupts */
419 int (*ack_interrupt)(struct phy_device *phydev);
420
421 /* Enables or disables interrupts */
422 int (*config_intr)(struct phy_device *phydev);
423
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424 /*
425 * Checks if the PHY generated an interrupt.
426 * For multi-PHY devices with shared PHY interrupt pin
427 */
428 int (*did_interrupt)(struct phy_device *phydev);
429
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430 /* Clears up any memory if needed */
431 void (*remove)(struct phy_device *phydev);
432
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433 /* Returns true if this is a suitable driver for the given
434 * phydev. If NULL, matching is based on phy_id and
435 * phy_id_mask.
436 */
437 int (*match_phy_device)(struct phy_device *phydev);
438
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439 /* Handles ethtool queries for hardware time stamping. */
440 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
441
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442 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
443 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
444
445 /*
446 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
447 * the phy driver promises to deliver it using netif_rx() as
448 * soon as a timestamp becomes available. One of the
449 * PTP_CLASS_ values is passed in 'type'. The function must
450 * return true if the skb is accepted for delivery.
451 */
452 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
453
454 /*
455 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 456 * to deliver it using skb_complete_tx_timestamp() as soon as a
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457 * timestamp becomes available. One of the PTP_CLASS_ values
458 * is passed in 'type'.
459 */
460 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
461
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462 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
463 * enable Wake on LAN, so set_wol is provided to be called in the
464 * ethernet driver's set_wol function. */
465 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
466
467 /* See set_wol, but for checking whether Wake on LAN is enabled. */
468 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
469
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470 struct device_driver driver;
471};
472#define to_phy_driver(d) container_of(d, struct phy_driver, driver)
473
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474#define PHY_ANY_ID "MATCH ANY PHY"
475#define PHY_ANY_UID 0xffffffff
476
477/* A Structure for boards to register fixups with the PHY Lib */
478struct phy_fixup {
479 struct list_head list;
8e401ecc 480 char bus_id[20];
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481 u32 phy_uid;
482 u32 phy_uid_mask;
483 int (*run)(struct phy_device *phydev);
484};
485
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486/**
487 * phy_read - Convenience function for reading a given PHY register
488 * @phydev: the phy_device struct
489 * @regnum: register number to read
490 *
491 * NOTE: MUST NOT be called from interrupt context,
492 * because the bus read/write functions may wait for an interrupt
493 * to conclude the operation.
494 */
abf35df2 495static inline int phy_read(struct phy_device *phydev, u32 regnum)
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496{
497 return mdiobus_read(phydev->bus, phydev->addr, regnum);
498}
499
500/**
501 * phy_write - Convenience function for writing a given PHY register
502 * @phydev: the phy_device struct
503 * @regnum: register number to write
504 * @val: value to write to @regnum
505 *
506 * NOTE: MUST NOT be called from interrupt context,
507 * because the bus read/write functions may wait for an interrupt
508 * to conclude the operation.
509 */
abf35df2 510static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
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511{
512 return mdiobus_write(phydev->bus, phydev->addr, regnum, val);
513}
514
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515/**
516 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
517 * @phydev: the phy_device struct
518 *
519 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
520 * PHY_IGNORE_INTERRUPT
521 */
522static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
523{
524 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
525}
526
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527/**
528 * phy_is_internal - Convenience function for testing if a PHY is internal
529 * @phydev: the phy_device struct
530 */
531static inline bool phy_is_internal(struct phy_device *phydev)
532{
533 return phydev->is_internal;
534}
535
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536struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
537 bool is_c45, struct phy_c45_device_ids *c45_ids);
538struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 539int phy_device_register(struct phy_device *phy);
2f5cb434 540int phy_init_hw(struct phy_device *phydev);
e1393456 541struct phy_device * phy_attach(struct net_device *dev,
f9a8f83b 542 const char *bus_id, phy_interface_t interface);
f8f76db1 543struct phy_device *phy_find_first(struct mii_bus *bus);
fa94f6d9 544int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
f9a8f83b 545 void (*handler)(struct net_device *),
fa94f6d9 546 phy_interface_t interface);
f62220d3 547struct phy_device * phy_connect(struct net_device *dev, const char *bus_id,
f9a8f83b 548 void (*handler)(struct net_device *),
e8a2b6a4 549 phy_interface_t interface);
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550void phy_disconnect(struct phy_device *phydev);
551void phy_detach(struct phy_device *phydev);
552void phy_start(struct phy_device *phydev);
553void phy_stop(struct phy_device *phydev);
554int phy_start_aneg(struct phy_device *phydev);
555
e1393456 556int phy_stop_interrupts(struct phy_device *phydev);
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557
558static inline int phy_read_status(struct phy_device *phydev) {
559 return phydev->drv->read_status(phydev);
560}
561
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562int genphy_restart_aneg(struct phy_device *phydev);
563int genphy_config_aneg(struct phy_device *phydev);
564int genphy_update_link(struct phy_device *phydev);
565int genphy_read_status(struct phy_device *phydev);
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566int genphy_suspend(struct phy_device *phydev);
567int genphy_resume(struct phy_device *phydev);
00db8189 568void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 569void phy_drivers_unregister(struct phy_driver *drv, int n);
00db8189 570int phy_driver_register(struct phy_driver *new_driver);
d5bf9071 571int phy_drivers_register(struct phy_driver *new_driver, int n);
4f9c85a1 572void phy_state_machine(struct work_struct *work);
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573void phy_change(struct work_struct *work);
574void phy_mac_interrupt(struct phy_device *phydev, int new_link);
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575void phy_start_machine(struct phy_device *phydev,
576 void (*handler)(struct net_device *));
577void phy_stop_machine(struct phy_device *phydev);
578int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
579int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
580int phy_mii_ioctl(struct phy_device *phydev,
28b04113 581 struct ifreq *ifr, int cmd);
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582int phy_start_interrupts(struct phy_device *phydev);
583void phy_print_status(struct phy_device *phydev);
6f4a7f41 584void phy_device_free(struct phy_device *phydev);
00db8189 585
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AF
586int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
587 int (*run)(struct phy_device *));
588int phy_register_fixup_for_id(const char *bus_id,
589 int (*run)(struct phy_device *));
590int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
591 int (*run)(struct phy_device *));
592int phy_scan_fixups(struct phy_device *phydev);
593
a59a4d19
GC
594int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
595int phy_get_eee_err(struct phy_device *phydev);
596int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
597int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb
MS
598int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
599void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
a59a4d19 600
9b9a8bfc
AF
601int __init mdio_bus_init(void);
602void mdio_bus_exit(void);
603
00db8189 604extern struct bus_type mdio_bus_type;
00db8189 605#endif /* __PHY_H */