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2874c5fd 1/* SPDX-License-Identifier: GPL-2.0-or-later */
00db8189 2/*
00db8189 3 * Framework and drivers for configuring and reading different PHYs
d8de01b7 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
00db8189
AF
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
00db8189
AF
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
2220943a 14#include <linux/compiler.h>
00db8189 15#include <linux/spinlock.h>
13df29f6 16#include <linux/ethtool.h>
b31cdffa 17#include <linux/linkmode.h>
a68a8138 18#include <linux/netlink.h>
bac83c65 19#include <linux/mdio.h>
13df29f6 20#include <linux/mii.h>
4715f65f 21#include <linux/mii_timestamper.h>
3e3aaf64 22#include <linux/module.h>
13df29f6
MR
23#include <linux/timer.h>
24#include <linux/workqueue.h>
8626d3b4 25#include <linux/mod_devicetable.h>
080bb352 26#include <linux/u64_stats_sync.h>
9010f9de 27#include <linux/irqreturn.h>
bd971ff0 28#include <linux/iopoll.h>
63490847 29#include <linux/refcount.h>
00db8189 30
60063497 31#include <linux/atomic.h>
0ac49527 32
e9fbdf17 33#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
00db8189
AF
34 SUPPORTED_TP | \
35 SUPPORTED_MII)
36
e9fbdf17
FF
37#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
38 SUPPORTED_10baseT_Full)
39
40#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
41 SUPPORTED_100baseT_Full)
42
43#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
00db8189
AF
44 SUPPORTED_1000baseT_Full)
45
719655a1
AL
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
9e857a40 52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
719655a1
AL
53extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
54
55#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
56#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
57#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
58#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
59#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
60#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
9e857a40 61#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
719655a1 62#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 63
54638c6e
DE
64extern const int phy_basic_ports_array[3];
65extern const int phy_fibre_port_array[1];
66extern const int phy_all_ports_features_array[7];
3c1bcc86
AL
67extern const int phy_10_100_features_array[4];
68extern const int phy_basic_t1_features_array[2];
69extern const int phy_gbit_features_array[2];
70extern const int phy_10gbit_features_array[1];
71
c5e38a94
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72/*
73 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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74 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
75 * the attached driver handles the interrupt
76 */
77#define PHY_POLL -1
78#define PHY_IGNORE_INTERRUPT -2
79
a4307c0e
HK
80#define PHY_IS_INTERNAL 0x00000001
81#define PHY_RST_AFTER_CLK_EN 0x00000002
97c22438 82#define PHY_POLL_CABLE_TEST 0x00000004
a9049e0c 83#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 84
e8a2b6a4
AF
85/* Interface Mode definitions */
86typedef enum {
4157ef1b 87 PHY_INTERFACE_MODE_NA,
735d8a18 88 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
AF
89 PHY_INTERFACE_MODE_MII,
90 PHY_INTERFACE_MODE_GMII,
91 PHY_INTERFACE_MODE_SGMII,
92 PHY_INTERFACE_MODE_TBI,
2cc70ba4 93 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
94 PHY_INTERFACE_MODE_RMII,
95 PHY_INTERFACE_MODE_RGMII,
a999589c 96 PHY_INTERFACE_MODE_RGMII_ID,
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KP
97 PHY_INTERFACE_MODE_RGMII_RXID,
98 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
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99 PHY_INTERFACE_MODE_RTBI,
100 PHY_INTERFACE_MODE_SMII,
898dd0bd 101 PHY_INTERFACE_MODE_XGMII,
58b05e58 102 PHY_INTERFACE_MODE_XLGMII,
fd70f72c 103 PHY_INTERFACE_MODE_MOCA,
b9d12085 104 PHY_INTERFACE_MODE_QSGMII,
572de608 105 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
106 PHY_INTERFACE_MODE_1000BASEX,
107 PHY_INTERFACE_MODE_2500BASEX,
108 PHY_INTERFACE_MODE_RXAUI,
c125ca09 109 PHY_INTERFACE_MODE_XAUI,
c114574e
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110 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
111 PHY_INTERFACE_MODE_10GBASER,
4618d671 112 PHY_INTERFACE_MODE_USXGMII,
c114574e
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113 /* 10GBASE-KR - with Clause 73 AN */
114 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 115 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
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116} phy_interface_t;
117
1f9127ca
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118/**
119 * phy_supported_speeds - return all speeds currently supported by a phy device
120 * @phy: The phy device to return supported speeds of.
121 * @speeds: buffer to store supported speeds in.
122 * @size: size of speeds buffer.
123 *
d8de01b7
RD
124 * Description: Returns the number of supported speeds, and fills
125 * the speeds buffer with the supported speeds. If speeds buffer is
126 * too small to contain all currently supported speeds, will return as
1f9127ca
ZB
127 * many speeds as can fit.
128 */
129unsigned int phy_supported_speeds(struct phy_device *phy,
130 unsigned int *speeds,
131 unsigned int size);
132
8a2fe56e 133/**
d8de01b7
RD
134 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
135 * @interface: enum phy_interface_t value
136 *
137 * Description: maps 'enum phy_interface_t' defined in this file
8a2fe56e
FF
138 * into the device tree binding of 'phy-mode', so that Ethernet
139 * device driver can get phy interface from device tree.
140 */
141static inline const char *phy_modes(phy_interface_t interface)
142{
143 switch (interface) {
144 case PHY_INTERFACE_MODE_NA:
145 return "";
735d8a18
FF
146 case PHY_INTERFACE_MODE_INTERNAL:
147 return "internal";
8a2fe56e
FF
148 case PHY_INTERFACE_MODE_MII:
149 return "mii";
150 case PHY_INTERFACE_MODE_GMII:
151 return "gmii";
152 case PHY_INTERFACE_MODE_SGMII:
153 return "sgmii";
154 case PHY_INTERFACE_MODE_TBI:
155 return "tbi";
156 case PHY_INTERFACE_MODE_REVMII:
157 return "rev-mii";
158 case PHY_INTERFACE_MODE_RMII:
159 return "rmii";
160 case PHY_INTERFACE_MODE_RGMII:
161 return "rgmii";
162 case PHY_INTERFACE_MODE_RGMII_ID:
163 return "rgmii-id";
164 case PHY_INTERFACE_MODE_RGMII_RXID:
165 return "rgmii-rxid";
166 case PHY_INTERFACE_MODE_RGMII_TXID:
167 return "rgmii-txid";
168 case PHY_INTERFACE_MODE_RTBI:
169 return "rtbi";
170 case PHY_INTERFACE_MODE_SMII:
171 return "smii";
172 case PHY_INTERFACE_MODE_XGMII:
173 return "xgmii";
58b05e58
JA
174 case PHY_INTERFACE_MODE_XLGMII:
175 return "xlgmii";
fd70f72c
FF
176 case PHY_INTERFACE_MODE_MOCA:
177 return "moca";
b9d12085
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178 case PHY_INTERFACE_MODE_QSGMII:
179 return "qsgmii";
572de608
SW
180 case PHY_INTERFACE_MODE_TRGMII:
181 return "trgmii";
55601a88
AL
182 case PHY_INTERFACE_MODE_1000BASEX:
183 return "1000base-x";
184 case PHY_INTERFACE_MODE_2500BASEX:
185 return "2500base-x";
186 case PHY_INTERFACE_MODE_RXAUI:
187 return "rxaui";
c125ca09
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188 case PHY_INTERFACE_MODE_XAUI:
189 return "xaui";
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190 case PHY_INTERFACE_MODE_10GBASER:
191 return "10gbase-r";
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192 case PHY_INTERFACE_MODE_USXGMII:
193 return "usxgmii";
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194 case PHY_INTERFACE_MODE_10GKR:
195 return "10gbase-kr";
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196 default:
197 return "unknown";
198 }
199}
200
00db8189 201
e8a2b6a4 202#define PHY_INIT_TIMEOUT 100000
00db8189 203#define PHY_FORCE_TIMEOUT 10
00db8189 204
e8a2b6a4 205#define PHY_MAX_ADDR 32
00db8189 206
a4d00f17 207/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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208#define PHY_ID_FMT "%s:%02x"
209
4567d686 210#define MII_BUS_ID_SIZE 61
a4d00f17 211
313162d0 212struct device;
9525ae83 213struct phylink;
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214struct sfp_bus;
215struct sfp_upstream_ops;
313162d0
PG
216struct sk_buff;
217
080bb352
FF
218struct mdio_bus_stats {
219 u64_stats_t transfers;
220 u64_stats_t errors;
221 u64_stats_t writes;
222 u64_stats_t reads;
223 /* Must be last, add new statistics above */
224 struct u64_stats_sync syncp;
225};
226
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227/* Represents a shared structure between different phydev's in the same
228 * package, for example a quad PHY. See phy_package_join() and
229 * phy_package_leave().
230 */
231struct phy_package_shared {
232 int addr;
233 refcount_t refcnt;
234 unsigned long flags;
235 size_t priv_size;
236
237 /* private data pointer */
238 /* note that this pointer is shared between different phydevs and
239 * the user has to take care of appropriate locking. It is allocated
240 * and freed automatically by phy_package_join() and
241 * phy_package_leave().
242 */
243 void *priv;
244};
245
246/* used as bit number in atomic bitops */
247#define PHY_SHARED_F_INIT_DONE 0
248
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249/*
250 * The Bus class for PHYs. Devices which provide access to
251 * PHYs should register using this structure
252 */
00db8189 253struct mii_bus {
3e3aaf64 254 struct module *owner;
00db8189 255 const char *name;
9d9326d3 256 char id[MII_BUS_ID_SIZE];
00db8189 257 void *priv;
ccaa953e
AL
258 int (*read)(struct mii_bus *bus, int addr, int regnum);
259 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
00db8189 260 int (*reset)(struct mii_bus *bus);
080bb352 261 struct mdio_bus_stats stats[PHY_MAX_ADDR];
00db8189 262
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263 unsigned int is_managed:1; /* is device-managed */
264 unsigned int is_managed_registered:1;
265
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266 /*
267 * A lock to ensure that only one thing can read/write
268 * the MDIO bus at a time
269 */
35b5f6b1 270 struct mutex mdio_lock;
00db8189 271
18ee49dd 272 struct device *parent;
46abc021
LB
273 enum {
274 MDIOBUS_ALLOCATED = 1,
275 MDIOBUS_REGISTERED,
276 MDIOBUS_UNREGISTERED,
277 MDIOBUS_RELEASED,
278 } state;
279 struct device dev;
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AF
280
281 /* list of all PHYs on bus */
7f854420 282 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 283
c6883996 284 /* PHY addresses to be ignored when probing */
f896424c
MP
285 u32 phy_mask;
286
922f2dd1
FF
287 /* PHY addresses to ignore the TA/read failure */
288 u32 phy_ignore_ta_mask;
289
c5e38a94 290 /*
e7f4dc35
AL
291 * An array of interrupts, each PHY's interrupt at the index
292 * matching its address
c5e38a94 293 */
e7f4dc35 294 int irq[PHY_MAX_ADDR];
69226896
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295
296 /* GPIO reset pulse width in microseconds */
297 int reset_delay_us;
d396e84c
SS
298 /* RESET GPIO descriptor pointer */
299 struct gpio_desc *reset_gpiod;
63490847
MW
300
301 /* protect access to the shared element */
302 struct mutex shared_lock;
303
304 /* shared state across different PHYs */
305 struct phy_package_shared *shared[PHY_MAX_ADDR];
00db8189 306};
46abc021 307#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 308
eb8a54a7
TT
309struct mii_bus *mdiobus_alloc_size(size_t);
310static inline struct mii_bus *mdiobus_alloc(void)
311{
312 return mdiobus_alloc_size(0);
313}
314
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315int __mdiobus_register(struct mii_bus *bus, struct module *owner);
316#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
38f961e7
HK
317static inline int devm_mdiobus_register(struct mii_bus *bus)
318{
319 int ret;
320
321 if (!bus->is_managed)
322 return -EPERM;
323
324 ret = mdiobus_register(bus);
325 if (!ret)
326 bus->is_managed_registered = 1;
327
328 return ret;
329}
330
2e888103
LB
331void mdiobus_unregister(struct mii_bus *bus);
332void mdiobus_free(struct mii_bus *bus);
6d48f44b
GS
333struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
334static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
335{
336 return devm_mdiobus_alloc_size(dev, 0);
337}
338
ce69e216 339struct mii_bus *mdio_find_bus(const char *mdio_name);
6d48f44b 340void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 341struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 342
695bce8f
HK
343#define PHY_INTERRUPT_DISABLED false
344#define PHY_INTERRUPT_ENABLED true
00db8189
AF
345
346/* PHY state machine states:
347 *
348 * DOWN: PHY device and driver are not ready for anything. probe
349 * should be called if and only if the PHY is in this state,
350 * given that the PHY device exists.
899a3cbb 351 * - PHY driver probe function will set the state to READY
00db8189
AF
352 *
353 * READY: PHY is ready to send and receive packets, but the
354 * controller is not. By default, PHYs which do not implement
899a3cbb 355 * probe will be set to this state by phy_probe().
00db8189
AF
356 * - start will set the state to UP
357 *
00db8189
AF
358 * UP: The PHY and attached device are ready to do work.
359 * Interrupts should be started here.
85a1f31d 360 * - timer moves to NOLINK or RUNNING
00db8189
AF
361 *
362 * NOLINK: PHY is up, but not currently plugged in.
8deeb630 363 * - irq or timer will set RUNNING if link comes back
00db8189
AF
364 * - phy_stop moves to HALTED
365 *
00db8189
AF
366 * RUNNING: PHY is currently up, running, and possibly sending
367 * and/or receiving packets
8deeb630 368 * - irq or timer will set NOLINK if link goes down
00db8189
AF
369 * - phy_stop moves to HALTED
370 *
a68a8138
AL
371 * CABLETEST: PHY is performing a cable test. Packet reception/sending
372 * is not expected to work, carrier will be indicated as down. PHY will be
373 * poll once per second, or on interrupt for it current state.
374 * Once complete, move to UP to restart the PHY.
375 * - phy_stop aborts the running test and moves to HALTED
376 *
00db8189
AF
377 * HALTED: PHY is up, but no polling or interrupts are done. Or
378 * PHY is in an error state.
f24098f8 379 * - phy_start moves to UP
00db8189
AF
380 */
381enum phy_state {
4017b4d3 382 PHY_DOWN = 0,
00db8189 383 PHY_READY,
2b3e88ea 384 PHY_HALTED,
00db8189 385 PHY_UP,
00db8189
AF
386 PHY_RUNNING,
387 PHY_NOLINK,
a68a8138 388 PHY_CABLETEST,
00db8189
AF
389};
390
ac28b9f8
DD
391/**
392 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
393 * @devices_in_package: Bit vector of devices present.
394 * @device_ids: The device identifer for each present device.
395 */
396struct phy_c45_device_ids {
397 u32 devices_in_package;
398 u32 device_ids[8];
399};
c1f19b51 400
76564261 401struct macsec_context;
2e181358 402struct macsec_ops;
76564261 403
00db8189
AF
404/* phy_device: An instance of a PHY
405 *
406 * drv: Pointer to the driver for this PHY instance
00db8189 407 * phy_id: UID for this device found during discovery
ac28b9f8
DD
408 * c45_ids: 802.3-c45 Device Identifers if is_c45.
409 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 410 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 411 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
3b8b11f9 412 * is_gigabit_capable: Set to true if PHY supports 1000Mbps
aae88261 413 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 414 * suspended: Set to true if this phy has been suspended successfully.
611d779a 415 * suspended_by_mdio_bus: Set to true if this phy was suspended by MDIO bus.
a3995460 416 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 417 * loopback_enabled: Set true if this phy has been loopbacked successfully.
5eee3bb7 418 * downshifted_rate: Set true if link speed has been downshifted.
00db8189
AF
419 * state: state of the PHY for management purposes
420 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
421 * irq: IRQ number of the PHY's interrupt (-1 if none)
422 * phy_timer: The timer for handling the state machine
298e54fa
RK
423 * sfp_bus_attached: flag indicating whether the SFP bus has been attached
424 * sfp_bus: SFP bus attached to this PHY's fiber port
00db8189
AF
425 * attached_dev: The attached enet driver's device instance ptr
426 * adjust_link: Callback for the enet controller to respond to
427 * changes in the link state.
2e181358 428 * macsec_ops: MACsec offloading ops.
00db8189 429 *
114002bc
FF
430 * speed, duplex, pause, supported, advertising, lp_advertising,
431 * and autoneg are used like in mii_if_info
00db8189
AF
432 *
433 * interrupts currently only supports enabled or disabled,
434 * but could be changed in the future to support enabling
435 * and disabling specific interrupts
436 *
437 * Contains some infrastructure for polling and interrupt
438 * handling, as well as handling shifts in PHY hardware state
439 */
440struct phy_device {
e5a03bfd
AL
441 struct mdio_device mdio;
442
00db8189
AF
443 /* Information about the PHY type */
444 /* And management functions */
445 struct phy_driver *drv;
446
00db8189
AF
447 u32 phy_id;
448
ac28b9f8 449 struct phy_c45_device_ids c45_ids;
87e5808d
HK
450 unsigned is_c45:1;
451 unsigned is_internal:1;
452 unsigned is_pseudo_fixed_link:1;
3b8b11f9 453 unsigned is_gigabit_capable:1;
87e5808d
HK
454 unsigned has_fixups:1;
455 unsigned suspended:1;
611d779a 456 unsigned suspended_by_mdio_bus:1;
87e5808d
HK
457 unsigned sysfs_links:1;
458 unsigned loopback_enabled:1;
5eee3bb7 459 unsigned downshifted_rate:1;
87e5808d
HK
460
461 unsigned autoneg:1;
462 /* The most recently read link state */
463 unsigned link:1;
4950c2ba 464 unsigned autoneg_complete:1;
ac28b9f8 465
695bce8f
HK
466 /* Interrupts are enabled */
467 unsigned interrupts:1;
468
00db8189
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469 enum phy_state state;
470
471 u32 dev_flags;
472
e8a2b6a4
AF
473 phy_interface_t interface;
474
c5e38a94
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475 /*
476 * forced speed & duplex (no autoneg)
00db8189
AF
477 * partner speed & duplex & pause (autoneg)
478 */
479 int speed;
480 int duplex;
481 int pause;
482 int asym_pause;
bdbdac76
OR
483 u8 master_slave_get;
484 u8 master_slave_set;
485 u8 master_slave_state;
00db8189 486
3c1bcc86
AL
487 /* Union of PHY and Attached devices' supported link modes */
488 /* See ethtool.h for more info */
489 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
490 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
c0ec3c27 491 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
65b27995
HK
492 /* used with phy_speed_down */
493 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
00db8189 494
d853d145 495 /* Energy efficient ethernet modes which should be prohibited */
496 u32 eee_broken_modes;
497
2e0bc452
ZB
498#ifdef CONFIG_LED_TRIGGER_PHY
499 struct phy_led_trigger *phy_led_triggers;
500 unsigned int phy_num_led_triggers;
501 struct phy_led_trigger *last_triggered;
3928ee64
MS
502
503 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
504#endif
505
c5e38a94
AF
506 /*
507 * Interrupt number for this PHY
508 * -1 means no interrupt
509 */
00db8189
AF
510 int irq;
511
512 /* private data pointer */
513 /* For use by PHYs to maintain extra state */
514 void *priv;
515
63490847
MW
516 /* shared data pointer */
517 /* For use by PHYs inside the same package that need a shared state. */
518 struct phy_package_shared *shared;
519
1dd3f212
AL
520 /* Reporting cable test results */
521 struct sk_buff *skb;
522 void *ehdr;
523 struct nlattr *nest;
524
00db8189 525 /* Interrupt and Polling infrastructure */
a390d1f3 526 struct delayed_work state_queue;
00db8189 527
35b5f6b1 528 struct mutex lock;
00db8189 529
298e54fa
RK
530 /* This may be modified under the rtnl lock */
531 bool sfp_bus_attached;
532 struct sfp_bus *sfp_bus;
9525ae83 533 struct phylink *phylink;
00db8189 534 struct net_device *attached_dev;
4715f65f 535 struct mii_timestamper *mii_ts;
00db8189 536
634ec36c 537 u8 mdix;
f4ed2fe3 538 u8 mdix_ctrl;
634ec36c 539
a307593a 540 void (*phy_link_change)(struct phy_device *phydev, bool up);
00db8189 541 void (*adjust_link)(struct net_device *dev);
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542
543#if IS_ENABLED(CONFIG_MACSEC)
544 /* MACsec management functions */
545 const struct macsec_ops *macsec_ops;
546#endif
00db8189 547};
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548#define to_phy_device(d) container_of(to_mdio_device(d), \
549 struct phy_device, mdio)
00db8189 550
f2bc8ad3
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551/* A structure containing possible configuration parameters
552 * for a TDR cable test. The driver does not need to implement
553 * all the parameters, but should report what is actually used.
554 */
555struct phy_tdr_config {
556 u32 first;
557 u32 last;
558 u32 step;
559 s8 pair;
560};
561#define PHY_PAIR_ALL -1
562
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563/* struct phy_driver: Driver structure for a particular PHY type
564 *
a9049e0c 565 * driver_data: static driver data
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566 * phy_id: The result of reading the UID registers of this PHY
567 * type, and ANDing them with the phy_id_mask. This driver
568 * only works for PHYs with IDs which match this field
569 * name: The friendly name of this PHY type
570 * phy_id_mask: Defines the important bits of the phy_id
3e64cf7a
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571 * features: A mandatory list of features (speed, duplex, etc)
572 * supported by this PHY
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573 * flags: A bitfield defining certain other features this PHY
574 * supports (like interrupts)
575 *
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576 * All functions are optional. If config_aneg or read_status
577 * are not implemented, the phy core uses the genphy versions.
578 * Note that none of these functions should be called from
579 * interrupt time. The goal is for the bus read/write functions
580 * to be able to block when the bus transaction is happening,
581 * and be freed up by an interrupt (The MPC85xx has this ability,
582 * though it is not currently supported in the driver).
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583 */
584struct phy_driver {
a9049e0c 585 struct mdio_driver_common mdiodrv;
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586 u32 phy_id;
587 char *name;
511e3036 588 u32 phy_id_mask;
719655a1 589 const unsigned long * const features;
00db8189 590 u32 flags;
860f6e9e 591 const void *driver_data;
00db8189 592
c5e38a94 593 /*
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594 * Called to issue a PHY software reset
595 */
596 int (*soft_reset)(struct phy_device *phydev);
597
598 /*
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599 * Called to initialize the PHY,
600 * including after a reset
601 */
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602 int (*config_init)(struct phy_device *phydev);
603
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604 /*
605 * Called during discovery. Used to set
606 * up device-specific structures, if any
607 */
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608 int (*probe)(struct phy_device *phydev);
609
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610 /*
611 * Probe the hardware to determine what abilities it has.
612 * Should only set phydev->supported.
613 */
614 int (*get_features)(struct phy_device *phydev);
615
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616 /* PHY Power Management */
617 int (*suspend)(struct phy_device *phydev);
618 int (*resume)(struct phy_device *phydev);
619
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620 /*
621 * Configures the advertisement and resets
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622 * autonegotiation if phydev->autoneg is on,
623 * forces the speed to the current settings in phydev
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624 * if phydev->autoneg is off
625 */
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626 int (*config_aneg)(struct phy_device *phydev);
627
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628 /* Determines the auto negotiation result */
629 int (*aneg_done)(struct phy_device *phydev);
630
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631 /* Determines the negotiated speed and duplex */
632 int (*read_status)(struct phy_device *phydev);
633
634 /* Clears any pending interrupts */
635 int (*ack_interrupt)(struct phy_device *phydev);
636
637 /* Enables or disables interrupts */
638 int (*config_intr)(struct phy_device *phydev);
639
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640 /*
641 * Checks if the PHY generated an interrupt.
642 * For multi-PHY devices with shared PHY interrupt pin
249bc974 643 * Set interrupt bits have to be cleared.
a8729eb3
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644 */
645 int (*did_interrupt)(struct phy_device *phydev);
646
49644e68 647 /* Override default interrupt handling */
9010f9de 648 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
49644e68 649
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650 /* Clears up any memory if needed */
651 void (*remove)(struct phy_device *phydev);
652
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653 /* Returns true if this is a suitable driver for the given
654 * phydev. If NULL, matching is based on phy_id and
655 * phy_id_mask.
656 */
657 int (*match_phy_device)(struct phy_device *phydev);
658
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659 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
660 * enable Wake on LAN, so set_wol is provided to be called in the
661 * ethernet driver's set_wol function. */
662 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
663
664 /* See set_wol, but for checking whether Wake on LAN is enabled. */
665 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
666
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667 /*
668 * Called to inform a PHY device driver when the core is about to
669 * change the link state. This callback is supposed to be used as
670 * fixup hook for drivers that need to take action when the link
671 * state changes. Drivers are by no means allowed to mess with the
672 * PHY device structure in their implementations.
673 */
674 void (*link_change_notify)(struct phy_device *dev);
675
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676 /*
677 * Phy specific driver override for reading a MMD register.
678 * This function is optional for PHY specific drivers. When
679 * not provided, the default MMD read function will be used
680 * by phy_read_mmd(), which will use either a direct read for
681 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
682 * devnum is the MMD device number within the PHY device,
683 * regnum is the register within the selected MMD device.
684 */
685 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
686
687 /*
688 * Phy specific driver override for writing a MMD register.
689 * This function is optional for PHY specific drivers. When
690 * not provided, the default MMD write function will be used
691 * by phy_write_mmd(), which will use either a direct write for
692 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
693 * devnum is the MMD device number within the PHY device,
694 * regnum is the register within the selected MMD device.
695 * val is the value to be written.
696 */
697 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
698 u16 val);
699
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700 int (*read_page)(struct phy_device *dev);
701 int (*write_page)(struct phy_device *dev, int page);
702
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703 /* Get the size and type of the eeprom contained within a plug-in
704 * module */
705 int (*module_info)(struct phy_device *dev,
706 struct ethtool_modinfo *modinfo);
707
708 /* Get the eeprom information from the plug-in module */
709 int (*module_eeprom)(struct phy_device *dev,
710 struct ethtool_eeprom *ee, u8 *data);
711
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712 /* Start a cable test */
713 int (*cable_test_start)(struct phy_device *dev);
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714
715 /* Start a raw TDR cable test */
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716 int (*cable_test_tdr_start)(struct phy_device *dev,
717 const struct phy_tdr_config *config);
1a644de2 718
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719 /* Once per second, or on interrupt, request the status of the
720 * test.
721 */
722 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
723
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724 /* Get statistics from the phy using ethtool */
725 int (*get_sset_count)(struct phy_device *dev);
726 void (*get_strings)(struct phy_device *dev, u8 *data);
727 void (*get_stats)(struct phy_device *dev,
728 struct ethtool_stats *stats, u64 *data);
968ad9da
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729
730 /* Get and Set PHY tunables */
731 int (*get_tunable)(struct phy_device *dev,
732 struct ethtool_tunable *tuna, void *data);
733 int (*set_tunable)(struct phy_device *dev,
734 struct ethtool_tunable *tuna,
735 const void *data);
f0f9b4ed 736 int (*set_loopback)(struct phy_device *dev, bool enable);
80660219
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737 int (*get_sqi)(struct phy_device *dev);
738 int (*get_sqi_max)(struct phy_device *dev);
00db8189 739};
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740#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
741 struct phy_driver, mdiodrv)
00db8189 742
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743#define PHY_ANY_ID "MATCH ANY PHY"
744#define PHY_ANY_UID 0xffffffff
745
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746#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
747#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
748#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
749
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750/* A Structure for boards to register fixups with the PHY Lib */
751struct phy_fixup {
752 struct list_head list;
4567d686 753 char bus_id[MII_BUS_ID_SIZE + 3];
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AF
754 u32 phy_uid;
755 u32 phy_uid_mask;
756 int (*run)(struct phy_device *phydev);
757};
758
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759const char *phy_speed_to_str(int speed);
760const char *phy_duplex_to_str(unsigned int duplex);
761
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762/* A structure for mapping a particular speed and duplex
763 * combination to a particular SUPPORTED and ADVERTISED value
764 */
765struct phy_setting {
766 u32 speed;
767 u8 duplex;
768 u8 bit;
769};
770
771const struct phy_setting *
772phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
3c1bcc86 773 bool exact);
0ccb4fc6 774size_t phy_speeds(unsigned int *speeds, size_t size,
3c1bcc86 775 unsigned long *mask);
a4eaed9f 776void of_set_phy_supported(struct phy_device *phydev);
3feb9b23 777void of_set_phy_eee_broken(struct phy_device *phydev);
331c56ac 778int phy_speed_down_core(struct phy_device *phydev);
0ccb4fc6 779
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780/**
781 * phy_is_started - Convenience function to check whether PHY is started
782 * @phydev: The phy_device struct
783 */
784static inline bool phy_is_started(struct phy_device *phydev)
785{
a2fc9d7e 786 return phydev->state >= PHY_UP;
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HK
787}
788
2d880b87 789void phy_resolve_aneg_pause(struct phy_device *phydev);
8c5e850c 790void phy_resolve_aneg_linkmode(struct phy_device *phydev);
5eee3bb7 791void phy_check_downshift(struct phy_device *phydev);
8c5e850c 792
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793/**
794 * phy_read - Convenience function for reading a given PHY register
795 * @phydev: the phy_device struct
796 * @regnum: register number to read
797 *
798 * NOTE: MUST NOT be called from interrupt context,
799 * because the bus read/write functions may wait for an interrupt
800 * to conclude the operation.
801 */
abf35df2 802static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 803{
e5a03bfd 804 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
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LB
805}
806
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807#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
808 timeout_us, sleep_before_read) \
809({ \
810 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
811 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
812 if (val < 0) \
813 __ret = val; \
814 if (__ret) \
815 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
816 __ret; \
817})
818
819
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820/**
821 * __phy_read - convenience function for reading a given PHY register
822 * @phydev: the phy_device struct
823 * @regnum: register number to read
824 *
825 * The caller must have taken the MDIO bus lock.
826 */
827static inline int __phy_read(struct phy_device *phydev, u32 regnum)
828{
829 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
830}
831
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832/**
833 * phy_write - Convenience function for writing a given PHY register
834 * @phydev: the phy_device struct
835 * @regnum: register number to write
836 * @val: value to write to @regnum
837 *
838 * NOTE: MUST NOT be called from interrupt context,
839 * because the bus read/write functions may wait for an interrupt
840 * to conclude the operation.
841 */
abf35df2 842static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 843{
e5a03bfd 844 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
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LB
845}
846
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847/**
848 * __phy_write - Convenience function for writing a given PHY register
849 * @phydev: the phy_device struct
850 * @regnum: register number to write
851 * @val: value to write to @regnum
852 *
853 * The caller must have taken the MDIO bus lock.
854 */
855static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
856{
857 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
858 val);
859}
860
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861/**
862 * __phy_modify_changed() - Convenience function for modifying a PHY register
863 * @phydev: a pointer to a &struct phy_device
864 * @regnum: register number
865 * @mask: bit mask of bits to clear
866 * @set: bit mask of bits to set
867 *
868 * Unlocked helper function which allows a PHY register to be modified as
869 * new register value = (old register value & ~mask) | set
870 *
871 * Returns negative errno, 0 if there was no change, and 1 in case of change
872 */
873static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
874 u16 mask, u16 set)
875{
876 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
877 regnum, mask, set);
878}
879
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880/**
881 * phy_read_mmd - Convenience function for reading a register
882 * from an MMD on a given PHY.
883 * @phydev: The phy_device struct
884 * @devad: The MMD to read from
885 * @regnum: The register on the MMD to read
886 *
887 * Same rules as for phy_read();
888 */
889int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
890
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891#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
892 sleep_us, timeout_us, sleep_before_read) \
893({ \
894 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
895 sleep_us, timeout_us, sleep_before_read, \
896 phydev, devaddr, regnum); \
897 if (val < 0) \
898 __ret = val; \
899 if (__ret) \
900 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
901 __ret; \
902})
903
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904/**
905 * __phy_read_mmd - Convenience function for reading a register
906 * from an MMD on a given PHY.
907 * @phydev: The phy_device struct
908 * @devad: The MMD to read from
909 * @regnum: The register on the MMD to read
910 *
911 * Same rules as for __phy_read();
912 */
913int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
914
915/**
916 * phy_write_mmd - Convenience function for writing a register
917 * on an MMD on a given PHY.
918 * @phydev: The phy_device struct
919 * @devad: The MMD to write to
920 * @regnum: The register on the MMD to read
921 * @val: value to write to @regnum
922 *
923 * Same rules as for phy_write();
924 */
925int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
926
927/**
928 * __phy_write_mmd - Convenience function for writing a register
929 * on an MMD on a given PHY.
930 * @phydev: The phy_device struct
931 * @devad: The MMD to write to
932 * @regnum: The register on the MMD to read
933 * @val: value to write to @regnum
934 *
935 * Same rules as for __phy_write();
936 */
937int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
938
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939int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
940 u16 set);
941int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
942 u16 set);
788f9933 943int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 944int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 945
b8554d4f
HK
946int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
947 u16 mask, u16 set);
948int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
949 u16 mask, u16 set);
1878f0dc 950int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 951 u16 mask, u16 set);
1878f0dc 952int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 953 u16 mask, u16 set);
1878f0dc 954
ac8322d8
HK
955/**
956 * __phy_set_bits - Convenience function for setting bits in a PHY register
957 * @phydev: the phy_device struct
958 * @regnum: register number to write
959 * @val: bits to set
960 *
961 * The caller must have taken the MDIO bus lock.
962 */
963static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
964{
965 return __phy_modify(phydev, regnum, 0, val);
966}
967
968/**
969 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
970 * @phydev: the phy_device struct
971 * @regnum: register number to write
972 * @val: bits to clear
973 *
974 * The caller must have taken the MDIO bus lock.
975 */
976static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
977 u16 val)
978{
979 return __phy_modify(phydev, regnum, val, 0);
980}
981
982/**
983 * phy_set_bits - Convenience function for setting bits in a PHY register
984 * @phydev: the phy_device struct
985 * @regnum: register number to write
986 * @val: bits to set
987 */
988static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
989{
990 return phy_modify(phydev, regnum, 0, val);
991}
992
993/**
994 * phy_clear_bits - Convenience function for clearing bits in a PHY register
995 * @phydev: the phy_device struct
996 * @regnum: register number to write
997 * @val: bits to clear
998 */
999static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1000{
1001 return phy_modify(phydev, regnum, val, 0);
1002}
1003
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1004/**
1005 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1006 * on MMD
1007 * @phydev: the phy_device struct
1008 * @devad: the MMD containing register to modify
1009 * @regnum: register number to modify
1010 * @val: bits to set
1011 *
1012 * The caller must have taken the MDIO bus lock.
1013 */
1014static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1015 u32 regnum, u16 val)
1016{
1017 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1018}
1019
1020/**
1021 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1022 * on MMD
1023 * @phydev: the phy_device struct
1024 * @devad: the MMD containing register to modify
1025 * @regnum: register number to modify
1026 * @val: bits to clear
1027 *
1028 * The caller must have taken the MDIO bus lock.
1029 */
1030static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1031 u32 regnum, u16 val)
1032{
1033 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1034}
1035
1036/**
1037 * phy_set_bits_mmd - Convenience function for setting bits in a register
1038 * on MMD
1039 * @phydev: the phy_device struct
1040 * @devad: the MMD containing register to modify
1041 * @regnum: register number to modify
1042 * @val: bits to set
1043 */
1044static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1045 u32 regnum, u16 val)
1046{
1047 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1048}
1049
1050/**
1051 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1052 * on MMD
1053 * @phydev: the phy_device struct
1054 * @devad: the MMD containing register to modify
1055 * @regnum: register number to modify
1056 * @val: bits to clear
1057 */
1058static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1059 u32 regnum, u16 val)
1060{
1061 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1062}
1063
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FF
1064/**
1065 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1066 * @phydev: the phy_device struct
1067 *
1068 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1069 * PHY_IGNORE_INTERRUPT
1070 */
1071static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1072{
1073 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
1074}
1075
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1076/**
1077 * phy_polling_mode - Convenience function for testing whether polling is
1078 * used to detect PHY status changes
1079 * @phydev: the phy_device struct
1080 */
1081static inline bool phy_polling_mode(struct phy_device *phydev)
1082{
97c22438
AL
1083 if (phydev->state == PHY_CABLETEST)
1084 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1085 return true;
1086
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HK
1087 return phydev->irq == PHY_POLL;
1088}
1089
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RC
1090/**
1091 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1092 * @phydev: the phy_device struct
1093 */
1094static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1095{
4715f65f 1096 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
0e5dafc8
RC
1097}
1098
1099/**
1100 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1101 * @phydev: the phy_device struct
1102 */
1103static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1104{
4715f65f 1105 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
0e5dafc8
RC
1106}
1107
1108/**
1109 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1110 * PTP hardware clock capabilities.
1111 * @phydev: the phy_device struct
1112 */
1113static inline bool phy_has_tsinfo(struct phy_device *phydev)
1114{
4715f65f 1115 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
0e5dafc8
RC
1116}
1117
1118/**
1119 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1120 * @phydev: the phy_device struct
1121 */
1122static inline bool phy_has_txtstamp(struct phy_device *phydev)
1123{
4715f65f 1124 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
0e5dafc8
RC
1125}
1126
1127static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1128{
4715f65f 1129 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
0e5dafc8
RC
1130}
1131
1132static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1133 int type)
1134{
4715f65f 1135 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
0e5dafc8
RC
1136}
1137
1138static inline int phy_ts_info(struct phy_device *phydev,
1139 struct ethtool_ts_info *tsinfo)
1140{
4715f65f 1141 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
0e5dafc8
RC
1142}
1143
1144static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1145 int type)
1146{
4715f65f 1147 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
0e5dafc8
RC
1148}
1149
4284b6a5
FF
1150/**
1151 * phy_is_internal - Convenience function for testing if a PHY is internal
1152 * @phydev: the phy_device struct
1153 */
1154static inline bool phy_is_internal(struct phy_device *phydev)
1155{
1156 return phydev->is_internal;
1157}
1158
32d0f783
IS
1159/**
1160 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1161 * PHY interface mode is RGMII (all variants)
1162 * @mode: the phy_interface_t enum
1163 */
1164static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1165{
1166 return mode >= PHY_INTERFACE_MODE_RGMII &&
1167 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1168};
1169
365c1e64
RK
1170/**
1171 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
1172 * negotiation
1173 * @mode: one of &enum phy_interface_t
1174 *
1175 * Returns true if the phy interface mode uses the 16-bit negotiation
1176 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1177 */
1178static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1179{
1180 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1181 mode == PHY_INTERFACE_MODE_2500BASEX;
1182}
1183
e463d88c
FF
1184/**
1185 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1186 * is RGMII (all variants)
1187 * @phydev: the phy_device struct
1188 */
1189static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1190{
32d0f783 1191 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
1192};
1193
1194/*
1195 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1196 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1197 * @phydev: the phy_device struct
1198 */
1199static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1200{
1201 return phydev->is_pseudo_fixed_link;
e463d88c
FF
1202}
1203
78ffc4ac
RK
1204int phy_save_page(struct phy_device *phydev);
1205int phy_select_page(struct phy_device *phydev, int page);
1206int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1207int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1208int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
bf22b343
HK
1209int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1210 u16 mask, u16 set);
78ffc4ac
RK
1211int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1212 u16 mask, u16 set);
1213
7d49a32a 1214struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
4017b4d3
SS
1215 bool is_c45,
1216 struct phy_c45_device_ids *c45_ids);
90eff909 1217#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 1218struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 1219int phy_device_register(struct phy_device *phy);
90eff909
FF
1220void phy_device_free(struct phy_device *phydev);
1221#else
1222static inline
1223struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1224{
1225 return NULL;
1226}
1227
1228static inline int phy_device_register(struct phy_device *phy)
1229{
1230 return 0;
1231}
1232
1233static inline void phy_device_free(struct phy_device *phydev) { }
1234#endif /* CONFIG_PHYLIB */
38737e49 1235void phy_device_remove(struct phy_device *phydev);
2f5cb434 1236int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
1237int phy_suspend(struct phy_device *phydev);
1238int phy_resume(struct phy_device *phydev);
9c2c2e62 1239int __phy_resume(struct phy_device *phydev);
f0f9b4ed 1240int phy_loopback(struct phy_device *phydev, bool enable);
298e54fa
RK
1241void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1242void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1243int phy_sfp_probe(struct phy_device *phydev,
1244 const struct sfp_upstream_ops *ops);
4017b4d3
SS
1245struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1246 phy_interface_t interface);
f8f76db1 1247struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
1248int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1249 u32 flags, phy_interface_t interface);
fa94f6d9 1250int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
1251 void (*handler)(struct net_device *),
1252 phy_interface_t interface);
1253struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1254 void (*handler)(struct net_device *),
1255 phy_interface_t interface);
e1393456
AF
1256void phy_disconnect(struct phy_device *phydev);
1257void phy_detach(struct phy_device *phydev);
1258void phy_start(struct phy_device *phydev);
1259void phy_stop(struct phy_device *phydev);
1260int phy_start_aneg(struct phy_device *phydev);
372788f9 1261int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
1262int phy_speed_down(struct phy_device *phydev, bool sync);
1263int phy_speed_up(struct phy_device *phydev);
e1393456 1264
002ba705 1265int phy_restart_aneg(struct phy_device *phydev);
a9668491 1266int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 1267
a68a8138
AL
1268#if IS_ENABLED(CONFIG_PHYLIB)
1269int phy_start_cable_test(struct phy_device *phydev,
1270 struct netlink_ext_ack *extack);
1a644de2 1271int phy_start_cable_test_tdr(struct phy_device *phydev,
f2bc8ad3
AL
1272 struct netlink_ext_ack *extack,
1273 const struct phy_tdr_config *config);
a68a8138
AL
1274#else
1275static inline
1276int phy_start_cable_test(struct phy_device *phydev,
1277 struct netlink_ext_ack *extack)
1278{
1279 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1280 return -EOPNOTSUPP;
1281}
1a644de2
AL
1282static inline
1283int phy_start_cable_test_tdr(struct phy_device *phydev,
f2bc8ad3
AL
1284 struct netlink_ext_ack *extack,
1285 const struct phy_tdr_config *config)
1a644de2
AL
1286{
1287 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1288 return -EOPNOTSUPP;
1289}
a68a8138
AL
1290#endif
1291
1e2dc145
AL
1292int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1293int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1294 u16 cm);
1295
bafbdd52
SS
1296static inline void phy_device_reset(struct phy_device *phydev, int value)
1297{
1298 mdio_device_reset(&phydev->mdio, value);
1299}
1300
72ba48be 1301#define phydev_err(_phydev, format, args...) \
e5a03bfd 1302 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 1303
c4fabb8b
AL
1304#define phydev_info(_phydev, format, args...) \
1305 dev_info(&_phydev->mdio.dev, format, ##args)
1306
ab2a605f
AL
1307#define phydev_warn(_phydev, format, args...) \
1308 dev_warn(&_phydev->mdio.dev, format, ##args)
1309
72ba48be 1310#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 1311 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 1312
84eff6d1
AL
1313static inline const char *phydev_name(const struct phy_device *phydev)
1314{
e5a03bfd 1315 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
1316}
1317
bec170e5
HK
1318static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1319{
1320 mutex_lock(&phydev->mdio.bus->mdio_lock);
1321}
1322
1323static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1324{
1325 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1326}
1327
2220943a
AL
1328void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1329 __printf(2, 3);
e27f1787
FF
1330char *phy_attached_info_irq(struct phy_device *phydev)
1331 __malloc;
2220943a 1332void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
1333
1334/* Clause 22 PHY */
045925e3 1335int genphy_read_abilities(struct phy_device *phydev);
3fb69bca 1336int genphy_setup_forced(struct phy_device *phydev);
00db8189 1337int genphy_restart_aneg(struct phy_device *phydev);
2a10ab04 1338int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
cd34499c 1339int genphy_config_eee_advert(struct phy_device *phydev);
f4069cd7 1340int __genphy_config_aneg(struct phy_device *phydev, bool changed);
a9fa6e6a 1341int genphy_aneg_done(struct phy_device *phydev);
00db8189 1342int genphy_update_link(struct phy_device *phydev);
8d3dc3ac 1343int genphy_read_lpa(struct phy_device *phydev);
0efc286a 1344int genphy_read_status_fixed(struct phy_device *phydev);
00db8189 1345int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
1346int genphy_suspend(struct phy_device *phydev);
1347int genphy_resume(struct phy_device *phydev);
f0f9b4ed 1348int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 1349int genphy_soft_reset(struct phy_device *phydev);
f4069cd7
HK
1350
1351static inline int genphy_config_aneg(struct phy_device *phydev)
1352{
1353 return __genphy_config_aneg(phydev, false);
1354}
1355
4c8e0459
LW
1356static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1357{
1358 return 0;
1359}
1360static inline int genphy_no_config_intr(struct phy_device *phydev)
1361{
1362 return 0;
1363}
5df7af85
KH
1364int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1365 u16 regnum);
1366int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1367 u16 regnum, u16 val);
5acde34a 1368
fa6e98ce
HK
1369/* Clause 37 */
1370int genphy_c37_config_aneg(struct phy_device *phydev);
1371int genphy_c37_read_status(struct phy_device *phydev);
1372
5acde34a
RK
1373/* Clause 45 PHY */
1374int genphy_c45_restart_aneg(struct phy_device *phydev);
1af9f168 1375int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
5acde34a 1376int genphy_c45_aneg_done(struct phy_device *phydev);
998a8a83 1377int genphy_c45_read_link(struct phy_device *phydev);
5acde34a
RK
1378int genphy_c45_read_lpa(struct phy_device *phydev);
1379int genphy_c45_read_pma(struct phy_device *phydev);
1380int genphy_c45_pma_setup_forced(struct phy_device *phydev);
9a5dc8af 1381int genphy_c45_an_config_aneg(struct phy_device *phydev);
5acde34a 1382int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1383int genphy_c45_read_mdix(struct phy_device *phydev);
ac3f5533 1384int genphy_c45_pma_read_abilities(struct phy_device *phydev);
70fa3a96 1385int genphy_c45_read_status(struct phy_device *phydev);
94acaeb5 1386int genphy_c45_config_aneg(struct phy_device *phydev);
5acde34a 1387
e8a714e0
FF
1388/* The gen10g_* functions are the old Clause 45 stub */
1389int gen10g_config_aneg(struct phy_device *phydev);
e8a714e0 1390
00fde795
HK
1391static inline int phy_read_status(struct phy_device *phydev)
1392{
1393 if (!phydev->drv)
1394 return -EIO;
1395
1396 if (phydev->drv->read_status)
1397 return phydev->drv->read_status(phydev);
1398 else
1399 return genphy_read_status(phydev);
1400}
1401
00db8189 1402void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1403void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1404int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1405int phy_drivers_register(struct phy_driver *new_driver, int n,
1406 struct module *owner);
4f9c85a1 1407void phy_state_machine(struct work_struct *work);
97b33bdf 1408void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
28b2e0d2 1409void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1410void phy_start_machine(struct phy_device *phydev);
00db8189 1411void phy_stop_machine(struct phy_device *phydev);
5514174f 1412void phy_ethtool_ksettings_get(struct phy_device *phydev,
1413 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1414int phy_ethtool_ksettings_set(struct phy_device *phydev,
1415 const struct ethtool_link_ksettings *cmd);
4017b4d3 1416int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
bbbf8430 1417int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
3231e5d2 1418int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
434a4315 1419void phy_request_interrupt(struct phy_device *phydev);
07b09289 1420void phy_free_interrupt(struct phy_device *phydev);
e1393456 1421void phy_print_status(struct phy_device *phydev);
f3a6bd39 1422int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1423void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
22c0ef6b 1424void phy_advertise_supported(struct phy_device *phydev);
c306ad36 1425void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1426void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1427void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1428 bool autoneg);
70814e81 1429void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1430bool phy_validate_pause(struct phy_device *phydev,
1431 struct ethtool_pauseparam *pp);
a87ae8a9
RK
1432void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1433void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1434 bool *tx_pause, bool *rx_pause);
00db8189 1435
f62220d3 1436int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1437 int (*run)(struct phy_device *));
f62220d3 1438int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1439 int (*run)(struct phy_device *));
f62220d3 1440int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1441 int (*run)(struct phy_device *));
f62220d3 1442
f38e7a32
WH
1443int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1444int phy_unregister_fixup_for_id(const char *bus_id);
1445int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1446
a59a4d19
GC
1447int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1448int phy_get_eee_err(struct phy_device *phydev);
1449int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1450int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1451int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1452void phy_ethtool_get_wol(struct phy_device *phydev,
1453 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1454int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1455 struct ethtool_link_ksettings *cmd);
1456int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1457 const struct ethtool_link_ksettings *cmd);
e86a8987 1458int phy_ethtool_nway_reset(struct net_device *ndev);
63490847
MW
1459int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1460void phy_package_leave(struct phy_device *phydev);
1461int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1462 int addr, size_t priv_size);
a59a4d19 1463
90eff909 1464#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1465int __init mdio_bus_init(void);
1466void mdio_bus_exit(void);
9e8d438e
FF
1467#endif
1468
1469/* Inline function for use within net/core/ethtool.c (built-in) */
1470static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1471{
9e8d438e
FF
1472 if (!phydev->drv)
1473 return -EIO;
1474
1475 mutex_lock(&phydev->lock);
1476 phydev->drv->get_strings(phydev, data);
1477 mutex_unlock(&phydev->lock);
1478
1479 return 0;
c59530d0
FF
1480}
1481
9e8d438e 1482static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1483{
9e8d438e
FF
1484 int ret;
1485
1486 if (!phydev->drv)
1487 return -EIO;
1488
1489 if (phydev->drv->get_sset_count &&
1490 phydev->drv->get_strings &&
1491 phydev->drv->get_stats) {
1492 mutex_lock(&phydev->lock);
1493 ret = phydev->drv->get_sset_count(phydev);
1494 mutex_unlock(&phydev->lock);
1495
1496 return ret;
1497 }
1498
c59530d0
FF
1499 return -EOPNOTSUPP;
1500}
1501
9e8d438e
FF
1502static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1503 struct ethtool_stats *stats, u64 *data)
c59530d0 1504{
9e8d438e
FF
1505 if (!phydev->drv)
1506 return -EIO;
1507
1508 mutex_lock(&phydev->lock);
1509 phydev->drv->get_stats(phydev, stats, data);
1510 mutex_unlock(&phydev->lock);
1511
1512 return 0;
c59530d0 1513}
9b9a8bfc 1514
63490847
MW
1515static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1516{
1517 struct phy_package_shared *shared = phydev->shared;
1518
1519 if (!shared)
1520 return -EIO;
1521
1522 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1523}
1524
1525static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1526{
1527 struct phy_package_shared *shared = phydev->shared;
1528
1529 if (!shared)
1530 return -EIO;
1531
1532 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1533}
1534
1535static inline int phy_package_write(struct phy_device *phydev,
1536 u32 regnum, u16 val)
1537{
1538 struct phy_package_shared *shared = phydev->shared;
1539
1540 if (!shared)
1541 return -EIO;
1542
1543 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1544}
1545
1546static inline int __phy_package_write(struct phy_device *phydev,
1547 u32 regnum, u16 val)
1548{
1549 struct phy_package_shared *shared = phydev->shared;
1550
1551 if (!shared)
1552 return -EIO;
1553
1554 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1555}
1556
1557static inline bool phy_package_init_once(struct phy_device *phydev)
1558{
1559 struct phy_package_shared *shared = phydev->shared;
1560
1561 if (!shared)
1562 return false;
1563
1564 return !test_and_set_bit(PHY_SHARED_F_INIT_DONE, &shared->flags);
1565}
1566
00db8189 1567extern struct bus_type mdio_bus_type;
c31accd1 1568
648ea013
FF
1569struct mdio_board_info {
1570 const char *bus_id;
1571 char modalias[MDIO_NAME_SIZE];
1572 int mdio_addr;
1573 const void *platform_data;
1574};
1575
90eff909 1576#if IS_ENABLED(CONFIG_MDIO_DEVICE)
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1577int mdiobus_register_board_info(const struct mdio_board_info *info,
1578 unsigned int n);
1579#else
1580static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1581 unsigned int n)
1582{
1583 return 0;
1584}
1585#endif
1586
1587
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1588/**
1589 * module_phy_driver() - Helper macro for registering PHY drivers
1590 * @__phy_drivers: array of PHY drivers to register
1591 *
1592 * Helper macro for PHY drivers which do not do anything special in module
1593 * init/exit. Each module may only use this macro once, and calling it
1594 * replaces module_init() and module_exit().
1595 */
1596#define phy_module_driver(__phy_drivers, __count) \
1597static int __init phy_module_init(void) \
1598{ \
be01da72 1599 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
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1600} \
1601module_init(phy_module_init); \
1602static void __exit phy_module_exit(void) \
1603{ \
1604 phy_drivers_unregister(__phy_drivers, __count); \
1605} \
1606module_exit(phy_module_exit)
1607
1608#define module_phy_driver(__phy_drivers) \
1609 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1610
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1611bool phy_driver_is_genphy(struct phy_device *phydev);
1612bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1613
00db8189 1614#endif /* __PHY_H */