]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blame - include/linux/phy.h
net: dnet: Use phy_find_first() helper
[mirror_ubuntu-hirsute-kernel.git] / include / linux / phy.h
CommitLineData
00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
19#include <linux/spinlock.h>
13df29f6 20#include <linux/ethtool.h>
bac83c65 21#include <linux/mdio.h>
13df29f6 22#include <linux/mii.h>
3e3aaf64 23#include <linux/module.h>
13df29f6
MR
24#include <linux/timer.h>
25#include <linux/workqueue.h>
8626d3b4 26#include <linux/mod_devicetable.h>
00db8189 27
60063497 28#include <linux/atomic.h>
0ac49527 29
e9fbdf17 30#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
00db8189
AF
31 SUPPORTED_TP | \
32 SUPPORTED_MII)
33
e9fbdf17
FF
34#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
35 SUPPORTED_10baseT_Full)
36
37#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
38 SUPPORTED_100baseT_Full)
39
40#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
00db8189
AF
41 SUPPORTED_1000baseT_Full)
42
e9fbdf17
FF
43#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
44 PHY_100BT_FEATURES | \
45 PHY_DEFAULT_FEATURES)
46
47#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
48 PHY_1000BT_FEATURES)
49
50
c5e38a94
AF
51/*
52 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
AF
53 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
54 * the attached driver handles the interrupt
55 */
56#define PHY_POLL -1
57#define PHY_IGNORE_INTERRUPT -2
58
59#define PHY_HAS_INTERRUPT 0x00000001
60#define PHY_HAS_MAGICANEG 0x00000002
4284b6a5 61#define PHY_IS_INTERNAL 0x00000004
00db8189 62
e8a2b6a4
AF
63/* Interface Mode definitions */
64typedef enum {
4157ef1b 65 PHY_INTERFACE_MODE_NA,
e8a2b6a4
AF
66 PHY_INTERFACE_MODE_MII,
67 PHY_INTERFACE_MODE_GMII,
68 PHY_INTERFACE_MODE_SGMII,
69 PHY_INTERFACE_MODE_TBI,
2cc70ba4 70 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
71 PHY_INTERFACE_MODE_RMII,
72 PHY_INTERFACE_MODE_RGMII,
a999589c 73 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
74 PHY_INTERFACE_MODE_RGMII_RXID,
75 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
76 PHY_INTERFACE_MODE_RTBI,
77 PHY_INTERFACE_MODE_SMII,
898dd0bd 78 PHY_INTERFACE_MODE_XGMII,
fd70f72c 79 PHY_INTERFACE_MODE_MOCA,
b9d12085 80 PHY_INTERFACE_MODE_QSGMII,
8a2fe56e 81 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
82} phy_interface_t;
83
8a2fe56e
FF
84/**
85 * It maps 'enum phy_interface_t' found in include/linux/phy.h
86 * into the device tree binding of 'phy-mode', so that Ethernet
87 * device driver can get phy interface from device tree.
88 */
89static inline const char *phy_modes(phy_interface_t interface)
90{
91 switch (interface) {
92 case PHY_INTERFACE_MODE_NA:
93 return "";
94 case PHY_INTERFACE_MODE_MII:
95 return "mii";
96 case PHY_INTERFACE_MODE_GMII:
97 return "gmii";
98 case PHY_INTERFACE_MODE_SGMII:
99 return "sgmii";
100 case PHY_INTERFACE_MODE_TBI:
101 return "tbi";
102 case PHY_INTERFACE_MODE_REVMII:
103 return "rev-mii";
104 case PHY_INTERFACE_MODE_RMII:
105 return "rmii";
106 case PHY_INTERFACE_MODE_RGMII:
107 return "rgmii";
108 case PHY_INTERFACE_MODE_RGMII_ID:
109 return "rgmii-id";
110 case PHY_INTERFACE_MODE_RGMII_RXID:
111 return "rgmii-rxid";
112 case PHY_INTERFACE_MODE_RGMII_TXID:
113 return "rgmii-txid";
114 case PHY_INTERFACE_MODE_RTBI:
115 return "rtbi";
116 case PHY_INTERFACE_MODE_SMII:
117 return "smii";
118 case PHY_INTERFACE_MODE_XGMII:
119 return "xgmii";
fd70f72c
FF
120 case PHY_INTERFACE_MODE_MOCA:
121 return "moca";
b9d12085
TP
122 case PHY_INTERFACE_MODE_QSGMII:
123 return "qsgmii";
8a2fe56e
FF
124 default:
125 return "unknown";
126 }
127}
128
00db8189 129
e8a2b6a4 130#define PHY_INIT_TIMEOUT 100000
00db8189
AF
131#define PHY_STATE_TIME 1
132#define PHY_FORCE_TIMEOUT 10
133#define PHY_AN_TIMEOUT 10
134
e8a2b6a4 135#define PHY_MAX_ADDR 32
00db8189 136
a4d00f17 137/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
9d9326d3
AF
138#define PHY_ID_FMT "%s:%02x"
139
140/*
141 * Need to be a little smaller than phydev->dev.bus_id to leave room
142 * for the ":%02x"
143 */
8e401ecc 144#define MII_BUS_ID_SIZE (20 - 3)
a4d00f17 145
abf35df2
JG
146/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
147 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
148#define MII_ADDR_C45 (1<<30)
149
313162d0
PG
150struct device;
151struct sk_buff;
152
c5e38a94
AF
153/*
154 * The Bus class for PHYs. Devices which provide access to
155 * PHYs should register using this structure
156 */
00db8189 157struct mii_bus {
3e3aaf64 158 struct module *owner;
00db8189 159 const char *name;
9d9326d3 160 char id[MII_BUS_ID_SIZE];
00db8189 161 void *priv;
ccaa953e
AL
162 int (*read)(struct mii_bus *bus, int addr, int regnum);
163 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
00db8189
AF
164 int (*reset)(struct mii_bus *bus);
165
c5e38a94
AF
166 /*
167 * A lock to ensure that only one thing can read/write
168 * the MDIO bus at a time
169 */
35b5f6b1 170 struct mutex mdio_lock;
00db8189 171
18ee49dd 172 struct device *parent;
46abc021
LB
173 enum {
174 MDIOBUS_ALLOCATED = 1,
175 MDIOBUS_REGISTERED,
176 MDIOBUS_UNREGISTERED,
177 MDIOBUS_RELEASED,
178 } state;
179 struct device dev;
00db8189
AF
180
181 /* list of all PHYs on bus */
182 struct phy_device *phy_map[PHY_MAX_ADDR];
183
c6883996 184 /* PHY addresses to be ignored when probing */
f896424c
MP
185 u32 phy_mask;
186
922f2dd1
FF
187 /* PHY addresses to ignore the TA/read failure */
188 u32 phy_ignore_ta_mask;
189
c5e38a94
AF
190 /*
191 * Pointer to an array of interrupts, each PHY's
192 * interrupt at the index matching its address
193 */
00db8189
AF
194 int *irq;
195};
46abc021 196#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 197
eb8a54a7
TT
198struct mii_bus *mdiobus_alloc_size(size_t);
199static inline struct mii_bus *mdiobus_alloc(void)
200{
201 return mdiobus_alloc_size(0);
202}
203
3e3aaf64
RK
204int __mdiobus_register(struct mii_bus *bus, struct module *owner);
205#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
2e888103
LB
206void mdiobus_unregister(struct mii_bus *bus);
207void mdiobus_free(struct mii_bus *bus);
6d48f44b
GS
208struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
209static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
210{
211 return devm_mdiobus_alloc_size(dev, 0);
212}
213
214void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 215struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 216
e8a2b6a4
AF
217#define PHY_INTERRUPT_DISABLED 0x0
218#define PHY_INTERRUPT_ENABLED 0x80000000
00db8189
AF
219
220/* PHY state machine states:
221 *
222 * DOWN: PHY device and driver are not ready for anything. probe
223 * should be called if and only if the PHY is in this state,
224 * given that the PHY device exists.
225 * - PHY driver probe function will, depending on the PHY, set
226 * the state to STARTING or READY
227 *
228 * STARTING: PHY device is coming up, and the ethernet driver is
229 * not ready. PHY drivers may set this in the probe function.
230 * If they do, they are responsible for making sure the state is
231 * eventually set to indicate whether the PHY is UP or READY,
232 * depending on the state when the PHY is done starting up.
233 * - PHY driver will set the state to READY
234 * - start will set the state to PENDING
235 *
236 * READY: PHY is ready to send and receive packets, but the
237 * controller is not. By default, PHYs which do not implement
238 * probe will be set to this state by phy_probe(). If the PHY
239 * driver knows the PHY is ready, and the PHY state is STARTING,
240 * then it sets this STATE.
241 * - start will set the state to UP
242 *
243 * PENDING: PHY device is coming up, but the ethernet driver is
244 * ready. phy_start will set this state if the PHY state is
245 * STARTING.
246 * - PHY driver will set the state to UP when the PHY is ready
247 *
248 * UP: The PHY and attached device are ready to do work.
249 * Interrupts should be started here.
250 * - timer moves to AN
251 *
252 * AN: The PHY is currently negotiating the link state. Link is
253 * therefore down for now. phy_timer will set this state when it
254 * detects the state is UP. config_aneg will set this state
255 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
256 * - If autonegotiation finishes, but there's no link, it sets
257 * the state to NOLINK.
258 * - If aneg finishes with link, it sets the state to RUNNING,
259 * and calls adjust_link
260 * - If autonegotiation did not finish after an arbitrary amount
261 * of time, autonegotiation should be tried again if the PHY
262 * supports "magic" autonegotiation (back to AN)
263 * - If it didn't finish, and no magic_aneg, move to FORCING.
264 *
265 * NOLINK: PHY is up, but not currently plugged in.
266 * - If the timer notes that the link comes back, we move to RUNNING
267 * - config_aneg moves to AN
268 * - phy_stop moves to HALTED
269 *
270 * FORCING: PHY is being configured with forced settings
271 * - if link is up, move to RUNNING
272 * - If link is down, we drop to the next highest setting, and
273 * retry (FORCING) after a timeout
274 * - phy_stop moves to HALTED
275 *
276 * RUNNING: PHY is currently up, running, and possibly sending
277 * and/or receiving packets
278 * - timer will set CHANGELINK if we're polling (this ensures the
279 * link state is polled every other cycle of this state machine,
280 * which makes it every other second)
281 * - irq will set CHANGELINK
282 * - config_aneg will set AN
283 * - phy_stop moves to HALTED
284 *
285 * CHANGELINK: PHY experienced a change in link state
286 * - timer moves to RUNNING if link
287 * - timer moves to NOLINK if the link is down
288 * - phy_stop moves to HALTED
289 *
290 * HALTED: PHY is up, but no polling or interrupts are done. Or
291 * PHY is in an error state.
292 *
293 * - phy_start moves to RESUMING
294 *
295 * RESUMING: PHY was halted, but now wants to run again.
296 * - If we are forcing, or aneg is done, timer moves to RUNNING
297 * - If aneg is not done, timer moves to AN
298 * - phy_stop moves to HALTED
299 */
300enum phy_state {
4017b4d3 301 PHY_DOWN = 0,
00db8189
AF
302 PHY_STARTING,
303 PHY_READY,
304 PHY_PENDING,
305 PHY_UP,
306 PHY_AN,
307 PHY_RUNNING,
308 PHY_NOLINK,
309 PHY_FORCING,
310 PHY_CHANGELINK,
311 PHY_HALTED,
312 PHY_RESUMING
313};
314
ac28b9f8
DD
315/**
316 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
317 * @devices_in_package: Bit vector of devices present.
318 * @device_ids: The device identifer for each present device.
319 */
320struct phy_c45_device_ids {
321 u32 devices_in_package;
322 u32 device_ids[8];
323};
c1f19b51 324
00db8189
AF
325/* phy_device: An instance of a PHY
326 *
327 * drv: Pointer to the driver for this PHY instance
328 * bus: Pointer to the bus this PHY is on
329 * dev: driver model device structure for this PHY
330 * phy_id: UID for this device found during discovery
ac28b9f8
DD
331 * c45_ids: 802.3-c45 Device Identifers if is_c45.
332 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 333 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 334 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 335 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 336 * suspended: Set to true if this phy has been suspended successfully.
00db8189
AF
337 * state: state of the PHY for management purposes
338 * dev_flags: Device-specific flags used by the PHY driver.
339 * addr: Bus address of PHY
340 * link_timeout: The number of timer firings to wait before the
341 * giving up on the current attempt at acquiring a link
342 * irq: IRQ number of the PHY's interrupt (-1 if none)
343 * phy_timer: The timer for handling the state machine
344 * phy_queue: A work_queue for the interrupt
345 * attached_dev: The attached enet driver's device instance ptr
346 * adjust_link: Callback for the enet controller to respond to
347 * changes in the link state.
00db8189 348 *
114002bc
FF
349 * speed, duplex, pause, supported, advertising, lp_advertising,
350 * and autoneg are used like in mii_if_info
00db8189
AF
351 *
352 * interrupts currently only supports enabled or disabled,
353 * but could be changed in the future to support enabling
354 * and disabling specific interrupts
355 *
356 * Contains some infrastructure for polling and interrupt
357 * handling, as well as handling shifts in PHY hardware state
358 */
359struct phy_device {
360 /* Information about the PHY type */
361 /* And management functions */
362 struct phy_driver *drv;
363
364 struct mii_bus *bus;
365
366 struct device dev;
367
368 u32 phy_id;
369
ac28b9f8
DD
370 struct phy_c45_device_ids c45_ids;
371 bool is_c45;
4284b6a5 372 bool is_internal;
5a11dd7d 373 bool is_pseudo_fixed_link;
b0ae009f 374 bool has_fixups;
8a477a6f 375 bool suspended;
ac28b9f8 376
00db8189
AF
377 enum phy_state state;
378
379 u32 dev_flags;
380
e8a2b6a4
AF
381 phy_interface_t interface;
382
c6883996 383 /* Bus address of the PHY (0-31) */
00db8189
AF
384 int addr;
385
c5e38a94
AF
386 /*
387 * forced speed & duplex (no autoneg)
00db8189
AF
388 * partner speed & duplex & pause (autoneg)
389 */
390 int speed;
391 int duplex;
392 int pause;
393 int asym_pause;
394
395 /* The most recently read link state */
396 int link;
397
398 /* Enabled Interrupts */
399 u32 interrupts;
400
401 /* Union of PHY and Attached devices' supported modes */
402 /* See mii.h for more info */
403 u32 supported;
404 u32 advertising;
114002bc 405 u32 lp_advertising;
00db8189
AF
406
407 int autoneg;
408
409 int link_timeout;
410
c5e38a94
AF
411 /*
412 * Interrupt number for this PHY
413 * -1 means no interrupt
414 */
00db8189
AF
415 int irq;
416
417 /* private data pointer */
418 /* For use by PHYs to maintain extra state */
419 void *priv;
420
421 /* Interrupt and Polling infrastructure */
422 struct work_struct phy_queue;
a390d1f3 423 struct delayed_work state_queue;
0ac49527 424 atomic_t irq_disable;
00db8189 425
35b5f6b1 426 struct mutex lock;
00db8189
AF
427
428 struct net_device *attached_dev;
429
634ec36c
DT
430 u8 mdix;
431
00db8189 432 void (*adjust_link)(struct net_device *dev);
00db8189
AF
433};
434#define to_phy_device(d) container_of(d, struct phy_device, dev)
435
436/* struct phy_driver: Driver structure for a particular PHY type
437 *
438 * phy_id: The result of reading the UID registers of this PHY
439 * type, and ANDing them with the phy_id_mask. This driver
440 * only works for PHYs with IDs which match this field
441 * name: The friendly name of this PHY type
442 * phy_id_mask: Defines the important bits of the phy_id
443 * features: A list of features (speed, duplex, etc) supported
444 * by this PHY
445 * flags: A bitfield defining certain other features this PHY
446 * supports (like interrupts)
860f6e9e 447 * driver_data: static driver data
00db8189
AF
448 *
449 * The drivers must implement config_aneg and read_status. All
450 * other functions are optional. Note that none of these
451 * functions should be called from interrupt time. The goal is
452 * for the bus read/write functions to be able to block when the
453 * bus transaction is happening, and be freed up by an interrupt
454 * (The MPC85xx has this ability, though it is not currently
455 * supported in the driver).
456 */
457struct phy_driver {
458 u32 phy_id;
459 char *name;
460 unsigned int phy_id_mask;
461 u32 features;
462 u32 flags;
860f6e9e 463 const void *driver_data;
00db8189 464
c5e38a94 465 /*
9df81dd7
FF
466 * Called to issue a PHY software reset
467 */
468 int (*soft_reset)(struct phy_device *phydev);
469
470 /*
c5e38a94
AF
471 * Called to initialize the PHY,
472 * including after a reset
473 */
00db8189
AF
474 int (*config_init)(struct phy_device *phydev);
475
c5e38a94
AF
476 /*
477 * Called during discovery. Used to set
478 * up device-specific structures, if any
479 */
00db8189
AF
480 int (*probe)(struct phy_device *phydev);
481
482 /* PHY Power Management */
483 int (*suspend)(struct phy_device *phydev);
484 int (*resume)(struct phy_device *phydev);
485
c5e38a94
AF
486 /*
487 * Configures the advertisement and resets
00db8189
AF
488 * autonegotiation if phydev->autoneg is on,
489 * forces the speed to the current settings in phydev
c5e38a94
AF
490 * if phydev->autoneg is off
491 */
00db8189
AF
492 int (*config_aneg)(struct phy_device *phydev);
493
76a423a3
FF
494 /* Determines the auto negotiation result */
495 int (*aneg_done)(struct phy_device *phydev);
496
00db8189
AF
497 /* Determines the negotiated speed and duplex */
498 int (*read_status)(struct phy_device *phydev);
499
500 /* Clears any pending interrupts */
501 int (*ack_interrupt)(struct phy_device *phydev);
502
503 /* Enables or disables interrupts */
504 int (*config_intr)(struct phy_device *phydev);
505
a8729eb3
AG
506 /*
507 * Checks if the PHY generated an interrupt.
508 * For multi-PHY devices with shared PHY interrupt pin
509 */
510 int (*did_interrupt)(struct phy_device *phydev);
511
00db8189
AF
512 /* Clears up any memory if needed */
513 void (*remove)(struct phy_device *phydev);
514
a30e2c18
DD
515 /* Returns true if this is a suitable driver for the given
516 * phydev. If NULL, matching is based on phy_id and
517 * phy_id_mask.
518 */
519 int (*match_phy_device)(struct phy_device *phydev);
520
c8f3a8c3
RC
521 /* Handles ethtool queries for hardware time stamping. */
522 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
523
c1f19b51
RC
524 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
525 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
526
527 /*
528 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
529 * the phy driver promises to deliver it using netif_rx() as
530 * soon as a timestamp becomes available. One of the
531 * PTP_CLASS_ values is passed in 'type'. The function must
532 * return true if the skb is accepted for delivery.
533 */
534 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
535
536 /*
537 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 538 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
539 * timestamp becomes available. One of the PTP_CLASS_ values
540 * is passed in 'type'.
541 */
542 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
543
42e836eb
MS
544 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
545 * enable Wake on LAN, so set_wol is provided to be called in the
546 * ethernet driver's set_wol function. */
547 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
548
549 /* See set_wol, but for checking whether Wake on LAN is enabled. */
550 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
551
2b8f2a28
DM
552 /*
553 * Called to inform a PHY device driver when the core is about to
554 * change the link state. This callback is supposed to be used as
555 * fixup hook for drivers that need to take action when the link
556 * state changes. Drivers are by no means allowed to mess with the
557 * PHY device structure in their implementations.
558 */
559 void (*link_change_notify)(struct phy_device *dev);
560
0c1d77df
VB
561 /* A function provided by a phy specific driver to override the
562 * the PHY driver framework support for reading a MMD register
563 * from the PHY. If not supported, return -1. This function is
564 * optional for PHY specific drivers, if not provided then the
565 * default MMD read function is used by the PHY framework.
566 */
567 int (*read_mmd_indirect)(struct phy_device *dev, int ptrad,
568 int devnum, int regnum);
569
570 /* A function provided by a phy specific driver to override the
571 * the PHY driver framework support for writing a MMD register
572 * from the PHY. This function is optional for PHY specific drivers,
573 * if not provided then the default MMD read function is used by
574 * the PHY framework.
575 */
576 void (*write_mmd_indirect)(struct phy_device *dev, int ptrad,
577 int devnum, int regnum, u32 val);
578
2f438366
ES
579 /* Get the size and type of the eeprom contained within a plug-in
580 * module */
581 int (*module_info)(struct phy_device *dev,
582 struct ethtool_modinfo *modinfo);
583
584 /* Get the eeprom information from the plug-in module */
585 int (*module_eeprom)(struct phy_device *dev,
586 struct ethtool_eeprom *ee, u8 *data);
587
f3a40945
AL
588 /* Get statistics from the phy using ethtool */
589 int (*get_sset_count)(struct phy_device *dev);
590 void (*get_strings)(struct phy_device *dev, u8 *data);
591 void (*get_stats)(struct phy_device *dev,
592 struct ethtool_stats *stats, u64 *data);
593
00db8189
AF
594 struct device_driver driver;
595};
596#define to_phy_driver(d) container_of(d, struct phy_driver, driver)
597
f62220d3
AF
598#define PHY_ANY_ID "MATCH ANY PHY"
599#define PHY_ANY_UID 0xffffffff
600
601/* A Structure for boards to register fixups with the PHY Lib */
602struct phy_fixup {
603 struct list_head list;
8e401ecc 604 char bus_id[20];
f62220d3
AF
605 u32 phy_uid;
606 u32 phy_uid_mask;
607 int (*run)(struct phy_device *phydev);
608};
609
efabdfb9
AF
610/**
611 * phy_read_mmd - Convenience function for reading a register
612 * from an MMD on a given PHY.
613 * @phydev: The phy_device struct
614 * @devad: The MMD to read from
615 * @regnum: The register on the MMD to read
616 *
617 * Same rules as for phy_read();
618 */
619static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
620{
621 if (!phydev->is_c45)
622 return -EOPNOTSUPP;
623
624 return mdiobus_read(phydev->bus, phydev->addr,
625 MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff));
626}
627
66ce7fb9
FF
628/**
629 * phy_read_mmd_indirect - reads data from the MMD registers
630 * @phydev: The PHY device bus
631 * @prtad: MMD Address
632 * @devad: MMD DEVAD
633 * @addr: PHY address on the MII bus
634 *
635 * Description: it reads data from the MMD registers (clause 22 to access to
636 * clause 45) of the specified phy address.
637 */
638int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
639 int devad, int addr);
640
2e888103
LB
641/**
642 * phy_read - Convenience function for reading a given PHY register
643 * @phydev: the phy_device struct
644 * @regnum: register number to read
645 *
646 * NOTE: MUST NOT be called from interrupt context,
647 * because the bus read/write functions may wait for an interrupt
648 * to conclude the operation.
649 */
abf35df2 650static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103
LB
651{
652 return mdiobus_read(phydev->bus, phydev->addr, regnum);
653}
654
655/**
656 * phy_write - Convenience function for writing a given PHY register
657 * @phydev: the phy_device struct
658 * @regnum: register number to write
659 * @val: value to write to @regnum
660 *
661 * NOTE: MUST NOT be called from interrupt context,
662 * because the bus read/write functions may wait for an interrupt
663 * to conclude the operation.
664 */
abf35df2 665static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103
LB
666{
667 return mdiobus_write(phydev->bus, phydev->addr, regnum, val);
668}
669
2c7b4921
FF
670/**
671 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
672 * @phydev: the phy_device struct
673 *
674 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
675 * PHY_IGNORE_INTERRUPT
676 */
677static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
678{
679 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
680}
681
4284b6a5
FF
682/**
683 * phy_is_internal - Convenience function for testing if a PHY is internal
684 * @phydev: the phy_device struct
685 */
686static inline bool phy_is_internal(struct phy_device *phydev)
687{
688 return phydev->is_internal;
689}
690
e463d88c
FF
691/**
692 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
693 * is RGMII (all variants)
694 * @phydev: the phy_device struct
695 */
696static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
697{
698 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
699 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
5a11dd7d
FF
700};
701
702/*
703 * phy_is_pseudo_fixed_link - Convenience function for testing if this
704 * PHY is the CPU port facing side of an Ethernet switch, or similar.
705 * @phydev: the phy_device struct
706 */
707static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
708{
709 return phydev->is_pseudo_fixed_link;
e463d88c
FF
710}
711
efabdfb9
AF
712/**
713 * phy_write_mmd - Convenience function for writing a register
714 * on an MMD on a given PHY.
715 * @phydev: The phy_device struct
716 * @devad: The MMD to read from
717 * @regnum: The register on the MMD to read
718 * @val: value to write to @regnum
719 *
720 * Same rules as for phy_write();
721 */
722static inline int phy_write_mmd(struct phy_device *phydev, int devad,
723 u32 regnum, u16 val)
724{
725 if (!phydev->is_c45)
726 return -EOPNOTSUPP;
727
728 regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff);
729
730 return mdiobus_write(phydev->bus, phydev->addr, regnum, val);
731}
732
66ce7fb9
FF
733/**
734 * phy_write_mmd_indirect - writes data to the MMD registers
735 * @phydev: The PHY device
736 * @prtad: MMD Address
737 * @devad: MMD DEVAD
738 * @addr: PHY address on the MII bus
739 * @data: data to write in the MMD register
740 *
741 * Description: Write data from the MMD registers of the specified
742 * phy address.
743 */
744void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
745 int devad, int addr, u32 data);
746
ac28b9f8 747struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
748 bool is_c45,
749 struct phy_c45_device_ids *c45_ids);
ac28b9f8 750struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 751int phy_device_register(struct phy_device *phy);
38737e49 752void phy_device_remove(struct phy_device *phydev);
2f5cb434 753int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
754int phy_suspend(struct phy_device *phydev);
755int phy_resume(struct phy_device *phydev);
4017b4d3
SS
756struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
757 phy_interface_t interface);
f8f76db1 758struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
759int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
760 u32 flags, phy_interface_t interface);
fa94f6d9 761int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
762 void (*handler)(struct net_device *),
763 phy_interface_t interface);
764struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
765 void (*handler)(struct net_device *),
766 phy_interface_t interface);
e1393456
AF
767void phy_disconnect(struct phy_device *phydev);
768void phy_detach(struct phy_device *phydev);
769void phy_start(struct phy_device *phydev);
770void phy_stop(struct phy_device *phydev);
771int phy_start_aneg(struct phy_device *phydev);
772
e1393456 773int phy_stop_interrupts(struct phy_device *phydev);
00db8189 774
4017b4d3
SS
775static inline int phy_read_status(struct phy_device *phydev)
776{
00db8189
AF
777 return phydev->drv->read_status(phydev);
778}
779
72ba48be
AL
780#define phydev_err(_phydev, format, args...) \
781 dev_err(&_phydev->dev, format, ##args)
782
783#define phydev_dbg(_phydev, format, args...) \
784 dev_dbg(&_phydev->dev, format, ##args)
785
84eff6d1
AL
786static inline const char *phydev_name(const struct phy_device *phydev)
787{
788 return dev_name(&phydev->dev);
789}
790
af6b6967 791int genphy_config_init(struct phy_device *phydev);
3fb69bca 792int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
793int genphy_restart_aneg(struct phy_device *phydev);
794int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 795int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
796int genphy_update_link(struct phy_device *phydev);
797int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
798int genphy_suspend(struct phy_device *phydev);
799int genphy_resume(struct phy_device *phydev);
797ac071 800int genphy_soft_reset(struct phy_device *phydev);
00db8189 801void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 802void phy_drivers_unregister(struct phy_driver *drv, int n);
00db8189 803int phy_driver_register(struct phy_driver *new_driver);
d5bf9071 804int phy_drivers_register(struct phy_driver *new_driver, int n);
4f9c85a1 805void phy_state_machine(struct work_struct *work);
5ea94e76
FF
806void phy_change(struct work_struct *work);
807void phy_mac_interrupt(struct phy_device *phydev, int new_link);
29935aeb 808void phy_start_machine(struct phy_device *phydev);
00db8189
AF
809void phy_stop_machine(struct phy_device *phydev);
810int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
811int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
4017b4d3 812int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
813int phy_start_interrupts(struct phy_device *phydev);
814void phy_print_status(struct phy_device *phydev);
6f4a7f41 815void phy_device_free(struct phy_device *phydev);
f3a6bd39 816int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
00db8189 817
f62220d3 818int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 819 int (*run)(struct phy_device *));
f62220d3 820int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 821 int (*run)(struct phy_device *));
f62220d3 822int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 823 int (*run)(struct phy_device *));
f62220d3 824
a59a4d19
GC
825int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
826int phy_get_eee_err(struct phy_device *phydev);
827int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
828int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 829int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
830void phy_ethtool_get_wol(struct phy_device *phydev,
831 struct ethtool_wolinfo *wol);
a59a4d19 832
9b9a8bfc
AF
833int __init mdio_bus_init(void);
834void mdio_bus_exit(void);
835
00db8189 836extern struct bus_type mdio_bus_type;
c31accd1
JH
837
838/**
839 * module_phy_driver() - Helper macro for registering PHY drivers
840 * @__phy_drivers: array of PHY drivers to register
841 *
842 * Helper macro for PHY drivers which do not do anything special in module
843 * init/exit. Each module may only use this macro once, and calling it
844 * replaces module_init() and module_exit().
845 */
846#define phy_module_driver(__phy_drivers, __count) \
847static int __init phy_module_init(void) \
848{ \
849 return phy_drivers_register(__phy_drivers, __count); \
850} \
851module_init(phy_module_init); \
852static void __exit phy_module_exit(void) \
853{ \
854 phy_drivers_unregister(__phy_drivers, __count); \
855} \
856module_exit(phy_module_exit)
857
858#define module_phy_driver(__phy_drivers) \
859 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
860
00db8189 861#endif /* __PHY_H */