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net: phy: replace PHY_HAS_INTERRUPT with a check for config_intr and ack_interrupt
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00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
b31cdffa 22#include <linux/linkmode.h>
bac83c65 23#include <linux/mdio.h>
13df29f6 24#include <linux/mii.h>
3e3aaf64 25#include <linux/module.h>
13df29f6
MR
26#include <linux/timer.h>
27#include <linux/workqueue.h>
8626d3b4 28#include <linux/mod_devicetable.h>
00db8189 29
60063497 30#include <linux/atomic.h>
0ac49527 31
e9fbdf17 32#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
00db8189
AF
33 SUPPORTED_TP | \
34 SUPPORTED_MII)
35
e9fbdf17
FF
36#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
37 SUPPORTED_10baseT_Full)
38
39#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
40 SUPPORTED_100baseT_Full)
41
42#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
00db8189
AF
43 SUPPORTED_1000baseT_Full)
44
719655a1
AL
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
52
53#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
54#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
55#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
56#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
57#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
58#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
59#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 60
c5e38a94
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61/*
62 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
AF
63 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
64 * the attached driver handles the interrupt
65 */
66#define PHY_POLL -1
67#define PHY_IGNORE_INTERRUPT -2
68
69#define PHY_HAS_INTERRUPT 0x00000001
1b86f702 70#define PHY_IS_INTERNAL 0x00000002
a9668491 71#define PHY_RST_AFTER_CLK_EN 0x00000004
a9049e0c 72#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 73
e8a2b6a4
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74/* Interface Mode definitions */
75typedef enum {
4157ef1b 76 PHY_INTERFACE_MODE_NA,
735d8a18 77 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
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78 PHY_INTERFACE_MODE_MII,
79 PHY_INTERFACE_MODE_GMII,
80 PHY_INTERFACE_MODE_SGMII,
81 PHY_INTERFACE_MODE_TBI,
2cc70ba4 82 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
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83 PHY_INTERFACE_MODE_RMII,
84 PHY_INTERFACE_MODE_RGMII,
a999589c 85 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
86 PHY_INTERFACE_MODE_RGMII_RXID,
87 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
88 PHY_INTERFACE_MODE_RTBI,
89 PHY_INTERFACE_MODE_SMII,
898dd0bd 90 PHY_INTERFACE_MODE_XGMII,
fd70f72c 91 PHY_INTERFACE_MODE_MOCA,
b9d12085 92 PHY_INTERFACE_MODE_QSGMII,
572de608 93 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
94 PHY_INTERFACE_MODE_1000BASEX,
95 PHY_INTERFACE_MODE_2500BASEX,
96 PHY_INTERFACE_MODE_RXAUI,
c125ca09
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97 PHY_INTERFACE_MODE_XAUI,
98 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
99 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 100 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
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101} phy_interface_t;
102
1f9127ca
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103/**
104 * phy_supported_speeds - return all speeds currently supported by a phy device
105 * @phy: The phy device to return supported speeds of.
106 * @speeds: buffer to store supported speeds in.
107 * @size: size of speeds buffer.
108 *
109 * Description: Returns the number of supported speeds, and
110 * fills the speeds * buffer with the supported speeds. If speeds buffer is
111 * too small to contain * all currently supported speeds, will return as
112 * many speeds as can fit.
113 */
114unsigned int phy_supported_speeds(struct phy_device *phy,
115 unsigned int *speeds,
116 unsigned int size);
117
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FF
118/**
119 * It maps 'enum phy_interface_t' found in include/linux/phy.h
120 * into the device tree binding of 'phy-mode', so that Ethernet
121 * device driver can get phy interface from device tree.
122 */
123static inline const char *phy_modes(phy_interface_t interface)
124{
125 switch (interface) {
126 case PHY_INTERFACE_MODE_NA:
127 return "";
735d8a18
FF
128 case PHY_INTERFACE_MODE_INTERNAL:
129 return "internal";
8a2fe56e
FF
130 case PHY_INTERFACE_MODE_MII:
131 return "mii";
132 case PHY_INTERFACE_MODE_GMII:
133 return "gmii";
134 case PHY_INTERFACE_MODE_SGMII:
135 return "sgmii";
136 case PHY_INTERFACE_MODE_TBI:
137 return "tbi";
138 case PHY_INTERFACE_MODE_REVMII:
139 return "rev-mii";
140 case PHY_INTERFACE_MODE_RMII:
141 return "rmii";
142 case PHY_INTERFACE_MODE_RGMII:
143 return "rgmii";
144 case PHY_INTERFACE_MODE_RGMII_ID:
145 return "rgmii-id";
146 case PHY_INTERFACE_MODE_RGMII_RXID:
147 return "rgmii-rxid";
148 case PHY_INTERFACE_MODE_RGMII_TXID:
149 return "rgmii-txid";
150 case PHY_INTERFACE_MODE_RTBI:
151 return "rtbi";
152 case PHY_INTERFACE_MODE_SMII:
153 return "smii";
154 case PHY_INTERFACE_MODE_XGMII:
155 return "xgmii";
fd70f72c
FF
156 case PHY_INTERFACE_MODE_MOCA:
157 return "moca";
b9d12085
TP
158 case PHY_INTERFACE_MODE_QSGMII:
159 return "qsgmii";
572de608
SW
160 case PHY_INTERFACE_MODE_TRGMII:
161 return "trgmii";
55601a88
AL
162 case PHY_INTERFACE_MODE_1000BASEX:
163 return "1000base-x";
164 case PHY_INTERFACE_MODE_2500BASEX:
165 return "2500base-x";
166 case PHY_INTERFACE_MODE_RXAUI:
167 return "rxaui";
c125ca09
RK
168 case PHY_INTERFACE_MODE_XAUI:
169 return "xaui";
170 case PHY_INTERFACE_MODE_10GKR:
171 return "10gbase-kr";
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FF
172 default:
173 return "unknown";
174 }
175}
176
00db8189 177
e8a2b6a4 178#define PHY_INIT_TIMEOUT 100000
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AF
179#define PHY_STATE_TIME 1
180#define PHY_FORCE_TIMEOUT 10
00db8189 181
e8a2b6a4 182#define PHY_MAX_ADDR 32
00db8189 183
a4d00f17 184/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
9d9326d3
AF
185#define PHY_ID_FMT "%s:%02x"
186
4567d686 187#define MII_BUS_ID_SIZE 61
a4d00f17 188
abf35df2
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189/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
190 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
191#define MII_ADDR_C45 (1<<30)
192
313162d0 193struct device;
9525ae83 194struct phylink;
313162d0
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195struct sk_buff;
196
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197/*
198 * The Bus class for PHYs. Devices which provide access to
199 * PHYs should register using this structure
200 */
00db8189 201struct mii_bus {
3e3aaf64 202 struct module *owner;
00db8189 203 const char *name;
9d9326d3 204 char id[MII_BUS_ID_SIZE];
00db8189 205 void *priv;
ccaa953e
AL
206 int (*read)(struct mii_bus *bus, int addr, int regnum);
207 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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208 int (*reset)(struct mii_bus *bus);
209
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210 /*
211 * A lock to ensure that only one thing can read/write
212 * the MDIO bus at a time
213 */
35b5f6b1 214 struct mutex mdio_lock;
00db8189 215
18ee49dd 216 struct device *parent;
46abc021
LB
217 enum {
218 MDIOBUS_ALLOCATED = 1,
219 MDIOBUS_REGISTERED,
220 MDIOBUS_UNREGISTERED,
221 MDIOBUS_RELEASED,
222 } state;
223 struct device dev;
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AF
224
225 /* list of all PHYs on bus */
7f854420 226 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 227
c6883996 228 /* PHY addresses to be ignored when probing */
f896424c
MP
229 u32 phy_mask;
230
922f2dd1
FF
231 /* PHY addresses to ignore the TA/read failure */
232 u32 phy_ignore_ta_mask;
233
c5e38a94 234 /*
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AL
235 * An array of interrupts, each PHY's interrupt at the index
236 * matching its address
c5e38a94 237 */
e7f4dc35 238 int irq[PHY_MAX_ADDR];
69226896
RQ
239
240 /* GPIO reset pulse width in microseconds */
241 int reset_delay_us;
d396e84c
SS
242 /* RESET GPIO descriptor pointer */
243 struct gpio_desc *reset_gpiod;
00db8189 244};
46abc021 245#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 246
eb8a54a7
TT
247struct mii_bus *mdiobus_alloc_size(size_t);
248static inline struct mii_bus *mdiobus_alloc(void)
249{
250 return mdiobus_alloc_size(0);
251}
252
3e3aaf64
RK
253int __mdiobus_register(struct mii_bus *bus, struct module *owner);
254#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
2e888103
LB
255void mdiobus_unregister(struct mii_bus *bus);
256void mdiobus_free(struct mii_bus *bus);
6d48f44b
GS
257struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
258static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
259{
260 return devm_mdiobus_alloc_size(dev, 0);
261}
262
263void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 264struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 265
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266#define PHY_INTERRUPT_DISABLED false
267#define PHY_INTERRUPT_ENABLED true
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268
269/* PHY state machine states:
270 *
271 * DOWN: PHY device and driver are not ready for anything. probe
272 * should be called if and only if the PHY is in this state,
273 * given that the PHY device exists.
274 * - PHY driver probe function will, depending on the PHY, set
275 * the state to STARTING or READY
276 *
277 * STARTING: PHY device is coming up, and the ethernet driver is
278 * not ready. PHY drivers may set this in the probe function.
279 * If they do, they are responsible for making sure the state is
280 * eventually set to indicate whether the PHY is UP or READY,
281 * depending on the state when the PHY is done starting up.
282 * - PHY driver will set the state to READY
283 * - start will set the state to PENDING
284 *
285 * READY: PHY is ready to send and receive packets, but the
286 * controller is not. By default, PHYs which do not implement
287 * probe will be set to this state by phy_probe(). If the PHY
288 * driver knows the PHY is ready, and the PHY state is STARTING,
289 * then it sets this STATE.
290 * - start will set the state to UP
291 *
292 * PENDING: PHY device is coming up, but the ethernet driver is
293 * ready. phy_start will set this state if the PHY state is
294 * STARTING.
295 * - PHY driver will set the state to UP when the PHY is ready
296 *
297 * UP: The PHY and attached device are ready to do work.
298 * Interrupts should be started here.
85a1f31d 299 * - timer moves to NOLINK or RUNNING
00db8189
AF
300 *
301 * NOLINK: PHY is up, but not currently plugged in.
302 * - If the timer notes that the link comes back, we move to RUNNING
00db8189
AF
303 * - phy_stop moves to HALTED
304 *
305 * FORCING: PHY is being configured with forced settings
306 * - if link is up, move to RUNNING
307 * - If link is down, we drop to the next highest setting, and
308 * retry (FORCING) after a timeout
309 * - phy_stop moves to HALTED
310 *
311 * RUNNING: PHY is currently up, running, and possibly sending
312 * and/or receiving packets
313 * - timer will set CHANGELINK if we're polling (this ensures the
314 * link state is polled every other cycle of this state machine,
315 * which makes it every other second)
316 * - irq will set CHANGELINK
00db8189
AF
317 * - phy_stop moves to HALTED
318 *
319 * CHANGELINK: PHY experienced a change in link state
320 * - timer moves to RUNNING if link
321 * - timer moves to NOLINK if the link is down
322 * - phy_stop moves to HALTED
323 *
324 * HALTED: PHY is up, but no polling or interrupts are done. Or
325 * PHY is in an error state.
326 *
327 * - phy_start moves to RESUMING
328 *
329 * RESUMING: PHY was halted, but now wants to run again.
330 * - If we are forcing, or aneg is done, timer moves to RUNNING
331 * - If aneg is not done, timer moves to AN
332 * - phy_stop moves to HALTED
333 */
334enum phy_state {
4017b4d3 335 PHY_DOWN = 0,
00db8189
AF
336 PHY_STARTING,
337 PHY_READY,
338 PHY_PENDING,
339 PHY_UP,
00db8189
AF
340 PHY_RUNNING,
341 PHY_NOLINK,
342 PHY_FORCING,
343 PHY_CHANGELINK,
344 PHY_HALTED,
345 PHY_RESUMING
346};
347
ac28b9f8
DD
348/**
349 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
350 * @devices_in_package: Bit vector of devices present.
351 * @device_ids: The device identifer for each present device.
352 */
353struct phy_c45_device_ids {
354 u32 devices_in_package;
355 u32 device_ids[8];
356};
c1f19b51 357
00db8189
AF
358/* phy_device: An instance of a PHY
359 *
360 * drv: Pointer to the driver for this PHY instance
00db8189 361 * phy_id: UID for this device found during discovery
ac28b9f8
DD
362 * c45_ids: 802.3-c45 Device Identifers if is_c45.
363 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 364 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 365 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 366 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 367 * suspended: Set to true if this phy has been suspended successfully.
a3995460 368 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 369 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
370 * state: state of the PHY for management purposes
371 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
372 * link_timeout: The number of timer firings to wait before the
373 * giving up on the current attempt at acquiring a link
374 * irq: IRQ number of the PHY's interrupt (-1 if none)
375 * phy_timer: The timer for handling the state machine
664fcf12 376 * phy_queue: A work_queue for the phy_mac_interrupt
00db8189
AF
377 * attached_dev: The attached enet driver's device instance ptr
378 * adjust_link: Callback for the enet controller to respond to
379 * changes in the link state.
00db8189 380 *
114002bc
FF
381 * speed, duplex, pause, supported, advertising, lp_advertising,
382 * and autoneg are used like in mii_if_info
00db8189
AF
383 *
384 * interrupts currently only supports enabled or disabled,
385 * but could be changed in the future to support enabling
386 * and disabling specific interrupts
387 *
388 * Contains some infrastructure for polling and interrupt
389 * handling, as well as handling shifts in PHY hardware state
390 */
391struct phy_device {
e5a03bfd
AL
392 struct mdio_device mdio;
393
00db8189
AF
394 /* Information about the PHY type */
395 /* And management functions */
396 struct phy_driver *drv;
397
00db8189
AF
398 u32 phy_id;
399
ac28b9f8 400 struct phy_c45_device_ids c45_ids;
87e5808d
HK
401 unsigned is_c45:1;
402 unsigned is_internal:1;
403 unsigned is_pseudo_fixed_link:1;
404 unsigned has_fixups:1;
405 unsigned suspended:1;
406 unsigned sysfs_links:1;
407 unsigned loopback_enabled:1;
408
409 unsigned autoneg:1;
410 /* The most recently read link state */
411 unsigned link:1;
ac28b9f8 412
695bce8f
HK
413 /* Interrupts are enabled */
414 unsigned interrupts:1;
415
00db8189
AF
416 enum phy_state state;
417
418 u32 dev_flags;
419
e8a2b6a4
AF
420 phy_interface_t interface;
421
c5e38a94
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422 /*
423 * forced speed & duplex (no autoneg)
00db8189
AF
424 * partner speed & duplex & pause (autoneg)
425 */
426 int speed;
427 int duplex;
428 int pause;
429 int asym_pause;
430
00db8189
AF
431 /* Union of PHY and Attached devices' supported modes */
432 /* See mii.h for more info */
433 u32 supported;
434 u32 advertising;
114002bc 435 u32 lp_advertising;
00db8189 436
d853d145 437 /* Energy efficient ethernet modes which should be prohibited */
438 u32 eee_broken_modes;
439
00db8189
AF
440 int link_timeout;
441
2e0bc452
ZB
442#ifdef CONFIG_LED_TRIGGER_PHY
443 struct phy_led_trigger *phy_led_triggers;
444 unsigned int phy_num_led_triggers;
445 struct phy_led_trigger *last_triggered;
3928ee64
MS
446
447 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
448#endif
449
c5e38a94
AF
450 /*
451 * Interrupt number for this PHY
452 * -1 means no interrupt
453 */
00db8189
AF
454 int irq;
455
456 /* private data pointer */
457 /* For use by PHYs to maintain extra state */
458 void *priv;
459
460 /* Interrupt and Polling infrastructure */
461 struct work_struct phy_queue;
a390d1f3 462 struct delayed_work state_queue;
00db8189 463
35b5f6b1 464 struct mutex lock;
00db8189 465
9525ae83 466 struct phylink *phylink;
00db8189
AF
467 struct net_device *attached_dev;
468
634ec36c 469 u8 mdix;
f4ed2fe3 470 u8 mdix_ctrl;
634ec36c 471
a81497be 472 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 473 void (*adjust_link)(struct net_device *dev);
00db8189 474};
e5a03bfd
AL
475#define to_phy_device(d) container_of(to_mdio_device(d), \
476 struct phy_device, mdio)
00db8189
AF
477
478/* struct phy_driver: Driver structure for a particular PHY type
479 *
a9049e0c 480 * driver_data: static driver data
00db8189
AF
481 * phy_id: The result of reading the UID registers of this PHY
482 * type, and ANDing them with the phy_id_mask. This driver
483 * only works for PHYs with IDs which match this field
484 * name: The friendly name of this PHY type
485 * phy_id_mask: Defines the important bits of the phy_id
486 * features: A list of features (speed, duplex, etc) supported
487 * by this PHY
488 * flags: A bitfield defining certain other features this PHY
489 * supports (like interrupts)
490 *
00fde795
HK
491 * All functions are optional. If config_aneg or read_status
492 * are not implemented, the phy core uses the genphy versions.
493 * Note that none of these functions should be called from
494 * interrupt time. The goal is for the bus read/write functions
495 * to be able to block when the bus transaction is happening,
496 * and be freed up by an interrupt (The MPC85xx has this ability,
497 * though it is not currently supported in the driver).
00db8189
AF
498 */
499struct phy_driver {
a9049e0c 500 struct mdio_driver_common mdiodrv;
00db8189
AF
501 u32 phy_id;
502 char *name;
511e3036 503 u32 phy_id_mask;
719655a1 504 const unsigned long * const features;
00db8189 505 u32 flags;
860f6e9e 506 const void *driver_data;
00db8189 507
c5e38a94 508 /*
9df81dd7
FF
509 * Called to issue a PHY software reset
510 */
511 int (*soft_reset)(struct phy_device *phydev);
512
513 /*
c5e38a94
AF
514 * Called to initialize the PHY,
515 * including after a reset
516 */
00db8189
AF
517 int (*config_init)(struct phy_device *phydev);
518
c5e38a94
AF
519 /*
520 * Called during discovery. Used to set
521 * up device-specific structures, if any
522 */
00db8189
AF
523 int (*probe)(struct phy_device *phydev);
524
525 /* PHY Power Management */
526 int (*suspend)(struct phy_device *phydev);
527 int (*resume)(struct phy_device *phydev);
528
c5e38a94
AF
529 /*
530 * Configures the advertisement and resets
00db8189
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531 * autonegotiation if phydev->autoneg is on,
532 * forces the speed to the current settings in phydev
c5e38a94
AF
533 * if phydev->autoneg is off
534 */
00db8189
AF
535 int (*config_aneg)(struct phy_device *phydev);
536
76a423a3
FF
537 /* Determines the auto negotiation result */
538 int (*aneg_done)(struct phy_device *phydev);
539
00db8189
AF
540 /* Determines the negotiated speed and duplex */
541 int (*read_status)(struct phy_device *phydev);
542
543 /* Clears any pending interrupts */
544 int (*ack_interrupt)(struct phy_device *phydev);
545
546 /* Enables or disables interrupts */
547 int (*config_intr)(struct phy_device *phydev);
548
a8729eb3
AG
549 /*
550 * Checks if the PHY generated an interrupt.
551 * For multi-PHY devices with shared PHY interrupt pin
552 */
553 int (*did_interrupt)(struct phy_device *phydev);
554
00db8189
AF
555 /* Clears up any memory if needed */
556 void (*remove)(struct phy_device *phydev);
557
a30e2c18
DD
558 /* Returns true if this is a suitable driver for the given
559 * phydev. If NULL, matching is based on phy_id and
560 * phy_id_mask.
561 */
562 int (*match_phy_device)(struct phy_device *phydev);
563
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564 /* Handles ethtool queries for hardware time stamping. */
565 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
566
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567 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
568 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
569
570 /*
571 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
572 * the phy driver promises to deliver it using netif_rx() as
573 * soon as a timestamp becomes available. One of the
574 * PTP_CLASS_ values is passed in 'type'. The function must
575 * return true if the skb is accepted for delivery.
576 */
577 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
578
579 /*
580 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 581 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
582 * timestamp becomes available. One of the PTP_CLASS_ values
583 * is passed in 'type'.
584 */
585 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
586
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MS
587 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
588 * enable Wake on LAN, so set_wol is provided to be called in the
589 * ethernet driver's set_wol function. */
590 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
591
592 /* See set_wol, but for checking whether Wake on LAN is enabled. */
593 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
594
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DM
595 /*
596 * Called to inform a PHY device driver when the core is about to
597 * change the link state. This callback is supposed to be used as
598 * fixup hook for drivers that need to take action when the link
599 * state changes. Drivers are by no means allowed to mess with the
600 * PHY device structure in their implementations.
601 */
602 void (*link_change_notify)(struct phy_device *dev);
603
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RK
604 /*
605 * Phy specific driver override for reading a MMD register.
606 * This function is optional for PHY specific drivers. When
607 * not provided, the default MMD read function will be used
608 * by phy_read_mmd(), which will use either a direct read for
609 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
610 * devnum is the MMD device number within the PHY device,
611 * regnum is the register within the selected MMD device.
612 */
613 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
614
615 /*
616 * Phy specific driver override for writing a MMD register.
617 * This function is optional for PHY specific drivers. When
618 * not provided, the default MMD write function will be used
619 * by phy_write_mmd(), which will use either a direct write for
620 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
621 * devnum is the MMD device number within the PHY device,
622 * regnum is the register within the selected MMD device.
623 * val is the value to be written.
624 */
625 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
626 u16 val);
627
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RK
628 int (*read_page)(struct phy_device *dev);
629 int (*write_page)(struct phy_device *dev, int page);
630
2f438366
ES
631 /* Get the size and type of the eeprom contained within a plug-in
632 * module */
633 int (*module_info)(struct phy_device *dev,
634 struct ethtool_modinfo *modinfo);
635
636 /* Get the eeprom information from the plug-in module */
637 int (*module_eeprom)(struct phy_device *dev,
638 struct ethtool_eeprom *ee, u8 *data);
639
f3a40945
AL
640 /* Get statistics from the phy using ethtool */
641 int (*get_sset_count)(struct phy_device *dev);
642 void (*get_strings)(struct phy_device *dev, u8 *data);
643 void (*get_stats)(struct phy_device *dev,
644 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
645
646 /* Get and Set PHY tunables */
647 int (*get_tunable)(struct phy_device *dev,
648 struct ethtool_tunable *tuna, void *data);
649 int (*set_tunable)(struct phy_device *dev,
650 struct ethtool_tunable *tuna,
651 const void *data);
f0f9b4ed 652 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 653};
a9049e0c
AL
654#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
655 struct phy_driver, mdiodrv)
00db8189 656
f62220d3
AF
657#define PHY_ANY_ID "MATCH ANY PHY"
658#define PHY_ANY_UID 0xffffffff
659
660/* A Structure for boards to register fixups with the PHY Lib */
661struct phy_fixup {
662 struct list_head list;
4567d686 663 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
664 u32 phy_uid;
665 u32 phy_uid_mask;
666 int (*run)(struct phy_device *phydev);
667};
668
da4625ac
RK
669const char *phy_speed_to_str(int speed);
670const char *phy_duplex_to_str(unsigned int duplex);
671
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RK
672/* A structure for mapping a particular speed and duplex
673 * combination to a particular SUPPORTED and ADVERTISED value
674 */
675struct phy_setting {
676 u32 speed;
677 u8 duplex;
678 u8 bit;
679};
680
681const struct phy_setting *
682phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
683 size_t maxbit, bool exact);
684size_t phy_speeds(unsigned int *speeds, size_t size,
685 unsigned long *mask, size_t maxbit);
686
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RK
687void phy_resolve_aneg_linkmode(struct phy_device *phydev);
688
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AF
689/**
690 * phy_read_mmd - Convenience function for reading a register
691 * from an MMD on a given PHY.
692 * @phydev: The phy_device struct
693 * @devad: The MMD to read from
694 * @regnum: The register on the MMD to read
695 *
696 * Same rules as for phy_read();
697 */
9860118b 698int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 699
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LB
700/**
701 * phy_read - Convenience function for reading a given PHY register
702 * @phydev: the phy_device struct
703 * @regnum: register number to read
704 *
705 * NOTE: MUST NOT be called from interrupt context,
706 * because the bus read/write functions may wait for an interrupt
707 * to conclude the operation.
708 */
abf35df2 709static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 710{
e5a03bfd 711 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
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LB
712}
713
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RK
714/**
715 * __phy_read - convenience function for reading a given PHY register
716 * @phydev: the phy_device struct
717 * @regnum: register number to read
718 *
719 * The caller must have taken the MDIO bus lock.
720 */
721static inline int __phy_read(struct phy_device *phydev, u32 regnum)
722{
723 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
724}
725
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LB
726/**
727 * phy_write - Convenience function for writing a given PHY register
728 * @phydev: the phy_device struct
729 * @regnum: register number to write
730 * @val: value to write to @regnum
731 *
732 * NOTE: MUST NOT be called from interrupt context,
733 * because the bus read/write functions may wait for an interrupt
734 * to conclude the operation.
735 */
abf35df2 736static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 737{
e5a03bfd 738 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
739}
740
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RK
741/**
742 * __phy_write - Convenience function for writing a given PHY register
743 * @phydev: the phy_device struct
744 * @regnum: register number to write
745 * @val: value to write to @regnum
746 *
747 * The caller must have taken the MDIO bus lock.
748 */
749static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
750{
751 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
752 val);
753}
754
755int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 756int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 757
ac8322d8
HK
758/**
759 * __phy_set_bits - Convenience function for setting bits in a PHY register
760 * @phydev: the phy_device struct
761 * @regnum: register number to write
762 * @val: bits to set
763 *
764 * The caller must have taken the MDIO bus lock.
765 */
766static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
767{
768 return __phy_modify(phydev, regnum, 0, val);
769}
770
771/**
772 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
773 * @phydev: the phy_device struct
774 * @regnum: register number to write
775 * @val: bits to clear
776 *
777 * The caller must have taken the MDIO bus lock.
778 */
779static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
780 u16 val)
781{
782 return __phy_modify(phydev, regnum, val, 0);
783}
784
785/**
786 * phy_set_bits - Convenience function for setting bits in a PHY register
787 * @phydev: the phy_device struct
788 * @regnum: register number to write
789 * @val: bits to set
790 */
791static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
792{
793 return phy_modify(phydev, regnum, 0, val);
794}
795
796/**
797 * phy_clear_bits - Convenience function for clearing bits in a PHY register
798 * @phydev: the phy_device struct
799 * @regnum: register number to write
800 * @val: bits to clear
801 */
802static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
803{
804 return phy_modify(phydev, regnum, val, 0);
805}
806
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FF
807/**
808 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
809 * @phydev: the phy_device struct
810 *
811 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
812 * PHY_IGNORE_INTERRUPT
813 */
814static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
815{
816 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
817}
818
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HK
819/**
820 * phy_polling_mode - Convenience function for testing whether polling is
821 * used to detect PHY status changes
822 * @phydev: the phy_device struct
823 */
824static inline bool phy_polling_mode(struct phy_device *phydev)
825{
826 return phydev->irq == PHY_POLL;
827}
828
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FF
829/**
830 * phy_is_internal - Convenience function for testing if a PHY is internal
831 * @phydev: the phy_device struct
832 */
833static inline bool phy_is_internal(struct phy_device *phydev)
834{
835 return phydev->is_internal;
836}
837
32d0f783
IS
838/**
839 * phy_interface_mode_is_rgmii - Convenience function for testing if a
840 * PHY interface mode is RGMII (all variants)
841 * @mode: the phy_interface_t enum
842 */
843static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
844{
845 return mode >= PHY_INTERFACE_MODE_RGMII &&
846 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
847};
848
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RK
849/**
850 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
851 * negotiation
852 * @mode: one of &enum phy_interface_t
853 *
854 * Returns true if the phy interface mode uses the 16-bit negotiation
855 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
856 */
857static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
858{
859 return mode == PHY_INTERFACE_MODE_1000BASEX ||
860 mode == PHY_INTERFACE_MODE_2500BASEX;
861}
862
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FF
863/**
864 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
865 * is RGMII (all variants)
866 * @phydev: the phy_device struct
867 */
868static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
869{
32d0f783 870 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
871};
872
873/*
874 * phy_is_pseudo_fixed_link - Convenience function for testing if this
875 * PHY is the CPU port facing side of an Ethernet switch, or similar.
876 * @phydev: the phy_device struct
877 */
878static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
879{
880 return phydev->is_pseudo_fixed_link;
e463d88c
FF
881}
882
efabdfb9
AF
883/**
884 * phy_write_mmd - Convenience function for writing a register
885 * on an MMD on a given PHY.
886 * @phydev: The phy_device struct
887 * @devad: The MMD to read from
888 * @regnum: The register on the MMD to read
889 * @val: value to write to @regnum
890 *
891 * Same rules as for phy_write();
892 */
9860118b 893int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 894
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895int phy_save_page(struct phy_device *phydev);
896int phy_select_page(struct phy_device *phydev, int page);
897int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
898int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
899int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
900int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
901 u16 mask, u16 set);
902
ac28b9f8 903struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
904 bool is_c45,
905 struct phy_c45_device_ids *c45_ids);
90eff909 906#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 907struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 908int phy_device_register(struct phy_device *phy);
90eff909
FF
909void phy_device_free(struct phy_device *phydev);
910#else
911static inline
912struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
913{
914 return NULL;
915}
916
917static inline int phy_device_register(struct phy_device *phy)
918{
919 return 0;
920}
921
922static inline void phy_device_free(struct phy_device *phydev) { }
923#endif /* CONFIG_PHYLIB */
38737e49 924void phy_device_remove(struct phy_device *phydev);
2f5cb434 925int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
926int phy_suspend(struct phy_device *phydev);
927int phy_resume(struct phy_device *phydev);
9c2c2e62 928int __phy_resume(struct phy_device *phydev);
f0f9b4ed 929int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
930struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
931 phy_interface_t interface);
f8f76db1 932struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
933int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
934 u32 flags, phy_interface_t interface);
fa94f6d9 935int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
936 void (*handler)(struct net_device *),
937 phy_interface_t interface);
938struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
939 void (*handler)(struct net_device *),
940 phy_interface_t interface);
e1393456
AF
941void phy_disconnect(struct phy_device *phydev);
942void phy_detach(struct phy_device *phydev);
943void phy_start(struct phy_device *phydev);
944void phy_stop(struct phy_device *phydev);
945int phy_start_aneg(struct phy_device *phydev);
372788f9 946int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
947int phy_speed_down(struct phy_device *phydev, bool sync);
948int phy_speed_up(struct phy_device *phydev);
e1393456 949
e1393456 950int phy_stop_interrupts(struct phy_device *phydev);
002ba705 951int phy_restart_aneg(struct phy_device *phydev);
a9668491 952int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 953
bafbdd52
SS
954static inline void phy_device_reset(struct phy_device *phydev, int value)
955{
956 mdio_device_reset(&phydev->mdio, value);
957}
958
72ba48be 959#define phydev_err(_phydev, format, args...) \
e5a03bfd 960 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 961
c4fabb8b
AL
962#define phydev_info(_phydev, format, args...) \
963 dev_info(&_phydev->mdio.dev, format, ##args)
964
ab2a605f
AL
965#define phydev_warn(_phydev, format, args...) \
966 dev_warn(&_phydev->mdio.dev, format, ##args)
967
72ba48be 968#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 969 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 970
84eff6d1
AL
971static inline const char *phydev_name(const struct phy_device *phydev)
972{
e5a03bfd 973 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
974}
975
2220943a
AL
976void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
977 __printf(2, 3);
978void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
979
980/* Clause 22 PHY */
af6b6967 981int genphy_config_init(struct phy_device *phydev);
3fb69bca 982int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
983int genphy_restart_aneg(struct phy_device *phydev);
984int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 985int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
986int genphy_update_link(struct phy_device *phydev);
987int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
988int genphy_suspend(struct phy_device *phydev);
989int genphy_resume(struct phy_device *phydev);
f0f9b4ed 990int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 991int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
992static inline int genphy_no_soft_reset(struct phy_device *phydev)
993{
994 return 0;
995}
5df7af85
KH
996int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
997 u16 regnum);
998int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
999 u16 regnum, u16 val);
5acde34a
RK
1000
1001/* Clause 45 PHY */
1002int genphy_c45_restart_aneg(struct phy_device *phydev);
1003int genphy_c45_aneg_done(struct phy_device *phydev);
1004int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
1005int genphy_c45_read_lpa(struct phy_device *phydev);
1006int genphy_c45_read_pma(struct phy_device *phydev);
1007int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1008int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1009int genphy_c45_read_mdix(struct phy_device *phydev);
5acde34a 1010
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1011/* The gen10g_* functions are the old Clause 45 stub */
1012int gen10g_config_aneg(struct phy_device *phydev);
1013int gen10g_read_status(struct phy_device *phydev);
1014int gen10g_no_soft_reset(struct phy_device *phydev);
1015int gen10g_config_init(struct phy_device *phydev);
1016int gen10g_suspend(struct phy_device *phydev);
1017int gen10g_resume(struct phy_device *phydev);
1018
00fde795
HK
1019static inline int phy_read_status(struct phy_device *phydev)
1020{
1021 if (!phydev->drv)
1022 return -EIO;
1023
1024 if (phydev->drv->read_status)
1025 return phydev->drv->read_status(phydev);
1026 else
1027 return genphy_read_status(phydev);
1028}
1029
00db8189 1030void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1031void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1032int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1033int phy_drivers_register(struct phy_driver *new_driver, int n,
1034 struct module *owner);
4f9c85a1 1035void phy_state_machine(struct work_struct *work);
664fcf12 1036void phy_change_work(struct work_struct *work);
28b2e0d2 1037void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1038void phy_start_machine(struct phy_device *phydev);
00db8189
AF
1039void phy_stop_machine(struct phy_device *phydev);
1040int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 1041void phy_ethtool_ksettings_get(struct phy_device *phydev,
1042 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1043int phy_ethtool_ksettings_set(struct phy_device *phydev,
1044 const struct ethtool_link_ksettings *cmd);
4017b4d3 1045int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
1046int phy_start_interrupts(struct phy_device *phydev);
1047void phy_print_status(struct phy_device *phydev);
f3a6bd39 1048int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1049void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
c306ad36 1050void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1051void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1052void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1053 bool autoneg);
70814e81 1054void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1055bool phy_validate_pause(struct phy_device *phydev,
1056 struct ethtool_pauseparam *pp);
00db8189 1057
f62220d3 1058int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1059 int (*run)(struct phy_device *));
f62220d3 1060int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1061 int (*run)(struct phy_device *));
f62220d3 1062int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1063 int (*run)(struct phy_device *));
f62220d3 1064
f38e7a32
WH
1065int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1066int phy_unregister_fixup_for_id(const char *bus_id);
1067int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1068
a59a4d19
GC
1069int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1070int phy_get_eee_err(struct phy_device *phydev);
1071int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1072int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1073int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1074void phy_ethtool_get_wol(struct phy_device *phydev,
1075 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1076int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1077 struct ethtool_link_ksettings *cmd);
1078int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1079 const struct ethtool_link_ksettings *cmd);
e86a8987 1080int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1081
90eff909 1082#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1083int __init mdio_bus_init(void);
1084void mdio_bus_exit(void);
9e8d438e
FF
1085#endif
1086
1087/* Inline function for use within net/core/ethtool.c (built-in) */
1088static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1089{
9e8d438e
FF
1090 if (!phydev->drv)
1091 return -EIO;
1092
1093 mutex_lock(&phydev->lock);
1094 phydev->drv->get_strings(phydev, data);
1095 mutex_unlock(&phydev->lock);
1096
1097 return 0;
c59530d0
FF
1098}
1099
9e8d438e 1100static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1101{
9e8d438e
FF
1102 int ret;
1103
1104 if (!phydev->drv)
1105 return -EIO;
1106
1107 if (phydev->drv->get_sset_count &&
1108 phydev->drv->get_strings &&
1109 phydev->drv->get_stats) {
1110 mutex_lock(&phydev->lock);
1111 ret = phydev->drv->get_sset_count(phydev);
1112 mutex_unlock(&phydev->lock);
1113
1114 return ret;
1115 }
1116
c59530d0
FF
1117 return -EOPNOTSUPP;
1118}
1119
9e8d438e
FF
1120static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1121 struct ethtool_stats *stats, u64 *data)
c59530d0 1122{
9e8d438e
FF
1123 if (!phydev->drv)
1124 return -EIO;
1125
1126 mutex_lock(&phydev->lock);
1127 phydev->drv->get_stats(phydev, stats, data);
1128 mutex_unlock(&phydev->lock);
1129
1130 return 0;
c59530d0 1131}
9b9a8bfc 1132
00db8189 1133extern struct bus_type mdio_bus_type;
c31accd1 1134
648ea013
FF
1135struct mdio_board_info {
1136 const char *bus_id;
1137 char modalias[MDIO_NAME_SIZE];
1138 int mdio_addr;
1139 const void *platform_data;
1140};
1141
90eff909 1142#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1143int mdiobus_register_board_info(const struct mdio_board_info *info,
1144 unsigned int n);
1145#else
1146static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1147 unsigned int n)
1148{
1149 return 0;
1150}
1151#endif
1152
1153
c31accd1
JH
1154/**
1155 * module_phy_driver() - Helper macro for registering PHY drivers
1156 * @__phy_drivers: array of PHY drivers to register
1157 *
1158 * Helper macro for PHY drivers which do not do anything special in module
1159 * init/exit. Each module may only use this macro once, and calling it
1160 * replaces module_init() and module_exit().
1161 */
1162#define phy_module_driver(__phy_drivers, __count) \
1163static int __init phy_module_init(void) \
1164{ \
be01da72 1165 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1166} \
1167module_init(phy_module_init); \
1168static void __exit phy_module_exit(void) \
1169{ \
1170 phy_drivers_unregister(__phy_drivers, __count); \
1171} \
1172module_exit(phy_module_exit)
1173
1174#define module_phy_driver(__phy_drivers) \
1175 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1176
00db8189 1177#endif /* __PHY_H */