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00db8189 | 1 | /* |
00db8189 AF |
2 | * Framework and drivers for configuring and reading different PHYs |
3 | * Based on code in sungem_phy.c and gianfar_phy.c | |
4 | * | |
5 | * Author: Andy Fleming | |
6 | * | |
7 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #ifndef __PHY_H | |
17 | #define __PHY_H | |
18 | ||
19 | #include <linux/spinlock.h> | |
13df29f6 MR |
20 | #include <linux/ethtool.h> |
21 | #include <linux/mii.h> | |
22 | #include <linux/timer.h> | |
23 | #include <linux/workqueue.h> | |
8626d3b4 | 24 | #include <linux/mod_devicetable.h> |
00db8189 | 25 | |
60063497 | 26 | #include <linux/atomic.h> |
0ac49527 | 27 | |
e9fbdf17 | 28 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
29 | SUPPORTED_TP | \ |
30 | SUPPORTED_MII) | |
31 | ||
e9fbdf17 FF |
32 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
33 | SUPPORTED_10baseT_Full) | |
34 | ||
35 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
36 | SUPPORTED_100baseT_Full) | |
37 | ||
38 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
39 | SUPPORTED_1000baseT_Full) |
40 | ||
e9fbdf17 FF |
41 | #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \ |
42 | PHY_100BT_FEATURES | \ | |
43 | PHY_DEFAULT_FEATURES) | |
44 | ||
45 | #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \ | |
46 | PHY_1000BT_FEATURES) | |
47 | ||
48 | ||
c5e38a94 AF |
49 | /* |
50 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
00db8189 AF |
51 | * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if |
52 | * the attached driver handles the interrupt | |
53 | */ | |
54 | #define PHY_POLL -1 | |
55 | #define PHY_IGNORE_INTERRUPT -2 | |
56 | ||
57 | #define PHY_HAS_INTERRUPT 0x00000001 | |
58 | #define PHY_HAS_MAGICANEG 0x00000002 | |
4284b6a5 | 59 | #define PHY_IS_INTERNAL 0x00000004 |
00db8189 | 60 | |
e8a2b6a4 AF |
61 | /* Interface Mode definitions */ |
62 | typedef enum { | |
4157ef1b | 63 | PHY_INTERFACE_MODE_NA, |
e8a2b6a4 AF |
64 | PHY_INTERFACE_MODE_MII, |
65 | PHY_INTERFACE_MODE_GMII, | |
66 | PHY_INTERFACE_MODE_SGMII, | |
67 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 68 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 AF |
69 | PHY_INTERFACE_MODE_RMII, |
70 | PHY_INTERFACE_MODE_RGMII, | |
a999589c | 71 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
72 | PHY_INTERFACE_MODE_RGMII_RXID, |
73 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
74 | PHY_INTERFACE_MODE_RTBI, |
75 | PHY_INTERFACE_MODE_SMII, | |
898dd0bd | 76 | PHY_INTERFACE_MODE_XGMII, |
e8a2b6a4 AF |
77 | } phy_interface_t; |
78 | ||
00db8189 | 79 | |
e8a2b6a4 | 80 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 AF |
81 | #define PHY_STATE_TIME 1 |
82 | #define PHY_FORCE_TIMEOUT 10 | |
83 | #define PHY_AN_TIMEOUT 10 | |
84 | ||
e8a2b6a4 | 85 | #define PHY_MAX_ADDR 32 |
00db8189 | 86 | |
a4d00f17 | 87 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
88 | #define PHY_ID_FMT "%s:%02x" |
89 | ||
90 | /* | |
91 | * Need to be a little smaller than phydev->dev.bus_id to leave room | |
92 | * for the ":%02x" | |
93 | */ | |
8e401ecc | 94 | #define MII_BUS_ID_SIZE (20 - 3) |
a4d00f17 | 95 | |
abf35df2 JG |
96 | /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit |
97 | IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ | |
98 | #define MII_ADDR_C45 (1<<30) | |
99 | ||
313162d0 PG |
100 | struct device; |
101 | struct sk_buff; | |
102 | ||
c5e38a94 AF |
103 | /* |
104 | * The Bus class for PHYs. Devices which provide access to | |
105 | * PHYs should register using this structure | |
106 | */ | |
00db8189 AF |
107 | struct mii_bus { |
108 | const char *name; | |
9d9326d3 | 109 | char id[MII_BUS_ID_SIZE]; |
00db8189 AF |
110 | void *priv; |
111 | int (*read)(struct mii_bus *bus, int phy_id, int regnum); | |
112 | int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val); | |
113 | int (*reset)(struct mii_bus *bus); | |
114 | ||
c5e38a94 AF |
115 | /* |
116 | * A lock to ensure that only one thing can read/write | |
117 | * the MDIO bus at a time | |
118 | */ | |
35b5f6b1 | 119 | struct mutex mdio_lock; |
00db8189 | 120 | |
18ee49dd | 121 | struct device *parent; |
46abc021 LB |
122 | enum { |
123 | MDIOBUS_ALLOCATED = 1, | |
124 | MDIOBUS_REGISTERED, | |
125 | MDIOBUS_UNREGISTERED, | |
126 | MDIOBUS_RELEASED, | |
127 | } state; | |
128 | struct device dev; | |
00db8189 AF |
129 | |
130 | /* list of all PHYs on bus */ | |
131 | struct phy_device *phy_map[PHY_MAX_ADDR]; | |
132 | ||
c6883996 | 133 | /* PHY addresses to be ignored when probing */ |
f896424c MP |
134 | u32 phy_mask; |
135 | ||
c5e38a94 AF |
136 | /* |
137 | * Pointer to an array of interrupts, each PHY's | |
138 | * interrupt at the index matching its address | |
139 | */ | |
00db8189 AF |
140 | int *irq; |
141 | }; | |
46abc021 | 142 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 143 | |
eb8a54a7 TT |
144 | struct mii_bus *mdiobus_alloc_size(size_t); |
145 | static inline struct mii_bus *mdiobus_alloc(void) | |
146 | { | |
147 | return mdiobus_alloc_size(0); | |
148 | } | |
149 | ||
2e888103 LB |
150 | int mdiobus_register(struct mii_bus *bus); |
151 | void mdiobus_unregister(struct mii_bus *bus); | |
152 | void mdiobus_free(struct mii_bus *bus); | |
153 | struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); | |
abf35df2 JG |
154 | int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum); |
155 | int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val); | |
2e888103 LB |
156 | |
157 | ||
e8a2b6a4 AF |
158 | #define PHY_INTERRUPT_DISABLED 0x0 |
159 | #define PHY_INTERRUPT_ENABLED 0x80000000 | |
00db8189 AF |
160 | |
161 | /* PHY state machine states: | |
162 | * | |
163 | * DOWN: PHY device and driver are not ready for anything. probe | |
164 | * should be called if and only if the PHY is in this state, | |
165 | * given that the PHY device exists. | |
166 | * - PHY driver probe function will, depending on the PHY, set | |
167 | * the state to STARTING or READY | |
168 | * | |
169 | * STARTING: PHY device is coming up, and the ethernet driver is | |
170 | * not ready. PHY drivers may set this in the probe function. | |
171 | * If they do, they are responsible for making sure the state is | |
172 | * eventually set to indicate whether the PHY is UP or READY, | |
173 | * depending on the state when the PHY is done starting up. | |
174 | * - PHY driver will set the state to READY | |
175 | * - start will set the state to PENDING | |
176 | * | |
177 | * READY: PHY is ready to send and receive packets, but the | |
178 | * controller is not. By default, PHYs which do not implement | |
179 | * probe will be set to this state by phy_probe(). If the PHY | |
180 | * driver knows the PHY is ready, and the PHY state is STARTING, | |
181 | * then it sets this STATE. | |
182 | * - start will set the state to UP | |
183 | * | |
184 | * PENDING: PHY device is coming up, but the ethernet driver is | |
185 | * ready. phy_start will set this state if the PHY state is | |
186 | * STARTING. | |
187 | * - PHY driver will set the state to UP when the PHY is ready | |
188 | * | |
189 | * UP: The PHY and attached device are ready to do work. | |
190 | * Interrupts should be started here. | |
191 | * - timer moves to AN | |
192 | * | |
193 | * AN: The PHY is currently negotiating the link state. Link is | |
194 | * therefore down for now. phy_timer will set this state when it | |
195 | * detects the state is UP. config_aneg will set this state | |
196 | * whenever called with phydev->autoneg set to AUTONEG_ENABLE. | |
197 | * - If autonegotiation finishes, but there's no link, it sets | |
198 | * the state to NOLINK. | |
199 | * - If aneg finishes with link, it sets the state to RUNNING, | |
200 | * and calls adjust_link | |
201 | * - If autonegotiation did not finish after an arbitrary amount | |
202 | * of time, autonegotiation should be tried again if the PHY | |
203 | * supports "magic" autonegotiation (back to AN) | |
204 | * - If it didn't finish, and no magic_aneg, move to FORCING. | |
205 | * | |
206 | * NOLINK: PHY is up, but not currently plugged in. | |
207 | * - If the timer notes that the link comes back, we move to RUNNING | |
208 | * - config_aneg moves to AN | |
209 | * - phy_stop moves to HALTED | |
210 | * | |
211 | * FORCING: PHY is being configured with forced settings | |
212 | * - if link is up, move to RUNNING | |
213 | * - If link is down, we drop to the next highest setting, and | |
214 | * retry (FORCING) after a timeout | |
215 | * - phy_stop moves to HALTED | |
216 | * | |
217 | * RUNNING: PHY is currently up, running, and possibly sending | |
218 | * and/or receiving packets | |
219 | * - timer will set CHANGELINK if we're polling (this ensures the | |
220 | * link state is polled every other cycle of this state machine, | |
221 | * which makes it every other second) | |
222 | * - irq will set CHANGELINK | |
223 | * - config_aneg will set AN | |
224 | * - phy_stop moves to HALTED | |
225 | * | |
226 | * CHANGELINK: PHY experienced a change in link state | |
227 | * - timer moves to RUNNING if link | |
228 | * - timer moves to NOLINK if the link is down | |
229 | * - phy_stop moves to HALTED | |
230 | * | |
231 | * HALTED: PHY is up, but no polling or interrupts are done. Or | |
232 | * PHY is in an error state. | |
233 | * | |
234 | * - phy_start moves to RESUMING | |
235 | * | |
236 | * RESUMING: PHY was halted, but now wants to run again. | |
237 | * - If we are forcing, or aneg is done, timer moves to RUNNING | |
238 | * - If aneg is not done, timer moves to AN | |
239 | * - phy_stop moves to HALTED | |
240 | */ | |
241 | enum phy_state { | |
4017b4d3 | 242 | PHY_DOWN = 0, |
00db8189 AF |
243 | PHY_STARTING, |
244 | PHY_READY, | |
245 | PHY_PENDING, | |
246 | PHY_UP, | |
247 | PHY_AN, | |
248 | PHY_RUNNING, | |
249 | PHY_NOLINK, | |
250 | PHY_FORCING, | |
251 | PHY_CHANGELINK, | |
252 | PHY_HALTED, | |
253 | PHY_RESUMING | |
254 | }; | |
255 | ||
ac28b9f8 DD |
256 | /** |
257 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
258 | * @devices_in_package: Bit vector of devices present. | |
259 | * @device_ids: The device identifer for each present device. | |
260 | */ | |
261 | struct phy_c45_device_ids { | |
262 | u32 devices_in_package; | |
263 | u32 device_ids[8]; | |
264 | }; | |
c1f19b51 | 265 | |
00db8189 AF |
266 | /* phy_device: An instance of a PHY |
267 | * | |
268 | * drv: Pointer to the driver for this PHY instance | |
269 | * bus: Pointer to the bus this PHY is on | |
270 | * dev: driver model device structure for this PHY | |
271 | * phy_id: UID for this device found during discovery | |
ac28b9f8 DD |
272 | * c45_ids: 802.3-c45 Device Identifers if is_c45. |
273 | * is_c45: Set to true if this phy uses clause 45 addressing. | |
4284b6a5 | 274 | * is_internal: Set to true if this phy is internal to a MAC. |
00db8189 AF |
275 | * state: state of the PHY for management purposes |
276 | * dev_flags: Device-specific flags used by the PHY driver. | |
277 | * addr: Bus address of PHY | |
278 | * link_timeout: The number of timer firings to wait before the | |
279 | * giving up on the current attempt at acquiring a link | |
280 | * irq: IRQ number of the PHY's interrupt (-1 if none) | |
281 | * phy_timer: The timer for handling the state machine | |
282 | * phy_queue: A work_queue for the interrupt | |
283 | * attached_dev: The attached enet driver's device instance ptr | |
284 | * adjust_link: Callback for the enet controller to respond to | |
285 | * changes in the link state. | |
00db8189 | 286 | * |
114002bc FF |
287 | * speed, duplex, pause, supported, advertising, lp_advertising, |
288 | * and autoneg are used like in mii_if_info | |
00db8189 AF |
289 | * |
290 | * interrupts currently only supports enabled or disabled, | |
291 | * but could be changed in the future to support enabling | |
292 | * and disabling specific interrupts | |
293 | * | |
294 | * Contains some infrastructure for polling and interrupt | |
295 | * handling, as well as handling shifts in PHY hardware state | |
296 | */ | |
297 | struct phy_device { | |
298 | /* Information about the PHY type */ | |
299 | /* And management functions */ | |
300 | struct phy_driver *drv; | |
301 | ||
302 | struct mii_bus *bus; | |
303 | ||
304 | struct device dev; | |
305 | ||
306 | u32 phy_id; | |
307 | ||
ac28b9f8 DD |
308 | struct phy_c45_device_ids c45_ids; |
309 | bool is_c45; | |
4284b6a5 | 310 | bool is_internal; |
ac28b9f8 | 311 | |
00db8189 AF |
312 | enum phy_state state; |
313 | ||
314 | u32 dev_flags; | |
315 | ||
e8a2b6a4 AF |
316 | phy_interface_t interface; |
317 | ||
c6883996 | 318 | /* Bus address of the PHY (0-31) */ |
00db8189 AF |
319 | int addr; |
320 | ||
c5e38a94 AF |
321 | /* |
322 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
323 | * partner speed & duplex & pause (autoneg) |
324 | */ | |
325 | int speed; | |
326 | int duplex; | |
327 | int pause; | |
328 | int asym_pause; | |
329 | ||
330 | /* The most recently read link state */ | |
331 | int link; | |
332 | ||
333 | /* Enabled Interrupts */ | |
334 | u32 interrupts; | |
335 | ||
336 | /* Union of PHY and Attached devices' supported modes */ | |
337 | /* See mii.h for more info */ | |
338 | u32 supported; | |
339 | u32 advertising; | |
114002bc | 340 | u32 lp_advertising; |
00db8189 AF |
341 | |
342 | int autoneg; | |
343 | ||
344 | int link_timeout; | |
345 | ||
c5e38a94 AF |
346 | /* |
347 | * Interrupt number for this PHY | |
348 | * -1 means no interrupt | |
349 | */ | |
00db8189 AF |
350 | int irq; |
351 | ||
352 | /* private data pointer */ | |
353 | /* For use by PHYs to maintain extra state */ | |
354 | void *priv; | |
355 | ||
356 | /* Interrupt and Polling infrastructure */ | |
357 | struct work_struct phy_queue; | |
a390d1f3 | 358 | struct delayed_work state_queue; |
0ac49527 | 359 | atomic_t irq_disable; |
00db8189 | 360 | |
35b5f6b1 | 361 | struct mutex lock; |
00db8189 AF |
362 | |
363 | struct net_device *attached_dev; | |
364 | ||
365 | void (*adjust_link)(struct net_device *dev); | |
00db8189 AF |
366 | }; |
367 | #define to_phy_device(d) container_of(d, struct phy_device, dev) | |
368 | ||
369 | /* struct phy_driver: Driver structure for a particular PHY type | |
370 | * | |
371 | * phy_id: The result of reading the UID registers of this PHY | |
372 | * type, and ANDing them with the phy_id_mask. This driver | |
373 | * only works for PHYs with IDs which match this field | |
374 | * name: The friendly name of this PHY type | |
375 | * phy_id_mask: Defines the important bits of the phy_id | |
376 | * features: A list of features (speed, duplex, etc) supported | |
377 | * by this PHY | |
378 | * flags: A bitfield defining certain other features this PHY | |
379 | * supports (like interrupts) | |
380 | * | |
381 | * The drivers must implement config_aneg and read_status. All | |
382 | * other functions are optional. Note that none of these | |
383 | * functions should be called from interrupt time. The goal is | |
384 | * for the bus read/write functions to be able to block when the | |
385 | * bus transaction is happening, and be freed up by an interrupt | |
386 | * (The MPC85xx has this ability, though it is not currently | |
387 | * supported in the driver). | |
388 | */ | |
389 | struct phy_driver { | |
390 | u32 phy_id; | |
391 | char *name; | |
392 | unsigned int phy_id_mask; | |
393 | u32 features; | |
394 | u32 flags; | |
395 | ||
c5e38a94 AF |
396 | /* |
397 | * Called to initialize the PHY, | |
398 | * including after a reset | |
399 | */ | |
00db8189 AF |
400 | int (*config_init)(struct phy_device *phydev); |
401 | ||
c5e38a94 AF |
402 | /* |
403 | * Called during discovery. Used to set | |
404 | * up device-specific structures, if any | |
405 | */ | |
00db8189 AF |
406 | int (*probe)(struct phy_device *phydev); |
407 | ||
408 | /* PHY Power Management */ | |
409 | int (*suspend)(struct phy_device *phydev); | |
410 | int (*resume)(struct phy_device *phydev); | |
411 | ||
c5e38a94 AF |
412 | /* |
413 | * Configures the advertisement and resets | |
00db8189 AF |
414 | * autonegotiation if phydev->autoneg is on, |
415 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
416 | * if phydev->autoneg is off |
417 | */ | |
00db8189 AF |
418 | int (*config_aneg)(struct phy_device *phydev); |
419 | ||
420 | /* Determines the negotiated speed and duplex */ | |
421 | int (*read_status)(struct phy_device *phydev); | |
422 | ||
423 | /* Clears any pending interrupts */ | |
424 | int (*ack_interrupt)(struct phy_device *phydev); | |
425 | ||
426 | /* Enables or disables interrupts */ | |
427 | int (*config_intr)(struct phy_device *phydev); | |
428 | ||
a8729eb3 AG |
429 | /* |
430 | * Checks if the PHY generated an interrupt. | |
431 | * For multi-PHY devices with shared PHY interrupt pin | |
432 | */ | |
433 | int (*did_interrupt)(struct phy_device *phydev); | |
434 | ||
00db8189 AF |
435 | /* Clears up any memory if needed */ |
436 | void (*remove)(struct phy_device *phydev); | |
437 | ||
a30e2c18 DD |
438 | /* Returns true if this is a suitable driver for the given |
439 | * phydev. If NULL, matching is based on phy_id and | |
440 | * phy_id_mask. | |
441 | */ | |
442 | int (*match_phy_device)(struct phy_device *phydev); | |
443 | ||
c8f3a8c3 RC |
444 | /* Handles ethtool queries for hardware time stamping. */ |
445 | int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); | |
446 | ||
c1f19b51 RC |
447 | /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ |
448 | int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); | |
449 | ||
450 | /* | |
451 | * Requests a Rx timestamp for 'skb'. If the skb is accepted, | |
452 | * the phy driver promises to deliver it using netif_rx() as | |
453 | * soon as a timestamp becomes available. One of the | |
454 | * PTP_CLASS_ values is passed in 'type'. The function must | |
455 | * return true if the skb is accepted for delivery. | |
456 | */ | |
457 | bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
458 | ||
459 | /* | |
460 | * Requests a Tx timestamp for 'skb'. The phy driver promises | |
da92b194 | 461 | * to deliver it using skb_complete_tx_timestamp() as soon as a |
c1f19b51 RC |
462 | * timestamp becomes available. One of the PTP_CLASS_ values |
463 | * is passed in 'type'. | |
464 | */ | |
465 | void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
466 | ||
42e836eb MS |
467 | /* Some devices (e.g. qnap TS-119P II) require PHY register changes to |
468 | * enable Wake on LAN, so set_wol is provided to be called in the | |
469 | * ethernet driver's set_wol function. */ | |
470 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
471 | ||
472 | /* See set_wol, but for checking whether Wake on LAN is enabled. */ | |
473 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
474 | ||
00db8189 AF |
475 | struct device_driver driver; |
476 | }; | |
477 | #define to_phy_driver(d) container_of(d, struct phy_driver, driver) | |
478 | ||
f62220d3 AF |
479 | #define PHY_ANY_ID "MATCH ANY PHY" |
480 | #define PHY_ANY_UID 0xffffffff | |
481 | ||
482 | /* A Structure for boards to register fixups with the PHY Lib */ | |
483 | struct phy_fixup { | |
484 | struct list_head list; | |
8e401ecc | 485 | char bus_id[20]; |
f62220d3 AF |
486 | u32 phy_uid; |
487 | u32 phy_uid_mask; | |
488 | int (*run)(struct phy_device *phydev); | |
489 | }; | |
490 | ||
efabdfb9 AF |
491 | /** |
492 | * phy_read_mmd - Convenience function for reading a register | |
493 | * from an MMD on a given PHY. | |
494 | * @phydev: The phy_device struct | |
495 | * @devad: The MMD to read from | |
496 | * @regnum: The register on the MMD to read | |
497 | * | |
498 | * Same rules as for phy_read(); | |
499 | */ | |
500 | static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) | |
501 | { | |
502 | if (!phydev->is_c45) | |
503 | return -EOPNOTSUPP; | |
504 | ||
505 | return mdiobus_read(phydev->bus, phydev->addr, | |
506 | MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff)); | |
507 | } | |
508 | ||
2e888103 LB |
509 | /** |
510 | * phy_read - Convenience function for reading a given PHY register | |
511 | * @phydev: the phy_device struct | |
512 | * @regnum: register number to read | |
513 | * | |
514 | * NOTE: MUST NOT be called from interrupt context, | |
515 | * because the bus read/write functions may wait for an interrupt | |
516 | * to conclude the operation. | |
517 | */ | |
abf35df2 | 518 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 LB |
519 | { |
520 | return mdiobus_read(phydev->bus, phydev->addr, regnum); | |
521 | } | |
522 | ||
523 | /** | |
524 | * phy_write - Convenience function for writing a given PHY register | |
525 | * @phydev: the phy_device struct | |
526 | * @regnum: register number to write | |
527 | * @val: value to write to @regnum | |
528 | * | |
529 | * NOTE: MUST NOT be called from interrupt context, | |
530 | * because the bus read/write functions may wait for an interrupt | |
531 | * to conclude the operation. | |
532 | */ | |
abf35df2 | 533 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 LB |
534 | { |
535 | return mdiobus_write(phydev->bus, phydev->addr, regnum, val); | |
536 | } | |
537 | ||
2c7b4921 FF |
538 | /** |
539 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
540 | * @phydev: the phy_device struct | |
541 | * | |
542 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
543 | * PHY_IGNORE_INTERRUPT | |
544 | */ | |
545 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
546 | { | |
547 | return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; | |
548 | } | |
549 | ||
4284b6a5 FF |
550 | /** |
551 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
552 | * @phydev: the phy_device struct | |
553 | */ | |
554 | static inline bool phy_is_internal(struct phy_device *phydev) | |
555 | { | |
556 | return phydev->is_internal; | |
557 | } | |
558 | ||
efabdfb9 AF |
559 | /** |
560 | * phy_write_mmd - Convenience function for writing a register | |
561 | * on an MMD on a given PHY. | |
562 | * @phydev: The phy_device struct | |
563 | * @devad: The MMD to read from | |
564 | * @regnum: The register on the MMD to read | |
565 | * @val: value to write to @regnum | |
566 | * | |
567 | * Same rules as for phy_write(); | |
568 | */ | |
569 | static inline int phy_write_mmd(struct phy_device *phydev, int devad, | |
570 | u32 regnum, u16 val) | |
571 | { | |
572 | if (!phydev->is_c45) | |
573 | return -EOPNOTSUPP; | |
574 | ||
575 | regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff); | |
576 | ||
577 | return mdiobus_write(phydev->bus, phydev->addr, regnum, val); | |
578 | } | |
579 | ||
ac28b9f8 | 580 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, |
4017b4d3 SS |
581 | bool is_c45, |
582 | struct phy_c45_device_ids *c45_ids); | |
ac28b9f8 | 583 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 584 | int phy_device_register(struct phy_device *phy); |
2f5cb434 | 585 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
586 | int phy_suspend(struct phy_device *phydev); |
587 | int phy_resume(struct phy_device *phydev); | |
4017b4d3 SS |
588 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
589 | phy_interface_t interface); | |
f8f76db1 | 590 | struct phy_device *phy_find_first(struct mii_bus *bus); |
fa94f6d9 | 591 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
592 | void (*handler)(struct net_device *), |
593 | phy_interface_t interface); | |
594 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
595 | void (*handler)(struct net_device *), | |
596 | phy_interface_t interface); | |
e1393456 AF |
597 | void phy_disconnect(struct phy_device *phydev); |
598 | void phy_detach(struct phy_device *phydev); | |
599 | void phy_start(struct phy_device *phydev); | |
600 | void phy_stop(struct phy_device *phydev); | |
601 | int phy_start_aneg(struct phy_device *phydev); | |
602 | ||
e1393456 | 603 | int phy_stop_interrupts(struct phy_device *phydev); |
00db8189 | 604 | |
4017b4d3 SS |
605 | static inline int phy_read_status(struct phy_device *phydev) |
606 | { | |
00db8189 AF |
607 | return phydev->drv->read_status(phydev); |
608 | } | |
609 | ||
3fb69bca | 610 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 AF |
611 | int genphy_restart_aneg(struct phy_device *phydev); |
612 | int genphy_config_aneg(struct phy_device *phydev); | |
613 | int genphy_update_link(struct phy_device *phydev); | |
614 | int genphy_read_status(struct phy_device *phydev); | |
0f0ca340 GC |
615 | int genphy_suspend(struct phy_device *phydev); |
616 | int genphy_resume(struct phy_device *phydev); | |
00db8189 | 617 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 618 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
00db8189 | 619 | int phy_driver_register(struct phy_driver *new_driver); |
d5bf9071 | 620 | int phy_drivers_register(struct phy_driver *new_driver, int n); |
4f9c85a1 | 621 | void phy_state_machine(struct work_struct *work); |
5ea94e76 FF |
622 | void phy_change(struct work_struct *work); |
623 | void phy_mac_interrupt(struct phy_device *phydev, int new_link); | |
29935aeb | 624 | void phy_start_machine(struct phy_device *phydev); |
00db8189 AF |
625 | void phy_stop_machine(struct phy_device *phydev); |
626 | int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
627 | int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
4017b4d3 | 628 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
e1393456 AF |
629 | int phy_start_interrupts(struct phy_device *phydev); |
630 | void phy_print_status(struct phy_device *phydev); | |
6f4a7f41 | 631 | void phy_device_free(struct phy_device *phydev); |
00db8189 | 632 | |
f62220d3 | 633 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 634 | int (*run)(struct phy_device *)); |
f62220d3 | 635 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 636 | int (*run)(struct phy_device *)); |
f62220d3 | 637 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 638 | int (*run)(struct phy_device *)); |
f62220d3 | 639 | |
a59a4d19 GC |
640 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
641 | int phy_get_eee_err(struct phy_device *phydev); | |
642 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
643 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
42e836eb | 644 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
645 | void phy_ethtool_get_wol(struct phy_device *phydev, |
646 | struct ethtool_wolinfo *wol); | |
a59a4d19 | 647 | |
9b9a8bfc AF |
648 | int __init mdio_bus_init(void); |
649 | void mdio_bus_exit(void); | |
650 | ||
00db8189 | 651 | extern struct bus_type mdio_bus_type; |
00db8189 | 652 | #endif /* __PHY_H */ |