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00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
b31cdffa 22#include <linux/linkmode.h>
bac83c65 23#include <linux/mdio.h>
13df29f6 24#include <linux/mii.h>
3e3aaf64 25#include <linux/module.h>
13df29f6
MR
26#include <linux/timer.h>
27#include <linux/workqueue.h>
8626d3b4 28#include <linux/mod_devicetable.h>
00db8189 29
60063497 30#include <linux/atomic.h>
0ac49527 31
e9fbdf17 32#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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AF
33 SUPPORTED_TP | \
34 SUPPORTED_MII)
35
e9fbdf17
FF
36#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
37 SUPPORTED_10baseT_Full)
38
39#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
40 SUPPORTED_100baseT_Full)
41
42#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
00db8189
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43 SUPPORTED_1000baseT_Full)
44
719655a1
AL
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
52
53#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
54#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
55#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
56#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
57#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
58#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
59#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 60
3c1bcc86
AL
61extern const int phy_10_100_features_array[4];
62extern const int phy_basic_t1_features_array[2];
63extern const int phy_gbit_features_array[2];
64extern const int phy_10gbit_features_array[1];
65
c5e38a94
AF
66/*
67 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
AF
68 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
69 * the attached driver handles the interrupt
70 */
71#define PHY_POLL -1
72#define PHY_IGNORE_INTERRUPT -2
73
a4307c0e
HK
74#define PHY_IS_INTERNAL 0x00000001
75#define PHY_RST_AFTER_CLK_EN 0x00000002
a9049e0c 76#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 77
e8a2b6a4
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78/* Interface Mode definitions */
79typedef enum {
4157ef1b 80 PHY_INTERFACE_MODE_NA,
735d8a18 81 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
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82 PHY_INTERFACE_MODE_MII,
83 PHY_INTERFACE_MODE_GMII,
84 PHY_INTERFACE_MODE_SGMII,
85 PHY_INTERFACE_MODE_TBI,
2cc70ba4 86 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
87 PHY_INTERFACE_MODE_RMII,
88 PHY_INTERFACE_MODE_RGMII,
a999589c 89 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
90 PHY_INTERFACE_MODE_RGMII_RXID,
91 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
92 PHY_INTERFACE_MODE_RTBI,
93 PHY_INTERFACE_MODE_SMII,
898dd0bd 94 PHY_INTERFACE_MODE_XGMII,
fd70f72c 95 PHY_INTERFACE_MODE_MOCA,
b9d12085 96 PHY_INTERFACE_MODE_QSGMII,
572de608 97 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
98 PHY_INTERFACE_MODE_1000BASEX,
99 PHY_INTERFACE_MODE_2500BASEX,
100 PHY_INTERFACE_MODE_RXAUI,
c125ca09
RK
101 PHY_INTERFACE_MODE_XAUI,
102 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
103 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 104 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
105} phy_interface_t;
106
1f9127ca
ZB
107/**
108 * phy_supported_speeds - return all speeds currently supported by a phy device
109 * @phy: The phy device to return supported speeds of.
110 * @speeds: buffer to store supported speeds in.
111 * @size: size of speeds buffer.
112 *
113 * Description: Returns the number of supported speeds, and
114 * fills the speeds * buffer with the supported speeds. If speeds buffer is
115 * too small to contain * all currently supported speeds, will return as
116 * many speeds as can fit.
117 */
118unsigned int phy_supported_speeds(struct phy_device *phy,
119 unsigned int *speeds,
120 unsigned int size);
121
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FF
122/**
123 * It maps 'enum phy_interface_t' found in include/linux/phy.h
124 * into the device tree binding of 'phy-mode', so that Ethernet
125 * device driver can get phy interface from device tree.
126 */
127static inline const char *phy_modes(phy_interface_t interface)
128{
129 switch (interface) {
130 case PHY_INTERFACE_MODE_NA:
131 return "";
735d8a18
FF
132 case PHY_INTERFACE_MODE_INTERNAL:
133 return "internal";
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FF
134 case PHY_INTERFACE_MODE_MII:
135 return "mii";
136 case PHY_INTERFACE_MODE_GMII:
137 return "gmii";
138 case PHY_INTERFACE_MODE_SGMII:
139 return "sgmii";
140 case PHY_INTERFACE_MODE_TBI:
141 return "tbi";
142 case PHY_INTERFACE_MODE_REVMII:
143 return "rev-mii";
144 case PHY_INTERFACE_MODE_RMII:
145 return "rmii";
146 case PHY_INTERFACE_MODE_RGMII:
147 return "rgmii";
148 case PHY_INTERFACE_MODE_RGMII_ID:
149 return "rgmii-id";
150 case PHY_INTERFACE_MODE_RGMII_RXID:
151 return "rgmii-rxid";
152 case PHY_INTERFACE_MODE_RGMII_TXID:
153 return "rgmii-txid";
154 case PHY_INTERFACE_MODE_RTBI:
155 return "rtbi";
156 case PHY_INTERFACE_MODE_SMII:
157 return "smii";
158 case PHY_INTERFACE_MODE_XGMII:
159 return "xgmii";
fd70f72c
FF
160 case PHY_INTERFACE_MODE_MOCA:
161 return "moca";
b9d12085
TP
162 case PHY_INTERFACE_MODE_QSGMII:
163 return "qsgmii";
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SW
164 case PHY_INTERFACE_MODE_TRGMII:
165 return "trgmii";
55601a88
AL
166 case PHY_INTERFACE_MODE_1000BASEX:
167 return "1000base-x";
168 case PHY_INTERFACE_MODE_2500BASEX:
169 return "2500base-x";
170 case PHY_INTERFACE_MODE_RXAUI:
171 return "rxaui";
c125ca09
RK
172 case PHY_INTERFACE_MODE_XAUI:
173 return "xaui";
174 case PHY_INTERFACE_MODE_10GKR:
175 return "10gbase-kr";
8a2fe56e
FF
176 default:
177 return "unknown";
178 }
179}
180
00db8189 181
e8a2b6a4 182#define PHY_INIT_TIMEOUT 100000
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AF
183#define PHY_STATE_TIME 1
184#define PHY_FORCE_TIMEOUT 10
00db8189 185
e8a2b6a4 186#define PHY_MAX_ADDR 32
00db8189 187
a4d00f17 188/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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189#define PHY_ID_FMT "%s:%02x"
190
4567d686 191#define MII_BUS_ID_SIZE 61
a4d00f17 192
abf35df2
JG
193/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
194 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
195#define MII_ADDR_C45 (1<<30)
196
313162d0 197struct device;
9525ae83 198struct phylink;
313162d0
PG
199struct sk_buff;
200
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201/*
202 * The Bus class for PHYs. Devices which provide access to
203 * PHYs should register using this structure
204 */
00db8189 205struct mii_bus {
3e3aaf64 206 struct module *owner;
00db8189 207 const char *name;
9d9326d3 208 char id[MII_BUS_ID_SIZE];
00db8189 209 void *priv;
ccaa953e
AL
210 int (*read)(struct mii_bus *bus, int addr, int regnum);
211 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
00db8189
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212 int (*reset)(struct mii_bus *bus);
213
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214 /*
215 * A lock to ensure that only one thing can read/write
216 * the MDIO bus at a time
217 */
35b5f6b1 218 struct mutex mdio_lock;
00db8189 219
18ee49dd 220 struct device *parent;
46abc021
LB
221 enum {
222 MDIOBUS_ALLOCATED = 1,
223 MDIOBUS_REGISTERED,
224 MDIOBUS_UNREGISTERED,
225 MDIOBUS_RELEASED,
226 } state;
227 struct device dev;
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AF
228
229 /* list of all PHYs on bus */
7f854420 230 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 231
c6883996 232 /* PHY addresses to be ignored when probing */
f896424c
MP
233 u32 phy_mask;
234
922f2dd1
FF
235 /* PHY addresses to ignore the TA/read failure */
236 u32 phy_ignore_ta_mask;
237
c5e38a94 238 /*
e7f4dc35
AL
239 * An array of interrupts, each PHY's interrupt at the index
240 * matching its address
c5e38a94 241 */
e7f4dc35 242 int irq[PHY_MAX_ADDR];
69226896
RQ
243
244 /* GPIO reset pulse width in microseconds */
245 int reset_delay_us;
d396e84c
SS
246 /* RESET GPIO descriptor pointer */
247 struct gpio_desc *reset_gpiod;
00db8189 248};
46abc021 249#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 250
eb8a54a7
TT
251struct mii_bus *mdiobus_alloc_size(size_t);
252static inline struct mii_bus *mdiobus_alloc(void)
253{
254 return mdiobus_alloc_size(0);
255}
256
3e3aaf64
RK
257int __mdiobus_register(struct mii_bus *bus, struct module *owner);
258#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
2e888103
LB
259void mdiobus_unregister(struct mii_bus *bus);
260void mdiobus_free(struct mii_bus *bus);
6d48f44b
GS
261struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
262static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
263{
264 return devm_mdiobus_alloc_size(dev, 0);
265}
266
267void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 268struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 269
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HK
270#define PHY_INTERRUPT_DISABLED false
271#define PHY_INTERRUPT_ENABLED true
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272
273/* PHY state machine states:
274 *
275 * DOWN: PHY device and driver are not ready for anything. probe
276 * should be called if and only if the PHY is in this state,
277 * given that the PHY device exists.
899a3cbb 278 * - PHY driver probe function will set the state to READY
00db8189
AF
279 *
280 * READY: PHY is ready to send and receive packets, but the
281 * controller is not. By default, PHYs which do not implement
899a3cbb 282 * probe will be set to this state by phy_probe().
00db8189
AF
283 * - start will set the state to UP
284 *
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285 * UP: The PHY and attached device are ready to do work.
286 * Interrupts should be started here.
85a1f31d 287 * - timer moves to NOLINK or RUNNING
00db8189
AF
288 *
289 * NOLINK: PHY is up, but not currently plugged in.
8deeb630 290 * - irq or timer will set RUNNING if link comes back
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291 * - phy_stop moves to HALTED
292 *
293 * FORCING: PHY is being configured with forced settings
294 * - if link is up, move to RUNNING
295 * - If link is down, we drop to the next highest setting, and
296 * retry (FORCING) after a timeout
297 * - phy_stop moves to HALTED
298 *
299 * RUNNING: PHY is currently up, running, and possibly sending
300 * and/or receiving packets
8deeb630 301 * - irq or timer will set NOLINK if link goes down
00db8189
AF
302 * - phy_stop moves to HALTED
303 *
304 * CHANGELINK: PHY experienced a change in link state
305 * - timer moves to RUNNING if link
306 * - timer moves to NOLINK if the link is down
307 * - phy_stop moves to HALTED
308 *
309 * HALTED: PHY is up, but no polling or interrupts are done. Or
310 * PHY is in an error state.
311 *
312 * - phy_start moves to RESUMING
313 *
314 * RESUMING: PHY was halted, but now wants to run again.
315 * - If we are forcing, or aneg is done, timer moves to RUNNING
316 * - If aneg is not done, timer moves to AN
317 * - phy_stop moves to HALTED
318 */
319enum phy_state {
4017b4d3 320 PHY_DOWN = 0,
00db8189 321 PHY_READY,
00db8189 322 PHY_UP,
00db8189
AF
323 PHY_RUNNING,
324 PHY_NOLINK,
325 PHY_FORCING,
326 PHY_CHANGELINK,
327 PHY_HALTED,
328 PHY_RESUMING
329};
330
ac28b9f8
DD
331/**
332 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
333 * @devices_in_package: Bit vector of devices present.
334 * @device_ids: The device identifer for each present device.
335 */
336struct phy_c45_device_ids {
337 u32 devices_in_package;
338 u32 device_ids[8];
339};
c1f19b51 340
00db8189
AF
341/* phy_device: An instance of a PHY
342 *
343 * drv: Pointer to the driver for this PHY instance
00db8189 344 * phy_id: UID for this device found during discovery
ac28b9f8
DD
345 * c45_ids: 802.3-c45 Device Identifers if is_c45.
346 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 347 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 348 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 349 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 350 * suspended: Set to true if this phy has been suspended successfully.
a3995460 351 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 352 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
353 * state: state of the PHY for management purposes
354 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
355 * link_timeout: The number of timer firings to wait before the
356 * giving up on the current attempt at acquiring a link
357 * irq: IRQ number of the PHY's interrupt (-1 if none)
358 * phy_timer: The timer for handling the state machine
00db8189
AF
359 * attached_dev: The attached enet driver's device instance ptr
360 * adjust_link: Callback for the enet controller to respond to
361 * changes in the link state.
00db8189 362 *
114002bc
FF
363 * speed, duplex, pause, supported, advertising, lp_advertising,
364 * and autoneg are used like in mii_if_info
00db8189
AF
365 *
366 * interrupts currently only supports enabled or disabled,
367 * but could be changed in the future to support enabling
368 * and disabling specific interrupts
369 *
370 * Contains some infrastructure for polling and interrupt
371 * handling, as well as handling shifts in PHY hardware state
372 */
373struct phy_device {
e5a03bfd
AL
374 struct mdio_device mdio;
375
00db8189
AF
376 /* Information about the PHY type */
377 /* And management functions */
378 struct phy_driver *drv;
379
00db8189
AF
380 u32 phy_id;
381
ac28b9f8 382 struct phy_c45_device_ids c45_ids;
87e5808d
HK
383 unsigned is_c45:1;
384 unsigned is_internal:1;
385 unsigned is_pseudo_fixed_link:1;
386 unsigned has_fixups:1;
387 unsigned suspended:1;
388 unsigned sysfs_links:1;
389 unsigned loopback_enabled:1;
390
391 unsigned autoneg:1;
392 /* The most recently read link state */
393 unsigned link:1;
ac28b9f8 394
695bce8f
HK
395 /* Interrupts are enabled */
396 unsigned interrupts:1;
397
00db8189
AF
398 enum phy_state state;
399
400 u32 dev_flags;
401
e8a2b6a4
AF
402 phy_interface_t interface;
403
c5e38a94
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404 /*
405 * forced speed & duplex (no autoneg)
00db8189
AF
406 * partner speed & duplex & pause (autoneg)
407 */
408 int speed;
409 int duplex;
410 int pause;
411 int asym_pause;
412
3c1bcc86
AL
413 /* Union of PHY and Attached devices' supported link modes */
414 /* See ethtool.h for more info */
415 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
416 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
417
114002bc 418 u32 lp_advertising;
00db8189 419
d853d145 420 /* Energy efficient ethernet modes which should be prohibited */
421 u32 eee_broken_modes;
422
00db8189
AF
423 int link_timeout;
424
2e0bc452
ZB
425#ifdef CONFIG_LED_TRIGGER_PHY
426 struct phy_led_trigger *phy_led_triggers;
427 unsigned int phy_num_led_triggers;
428 struct phy_led_trigger *last_triggered;
3928ee64
MS
429
430 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
431#endif
432
c5e38a94
AF
433 /*
434 * Interrupt number for this PHY
435 * -1 means no interrupt
436 */
00db8189
AF
437 int irq;
438
439 /* private data pointer */
440 /* For use by PHYs to maintain extra state */
441 void *priv;
442
443 /* Interrupt and Polling infrastructure */
a390d1f3 444 struct delayed_work state_queue;
00db8189 445
35b5f6b1 446 struct mutex lock;
00db8189 447
9525ae83 448 struct phylink *phylink;
00db8189
AF
449 struct net_device *attached_dev;
450
634ec36c 451 u8 mdix;
f4ed2fe3 452 u8 mdix_ctrl;
634ec36c 453
a81497be 454 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 455 void (*adjust_link)(struct net_device *dev);
00db8189 456};
e5a03bfd
AL
457#define to_phy_device(d) container_of(to_mdio_device(d), \
458 struct phy_device, mdio)
00db8189
AF
459
460/* struct phy_driver: Driver structure for a particular PHY type
461 *
a9049e0c 462 * driver_data: static driver data
00db8189
AF
463 * phy_id: The result of reading the UID registers of this PHY
464 * type, and ANDing them with the phy_id_mask. This driver
465 * only works for PHYs with IDs which match this field
466 * name: The friendly name of this PHY type
467 * phy_id_mask: Defines the important bits of the phy_id
468 * features: A list of features (speed, duplex, etc) supported
469 * by this PHY
470 * flags: A bitfield defining certain other features this PHY
471 * supports (like interrupts)
472 *
00fde795
HK
473 * All functions are optional. If config_aneg or read_status
474 * are not implemented, the phy core uses the genphy versions.
475 * Note that none of these functions should be called from
476 * interrupt time. The goal is for the bus read/write functions
477 * to be able to block when the bus transaction is happening,
478 * and be freed up by an interrupt (The MPC85xx has this ability,
479 * though it is not currently supported in the driver).
00db8189
AF
480 */
481struct phy_driver {
a9049e0c 482 struct mdio_driver_common mdiodrv;
00db8189
AF
483 u32 phy_id;
484 char *name;
511e3036 485 u32 phy_id_mask;
719655a1 486 const unsigned long * const features;
00db8189 487 u32 flags;
860f6e9e 488 const void *driver_data;
00db8189 489
c5e38a94 490 /*
9df81dd7
FF
491 * Called to issue a PHY software reset
492 */
493 int (*soft_reset)(struct phy_device *phydev);
494
495 /*
c5e38a94
AF
496 * Called to initialize the PHY,
497 * including after a reset
498 */
00db8189
AF
499 int (*config_init)(struct phy_device *phydev);
500
c5e38a94
AF
501 /*
502 * Called during discovery. Used to set
503 * up device-specific structures, if any
504 */
00db8189
AF
505 int (*probe)(struct phy_device *phydev);
506
507 /* PHY Power Management */
508 int (*suspend)(struct phy_device *phydev);
509 int (*resume)(struct phy_device *phydev);
510
c5e38a94
AF
511 /*
512 * Configures the advertisement and resets
00db8189
AF
513 * autonegotiation if phydev->autoneg is on,
514 * forces the speed to the current settings in phydev
c5e38a94
AF
515 * if phydev->autoneg is off
516 */
00db8189
AF
517 int (*config_aneg)(struct phy_device *phydev);
518
76a423a3
FF
519 /* Determines the auto negotiation result */
520 int (*aneg_done)(struct phy_device *phydev);
521
00db8189
AF
522 /* Determines the negotiated speed and duplex */
523 int (*read_status)(struct phy_device *phydev);
524
525 /* Clears any pending interrupts */
526 int (*ack_interrupt)(struct phy_device *phydev);
527
528 /* Enables or disables interrupts */
529 int (*config_intr)(struct phy_device *phydev);
530
a8729eb3
AG
531 /*
532 * Checks if the PHY generated an interrupt.
533 * For multi-PHY devices with shared PHY interrupt pin
534 */
535 int (*did_interrupt)(struct phy_device *phydev);
536
00db8189
AF
537 /* Clears up any memory if needed */
538 void (*remove)(struct phy_device *phydev);
539
a30e2c18
DD
540 /* Returns true if this is a suitable driver for the given
541 * phydev. If NULL, matching is based on phy_id and
542 * phy_id_mask.
543 */
544 int (*match_phy_device)(struct phy_device *phydev);
545
c8f3a8c3
RC
546 /* Handles ethtool queries for hardware time stamping. */
547 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
548
c1f19b51
RC
549 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
550 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
551
552 /*
553 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
554 * the phy driver promises to deliver it using netif_rx() as
555 * soon as a timestamp becomes available. One of the
556 * PTP_CLASS_ values is passed in 'type'. The function must
557 * return true if the skb is accepted for delivery.
558 */
559 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
560
561 /*
562 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 563 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
564 * timestamp becomes available. One of the PTP_CLASS_ values
565 * is passed in 'type'.
566 */
567 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
568
42e836eb
MS
569 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
570 * enable Wake on LAN, so set_wol is provided to be called in the
571 * ethernet driver's set_wol function. */
572 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
573
574 /* See set_wol, but for checking whether Wake on LAN is enabled. */
575 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
576
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DM
577 /*
578 * Called to inform a PHY device driver when the core is about to
579 * change the link state. This callback is supposed to be used as
580 * fixup hook for drivers that need to take action when the link
581 * state changes. Drivers are by no means allowed to mess with the
582 * PHY device structure in their implementations.
583 */
584 void (*link_change_notify)(struct phy_device *dev);
585
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RK
586 /*
587 * Phy specific driver override for reading a MMD register.
588 * This function is optional for PHY specific drivers. When
589 * not provided, the default MMD read function will be used
590 * by phy_read_mmd(), which will use either a direct read for
591 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
592 * devnum is the MMD device number within the PHY device,
593 * regnum is the register within the selected MMD device.
594 */
595 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
596
597 /*
598 * Phy specific driver override for writing a MMD register.
599 * This function is optional for PHY specific drivers. When
600 * not provided, the default MMD write function will be used
601 * by phy_write_mmd(), which will use either a direct write for
602 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
603 * devnum is the MMD device number within the PHY device,
604 * regnum is the register within the selected MMD device.
605 * val is the value to be written.
606 */
607 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
608 u16 val);
609
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610 int (*read_page)(struct phy_device *dev);
611 int (*write_page)(struct phy_device *dev, int page);
612
2f438366
ES
613 /* Get the size and type of the eeprom contained within a plug-in
614 * module */
615 int (*module_info)(struct phy_device *dev,
616 struct ethtool_modinfo *modinfo);
617
618 /* Get the eeprom information from the plug-in module */
619 int (*module_eeprom)(struct phy_device *dev,
620 struct ethtool_eeprom *ee, u8 *data);
621
f3a40945
AL
622 /* Get statistics from the phy using ethtool */
623 int (*get_sset_count)(struct phy_device *dev);
624 void (*get_strings)(struct phy_device *dev, u8 *data);
625 void (*get_stats)(struct phy_device *dev,
626 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
627
628 /* Get and Set PHY tunables */
629 int (*get_tunable)(struct phy_device *dev,
630 struct ethtool_tunable *tuna, void *data);
631 int (*set_tunable)(struct phy_device *dev,
632 struct ethtool_tunable *tuna,
633 const void *data);
f0f9b4ed 634 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 635};
a9049e0c
AL
636#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
637 struct phy_driver, mdiodrv)
00db8189 638
f62220d3
AF
639#define PHY_ANY_ID "MATCH ANY PHY"
640#define PHY_ANY_UID 0xffffffff
641
aa2af2eb
HK
642#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
643#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
644#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
645
f62220d3
AF
646/* A Structure for boards to register fixups with the PHY Lib */
647struct phy_fixup {
648 struct list_head list;
4567d686 649 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
650 u32 phy_uid;
651 u32 phy_uid_mask;
652 int (*run)(struct phy_device *phydev);
653};
654
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RK
655const char *phy_speed_to_str(int speed);
656const char *phy_duplex_to_str(unsigned int duplex);
657
0ccb4fc6
RK
658/* A structure for mapping a particular speed and duplex
659 * combination to a particular SUPPORTED and ADVERTISED value
660 */
661struct phy_setting {
662 u32 speed;
663 u8 duplex;
664 u8 bit;
665};
666
667const struct phy_setting *
668phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
3c1bcc86 669 bool exact);
0ccb4fc6 670size_t phy_speeds(unsigned int *speeds, size_t size,
3c1bcc86 671 unsigned long *mask);
0ccb4fc6 672
8c5e850c
RK
673void phy_resolve_aneg_linkmode(struct phy_device *phydev);
674
efabdfb9
AF
675/**
676 * phy_read_mmd - Convenience function for reading a register
677 * from an MMD on a given PHY.
678 * @phydev: The phy_device struct
679 * @devad: The MMD to read from
680 * @regnum: The register on the MMD to read
681 *
682 * Same rules as for phy_read();
683 */
9860118b 684int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 685
2e888103
LB
686/**
687 * phy_read - Convenience function for reading a given PHY register
688 * @phydev: the phy_device struct
689 * @regnum: register number to read
690 *
691 * NOTE: MUST NOT be called from interrupt context,
692 * because the bus read/write functions may wait for an interrupt
693 * to conclude the operation.
694 */
abf35df2 695static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 696{
e5a03bfd 697 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
698}
699
788f9933
RK
700/**
701 * __phy_read - convenience function for reading a given PHY register
702 * @phydev: the phy_device struct
703 * @regnum: register number to read
704 *
705 * The caller must have taken the MDIO bus lock.
706 */
707static inline int __phy_read(struct phy_device *phydev, u32 regnum)
708{
709 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
710}
711
2e888103
LB
712/**
713 * phy_write - Convenience function for writing a given PHY register
714 * @phydev: the phy_device struct
715 * @regnum: register number to write
716 * @val: value to write to @regnum
717 *
718 * NOTE: MUST NOT be called from interrupt context,
719 * because the bus read/write functions may wait for an interrupt
720 * to conclude the operation.
721 */
abf35df2 722static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 723{
e5a03bfd 724 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
725}
726
788f9933
RK
727/**
728 * __phy_write - Convenience function for writing a given PHY register
729 * @phydev: the phy_device struct
730 * @regnum: register number to write
731 * @val: value to write to @regnum
732 *
733 * The caller must have taken the MDIO bus lock.
734 */
735static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
736{
737 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
738 val);
739}
740
741int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 742int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 743
ac8322d8
HK
744/**
745 * __phy_set_bits - Convenience function for setting bits in a PHY register
746 * @phydev: the phy_device struct
747 * @regnum: register number to write
748 * @val: bits to set
749 *
750 * The caller must have taken the MDIO bus lock.
751 */
752static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
753{
754 return __phy_modify(phydev, regnum, 0, val);
755}
756
757/**
758 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
759 * @phydev: the phy_device struct
760 * @regnum: register number to write
761 * @val: bits to clear
762 *
763 * The caller must have taken the MDIO bus lock.
764 */
765static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
766 u16 val)
767{
768 return __phy_modify(phydev, regnum, val, 0);
769}
770
771/**
772 * phy_set_bits - Convenience function for setting bits in a PHY register
773 * @phydev: the phy_device struct
774 * @regnum: register number to write
775 * @val: bits to set
776 */
777static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
778{
779 return phy_modify(phydev, regnum, 0, val);
780}
781
782/**
783 * phy_clear_bits - Convenience function for clearing bits in a PHY register
784 * @phydev: the phy_device struct
785 * @regnum: register number to write
786 * @val: bits to clear
787 */
788static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
789{
790 return phy_modify(phydev, regnum, val, 0);
791}
792
2c7b4921
FF
793/**
794 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
795 * @phydev: the phy_device struct
796 *
797 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
798 * PHY_IGNORE_INTERRUPT
799 */
800static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
801{
802 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
803}
804
3c507b8a
HK
805/**
806 * phy_polling_mode - Convenience function for testing whether polling is
807 * used to detect PHY status changes
808 * @phydev: the phy_device struct
809 */
810static inline bool phy_polling_mode(struct phy_device *phydev)
811{
812 return phydev->irq == PHY_POLL;
813}
814
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FF
815/**
816 * phy_is_internal - Convenience function for testing if a PHY is internal
817 * @phydev: the phy_device struct
818 */
819static inline bool phy_is_internal(struct phy_device *phydev)
820{
821 return phydev->is_internal;
822}
823
32d0f783
IS
824/**
825 * phy_interface_mode_is_rgmii - Convenience function for testing if a
826 * PHY interface mode is RGMII (all variants)
827 * @mode: the phy_interface_t enum
828 */
829static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
830{
831 return mode >= PHY_INTERFACE_MODE_RGMII &&
832 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
833};
834
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RK
835/**
836 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
837 * negotiation
838 * @mode: one of &enum phy_interface_t
839 *
840 * Returns true if the phy interface mode uses the 16-bit negotiation
841 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
842 */
843static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
844{
845 return mode == PHY_INTERFACE_MODE_1000BASEX ||
846 mode == PHY_INTERFACE_MODE_2500BASEX;
847}
848
e463d88c
FF
849/**
850 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
851 * is RGMII (all variants)
852 * @phydev: the phy_device struct
853 */
854static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
855{
32d0f783 856 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
857};
858
859/*
860 * phy_is_pseudo_fixed_link - Convenience function for testing if this
861 * PHY is the CPU port facing side of an Ethernet switch, or similar.
862 * @phydev: the phy_device struct
863 */
864static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
865{
866 return phydev->is_pseudo_fixed_link;
e463d88c
FF
867}
868
efabdfb9
AF
869/**
870 * phy_write_mmd - Convenience function for writing a register
871 * on an MMD on a given PHY.
872 * @phydev: The phy_device struct
873 * @devad: The MMD to read from
874 * @regnum: The register on the MMD to read
875 * @val: value to write to @regnum
876 *
877 * Same rules as for phy_write();
878 */
9860118b 879int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 880
78ffc4ac
RK
881int phy_save_page(struct phy_device *phydev);
882int phy_select_page(struct phy_device *phydev, int page);
883int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
884int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
885int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
886int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
887 u16 mask, u16 set);
888
ac28b9f8 889struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
890 bool is_c45,
891 struct phy_c45_device_ids *c45_ids);
90eff909 892#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 893struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 894int phy_device_register(struct phy_device *phy);
90eff909
FF
895void phy_device_free(struct phy_device *phydev);
896#else
897static inline
898struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
899{
900 return NULL;
901}
902
903static inline int phy_device_register(struct phy_device *phy)
904{
905 return 0;
906}
907
908static inline void phy_device_free(struct phy_device *phydev) { }
909#endif /* CONFIG_PHYLIB */
38737e49 910void phy_device_remove(struct phy_device *phydev);
2f5cb434 911int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
912int phy_suspend(struct phy_device *phydev);
913int phy_resume(struct phy_device *phydev);
9c2c2e62 914int __phy_resume(struct phy_device *phydev);
f0f9b4ed 915int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
916struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
917 phy_interface_t interface);
f8f76db1 918struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
919int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
920 u32 flags, phy_interface_t interface);
fa94f6d9 921int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
922 void (*handler)(struct net_device *),
923 phy_interface_t interface);
924struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
925 void (*handler)(struct net_device *),
926 phy_interface_t interface);
e1393456
AF
927void phy_disconnect(struct phy_device *phydev);
928void phy_detach(struct phy_device *phydev);
929void phy_start(struct phy_device *phydev);
930void phy_stop(struct phy_device *phydev);
931int phy_start_aneg(struct phy_device *phydev);
372788f9 932int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
933int phy_speed_down(struct phy_device *phydev, bool sync);
934int phy_speed_up(struct phy_device *phydev);
e1393456 935
e1393456 936int phy_stop_interrupts(struct phy_device *phydev);
002ba705 937int phy_restart_aneg(struct phy_device *phydev);
a9668491 938int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 939
bafbdd52
SS
940static inline void phy_device_reset(struct phy_device *phydev, int value)
941{
942 mdio_device_reset(&phydev->mdio, value);
943}
944
72ba48be 945#define phydev_err(_phydev, format, args...) \
e5a03bfd 946 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 947
c4fabb8b
AL
948#define phydev_info(_phydev, format, args...) \
949 dev_info(&_phydev->mdio.dev, format, ##args)
950
ab2a605f
AL
951#define phydev_warn(_phydev, format, args...) \
952 dev_warn(&_phydev->mdio.dev, format, ##args)
953
72ba48be 954#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 955 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 956
84eff6d1
AL
957static inline const char *phydev_name(const struct phy_device *phydev)
958{
e5a03bfd 959 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
960}
961
2220943a
AL
962void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
963 __printf(2, 3);
964void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
965
966/* Clause 22 PHY */
af6b6967 967int genphy_config_init(struct phy_device *phydev);
3fb69bca 968int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
969int genphy_restart_aneg(struct phy_device *phydev);
970int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 971int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
972int genphy_update_link(struct phy_device *phydev);
973int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
974int genphy_suspend(struct phy_device *phydev);
975int genphy_resume(struct phy_device *phydev);
f0f9b4ed 976int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 977int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
978static inline int genphy_no_soft_reset(struct phy_device *phydev)
979{
980 return 0;
981}
5df7af85
KH
982int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
983 u16 regnum);
984int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
985 u16 regnum, u16 val);
5acde34a
RK
986
987/* Clause 45 PHY */
988int genphy_c45_restart_aneg(struct phy_device *phydev);
989int genphy_c45_aneg_done(struct phy_device *phydev);
990int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
991int genphy_c45_read_lpa(struct phy_device *phydev);
992int genphy_c45_read_pma(struct phy_device *phydev);
993int genphy_c45_pma_setup_forced(struct phy_device *phydev);
994int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 995int genphy_c45_read_mdix(struct phy_device *phydev);
5acde34a 996
e8a714e0
FF
997/* The gen10g_* functions are the old Clause 45 stub */
998int gen10g_config_aneg(struct phy_device *phydev);
999int gen10g_read_status(struct phy_device *phydev);
1000int gen10g_no_soft_reset(struct phy_device *phydev);
1001int gen10g_config_init(struct phy_device *phydev);
1002int gen10g_suspend(struct phy_device *phydev);
1003int gen10g_resume(struct phy_device *phydev);
1004
00fde795
HK
1005static inline int phy_read_status(struct phy_device *phydev)
1006{
1007 if (!phydev->drv)
1008 return -EIO;
1009
1010 if (phydev->drv->read_status)
1011 return phydev->drv->read_status(phydev);
1012 else
1013 return genphy_read_status(phydev);
1014}
1015
00db8189 1016void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1017void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1018int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1019int phy_drivers_register(struct phy_driver *new_driver, int n,
1020 struct module *owner);
4f9c85a1 1021void phy_state_machine(struct work_struct *work);
28b2e0d2 1022void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1023void phy_start_machine(struct phy_device *phydev);
00db8189
AF
1024void phy_stop_machine(struct phy_device *phydev);
1025int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 1026void phy_ethtool_ksettings_get(struct phy_device *phydev,
1027 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1028int phy_ethtool_ksettings_set(struct phy_device *phydev,
1029 const struct ethtool_link_ksettings *cmd);
4017b4d3 1030int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
1031int phy_start_interrupts(struct phy_device *phydev);
1032void phy_print_status(struct phy_device *phydev);
f3a6bd39 1033int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1034void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
c306ad36 1035void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1036void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1037void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1038 bool autoneg);
70814e81 1039void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1040bool phy_validate_pause(struct phy_device *phydev,
1041 struct ethtool_pauseparam *pp);
00db8189 1042
f62220d3 1043int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1044 int (*run)(struct phy_device *));
f62220d3 1045int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1046 int (*run)(struct phy_device *));
f62220d3 1047int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1048 int (*run)(struct phy_device *));
f62220d3 1049
f38e7a32
WH
1050int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1051int phy_unregister_fixup_for_id(const char *bus_id);
1052int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1053
a59a4d19
GC
1054int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1055int phy_get_eee_err(struct phy_device *phydev);
1056int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1057int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1058int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1059void phy_ethtool_get_wol(struct phy_device *phydev,
1060 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1061int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1062 struct ethtool_link_ksettings *cmd);
1063int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1064 const struct ethtool_link_ksettings *cmd);
e86a8987 1065int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1066
90eff909 1067#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1068int __init mdio_bus_init(void);
1069void mdio_bus_exit(void);
9e8d438e
FF
1070#endif
1071
1072/* Inline function for use within net/core/ethtool.c (built-in) */
1073static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1074{
9e8d438e
FF
1075 if (!phydev->drv)
1076 return -EIO;
1077
1078 mutex_lock(&phydev->lock);
1079 phydev->drv->get_strings(phydev, data);
1080 mutex_unlock(&phydev->lock);
1081
1082 return 0;
c59530d0
FF
1083}
1084
9e8d438e 1085static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1086{
9e8d438e
FF
1087 int ret;
1088
1089 if (!phydev->drv)
1090 return -EIO;
1091
1092 if (phydev->drv->get_sset_count &&
1093 phydev->drv->get_strings &&
1094 phydev->drv->get_stats) {
1095 mutex_lock(&phydev->lock);
1096 ret = phydev->drv->get_sset_count(phydev);
1097 mutex_unlock(&phydev->lock);
1098
1099 return ret;
1100 }
1101
c59530d0
FF
1102 return -EOPNOTSUPP;
1103}
1104
9e8d438e
FF
1105static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1106 struct ethtool_stats *stats, u64 *data)
c59530d0 1107{
9e8d438e
FF
1108 if (!phydev->drv)
1109 return -EIO;
1110
1111 mutex_lock(&phydev->lock);
1112 phydev->drv->get_stats(phydev, stats, data);
1113 mutex_unlock(&phydev->lock);
1114
1115 return 0;
c59530d0 1116}
9b9a8bfc 1117
00db8189 1118extern struct bus_type mdio_bus_type;
c31accd1 1119
648ea013
FF
1120struct mdio_board_info {
1121 const char *bus_id;
1122 char modalias[MDIO_NAME_SIZE];
1123 int mdio_addr;
1124 const void *platform_data;
1125};
1126
90eff909 1127#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1128int mdiobus_register_board_info(const struct mdio_board_info *info,
1129 unsigned int n);
1130#else
1131static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1132 unsigned int n)
1133{
1134 return 0;
1135}
1136#endif
1137
1138
c31accd1
JH
1139/**
1140 * module_phy_driver() - Helper macro for registering PHY drivers
1141 * @__phy_drivers: array of PHY drivers to register
1142 *
1143 * Helper macro for PHY drivers which do not do anything special in module
1144 * init/exit. Each module may only use this macro once, and calling it
1145 * replaces module_init() and module_exit().
1146 */
1147#define phy_module_driver(__phy_drivers, __count) \
1148static int __init phy_module_init(void) \
1149{ \
be01da72 1150 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1151} \
1152module_init(phy_module_init); \
1153static void __exit phy_module_exit(void) \
1154{ \
1155 phy_drivers_unregister(__phy_drivers, __count); \
1156} \
1157module_exit(phy_module_exit)
1158
1159#define module_phy_driver(__phy_drivers) \
1160 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1161
00db8189 1162#endif /* __PHY_H */