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00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
bac83c65 22#include <linux/mdio.h>
13df29f6 23#include <linux/mii.h>
3e3aaf64 24#include <linux/module.h>
13df29f6
MR
25#include <linux/timer.h>
26#include <linux/workqueue.h>
8626d3b4 27#include <linux/mod_devicetable.h>
00db8189 28
60063497 29#include <linux/atomic.h>
0ac49527 30
e9fbdf17 31#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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AF
32 SUPPORTED_TP | \
33 SUPPORTED_MII)
34
e9fbdf17
FF
35#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
36 SUPPORTED_10baseT_Full)
37
38#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
39 SUPPORTED_100baseT_Full)
40
41#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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42 SUPPORTED_1000baseT_Full)
43
e9fbdf17
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44#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
45 PHY_100BT_FEATURES | \
46 PHY_DEFAULT_FEATURES)
47
48#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
49 PHY_1000BT_FEATURES)
50
51
c5e38a94
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52/*
53 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
AF
54 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
55 * the attached driver handles the interrupt
56 */
57#define PHY_POLL -1
58#define PHY_IGNORE_INTERRUPT -2
59
60#define PHY_HAS_INTERRUPT 0x00000001
1b86f702 61#define PHY_IS_INTERNAL 0x00000002
a9049e0c 62#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 63
e8a2b6a4
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64/* Interface Mode definitions */
65typedef enum {
4157ef1b 66 PHY_INTERFACE_MODE_NA,
735d8a18 67 PHY_INTERFACE_MODE_INTERNAL,
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68 PHY_INTERFACE_MODE_MII,
69 PHY_INTERFACE_MODE_GMII,
70 PHY_INTERFACE_MODE_SGMII,
71 PHY_INTERFACE_MODE_TBI,
2cc70ba4 72 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
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73 PHY_INTERFACE_MODE_RMII,
74 PHY_INTERFACE_MODE_RGMII,
a999589c 75 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
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76 PHY_INTERFACE_MODE_RGMII_RXID,
77 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
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78 PHY_INTERFACE_MODE_RTBI,
79 PHY_INTERFACE_MODE_SMII,
898dd0bd 80 PHY_INTERFACE_MODE_XGMII,
fd70f72c 81 PHY_INTERFACE_MODE_MOCA,
b9d12085 82 PHY_INTERFACE_MODE_QSGMII,
572de608 83 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
84 PHY_INTERFACE_MODE_1000BASEX,
85 PHY_INTERFACE_MODE_2500BASEX,
86 PHY_INTERFACE_MODE_RXAUI,
c125ca09
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87 PHY_INTERFACE_MODE_XAUI,
88 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
89 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 90 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
91} phy_interface_t;
92
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93/**
94 * phy_supported_speeds - return all speeds currently supported by a phy device
95 * @phy: The phy device to return supported speeds of.
96 * @speeds: buffer to store supported speeds in.
97 * @size: size of speeds buffer.
98 *
99 * Description: Returns the number of supported speeds, and
100 * fills the speeds * buffer with the supported speeds. If speeds buffer is
101 * too small to contain * all currently supported speeds, will return as
102 * many speeds as can fit.
103 */
104unsigned int phy_supported_speeds(struct phy_device *phy,
105 unsigned int *speeds,
106 unsigned int size);
107
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108/**
109 * It maps 'enum phy_interface_t' found in include/linux/phy.h
110 * into the device tree binding of 'phy-mode', so that Ethernet
111 * device driver can get phy interface from device tree.
112 */
113static inline const char *phy_modes(phy_interface_t interface)
114{
115 switch (interface) {
116 case PHY_INTERFACE_MODE_NA:
117 return "";
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118 case PHY_INTERFACE_MODE_INTERNAL:
119 return "internal";
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120 case PHY_INTERFACE_MODE_MII:
121 return "mii";
122 case PHY_INTERFACE_MODE_GMII:
123 return "gmii";
124 case PHY_INTERFACE_MODE_SGMII:
125 return "sgmii";
126 case PHY_INTERFACE_MODE_TBI:
127 return "tbi";
128 case PHY_INTERFACE_MODE_REVMII:
129 return "rev-mii";
130 case PHY_INTERFACE_MODE_RMII:
131 return "rmii";
132 case PHY_INTERFACE_MODE_RGMII:
133 return "rgmii";
134 case PHY_INTERFACE_MODE_RGMII_ID:
135 return "rgmii-id";
136 case PHY_INTERFACE_MODE_RGMII_RXID:
137 return "rgmii-rxid";
138 case PHY_INTERFACE_MODE_RGMII_TXID:
139 return "rgmii-txid";
140 case PHY_INTERFACE_MODE_RTBI:
141 return "rtbi";
142 case PHY_INTERFACE_MODE_SMII:
143 return "smii";
144 case PHY_INTERFACE_MODE_XGMII:
145 return "xgmii";
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146 case PHY_INTERFACE_MODE_MOCA:
147 return "moca";
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148 case PHY_INTERFACE_MODE_QSGMII:
149 return "qsgmii";
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150 case PHY_INTERFACE_MODE_TRGMII:
151 return "trgmii";
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AL
152 case PHY_INTERFACE_MODE_1000BASEX:
153 return "1000base-x";
154 case PHY_INTERFACE_MODE_2500BASEX:
155 return "2500base-x";
156 case PHY_INTERFACE_MODE_RXAUI:
157 return "rxaui";
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158 case PHY_INTERFACE_MODE_XAUI:
159 return "xaui";
160 case PHY_INTERFACE_MODE_10GKR:
161 return "10gbase-kr";
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162 default:
163 return "unknown";
164 }
165}
166
00db8189 167
e8a2b6a4 168#define PHY_INIT_TIMEOUT 100000
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169#define PHY_STATE_TIME 1
170#define PHY_FORCE_TIMEOUT 10
171#define PHY_AN_TIMEOUT 10
172
e8a2b6a4 173#define PHY_MAX_ADDR 32
00db8189 174
a4d00f17 175/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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176#define PHY_ID_FMT "%s:%02x"
177
4567d686 178#define MII_BUS_ID_SIZE 61
a4d00f17 179
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180/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
181 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
182#define MII_ADDR_C45 (1<<30)
183
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184struct device;
185struct sk_buff;
186
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187/*
188 * The Bus class for PHYs. Devices which provide access to
189 * PHYs should register using this structure
190 */
00db8189 191struct mii_bus {
3e3aaf64 192 struct module *owner;
00db8189 193 const char *name;
9d9326d3 194 char id[MII_BUS_ID_SIZE];
00db8189 195 void *priv;
ccaa953e
AL
196 int (*read)(struct mii_bus *bus, int addr, int regnum);
197 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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198 int (*reset)(struct mii_bus *bus);
199
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200 /*
201 * A lock to ensure that only one thing can read/write
202 * the MDIO bus at a time
203 */
35b5f6b1 204 struct mutex mdio_lock;
00db8189 205
18ee49dd 206 struct device *parent;
46abc021
LB
207 enum {
208 MDIOBUS_ALLOCATED = 1,
209 MDIOBUS_REGISTERED,
210 MDIOBUS_UNREGISTERED,
211 MDIOBUS_RELEASED,
212 } state;
213 struct device dev;
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214
215 /* list of all PHYs on bus */
7f854420 216 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 217
c6883996 218 /* PHY addresses to be ignored when probing */
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219 u32 phy_mask;
220
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221 /* PHY addresses to ignore the TA/read failure */
222 u32 phy_ignore_ta_mask;
223
c5e38a94 224 /*
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225 * An array of interrupts, each PHY's interrupt at the index
226 * matching its address
c5e38a94 227 */
e7f4dc35 228 int irq[PHY_MAX_ADDR];
69226896
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229
230 /* GPIO reset pulse width in microseconds */
231 int reset_delay_us;
d396e84c
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232 /* RESET GPIO descriptor pointer */
233 struct gpio_desc *reset_gpiod;
00db8189 234};
46abc021 235#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 236
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TT
237struct mii_bus *mdiobus_alloc_size(size_t);
238static inline struct mii_bus *mdiobus_alloc(void)
239{
240 return mdiobus_alloc_size(0);
241}
242
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243int __mdiobus_register(struct mii_bus *bus, struct module *owner);
244#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
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245void mdiobus_unregister(struct mii_bus *bus);
246void mdiobus_free(struct mii_bus *bus);
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247struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
248static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
249{
250 return devm_mdiobus_alloc_size(dev, 0);
251}
252
253void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 254struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 255
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256#define PHY_INTERRUPT_DISABLED 0x0
257#define PHY_INTERRUPT_ENABLED 0x80000000
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258
259/* PHY state machine states:
260 *
261 * DOWN: PHY device and driver are not ready for anything. probe
262 * should be called if and only if the PHY is in this state,
263 * given that the PHY device exists.
264 * - PHY driver probe function will, depending on the PHY, set
265 * the state to STARTING or READY
266 *
267 * STARTING: PHY device is coming up, and the ethernet driver is
268 * not ready. PHY drivers may set this in the probe function.
269 * If they do, they are responsible for making sure the state is
270 * eventually set to indicate whether the PHY is UP or READY,
271 * depending on the state when the PHY is done starting up.
272 * - PHY driver will set the state to READY
273 * - start will set the state to PENDING
274 *
275 * READY: PHY is ready to send and receive packets, but the
276 * controller is not. By default, PHYs which do not implement
277 * probe will be set to this state by phy_probe(). If the PHY
278 * driver knows the PHY is ready, and the PHY state is STARTING,
279 * then it sets this STATE.
280 * - start will set the state to UP
281 *
282 * PENDING: PHY device is coming up, but the ethernet driver is
283 * ready. phy_start will set this state if the PHY state is
284 * STARTING.
285 * - PHY driver will set the state to UP when the PHY is ready
286 *
287 * UP: The PHY and attached device are ready to do work.
288 * Interrupts should be started here.
289 * - timer moves to AN
290 *
291 * AN: The PHY is currently negotiating the link state. Link is
292 * therefore down for now. phy_timer will set this state when it
293 * detects the state is UP. config_aneg will set this state
294 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
295 * - If autonegotiation finishes, but there's no link, it sets
296 * the state to NOLINK.
297 * - If aneg finishes with link, it sets the state to RUNNING,
298 * and calls adjust_link
299 * - If autonegotiation did not finish after an arbitrary amount
300 * of time, autonegotiation should be tried again if the PHY
301 * supports "magic" autonegotiation (back to AN)
302 * - If it didn't finish, and no magic_aneg, move to FORCING.
303 *
304 * NOLINK: PHY is up, but not currently plugged in.
305 * - If the timer notes that the link comes back, we move to RUNNING
306 * - config_aneg moves to AN
307 * - phy_stop moves to HALTED
308 *
309 * FORCING: PHY is being configured with forced settings
310 * - if link is up, move to RUNNING
311 * - If link is down, we drop to the next highest setting, and
312 * retry (FORCING) after a timeout
313 * - phy_stop moves to HALTED
314 *
315 * RUNNING: PHY is currently up, running, and possibly sending
316 * and/or receiving packets
317 * - timer will set CHANGELINK if we're polling (this ensures the
318 * link state is polled every other cycle of this state machine,
319 * which makes it every other second)
320 * - irq will set CHANGELINK
321 * - config_aneg will set AN
322 * - phy_stop moves to HALTED
323 *
324 * CHANGELINK: PHY experienced a change in link state
325 * - timer moves to RUNNING if link
326 * - timer moves to NOLINK if the link is down
327 * - phy_stop moves to HALTED
328 *
329 * HALTED: PHY is up, but no polling or interrupts are done. Or
330 * PHY is in an error state.
331 *
332 * - phy_start moves to RESUMING
333 *
334 * RESUMING: PHY was halted, but now wants to run again.
335 * - If we are forcing, or aneg is done, timer moves to RUNNING
336 * - If aneg is not done, timer moves to AN
337 * - phy_stop moves to HALTED
338 */
339enum phy_state {
4017b4d3 340 PHY_DOWN = 0,
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AF
341 PHY_STARTING,
342 PHY_READY,
343 PHY_PENDING,
344 PHY_UP,
345 PHY_AN,
346 PHY_RUNNING,
347 PHY_NOLINK,
348 PHY_FORCING,
349 PHY_CHANGELINK,
350 PHY_HALTED,
351 PHY_RESUMING
352};
353
ac28b9f8
DD
354/**
355 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
356 * @devices_in_package: Bit vector of devices present.
357 * @device_ids: The device identifer for each present device.
358 */
359struct phy_c45_device_ids {
360 u32 devices_in_package;
361 u32 device_ids[8];
362};
c1f19b51 363
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AF
364/* phy_device: An instance of a PHY
365 *
366 * drv: Pointer to the driver for this PHY instance
00db8189 367 * phy_id: UID for this device found during discovery
ac28b9f8
DD
368 * c45_ids: 802.3-c45 Device Identifers if is_c45.
369 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 370 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 371 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 372 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 373 * suspended: Set to true if this phy has been suspended successfully.
a3995460 374 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 375 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
376 * state: state of the PHY for management purposes
377 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
378 * link_timeout: The number of timer firings to wait before the
379 * giving up on the current attempt at acquiring a link
380 * irq: IRQ number of the PHY's interrupt (-1 if none)
381 * phy_timer: The timer for handling the state machine
664fcf12 382 * phy_queue: A work_queue for the phy_mac_interrupt
00db8189
AF
383 * attached_dev: The attached enet driver's device instance ptr
384 * adjust_link: Callback for the enet controller to respond to
385 * changes in the link state.
00db8189 386 *
114002bc
FF
387 * speed, duplex, pause, supported, advertising, lp_advertising,
388 * and autoneg are used like in mii_if_info
00db8189
AF
389 *
390 * interrupts currently only supports enabled or disabled,
391 * but could be changed in the future to support enabling
392 * and disabling specific interrupts
393 *
394 * Contains some infrastructure for polling and interrupt
395 * handling, as well as handling shifts in PHY hardware state
396 */
397struct phy_device {
e5a03bfd
AL
398 struct mdio_device mdio;
399
00db8189
AF
400 /* Information about the PHY type */
401 /* And management functions */
402 struct phy_driver *drv;
403
00db8189
AF
404 u32 phy_id;
405
ac28b9f8
DD
406 struct phy_c45_device_ids c45_ids;
407 bool is_c45;
4284b6a5 408 bool is_internal;
5a11dd7d 409 bool is_pseudo_fixed_link;
b0ae009f 410 bool has_fixups;
8a477a6f 411 bool suspended;
a3995460 412 bool sysfs_links;
f0f9b4ed 413 bool loopback_enabled;
ac28b9f8 414
00db8189
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415 enum phy_state state;
416
417 u32 dev_flags;
418
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419 phy_interface_t interface;
420
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421 /*
422 * forced speed & duplex (no autoneg)
00db8189
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423 * partner speed & duplex & pause (autoneg)
424 */
425 int speed;
426 int duplex;
427 int pause;
428 int asym_pause;
429
430 /* The most recently read link state */
431 int link;
432
433 /* Enabled Interrupts */
434 u32 interrupts;
435
436 /* Union of PHY and Attached devices' supported modes */
437 /* See mii.h for more info */
438 u32 supported;
439 u32 advertising;
114002bc 440 u32 lp_advertising;
00db8189 441
d853d145 442 /* Energy efficient ethernet modes which should be prohibited */
443 u32 eee_broken_modes;
444
00db8189
AF
445 int autoneg;
446
447 int link_timeout;
448
2e0bc452
ZB
449#ifdef CONFIG_LED_TRIGGER_PHY
450 struct phy_led_trigger *phy_led_triggers;
451 unsigned int phy_num_led_triggers;
452 struct phy_led_trigger *last_triggered;
453#endif
454
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AF
455 /*
456 * Interrupt number for this PHY
457 * -1 means no interrupt
458 */
00db8189
AF
459 int irq;
460
461 /* private data pointer */
462 /* For use by PHYs to maintain extra state */
463 void *priv;
464
465 /* Interrupt and Polling infrastructure */
466 struct work_struct phy_queue;
a390d1f3 467 struct delayed_work state_queue;
0ac49527 468 atomic_t irq_disable;
00db8189 469
35b5f6b1 470 struct mutex lock;
00db8189
AF
471
472 struct net_device *attached_dev;
473
634ec36c 474 u8 mdix;
f4ed2fe3 475 u8 mdix_ctrl;
634ec36c 476
00db8189 477 void (*adjust_link)(struct net_device *dev);
00db8189 478};
e5a03bfd
AL
479#define to_phy_device(d) container_of(to_mdio_device(d), \
480 struct phy_device, mdio)
00db8189
AF
481
482/* struct phy_driver: Driver structure for a particular PHY type
483 *
a9049e0c 484 * driver_data: static driver data
00db8189
AF
485 * phy_id: The result of reading the UID registers of this PHY
486 * type, and ANDing them with the phy_id_mask. This driver
487 * only works for PHYs with IDs which match this field
488 * name: The friendly name of this PHY type
489 * phy_id_mask: Defines the important bits of the phy_id
490 * features: A list of features (speed, duplex, etc) supported
491 * by this PHY
492 * flags: A bitfield defining certain other features this PHY
493 * supports (like interrupts)
494 *
495 * The drivers must implement config_aneg and read_status. All
496 * other functions are optional. Note that none of these
497 * functions should be called from interrupt time. The goal is
498 * for the bus read/write functions to be able to block when the
499 * bus transaction is happening, and be freed up by an interrupt
500 * (The MPC85xx has this ability, though it is not currently
501 * supported in the driver).
502 */
503struct phy_driver {
a9049e0c 504 struct mdio_driver_common mdiodrv;
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AF
505 u32 phy_id;
506 char *name;
507 unsigned int phy_id_mask;
508 u32 features;
509 u32 flags;
860f6e9e 510 const void *driver_data;
00db8189 511
c5e38a94 512 /*
9df81dd7
FF
513 * Called to issue a PHY software reset
514 */
515 int (*soft_reset)(struct phy_device *phydev);
516
517 /*
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518 * Called to initialize the PHY,
519 * including after a reset
520 */
00db8189
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521 int (*config_init)(struct phy_device *phydev);
522
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523 /*
524 * Called during discovery. Used to set
525 * up device-specific structures, if any
526 */
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527 int (*probe)(struct phy_device *phydev);
528
529 /* PHY Power Management */
530 int (*suspend)(struct phy_device *phydev);
531 int (*resume)(struct phy_device *phydev);
532
c5e38a94
AF
533 /*
534 * Configures the advertisement and resets
00db8189
AF
535 * autonegotiation if phydev->autoneg is on,
536 * forces the speed to the current settings in phydev
c5e38a94
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537 * if phydev->autoneg is off
538 */
00db8189
AF
539 int (*config_aneg)(struct phy_device *phydev);
540
76a423a3
FF
541 /* Determines the auto negotiation result */
542 int (*aneg_done)(struct phy_device *phydev);
543
00db8189
AF
544 /* Determines the negotiated speed and duplex */
545 int (*read_status)(struct phy_device *phydev);
546
547 /* Clears any pending interrupts */
548 int (*ack_interrupt)(struct phy_device *phydev);
549
550 /* Enables or disables interrupts */
551 int (*config_intr)(struct phy_device *phydev);
552
a8729eb3
AG
553 /*
554 * Checks if the PHY generated an interrupt.
555 * For multi-PHY devices with shared PHY interrupt pin
556 */
557 int (*did_interrupt)(struct phy_device *phydev);
558
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AF
559 /* Clears up any memory if needed */
560 void (*remove)(struct phy_device *phydev);
561
a30e2c18
DD
562 /* Returns true if this is a suitable driver for the given
563 * phydev. If NULL, matching is based on phy_id and
564 * phy_id_mask.
565 */
566 int (*match_phy_device)(struct phy_device *phydev);
567
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RC
568 /* Handles ethtool queries for hardware time stamping. */
569 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
570
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RC
571 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
572 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
573
574 /*
575 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
576 * the phy driver promises to deliver it using netif_rx() as
577 * soon as a timestamp becomes available. One of the
578 * PTP_CLASS_ values is passed in 'type'. The function must
579 * return true if the skb is accepted for delivery.
580 */
581 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
582
583 /*
584 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 585 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
586 * timestamp becomes available. One of the PTP_CLASS_ values
587 * is passed in 'type'.
588 */
589 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
590
42e836eb
MS
591 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
592 * enable Wake on LAN, so set_wol is provided to be called in the
593 * ethernet driver's set_wol function. */
594 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
595
596 /* See set_wol, but for checking whether Wake on LAN is enabled. */
597 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
598
2b8f2a28
DM
599 /*
600 * Called to inform a PHY device driver when the core is about to
601 * change the link state. This callback is supposed to be used as
602 * fixup hook for drivers that need to take action when the link
603 * state changes. Drivers are by no means allowed to mess with the
604 * PHY device structure in their implementations.
605 */
606 void (*link_change_notify)(struct phy_device *dev);
607
1ee6b9bc
RK
608 /*
609 * Phy specific driver override for reading a MMD register.
610 * This function is optional for PHY specific drivers. When
611 * not provided, the default MMD read function will be used
612 * by phy_read_mmd(), which will use either a direct read for
613 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
614 * devnum is the MMD device number within the PHY device,
615 * regnum is the register within the selected MMD device.
616 */
617 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
618
619 /*
620 * Phy specific driver override for writing a MMD register.
621 * This function is optional for PHY specific drivers. When
622 * not provided, the default MMD write function will be used
623 * by phy_write_mmd(), which will use either a direct write for
624 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
625 * devnum is the MMD device number within the PHY device,
626 * regnum is the register within the selected MMD device.
627 * val is the value to be written.
628 */
629 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
630 u16 val);
631
2f438366
ES
632 /* Get the size and type of the eeprom contained within a plug-in
633 * module */
634 int (*module_info)(struct phy_device *dev,
635 struct ethtool_modinfo *modinfo);
636
637 /* Get the eeprom information from the plug-in module */
638 int (*module_eeprom)(struct phy_device *dev,
639 struct ethtool_eeprom *ee, u8 *data);
640
f3a40945
AL
641 /* Get statistics from the phy using ethtool */
642 int (*get_sset_count)(struct phy_device *dev);
643 void (*get_strings)(struct phy_device *dev, u8 *data);
644 void (*get_stats)(struct phy_device *dev,
645 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
646
647 /* Get and Set PHY tunables */
648 int (*get_tunable)(struct phy_device *dev,
649 struct ethtool_tunable *tuna, void *data);
650 int (*set_tunable)(struct phy_device *dev,
651 struct ethtool_tunable *tuna,
652 const void *data);
f0f9b4ed 653 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 654};
a9049e0c
AL
655#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
656 struct phy_driver, mdiodrv)
00db8189 657
f62220d3
AF
658#define PHY_ANY_ID "MATCH ANY PHY"
659#define PHY_ANY_UID 0xffffffff
660
661/* A Structure for boards to register fixups with the PHY Lib */
662struct phy_fixup {
663 struct list_head list;
4567d686 664 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
665 u32 phy_uid;
666 u32 phy_uid_mask;
667 int (*run)(struct phy_device *phydev);
668};
669
efabdfb9
AF
670/**
671 * phy_read_mmd - Convenience function for reading a register
672 * from an MMD on a given PHY.
673 * @phydev: The phy_device struct
674 * @devad: The MMD to read from
675 * @regnum: The register on the MMD to read
676 *
677 * Same rules as for phy_read();
678 */
9860118b 679int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 680
2e888103
LB
681/**
682 * phy_read - Convenience function for reading a given PHY register
683 * @phydev: the phy_device struct
684 * @regnum: register number to read
685 *
686 * NOTE: MUST NOT be called from interrupt context,
687 * because the bus read/write functions may wait for an interrupt
688 * to conclude the operation.
689 */
abf35df2 690static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 691{
e5a03bfd 692 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
693}
694
695/**
696 * phy_write - Convenience function for writing a given PHY register
697 * @phydev: the phy_device struct
698 * @regnum: register number to write
699 * @val: value to write to @regnum
700 *
701 * NOTE: MUST NOT be called from interrupt context,
702 * because the bus read/write functions may wait for an interrupt
703 * to conclude the operation.
704 */
abf35df2 705static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 706{
e5a03bfd 707 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
708}
709
2c7b4921
FF
710/**
711 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
712 * @phydev: the phy_device struct
713 *
714 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
715 * PHY_IGNORE_INTERRUPT
716 */
717static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
718{
719 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
720}
721
4284b6a5
FF
722/**
723 * phy_is_internal - Convenience function for testing if a PHY is internal
724 * @phydev: the phy_device struct
725 */
726static inline bool phy_is_internal(struct phy_device *phydev)
727{
728 return phydev->is_internal;
729}
730
32d0f783
IS
731/**
732 * phy_interface_mode_is_rgmii - Convenience function for testing if a
733 * PHY interface mode is RGMII (all variants)
734 * @mode: the phy_interface_t enum
735 */
736static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
737{
738 return mode >= PHY_INTERFACE_MODE_RGMII &&
739 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
740};
741
e463d88c
FF
742/**
743 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
744 * is RGMII (all variants)
745 * @phydev: the phy_device struct
746 */
747static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
748{
32d0f783 749 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
750};
751
752/*
753 * phy_is_pseudo_fixed_link - Convenience function for testing if this
754 * PHY is the CPU port facing side of an Ethernet switch, or similar.
755 * @phydev: the phy_device struct
756 */
757static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
758{
759 return phydev->is_pseudo_fixed_link;
e463d88c
FF
760}
761
efabdfb9
AF
762/**
763 * phy_write_mmd - Convenience function for writing a register
764 * on an MMD on a given PHY.
765 * @phydev: The phy_device struct
766 * @devad: The MMD to read from
767 * @regnum: The register on the MMD to read
768 * @val: value to write to @regnum
769 *
770 * Same rules as for phy_write();
771 */
9860118b 772int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 773
ac28b9f8 774struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
775 bool is_c45,
776 struct phy_c45_device_ids *c45_ids);
90eff909 777#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 778struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 779int phy_device_register(struct phy_device *phy);
90eff909
FF
780void phy_device_free(struct phy_device *phydev);
781#else
782static inline
783struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
784{
785 return NULL;
786}
787
788static inline int phy_device_register(struct phy_device *phy)
789{
790 return 0;
791}
792
793static inline void phy_device_free(struct phy_device *phydev) { }
794#endif /* CONFIG_PHYLIB */
38737e49 795void phy_device_remove(struct phy_device *phydev);
2f5cb434 796int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
797int phy_suspend(struct phy_device *phydev);
798int phy_resume(struct phy_device *phydev);
f0f9b4ed 799int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
800struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
801 phy_interface_t interface);
f8f76db1 802struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
803int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
804 u32 flags, phy_interface_t interface);
fa94f6d9 805int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
806 void (*handler)(struct net_device *),
807 phy_interface_t interface);
808struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
809 void (*handler)(struct net_device *),
810 phy_interface_t interface);
e1393456
AF
811void phy_disconnect(struct phy_device *phydev);
812void phy_detach(struct phy_device *phydev);
813void phy_start(struct phy_device *phydev);
814void phy_stop(struct phy_device *phydev);
815int phy_start_aneg(struct phy_device *phydev);
372788f9 816int phy_aneg_done(struct phy_device *phydev);
e1393456 817
e1393456 818int phy_stop_interrupts(struct phy_device *phydev);
002ba705 819int phy_restart_aneg(struct phy_device *phydev);
00db8189 820
4017b4d3
SS
821static inline int phy_read_status(struct phy_device *phydev)
822{
25149ef9
FF
823 if (!phydev->drv)
824 return -EIO;
825
00db8189
AF
826 return phydev->drv->read_status(phydev);
827}
828
72ba48be 829#define phydev_err(_phydev, format, args...) \
e5a03bfd 830 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be
AL
831
832#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 833 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 834
84eff6d1
AL
835static inline const char *phydev_name(const struct phy_device *phydev)
836{
e5a03bfd 837 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
838}
839
2220943a
AL
840void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
841 __printf(2, 3);
842void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
843
844/* Clause 22 PHY */
af6b6967 845int genphy_config_init(struct phy_device *phydev);
3fb69bca 846int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
847int genphy_restart_aneg(struct phy_device *phydev);
848int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 849int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
850int genphy_update_link(struct phy_device *phydev);
851int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
852int genphy_suspend(struct phy_device *phydev);
853int genphy_resume(struct phy_device *phydev);
f0f9b4ed 854int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 855int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
856static inline int genphy_no_soft_reset(struct phy_device *phydev)
857{
858 return 0;
859}
5acde34a
RK
860
861/* Clause 45 PHY */
862int genphy_c45_restart_aneg(struct phy_device *phydev);
863int genphy_c45_aneg_done(struct phy_device *phydev);
864int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
865int genphy_c45_read_lpa(struct phy_device *phydev);
866int genphy_c45_read_pma(struct phy_device *phydev);
867int genphy_c45_pma_setup_forced(struct phy_device *phydev);
868int genphy_c45_an_disable_aneg(struct phy_device *phydev);
869
00db8189 870void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 871void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
872int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
873int phy_drivers_register(struct phy_driver *new_driver, int n,
874 struct module *owner);
4f9c85a1 875void phy_state_machine(struct work_struct *work);
664fcf12
AL
876void phy_change(struct phy_device *phydev);
877void phy_change_work(struct work_struct *work);
5ea94e76 878void phy_mac_interrupt(struct phy_device *phydev, int new_link);
29935aeb 879void phy_start_machine(struct phy_device *phydev);
00db8189 880void phy_stop_machine(struct phy_device *phydev);
f555f34f 881void phy_trigger_machine(struct phy_device *phydev, bool sync);
00db8189 882int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 883void phy_ethtool_ksettings_get(struct phy_device *phydev,
884 struct ethtool_link_ksettings *cmd);
2d55173e
PR
885int phy_ethtool_ksettings_set(struct phy_device *phydev,
886 const struct ethtool_link_ksettings *cmd);
4017b4d3 887int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
888int phy_start_interrupts(struct phy_device *phydev);
889void phy_print_status(struct phy_device *phydev);
f3a6bd39 890int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
00db8189 891
f62220d3 892int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 893 int (*run)(struct phy_device *));
f62220d3 894int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 895 int (*run)(struct phy_device *));
f62220d3 896int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 897 int (*run)(struct phy_device *));
f62220d3 898
f38e7a32
WH
899int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
900int phy_unregister_fixup_for_id(const char *bus_id);
901int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
902
a59a4d19
GC
903int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
904int phy_get_eee_err(struct phy_device *phydev);
905int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
906int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 907int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
908void phy_ethtool_get_wol(struct phy_device *phydev,
909 struct ethtool_wolinfo *wol);
9d9a77ce
PR
910int phy_ethtool_get_link_ksettings(struct net_device *ndev,
911 struct ethtool_link_ksettings *cmd);
912int phy_ethtool_set_link_ksettings(struct net_device *ndev,
913 const struct ethtool_link_ksettings *cmd);
e86a8987 914int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 915
90eff909 916#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
917int __init mdio_bus_init(void);
918void mdio_bus_exit(void);
90eff909 919#endif
9b9a8bfc 920
00db8189 921extern struct bus_type mdio_bus_type;
c31accd1 922
648ea013
FF
923struct mdio_board_info {
924 const char *bus_id;
925 char modalias[MDIO_NAME_SIZE];
926 int mdio_addr;
927 const void *platform_data;
928};
929
90eff909 930#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
931int mdiobus_register_board_info(const struct mdio_board_info *info,
932 unsigned int n);
933#else
934static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
935 unsigned int n)
936{
937 return 0;
938}
939#endif
940
941
c31accd1
JH
942/**
943 * module_phy_driver() - Helper macro for registering PHY drivers
944 * @__phy_drivers: array of PHY drivers to register
945 *
946 * Helper macro for PHY drivers which do not do anything special in module
947 * init/exit. Each module may only use this macro once, and calling it
948 * replaces module_init() and module_exit().
949 */
950#define phy_module_driver(__phy_drivers, __count) \
951static int __init phy_module_init(void) \
952{ \
be01da72 953 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
954} \
955module_init(phy_module_init); \
956static void __exit phy_module_exit(void) \
957{ \
958 phy_drivers_unregister(__phy_drivers, __count); \
959} \
960module_exit(phy_module_exit)
961
962#define module_phy_driver(__phy_drivers) \
963 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
964
00db8189 965#endif /* __PHY_H */