]>
Commit | Line | Data |
---|---|---|
00db8189 | 1 | /* |
00db8189 | 2 | * Framework and drivers for configuring and reading different PHYs |
d8de01b7 | 3 | * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c |
00db8189 AF |
4 | * |
5 | * Author: Andy Fleming | |
6 | * | |
7 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #ifndef __PHY_H | |
17 | #define __PHY_H | |
18 | ||
2220943a | 19 | #include <linux/compiler.h> |
00db8189 | 20 | #include <linux/spinlock.h> |
13df29f6 | 21 | #include <linux/ethtool.h> |
b31cdffa | 22 | #include <linux/linkmode.h> |
bac83c65 | 23 | #include <linux/mdio.h> |
13df29f6 | 24 | #include <linux/mii.h> |
3e3aaf64 | 25 | #include <linux/module.h> |
13df29f6 MR |
26 | #include <linux/timer.h> |
27 | #include <linux/workqueue.h> | |
8626d3b4 | 28 | #include <linux/mod_devicetable.h> |
00db8189 | 29 | |
60063497 | 30 | #include <linux/atomic.h> |
0ac49527 | 31 | |
e9fbdf17 | 32 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
33 | SUPPORTED_TP | \ |
34 | SUPPORTED_MII) | |
35 | ||
e9fbdf17 FF |
36 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
37 | SUPPORTED_10baseT_Full) | |
38 | ||
39 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
40 | SUPPORTED_100baseT_Full) | |
41 | ||
42 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
43 | SUPPORTED_1000baseT_Full) |
44 | ||
719655a1 AL |
45 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; |
46 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; | |
47 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; | |
48 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; | |
49 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; | |
50 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; | |
9e857a40 | 51 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; |
719655a1 AL |
52 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; |
53 | ||
54 | #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) | |
55 | #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) | |
56 | #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) | |
57 | #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) | |
58 | #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) | |
59 | #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) | |
9e857a40 | 60 | #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) |
719655a1 | 61 | #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) |
e9fbdf17 | 62 | |
3c1bcc86 AL |
63 | extern const int phy_10_100_features_array[4]; |
64 | extern const int phy_basic_t1_features_array[2]; | |
65 | extern const int phy_gbit_features_array[2]; | |
66 | extern const int phy_10gbit_features_array[1]; | |
67 | ||
c5e38a94 AF |
68 | /* |
69 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
00db8189 AF |
70 | * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if |
71 | * the attached driver handles the interrupt | |
72 | */ | |
73 | #define PHY_POLL -1 | |
74 | #define PHY_IGNORE_INTERRUPT -2 | |
75 | ||
a4307c0e HK |
76 | #define PHY_IS_INTERNAL 0x00000001 |
77 | #define PHY_RST_AFTER_CLK_EN 0x00000002 | |
a9049e0c | 78 | #define MDIO_DEVICE_IS_PHY 0x80000000 |
00db8189 | 79 | |
e8a2b6a4 AF |
80 | /* Interface Mode definitions */ |
81 | typedef enum { | |
4157ef1b | 82 | PHY_INTERFACE_MODE_NA, |
735d8a18 | 83 | PHY_INTERFACE_MODE_INTERNAL, |
e8a2b6a4 AF |
84 | PHY_INTERFACE_MODE_MII, |
85 | PHY_INTERFACE_MODE_GMII, | |
86 | PHY_INTERFACE_MODE_SGMII, | |
87 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 88 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 AF |
89 | PHY_INTERFACE_MODE_RMII, |
90 | PHY_INTERFACE_MODE_RGMII, | |
a999589c | 91 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
92 | PHY_INTERFACE_MODE_RGMII_RXID, |
93 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
94 | PHY_INTERFACE_MODE_RTBI, |
95 | PHY_INTERFACE_MODE_SMII, | |
898dd0bd | 96 | PHY_INTERFACE_MODE_XGMII, |
fd70f72c | 97 | PHY_INTERFACE_MODE_MOCA, |
b9d12085 | 98 | PHY_INTERFACE_MODE_QSGMII, |
572de608 | 99 | PHY_INTERFACE_MODE_TRGMII, |
55601a88 AL |
100 | PHY_INTERFACE_MODE_1000BASEX, |
101 | PHY_INTERFACE_MODE_2500BASEX, | |
102 | PHY_INTERFACE_MODE_RXAUI, | |
c125ca09 RK |
103 | PHY_INTERFACE_MODE_XAUI, |
104 | /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ | |
105 | PHY_INTERFACE_MODE_10GKR, | |
8a2fe56e | 106 | PHY_INTERFACE_MODE_MAX, |
e8a2b6a4 AF |
107 | } phy_interface_t; |
108 | ||
1f9127ca ZB |
109 | /** |
110 | * phy_supported_speeds - return all speeds currently supported by a phy device | |
111 | * @phy: The phy device to return supported speeds of. | |
112 | * @speeds: buffer to store supported speeds in. | |
113 | * @size: size of speeds buffer. | |
114 | * | |
d8de01b7 RD |
115 | * Description: Returns the number of supported speeds, and fills |
116 | * the speeds buffer with the supported speeds. If speeds buffer is | |
117 | * too small to contain all currently supported speeds, will return as | |
1f9127ca ZB |
118 | * many speeds as can fit. |
119 | */ | |
120 | unsigned int phy_supported_speeds(struct phy_device *phy, | |
121 | unsigned int *speeds, | |
122 | unsigned int size); | |
123 | ||
8a2fe56e | 124 | /** |
d8de01b7 RD |
125 | * phy_modes - map phy_interface_t enum to device tree binding of phy-mode |
126 | * @interface: enum phy_interface_t value | |
127 | * | |
128 | * Description: maps 'enum phy_interface_t' defined in this file | |
8a2fe56e FF |
129 | * into the device tree binding of 'phy-mode', so that Ethernet |
130 | * device driver can get phy interface from device tree. | |
131 | */ | |
132 | static inline const char *phy_modes(phy_interface_t interface) | |
133 | { | |
134 | switch (interface) { | |
135 | case PHY_INTERFACE_MODE_NA: | |
136 | return ""; | |
735d8a18 FF |
137 | case PHY_INTERFACE_MODE_INTERNAL: |
138 | return "internal"; | |
8a2fe56e FF |
139 | case PHY_INTERFACE_MODE_MII: |
140 | return "mii"; | |
141 | case PHY_INTERFACE_MODE_GMII: | |
142 | return "gmii"; | |
143 | case PHY_INTERFACE_MODE_SGMII: | |
144 | return "sgmii"; | |
145 | case PHY_INTERFACE_MODE_TBI: | |
146 | return "tbi"; | |
147 | case PHY_INTERFACE_MODE_REVMII: | |
148 | return "rev-mii"; | |
149 | case PHY_INTERFACE_MODE_RMII: | |
150 | return "rmii"; | |
151 | case PHY_INTERFACE_MODE_RGMII: | |
152 | return "rgmii"; | |
153 | case PHY_INTERFACE_MODE_RGMII_ID: | |
154 | return "rgmii-id"; | |
155 | case PHY_INTERFACE_MODE_RGMII_RXID: | |
156 | return "rgmii-rxid"; | |
157 | case PHY_INTERFACE_MODE_RGMII_TXID: | |
158 | return "rgmii-txid"; | |
159 | case PHY_INTERFACE_MODE_RTBI: | |
160 | return "rtbi"; | |
161 | case PHY_INTERFACE_MODE_SMII: | |
162 | return "smii"; | |
163 | case PHY_INTERFACE_MODE_XGMII: | |
164 | return "xgmii"; | |
fd70f72c FF |
165 | case PHY_INTERFACE_MODE_MOCA: |
166 | return "moca"; | |
b9d12085 TP |
167 | case PHY_INTERFACE_MODE_QSGMII: |
168 | return "qsgmii"; | |
572de608 SW |
169 | case PHY_INTERFACE_MODE_TRGMII: |
170 | return "trgmii"; | |
55601a88 AL |
171 | case PHY_INTERFACE_MODE_1000BASEX: |
172 | return "1000base-x"; | |
173 | case PHY_INTERFACE_MODE_2500BASEX: | |
174 | return "2500base-x"; | |
175 | case PHY_INTERFACE_MODE_RXAUI: | |
176 | return "rxaui"; | |
c125ca09 RK |
177 | case PHY_INTERFACE_MODE_XAUI: |
178 | return "xaui"; | |
179 | case PHY_INTERFACE_MODE_10GKR: | |
180 | return "10gbase-kr"; | |
8a2fe56e FF |
181 | default: |
182 | return "unknown"; | |
183 | } | |
184 | } | |
185 | ||
00db8189 | 186 | |
e8a2b6a4 | 187 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 AF |
188 | #define PHY_STATE_TIME 1 |
189 | #define PHY_FORCE_TIMEOUT 10 | |
00db8189 | 190 | |
e8a2b6a4 | 191 | #define PHY_MAX_ADDR 32 |
00db8189 | 192 | |
a4d00f17 | 193 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
194 | #define PHY_ID_FMT "%s:%02x" |
195 | ||
4567d686 | 196 | #define MII_BUS_ID_SIZE 61 |
a4d00f17 | 197 | |
abf35df2 JG |
198 | /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit |
199 | IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ | |
200 | #define MII_ADDR_C45 (1<<30) | |
201 | ||
313162d0 | 202 | struct device; |
9525ae83 | 203 | struct phylink; |
313162d0 PG |
204 | struct sk_buff; |
205 | ||
c5e38a94 AF |
206 | /* |
207 | * The Bus class for PHYs. Devices which provide access to | |
208 | * PHYs should register using this structure | |
209 | */ | |
00db8189 | 210 | struct mii_bus { |
3e3aaf64 | 211 | struct module *owner; |
00db8189 | 212 | const char *name; |
9d9326d3 | 213 | char id[MII_BUS_ID_SIZE]; |
00db8189 | 214 | void *priv; |
ccaa953e AL |
215 | int (*read)(struct mii_bus *bus, int addr, int regnum); |
216 | int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); | |
00db8189 AF |
217 | int (*reset)(struct mii_bus *bus); |
218 | ||
c5e38a94 AF |
219 | /* |
220 | * A lock to ensure that only one thing can read/write | |
221 | * the MDIO bus at a time | |
222 | */ | |
35b5f6b1 | 223 | struct mutex mdio_lock; |
00db8189 | 224 | |
18ee49dd | 225 | struct device *parent; |
46abc021 LB |
226 | enum { |
227 | MDIOBUS_ALLOCATED = 1, | |
228 | MDIOBUS_REGISTERED, | |
229 | MDIOBUS_UNREGISTERED, | |
230 | MDIOBUS_RELEASED, | |
231 | } state; | |
232 | struct device dev; | |
00db8189 AF |
233 | |
234 | /* list of all PHYs on bus */ | |
7f854420 | 235 | struct mdio_device *mdio_map[PHY_MAX_ADDR]; |
00db8189 | 236 | |
c6883996 | 237 | /* PHY addresses to be ignored when probing */ |
f896424c MP |
238 | u32 phy_mask; |
239 | ||
922f2dd1 FF |
240 | /* PHY addresses to ignore the TA/read failure */ |
241 | u32 phy_ignore_ta_mask; | |
242 | ||
c5e38a94 | 243 | /* |
e7f4dc35 AL |
244 | * An array of interrupts, each PHY's interrupt at the index |
245 | * matching its address | |
c5e38a94 | 246 | */ |
e7f4dc35 | 247 | int irq[PHY_MAX_ADDR]; |
69226896 RQ |
248 | |
249 | /* GPIO reset pulse width in microseconds */ | |
250 | int reset_delay_us; | |
d396e84c SS |
251 | /* RESET GPIO descriptor pointer */ |
252 | struct gpio_desc *reset_gpiod; | |
00db8189 | 253 | }; |
46abc021 | 254 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 255 | |
eb8a54a7 TT |
256 | struct mii_bus *mdiobus_alloc_size(size_t); |
257 | static inline struct mii_bus *mdiobus_alloc(void) | |
258 | { | |
259 | return mdiobus_alloc_size(0); | |
260 | } | |
261 | ||
3e3aaf64 RK |
262 | int __mdiobus_register(struct mii_bus *bus, struct module *owner); |
263 | #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) | |
2e888103 LB |
264 | void mdiobus_unregister(struct mii_bus *bus); |
265 | void mdiobus_free(struct mii_bus *bus); | |
6d48f44b GS |
266 | struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); |
267 | static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) | |
268 | { | |
269 | return devm_mdiobus_alloc_size(dev, 0); | |
270 | } | |
271 | ||
272 | void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); | |
2e888103 | 273 | struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); |
2e888103 | 274 | |
695bce8f HK |
275 | #define PHY_INTERRUPT_DISABLED false |
276 | #define PHY_INTERRUPT_ENABLED true | |
00db8189 AF |
277 | |
278 | /* PHY state machine states: | |
279 | * | |
280 | * DOWN: PHY device and driver are not ready for anything. probe | |
281 | * should be called if and only if the PHY is in this state, | |
282 | * given that the PHY device exists. | |
899a3cbb | 283 | * - PHY driver probe function will set the state to READY |
00db8189 AF |
284 | * |
285 | * READY: PHY is ready to send and receive packets, but the | |
286 | * controller is not. By default, PHYs which do not implement | |
899a3cbb | 287 | * probe will be set to this state by phy_probe(). |
00db8189 AF |
288 | * - start will set the state to UP |
289 | * | |
00db8189 AF |
290 | * UP: The PHY and attached device are ready to do work. |
291 | * Interrupts should be started here. | |
85a1f31d | 292 | * - timer moves to NOLINK or RUNNING |
00db8189 AF |
293 | * |
294 | * NOLINK: PHY is up, but not currently plugged in. | |
8deeb630 | 295 | * - irq or timer will set RUNNING if link comes back |
00db8189 AF |
296 | * - phy_stop moves to HALTED |
297 | * | |
298 | * FORCING: PHY is being configured with forced settings | |
299 | * - if link is up, move to RUNNING | |
300 | * - If link is down, we drop to the next highest setting, and | |
301 | * retry (FORCING) after a timeout | |
302 | * - phy_stop moves to HALTED | |
303 | * | |
304 | * RUNNING: PHY is currently up, running, and possibly sending | |
305 | * and/or receiving packets | |
8deeb630 | 306 | * - irq or timer will set NOLINK if link goes down |
00db8189 AF |
307 | * - phy_stop moves to HALTED |
308 | * | |
309 | * CHANGELINK: PHY experienced a change in link state | |
310 | * - timer moves to RUNNING if link | |
311 | * - timer moves to NOLINK if the link is down | |
312 | * - phy_stop moves to HALTED | |
313 | * | |
314 | * HALTED: PHY is up, but no polling or interrupts are done. Or | |
315 | * PHY is in an error state. | |
316 | * | |
317 | * - phy_start moves to RESUMING | |
318 | * | |
319 | * RESUMING: PHY was halted, but now wants to run again. | |
320 | * - If we are forcing, or aneg is done, timer moves to RUNNING | |
321 | * - If aneg is not done, timer moves to AN | |
322 | * - phy_stop moves to HALTED | |
323 | */ | |
324 | enum phy_state { | |
4017b4d3 | 325 | PHY_DOWN = 0, |
00db8189 | 326 | PHY_READY, |
2b3e88ea | 327 | PHY_HALTED, |
00db8189 | 328 | PHY_UP, |
00db8189 AF |
329 | PHY_RUNNING, |
330 | PHY_NOLINK, | |
331 | PHY_FORCING, | |
332 | PHY_CHANGELINK, | |
00db8189 AF |
333 | PHY_RESUMING |
334 | }; | |
335 | ||
ac28b9f8 DD |
336 | /** |
337 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
338 | * @devices_in_package: Bit vector of devices present. | |
339 | * @device_ids: The device identifer for each present device. | |
340 | */ | |
341 | struct phy_c45_device_ids { | |
342 | u32 devices_in_package; | |
343 | u32 device_ids[8]; | |
344 | }; | |
c1f19b51 | 345 | |
00db8189 AF |
346 | /* phy_device: An instance of a PHY |
347 | * | |
348 | * drv: Pointer to the driver for this PHY instance | |
00db8189 | 349 | * phy_id: UID for this device found during discovery |
ac28b9f8 DD |
350 | * c45_ids: 802.3-c45 Device Identifers if is_c45. |
351 | * is_c45: Set to true if this phy uses clause 45 addressing. | |
4284b6a5 | 352 | * is_internal: Set to true if this phy is internal to a MAC. |
5a11dd7d | 353 | * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. |
aae88261 | 354 | * has_fixups: Set to true if this phy has fixups/quirks. |
8a477a6f | 355 | * suspended: Set to true if this phy has been suspended successfully. |
a3995460 | 356 | * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. |
f0f9b4ed | 357 | * loopback_enabled: Set true if this phy has been loopbacked successfully. |
00db8189 AF |
358 | * state: state of the PHY for management purposes |
359 | * dev_flags: Device-specific flags used by the PHY driver. | |
00db8189 AF |
360 | * link_timeout: The number of timer firings to wait before the |
361 | * giving up on the current attempt at acquiring a link | |
362 | * irq: IRQ number of the PHY's interrupt (-1 if none) | |
363 | * phy_timer: The timer for handling the state machine | |
00db8189 AF |
364 | * attached_dev: The attached enet driver's device instance ptr |
365 | * adjust_link: Callback for the enet controller to respond to | |
366 | * changes in the link state. | |
00db8189 | 367 | * |
114002bc FF |
368 | * speed, duplex, pause, supported, advertising, lp_advertising, |
369 | * and autoneg are used like in mii_if_info | |
00db8189 AF |
370 | * |
371 | * interrupts currently only supports enabled or disabled, | |
372 | * but could be changed in the future to support enabling | |
373 | * and disabling specific interrupts | |
374 | * | |
375 | * Contains some infrastructure for polling and interrupt | |
376 | * handling, as well as handling shifts in PHY hardware state | |
377 | */ | |
378 | struct phy_device { | |
e5a03bfd AL |
379 | struct mdio_device mdio; |
380 | ||
00db8189 AF |
381 | /* Information about the PHY type */ |
382 | /* And management functions */ | |
383 | struct phy_driver *drv; | |
384 | ||
00db8189 AF |
385 | u32 phy_id; |
386 | ||
ac28b9f8 | 387 | struct phy_c45_device_ids c45_ids; |
87e5808d HK |
388 | unsigned is_c45:1; |
389 | unsigned is_internal:1; | |
390 | unsigned is_pseudo_fixed_link:1; | |
391 | unsigned has_fixups:1; | |
392 | unsigned suspended:1; | |
393 | unsigned sysfs_links:1; | |
394 | unsigned loopback_enabled:1; | |
395 | ||
396 | unsigned autoneg:1; | |
397 | /* The most recently read link state */ | |
398 | unsigned link:1; | |
ac28b9f8 | 399 | |
695bce8f HK |
400 | /* Interrupts are enabled */ |
401 | unsigned interrupts:1; | |
402 | ||
00db8189 AF |
403 | enum phy_state state; |
404 | ||
405 | u32 dev_flags; | |
406 | ||
e8a2b6a4 AF |
407 | phy_interface_t interface; |
408 | ||
c5e38a94 AF |
409 | /* |
410 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
411 | * partner speed & duplex & pause (autoneg) |
412 | */ | |
413 | int speed; | |
414 | int duplex; | |
415 | int pause; | |
416 | int asym_pause; | |
417 | ||
3c1bcc86 AL |
418 | /* Union of PHY and Attached devices' supported link modes */ |
419 | /* See ethtool.h for more info */ | |
420 | __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); | |
421 | __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); | |
c0ec3c27 | 422 | __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); |
00db8189 | 423 | |
d853d145 | 424 | /* Energy efficient ethernet modes which should be prohibited */ |
425 | u32 eee_broken_modes; | |
426 | ||
00db8189 AF |
427 | int link_timeout; |
428 | ||
2e0bc452 ZB |
429 | #ifdef CONFIG_LED_TRIGGER_PHY |
430 | struct phy_led_trigger *phy_led_triggers; | |
431 | unsigned int phy_num_led_triggers; | |
432 | struct phy_led_trigger *last_triggered; | |
3928ee64 MS |
433 | |
434 | struct phy_led_trigger *led_link_trigger; | |
2e0bc452 ZB |
435 | #endif |
436 | ||
c5e38a94 AF |
437 | /* |
438 | * Interrupt number for this PHY | |
439 | * -1 means no interrupt | |
440 | */ | |
00db8189 AF |
441 | int irq; |
442 | ||
443 | /* private data pointer */ | |
444 | /* For use by PHYs to maintain extra state */ | |
445 | void *priv; | |
446 | ||
447 | /* Interrupt and Polling infrastructure */ | |
a390d1f3 | 448 | struct delayed_work state_queue; |
00db8189 | 449 | |
35b5f6b1 | 450 | struct mutex lock; |
00db8189 | 451 | |
9525ae83 | 452 | struct phylink *phylink; |
00db8189 AF |
453 | struct net_device *attached_dev; |
454 | ||
634ec36c | 455 | u8 mdix; |
f4ed2fe3 | 456 | u8 mdix_ctrl; |
634ec36c | 457 | |
a81497be | 458 | void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); |
00db8189 | 459 | void (*adjust_link)(struct net_device *dev); |
00db8189 | 460 | }; |
e5a03bfd AL |
461 | #define to_phy_device(d) container_of(to_mdio_device(d), \ |
462 | struct phy_device, mdio) | |
00db8189 AF |
463 | |
464 | /* struct phy_driver: Driver structure for a particular PHY type | |
465 | * | |
a9049e0c | 466 | * driver_data: static driver data |
00db8189 AF |
467 | * phy_id: The result of reading the UID registers of this PHY |
468 | * type, and ANDing them with the phy_id_mask. This driver | |
469 | * only works for PHYs with IDs which match this field | |
470 | * name: The friendly name of this PHY type | |
471 | * phy_id_mask: Defines the important bits of the phy_id | |
3e64cf7a CG |
472 | * features: A mandatory list of features (speed, duplex, etc) |
473 | * supported by this PHY | |
00db8189 AF |
474 | * flags: A bitfield defining certain other features this PHY |
475 | * supports (like interrupts) | |
476 | * | |
00fde795 HK |
477 | * All functions are optional. If config_aneg or read_status |
478 | * are not implemented, the phy core uses the genphy versions. | |
479 | * Note that none of these functions should be called from | |
480 | * interrupt time. The goal is for the bus read/write functions | |
481 | * to be able to block when the bus transaction is happening, | |
482 | * and be freed up by an interrupt (The MPC85xx has this ability, | |
483 | * though it is not currently supported in the driver). | |
00db8189 AF |
484 | */ |
485 | struct phy_driver { | |
a9049e0c | 486 | struct mdio_driver_common mdiodrv; |
00db8189 AF |
487 | u32 phy_id; |
488 | char *name; | |
511e3036 | 489 | u32 phy_id_mask; |
719655a1 | 490 | const unsigned long * const features; |
00db8189 | 491 | u32 flags; |
860f6e9e | 492 | const void *driver_data; |
00db8189 | 493 | |
c5e38a94 | 494 | /* |
9df81dd7 FF |
495 | * Called to issue a PHY software reset |
496 | */ | |
497 | int (*soft_reset)(struct phy_device *phydev); | |
498 | ||
499 | /* | |
c5e38a94 AF |
500 | * Called to initialize the PHY, |
501 | * including after a reset | |
502 | */ | |
00db8189 AF |
503 | int (*config_init)(struct phy_device *phydev); |
504 | ||
c5e38a94 AF |
505 | /* |
506 | * Called during discovery. Used to set | |
507 | * up device-specific structures, if any | |
508 | */ | |
00db8189 AF |
509 | int (*probe)(struct phy_device *phydev); |
510 | ||
511 | /* PHY Power Management */ | |
512 | int (*suspend)(struct phy_device *phydev); | |
513 | int (*resume)(struct phy_device *phydev); | |
514 | ||
c5e38a94 AF |
515 | /* |
516 | * Configures the advertisement and resets | |
00db8189 AF |
517 | * autonegotiation if phydev->autoneg is on, |
518 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
519 | * if phydev->autoneg is off |
520 | */ | |
00db8189 AF |
521 | int (*config_aneg)(struct phy_device *phydev); |
522 | ||
76a423a3 FF |
523 | /* Determines the auto negotiation result */ |
524 | int (*aneg_done)(struct phy_device *phydev); | |
525 | ||
00db8189 AF |
526 | /* Determines the negotiated speed and duplex */ |
527 | int (*read_status)(struct phy_device *phydev); | |
528 | ||
529 | /* Clears any pending interrupts */ | |
530 | int (*ack_interrupt)(struct phy_device *phydev); | |
531 | ||
532 | /* Enables or disables interrupts */ | |
533 | int (*config_intr)(struct phy_device *phydev); | |
534 | ||
a8729eb3 AG |
535 | /* |
536 | * Checks if the PHY generated an interrupt. | |
537 | * For multi-PHY devices with shared PHY interrupt pin | |
538 | */ | |
539 | int (*did_interrupt)(struct phy_device *phydev); | |
540 | ||
00db8189 AF |
541 | /* Clears up any memory if needed */ |
542 | void (*remove)(struct phy_device *phydev); | |
543 | ||
a30e2c18 DD |
544 | /* Returns true if this is a suitable driver for the given |
545 | * phydev. If NULL, matching is based on phy_id and | |
546 | * phy_id_mask. | |
547 | */ | |
548 | int (*match_phy_device)(struct phy_device *phydev); | |
549 | ||
c8f3a8c3 RC |
550 | /* Handles ethtool queries for hardware time stamping. */ |
551 | int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); | |
552 | ||
c1f19b51 RC |
553 | /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ |
554 | int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); | |
555 | ||
556 | /* | |
557 | * Requests a Rx timestamp for 'skb'. If the skb is accepted, | |
558 | * the phy driver promises to deliver it using netif_rx() as | |
559 | * soon as a timestamp becomes available. One of the | |
560 | * PTP_CLASS_ values is passed in 'type'. The function must | |
561 | * return true if the skb is accepted for delivery. | |
562 | */ | |
563 | bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
564 | ||
565 | /* | |
566 | * Requests a Tx timestamp for 'skb'. The phy driver promises | |
da92b194 | 567 | * to deliver it using skb_complete_tx_timestamp() as soon as a |
c1f19b51 RC |
568 | * timestamp becomes available. One of the PTP_CLASS_ values |
569 | * is passed in 'type'. | |
570 | */ | |
571 | void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
572 | ||
42e836eb MS |
573 | /* Some devices (e.g. qnap TS-119P II) require PHY register changes to |
574 | * enable Wake on LAN, so set_wol is provided to be called in the | |
575 | * ethernet driver's set_wol function. */ | |
576 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
577 | ||
578 | /* See set_wol, but for checking whether Wake on LAN is enabled. */ | |
579 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
580 | ||
2b8f2a28 DM |
581 | /* |
582 | * Called to inform a PHY device driver when the core is about to | |
583 | * change the link state. This callback is supposed to be used as | |
584 | * fixup hook for drivers that need to take action when the link | |
585 | * state changes. Drivers are by no means allowed to mess with the | |
586 | * PHY device structure in their implementations. | |
587 | */ | |
588 | void (*link_change_notify)(struct phy_device *dev); | |
589 | ||
1ee6b9bc RK |
590 | /* |
591 | * Phy specific driver override for reading a MMD register. | |
592 | * This function is optional for PHY specific drivers. When | |
593 | * not provided, the default MMD read function will be used | |
594 | * by phy_read_mmd(), which will use either a direct read for | |
595 | * Clause 45 PHYs or an indirect read for Clause 22 PHYs. | |
596 | * devnum is the MMD device number within the PHY device, | |
597 | * regnum is the register within the selected MMD device. | |
598 | */ | |
599 | int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); | |
600 | ||
601 | /* | |
602 | * Phy specific driver override for writing a MMD register. | |
603 | * This function is optional for PHY specific drivers. When | |
604 | * not provided, the default MMD write function will be used | |
605 | * by phy_write_mmd(), which will use either a direct write for | |
606 | * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. | |
607 | * devnum is the MMD device number within the PHY device, | |
608 | * regnum is the register within the selected MMD device. | |
609 | * val is the value to be written. | |
610 | */ | |
611 | int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, | |
612 | u16 val); | |
613 | ||
78ffc4ac RK |
614 | int (*read_page)(struct phy_device *dev); |
615 | int (*write_page)(struct phy_device *dev, int page); | |
616 | ||
2f438366 ES |
617 | /* Get the size and type of the eeprom contained within a plug-in |
618 | * module */ | |
619 | int (*module_info)(struct phy_device *dev, | |
620 | struct ethtool_modinfo *modinfo); | |
621 | ||
622 | /* Get the eeprom information from the plug-in module */ | |
623 | int (*module_eeprom)(struct phy_device *dev, | |
624 | struct ethtool_eeprom *ee, u8 *data); | |
625 | ||
f3a40945 AL |
626 | /* Get statistics from the phy using ethtool */ |
627 | int (*get_sset_count)(struct phy_device *dev); | |
628 | void (*get_strings)(struct phy_device *dev, u8 *data); | |
629 | void (*get_stats)(struct phy_device *dev, | |
630 | struct ethtool_stats *stats, u64 *data); | |
968ad9da RL |
631 | |
632 | /* Get and Set PHY tunables */ | |
633 | int (*get_tunable)(struct phy_device *dev, | |
634 | struct ethtool_tunable *tuna, void *data); | |
635 | int (*set_tunable)(struct phy_device *dev, | |
636 | struct ethtool_tunable *tuna, | |
637 | const void *data); | |
f0f9b4ed | 638 | int (*set_loopback)(struct phy_device *dev, bool enable); |
00db8189 | 639 | }; |
a9049e0c AL |
640 | #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ |
641 | struct phy_driver, mdiodrv) | |
00db8189 | 642 | |
f62220d3 AF |
643 | #define PHY_ANY_ID "MATCH ANY PHY" |
644 | #define PHY_ANY_UID 0xffffffff | |
645 | ||
aa2af2eb HK |
646 | #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) |
647 | #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) | |
648 | #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) | |
649 | ||
f62220d3 AF |
650 | /* A Structure for boards to register fixups with the PHY Lib */ |
651 | struct phy_fixup { | |
652 | struct list_head list; | |
4567d686 | 653 | char bus_id[MII_BUS_ID_SIZE + 3]; |
f62220d3 AF |
654 | u32 phy_uid; |
655 | u32 phy_uid_mask; | |
656 | int (*run)(struct phy_device *phydev); | |
657 | }; | |
658 | ||
da4625ac RK |
659 | const char *phy_speed_to_str(int speed); |
660 | const char *phy_duplex_to_str(unsigned int duplex); | |
661 | ||
0ccb4fc6 RK |
662 | /* A structure for mapping a particular speed and duplex |
663 | * combination to a particular SUPPORTED and ADVERTISED value | |
664 | */ | |
665 | struct phy_setting { | |
666 | u32 speed; | |
667 | u8 duplex; | |
668 | u8 bit; | |
669 | }; | |
670 | ||
671 | const struct phy_setting * | |
672 | phy_lookup_setting(int speed, int duplex, const unsigned long *mask, | |
3c1bcc86 | 673 | bool exact); |
0ccb4fc6 | 674 | size_t phy_speeds(unsigned int *speeds, size_t size, |
3c1bcc86 | 675 | unsigned long *mask); |
0ccb4fc6 | 676 | |
2b3e88ea HK |
677 | static inline bool __phy_is_started(struct phy_device *phydev) |
678 | { | |
679 | WARN_ON(!mutex_is_locked(&phydev->lock)); | |
680 | ||
681 | return phydev->state >= PHY_UP; | |
682 | } | |
683 | ||
684 | /** | |
685 | * phy_is_started - Convenience function to check whether PHY is started | |
686 | * @phydev: The phy_device struct | |
687 | */ | |
688 | static inline bool phy_is_started(struct phy_device *phydev) | |
689 | { | |
690 | bool started; | |
691 | ||
692 | mutex_lock(&phydev->lock); | |
693 | started = __phy_is_started(phydev); | |
694 | mutex_unlock(&phydev->lock); | |
695 | ||
696 | return started; | |
697 | } | |
698 | ||
8c5e850c RK |
699 | void phy_resolve_aneg_linkmode(struct phy_device *phydev); |
700 | ||
efabdfb9 AF |
701 | /** |
702 | * phy_read_mmd - Convenience function for reading a register | |
703 | * from an MMD on a given PHY. | |
704 | * @phydev: The phy_device struct | |
705 | * @devad: The MMD to read from | |
706 | * @regnum: The register on the MMD to read | |
707 | * | |
708 | * Same rules as for phy_read(); | |
709 | */ | |
9860118b | 710 | int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); |
efabdfb9 | 711 | |
2e888103 LB |
712 | /** |
713 | * phy_read - Convenience function for reading a given PHY register | |
714 | * @phydev: the phy_device struct | |
715 | * @regnum: register number to read | |
716 | * | |
717 | * NOTE: MUST NOT be called from interrupt context, | |
718 | * because the bus read/write functions may wait for an interrupt | |
719 | * to conclude the operation. | |
720 | */ | |
abf35df2 | 721 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 | 722 | { |
e5a03bfd | 723 | return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); |
2e888103 LB |
724 | } |
725 | ||
788f9933 RK |
726 | /** |
727 | * __phy_read - convenience function for reading a given PHY register | |
728 | * @phydev: the phy_device struct | |
729 | * @regnum: register number to read | |
730 | * | |
731 | * The caller must have taken the MDIO bus lock. | |
732 | */ | |
733 | static inline int __phy_read(struct phy_device *phydev, u32 regnum) | |
734 | { | |
735 | return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); | |
736 | } | |
737 | ||
2e888103 LB |
738 | /** |
739 | * phy_write - Convenience function for writing a given PHY register | |
740 | * @phydev: the phy_device struct | |
741 | * @regnum: register number to write | |
742 | * @val: value to write to @regnum | |
743 | * | |
744 | * NOTE: MUST NOT be called from interrupt context, | |
745 | * because the bus read/write functions may wait for an interrupt | |
746 | * to conclude the operation. | |
747 | */ | |
abf35df2 | 748 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 | 749 | { |
e5a03bfd | 750 | return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); |
2e888103 LB |
751 | } |
752 | ||
788f9933 RK |
753 | /** |
754 | * __phy_write - Convenience function for writing a given PHY register | |
755 | * @phydev: the phy_device struct | |
756 | * @regnum: register number to write | |
757 | * @val: value to write to @regnum | |
758 | * | |
759 | * The caller must have taken the MDIO bus lock. | |
760 | */ | |
761 | static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) | |
762 | { | |
763 | return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, | |
764 | val); | |
765 | } | |
766 | ||
767 | int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); | |
2b74e5be | 768 | int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
788f9933 | 769 | |
ac8322d8 HK |
770 | /** |
771 | * __phy_set_bits - Convenience function for setting bits in a PHY register | |
772 | * @phydev: the phy_device struct | |
773 | * @regnum: register number to write | |
774 | * @val: bits to set | |
775 | * | |
776 | * The caller must have taken the MDIO bus lock. | |
777 | */ | |
778 | static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
779 | { | |
780 | return __phy_modify(phydev, regnum, 0, val); | |
781 | } | |
782 | ||
783 | /** | |
784 | * __phy_clear_bits - Convenience function for clearing bits in a PHY register | |
785 | * @phydev: the phy_device struct | |
786 | * @regnum: register number to write | |
787 | * @val: bits to clear | |
788 | * | |
789 | * The caller must have taken the MDIO bus lock. | |
790 | */ | |
791 | static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, | |
792 | u16 val) | |
793 | { | |
794 | return __phy_modify(phydev, regnum, val, 0); | |
795 | } | |
796 | ||
797 | /** | |
798 | * phy_set_bits - Convenience function for setting bits in a PHY register | |
799 | * @phydev: the phy_device struct | |
800 | * @regnum: register number to write | |
801 | * @val: bits to set | |
802 | */ | |
803 | static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
804 | { | |
805 | return phy_modify(phydev, regnum, 0, val); | |
806 | } | |
807 | ||
808 | /** | |
809 | * phy_clear_bits - Convenience function for clearing bits in a PHY register | |
810 | * @phydev: the phy_device struct | |
811 | * @regnum: register number to write | |
812 | * @val: bits to clear | |
813 | */ | |
814 | static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
815 | { | |
816 | return phy_modify(phydev, regnum, val, 0); | |
817 | } | |
818 | ||
2c7b4921 FF |
819 | /** |
820 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
821 | * @phydev: the phy_device struct | |
822 | * | |
823 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
824 | * PHY_IGNORE_INTERRUPT | |
825 | */ | |
826 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
827 | { | |
828 | return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; | |
829 | } | |
830 | ||
3c507b8a HK |
831 | /** |
832 | * phy_polling_mode - Convenience function for testing whether polling is | |
833 | * used to detect PHY status changes | |
834 | * @phydev: the phy_device struct | |
835 | */ | |
836 | static inline bool phy_polling_mode(struct phy_device *phydev) | |
837 | { | |
838 | return phydev->irq == PHY_POLL; | |
839 | } | |
840 | ||
4284b6a5 FF |
841 | /** |
842 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
843 | * @phydev: the phy_device struct | |
844 | */ | |
845 | static inline bool phy_is_internal(struct phy_device *phydev) | |
846 | { | |
847 | return phydev->is_internal; | |
848 | } | |
849 | ||
32d0f783 IS |
850 | /** |
851 | * phy_interface_mode_is_rgmii - Convenience function for testing if a | |
852 | * PHY interface mode is RGMII (all variants) | |
853 | * @mode: the phy_interface_t enum | |
854 | */ | |
855 | static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) | |
856 | { | |
857 | return mode >= PHY_INTERFACE_MODE_RGMII && | |
858 | mode <= PHY_INTERFACE_MODE_RGMII_TXID; | |
859 | }; | |
860 | ||
365c1e64 RK |
861 | /** |
862 | * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z | |
863 | * negotiation | |
864 | * @mode: one of &enum phy_interface_t | |
865 | * | |
866 | * Returns true if the phy interface mode uses the 16-bit negotiation | |
867 | * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) | |
868 | */ | |
869 | static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) | |
870 | { | |
871 | return mode == PHY_INTERFACE_MODE_1000BASEX || | |
872 | mode == PHY_INTERFACE_MODE_2500BASEX; | |
873 | } | |
874 | ||
e463d88c FF |
875 | /** |
876 | * phy_interface_is_rgmii - Convenience function for testing if a PHY interface | |
877 | * is RGMII (all variants) | |
878 | * @phydev: the phy_device struct | |
879 | */ | |
880 | static inline bool phy_interface_is_rgmii(struct phy_device *phydev) | |
881 | { | |
32d0f783 | 882 | return phy_interface_mode_is_rgmii(phydev->interface); |
5a11dd7d FF |
883 | }; |
884 | ||
885 | /* | |
886 | * phy_is_pseudo_fixed_link - Convenience function for testing if this | |
887 | * PHY is the CPU port facing side of an Ethernet switch, or similar. | |
888 | * @phydev: the phy_device struct | |
889 | */ | |
890 | static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) | |
891 | { | |
892 | return phydev->is_pseudo_fixed_link; | |
e463d88c FF |
893 | } |
894 | ||
efabdfb9 AF |
895 | /** |
896 | * phy_write_mmd - Convenience function for writing a register | |
897 | * on an MMD on a given PHY. | |
898 | * @phydev: The phy_device struct | |
899 | * @devad: The MMD to read from | |
900 | * @regnum: The register on the MMD to read | |
901 | * @val: value to write to @regnum | |
902 | * | |
903 | * Same rules as for phy_write(); | |
904 | */ | |
9860118b | 905 | int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); |
efabdfb9 | 906 | |
78ffc4ac RK |
907 | int phy_save_page(struct phy_device *phydev); |
908 | int phy_select_page(struct phy_device *phydev, int page); | |
909 | int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); | |
910 | int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); | |
911 | int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); | |
912 | int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, | |
913 | u16 mask, u16 set); | |
914 | ||
ac28b9f8 | 915 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, |
4017b4d3 SS |
916 | bool is_c45, |
917 | struct phy_c45_device_ids *c45_ids); | |
90eff909 | 918 | #if IS_ENABLED(CONFIG_PHYLIB) |
ac28b9f8 | 919 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 920 | int phy_device_register(struct phy_device *phy); |
90eff909 FF |
921 | void phy_device_free(struct phy_device *phydev); |
922 | #else | |
923 | static inline | |
924 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) | |
925 | { | |
926 | return NULL; | |
927 | } | |
928 | ||
929 | static inline int phy_device_register(struct phy_device *phy) | |
930 | { | |
931 | return 0; | |
932 | } | |
933 | ||
934 | static inline void phy_device_free(struct phy_device *phydev) { } | |
935 | #endif /* CONFIG_PHYLIB */ | |
38737e49 | 936 | void phy_device_remove(struct phy_device *phydev); |
2f5cb434 | 937 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
938 | int phy_suspend(struct phy_device *phydev); |
939 | int phy_resume(struct phy_device *phydev); | |
9c2c2e62 | 940 | int __phy_resume(struct phy_device *phydev); |
f0f9b4ed | 941 | int phy_loopback(struct phy_device *phydev, bool enable); |
4017b4d3 SS |
942 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
943 | phy_interface_t interface); | |
f8f76db1 | 944 | struct phy_device *phy_find_first(struct mii_bus *bus); |
257184d7 AF |
945 | int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, |
946 | u32 flags, phy_interface_t interface); | |
fa94f6d9 | 947 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
948 | void (*handler)(struct net_device *), |
949 | phy_interface_t interface); | |
950 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
951 | void (*handler)(struct net_device *), | |
952 | phy_interface_t interface); | |
e1393456 AF |
953 | void phy_disconnect(struct phy_device *phydev); |
954 | void phy_detach(struct phy_device *phydev); | |
955 | void phy_start(struct phy_device *phydev); | |
956 | void phy_stop(struct phy_device *phydev); | |
957 | int phy_start_aneg(struct phy_device *phydev); | |
372788f9 | 958 | int phy_aneg_done(struct phy_device *phydev); |
2b9672dd HK |
959 | int phy_speed_down(struct phy_device *phydev, bool sync); |
960 | int phy_speed_up(struct phy_device *phydev); | |
e1393456 | 961 | |
e1393456 | 962 | int phy_stop_interrupts(struct phy_device *phydev); |
002ba705 | 963 | int phy_restart_aneg(struct phy_device *phydev); |
a9668491 | 964 | int phy_reset_after_clk_enable(struct phy_device *phydev); |
00db8189 | 965 | |
bafbdd52 SS |
966 | static inline void phy_device_reset(struct phy_device *phydev, int value) |
967 | { | |
968 | mdio_device_reset(&phydev->mdio, value); | |
969 | } | |
970 | ||
72ba48be | 971 | #define phydev_err(_phydev, format, args...) \ |
e5a03bfd | 972 | dev_err(&_phydev->mdio.dev, format, ##args) |
72ba48be | 973 | |
c4fabb8b AL |
974 | #define phydev_info(_phydev, format, args...) \ |
975 | dev_info(&_phydev->mdio.dev, format, ##args) | |
976 | ||
ab2a605f AL |
977 | #define phydev_warn(_phydev, format, args...) \ |
978 | dev_warn(&_phydev->mdio.dev, format, ##args) | |
979 | ||
72ba48be | 980 | #define phydev_dbg(_phydev, format, args...) \ |
2eaa38d9 | 981 | dev_dbg(&_phydev->mdio.dev, format, ##args) |
72ba48be | 982 | |
84eff6d1 AL |
983 | static inline const char *phydev_name(const struct phy_device *phydev) |
984 | { | |
e5a03bfd | 985 | return dev_name(&phydev->mdio.dev); |
84eff6d1 AL |
986 | } |
987 | ||
2220943a AL |
988 | void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) |
989 | __printf(2, 3); | |
990 | void phy_attached_info(struct phy_device *phydev); | |
5acde34a RK |
991 | |
992 | /* Clause 22 PHY */ | |
af6b6967 | 993 | int genphy_config_init(struct phy_device *phydev); |
3fb69bca | 994 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 AF |
995 | int genphy_restart_aneg(struct phy_device *phydev); |
996 | int genphy_config_aneg(struct phy_device *phydev); | |
a9fa6e6a | 997 | int genphy_aneg_done(struct phy_device *phydev); |
00db8189 AF |
998 | int genphy_update_link(struct phy_device *phydev); |
999 | int genphy_read_status(struct phy_device *phydev); | |
0f0ca340 GC |
1000 | int genphy_suspend(struct phy_device *phydev); |
1001 | int genphy_resume(struct phy_device *phydev); | |
f0f9b4ed | 1002 | int genphy_loopback(struct phy_device *phydev, bool enable); |
797ac071 | 1003 | int genphy_soft_reset(struct phy_device *phydev); |
0878fff1 FF |
1004 | static inline int genphy_no_soft_reset(struct phy_device *phydev) |
1005 | { | |
1006 | return 0; | |
1007 | } | |
5df7af85 KH |
1008 | int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, |
1009 | u16 regnum); | |
1010 | int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, | |
1011 | u16 regnum, u16 val); | |
5acde34a RK |
1012 | |
1013 | /* Clause 45 PHY */ | |
1014 | int genphy_c45_restart_aneg(struct phy_device *phydev); | |
1015 | int genphy_c45_aneg_done(struct phy_device *phydev); | |
1016 | int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask); | |
1017 | int genphy_c45_read_lpa(struct phy_device *phydev); | |
1018 | int genphy_c45_read_pma(struct phy_device *phydev); | |
1019 | int genphy_c45_pma_setup_forced(struct phy_device *phydev); | |
1020 | int genphy_c45_an_disable_aneg(struct phy_device *phydev); | |
ea4efe25 | 1021 | int genphy_c45_read_mdix(struct phy_device *phydev); |
5acde34a | 1022 | |
e8a714e0 FF |
1023 | /* The gen10g_* functions are the old Clause 45 stub */ |
1024 | int gen10g_config_aneg(struct phy_device *phydev); | |
1025 | int gen10g_read_status(struct phy_device *phydev); | |
1026 | int gen10g_no_soft_reset(struct phy_device *phydev); | |
1027 | int gen10g_config_init(struct phy_device *phydev); | |
1028 | int gen10g_suspend(struct phy_device *phydev); | |
1029 | int gen10g_resume(struct phy_device *phydev); | |
1030 | ||
00fde795 HK |
1031 | static inline int phy_read_status(struct phy_device *phydev) |
1032 | { | |
1033 | if (!phydev->drv) | |
1034 | return -EIO; | |
1035 | ||
1036 | if (phydev->drv->read_status) | |
1037 | return phydev->drv->read_status(phydev); | |
1038 | else | |
1039 | return genphy_read_status(phydev); | |
1040 | } | |
1041 | ||
00db8189 | 1042 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 1043 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
be01da72 AL |
1044 | int phy_driver_register(struct phy_driver *new_driver, struct module *owner); |
1045 | int phy_drivers_register(struct phy_driver *new_driver, int n, | |
1046 | struct module *owner); | |
4f9c85a1 | 1047 | void phy_state_machine(struct work_struct *work); |
28b2e0d2 | 1048 | void phy_mac_interrupt(struct phy_device *phydev); |
29935aeb | 1049 | void phy_start_machine(struct phy_device *phydev); |
00db8189 AF |
1050 | void phy_stop_machine(struct phy_device *phydev); |
1051 | int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
5514174f | 1052 | void phy_ethtool_ksettings_get(struct phy_device *phydev, |
1053 | struct ethtool_link_ksettings *cmd); | |
2d55173e PR |
1054 | int phy_ethtool_ksettings_set(struct phy_device *phydev, |
1055 | const struct ethtool_link_ksettings *cmd); | |
4017b4d3 | 1056 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
e1393456 AF |
1057 | int phy_start_interrupts(struct phy_device *phydev); |
1058 | void phy_print_status(struct phy_device *phydev); | |
f3a6bd39 | 1059 | int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); |
41124fa6 | 1060 | void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); |
c306ad36 | 1061 | void phy_support_sym_pause(struct phy_device *phydev); |
af8d9bb2 | 1062 | void phy_support_asym_pause(struct phy_device *phydev); |
0c122405 AL |
1063 | void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, |
1064 | bool autoneg); | |
70814e81 | 1065 | void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); |
22b7d299 AL |
1066 | bool phy_validate_pause(struct phy_device *phydev, |
1067 | struct ethtool_pauseparam *pp); | |
00db8189 | 1068 | |
f62220d3 | 1069 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1070 | int (*run)(struct phy_device *)); |
f62220d3 | 1071 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 1072 | int (*run)(struct phy_device *)); |
f62220d3 | 1073 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1074 | int (*run)(struct phy_device *)); |
f62220d3 | 1075 | |
f38e7a32 WH |
1076 | int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); |
1077 | int phy_unregister_fixup_for_id(const char *bus_id); | |
1078 | int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); | |
1079 | ||
a59a4d19 GC |
1080 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
1081 | int phy_get_eee_err(struct phy_device *phydev); | |
1082 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
1083 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
42e836eb | 1084 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
1085 | void phy_ethtool_get_wol(struct phy_device *phydev, |
1086 | struct ethtool_wolinfo *wol); | |
9d9a77ce PR |
1087 | int phy_ethtool_get_link_ksettings(struct net_device *ndev, |
1088 | struct ethtool_link_ksettings *cmd); | |
1089 | int phy_ethtool_set_link_ksettings(struct net_device *ndev, | |
1090 | const struct ethtool_link_ksettings *cmd); | |
e86a8987 | 1091 | int phy_ethtool_nway_reset(struct net_device *ndev); |
a59a4d19 | 1092 | |
90eff909 | 1093 | #if IS_ENABLED(CONFIG_PHYLIB) |
9b9a8bfc AF |
1094 | int __init mdio_bus_init(void); |
1095 | void mdio_bus_exit(void); | |
9e8d438e FF |
1096 | #endif |
1097 | ||
1098 | /* Inline function for use within net/core/ethtool.c (built-in) */ | |
1099 | static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) | |
c59530d0 | 1100 | { |
9e8d438e FF |
1101 | if (!phydev->drv) |
1102 | return -EIO; | |
1103 | ||
1104 | mutex_lock(&phydev->lock); | |
1105 | phydev->drv->get_strings(phydev, data); | |
1106 | mutex_unlock(&phydev->lock); | |
1107 | ||
1108 | return 0; | |
c59530d0 FF |
1109 | } |
1110 | ||
9e8d438e | 1111 | static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) |
c59530d0 | 1112 | { |
9e8d438e FF |
1113 | int ret; |
1114 | ||
1115 | if (!phydev->drv) | |
1116 | return -EIO; | |
1117 | ||
1118 | if (phydev->drv->get_sset_count && | |
1119 | phydev->drv->get_strings && | |
1120 | phydev->drv->get_stats) { | |
1121 | mutex_lock(&phydev->lock); | |
1122 | ret = phydev->drv->get_sset_count(phydev); | |
1123 | mutex_unlock(&phydev->lock); | |
1124 | ||
1125 | return ret; | |
1126 | } | |
1127 | ||
c59530d0 FF |
1128 | return -EOPNOTSUPP; |
1129 | } | |
1130 | ||
9e8d438e FF |
1131 | static inline int phy_ethtool_get_stats(struct phy_device *phydev, |
1132 | struct ethtool_stats *stats, u64 *data) | |
c59530d0 | 1133 | { |
9e8d438e FF |
1134 | if (!phydev->drv) |
1135 | return -EIO; | |
1136 | ||
1137 | mutex_lock(&phydev->lock); | |
1138 | phydev->drv->get_stats(phydev, stats, data); | |
1139 | mutex_unlock(&phydev->lock); | |
1140 | ||
1141 | return 0; | |
c59530d0 | 1142 | } |
9b9a8bfc | 1143 | |
00db8189 | 1144 | extern struct bus_type mdio_bus_type; |
c31accd1 | 1145 | |
648ea013 FF |
1146 | struct mdio_board_info { |
1147 | const char *bus_id; | |
1148 | char modalias[MDIO_NAME_SIZE]; | |
1149 | int mdio_addr; | |
1150 | const void *platform_data; | |
1151 | }; | |
1152 | ||
90eff909 | 1153 | #if IS_ENABLED(CONFIG_MDIO_DEVICE) |
648ea013 FF |
1154 | int mdiobus_register_board_info(const struct mdio_board_info *info, |
1155 | unsigned int n); | |
1156 | #else | |
1157 | static inline int mdiobus_register_board_info(const struct mdio_board_info *i, | |
1158 | unsigned int n) | |
1159 | { | |
1160 | return 0; | |
1161 | } | |
1162 | #endif | |
1163 | ||
1164 | ||
c31accd1 JH |
1165 | /** |
1166 | * module_phy_driver() - Helper macro for registering PHY drivers | |
1167 | * @__phy_drivers: array of PHY drivers to register | |
1168 | * | |
1169 | * Helper macro for PHY drivers which do not do anything special in module | |
1170 | * init/exit. Each module may only use this macro once, and calling it | |
1171 | * replaces module_init() and module_exit(). | |
1172 | */ | |
1173 | #define phy_module_driver(__phy_drivers, __count) \ | |
1174 | static int __init phy_module_init(void) \ | |
1175 | { \ | |
be01da72 | 1176 | return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ |
c31accd1 JH |
1177 | } \ |
1178 | module_init(phy_module_init); \ | |
1179 | static void __exit phy_module_exit(void) \ | |
1180 | { \ | |
1181 | phy_drivers_unregister(__phy_drivers, __count); \ | |
1182 | } \ | |
1183 | module_exit(phy_module_exit) | |
1184 | ||
1185 | #define module_phy_driver(__phy_drivers) \ | |
1186 | phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) | |
1187 | ||
00db8189 | 1188 | #endif /* __PHY_H */ |