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00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
b31cdffa 22#include <linux/linkmode.h>
bac83c65 23#include <linux/mdio.h>
13df29f6 24#include <linux/mii.h>
3e3aaf64 25#include <linux/module.h>
13df29f6
MR
26#include <linux/timer.h>
27#include <linux/workqueue.h>
8626d3b4 28#include <linux/mod_devicetable.h>
00db8189 29
60063497 30#include <linux/atomic.h>
0ac49527 31
e9fbdf17 32#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
00db8189
AF
33 SUPPORTED_TP | \
34 SUPPORTED_MII)
35
e9fbdf17
FF
36#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
37 SUPPORTED_10baseT_Full)
38
39#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
40 SUPPORTED_100baseT_Full)
41
42#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
00db8189
AF
43 SUPPORTED_1000baseT_Full)
44
719655a1
AL
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
52
53#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
54#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
55#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
56#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
57#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
58#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
59#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 60
c5e38a94
AF
61/*
62 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
AF
63 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
64 * the attached driver handles the interrupt
65 */
66#define PHY_POLL -1
67#define PHY_IGNORE_INTERRUPT -2
68
a4307c0e
HK
69#define PHY_IS_INTERNAL 0x00000001
70#define PHY_RST_AFTER_CLK_EN 0x00000002
a9049e0c 71#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 72
e8a2b6a4
AF
73/* Interface Mode definitions */
74typedef enum {
4157ef1b 75 PHY_INTERFACE_MODE_NA,
735d8a18 76 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
AF
77 PHY_INTERFACE_MODE_MII,
78 PHY_INTERFACE_MODE_GMII,
79 PHY_INTERFACE_MODE_SGMII,
80 PHY_INTERFACE_MODE_TBI,
2cc70ba4 81 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
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82 PHY_INTERFACE_MODE_RMII,
83 PHY_INTERFACE_MODE_RGMII,
a999589c 84 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
85 PHY_INTERFACE_MODE_RGMII_RXID,
86 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
87 PHY_INTERFACE_MODE_RTBI,
88 PHY_INTERFACE_MODE_SMII,
898dd0bd 89 PHY_INTERFACE_MODE_XGMII,
fd70f72c 90 PHY_INTERFACE_MODE_MOCA,
b9d12085 91 PHY_INTERFACE_MODE_QSGMII,
572de608 92 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
93 PHY_INTERFACE_MODE_1000BASEX,
94 PHY_INTERFACE_MODE_2500BASEX,
95 PHY_INTERFACE_MODE_RXAUI,
c125ca09
RK
96 PHY_INTERFACE_MODE_XAUI,
97 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
98 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 99 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
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100} phy_interface_t;
101
1f9127ca
ZB
102/**
103 * phy_supported_speeds - return all speeds currently supported by a phy device
104 * @phy: The phy device to return supported speeds of.
105 * @speeds: buffer to store supported speeds in.
106 * @size: size of speeds buffer.
107 *
108 * Description: Returns the number of supported speeds, and
109 * fills the speeds * buffer with the supported speeds. If speeds buffer is
110 * too small to contain * all currently supported speeds, will return as
111 * many speeds as can fit.
112 */
113unsigned int phy_supported_speeds(struct phy_device *phy,
114 unsigned int *speeds,
115 unsigned int size);
116
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FF
117/**
118 * It maps 'enum phy_interface_t' found in include/linux/phy.h
119 * into the device tree binding of 'phy-mode', so that Ethernet
120 * device driver can get phy interface from device tree.
121 */
122static inline const char *phy_modes(phy_interface_t interface)
123{
124 switch (interface) {
125 case PHY_INTERFACE_MODE_NA:
126 return "";
735d8a18
FF
127 case PHY_INTERFACE_MODE_INTERNAL:
128 return "internal";
8a2fe56e
FF
129 case PHY_INTERFACE_MODE_MII:
130 return "mii";
131 case PHY_INTERFACE_MODE_GMII:
132 return "gmii";
133 case PHY_INTERFACE_MODE_SGMII:
134 return "sgmii";
135 case PHY_INTERFACE_MODE_TBI:
136 return "tbi";
137 case PHY_INTERFACE_MODE_REVMII:
138 return "rev-mii";
139 case PHY_INTERFACE_MODE_RMII:
140 return "rmii";
141 case PHY_INTERFACE_MODE_RGMII:
142 return "rgmii";
143 case PHY_INTERFACE_MODE_RGMII_ID:
144 return "rgmii-id";
145 case PHY_INTERFACE_MODE_RGMII_RXID:
146 return "rgmii-rxid";
147 case PHY_INTERFACE_MODE_RGMII_TXID:
148 return "rgmii-txid";
149 case PHY_INTERFACE_MODE_RTBI:
150 return "rtbi";
151 case PHY_INTERFACE_MODE_SMII:
152 return "smii";
153 case PHY_INTERFACE_MODE_XGMII:
154 return "xgmii";
fd70f72c
FF
155 case PHY_INTERFACE_MODE_MOCA:
156 return "moca";
b9d12085
TP
157 case PHY_INTERFACE_MODE_QSGMII:
158 return "qsgmii";
572de608
SW
159 case PHY_INTERFACE_MODE_TRGMII:
160 return "trgmii";
55601a88
AL
161 case PHY_INTERFACE_MODE_1000BASEX:
162 return "1000base-x";
163 case PHY_INTERFACE_MODE_2500BASEX:
164 return "2500base-x";
165 case PHY_INTERFACE_MODE_RXAUI:
166 return "rxaui";
c125ca09
RK
167 case PHY_INTERFACE_MODE_XAUI:
168 return "xaui";
169 case PHY_INTERFACE_MODE_10GKR:
170 return "10gbase-kr";
8a2fe56e
FF
171 default:
172 return "unknown";
173 }
174}
175
00db8189 176
e8a2b6a4 177#define PHY_INIT_TIMEOUT 100000
00db8189
AF
178#define PHY_STATE_TIME 1
179#define PHY_FORCE_TIMEOUT 10
00db8189 180
e8a2b6a4 181#define PHY_MAX_ADDR 32
00db8189 182
a4d00f17 183/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
9d9326d3
AF
184#define PHY_ID_FMT "%s:%02x"
185
4567d686 186#define MII_BUS_ID_SIZE 61
a4d00f17 187
abf35df2
JG
188/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
189 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
190#define MII_ADDR_C45 (1<<30)
191
313162d0 192struct device;
9525ae83 193struct phylink;
313162d0
PG
194struct sk_buff;
195
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196/*
197 * The Bus class for PHYs. Devices which provide access to
198 * PHYs should register using this structure
199 */
00db8189 200struct mii_bus {
3e3aaf64 201 struct module *owner;
00db8189 202 const char *name;
9d9326d3 203 char id[MII_BUS_ID_SIZE];
00db8189 204 void *priv;
ccaa953e
AL
205 int (*read)(struct mii_bus *bus, int addr, int regnum);
206 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
00db8189
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207 int (*reset)(struct mii_bus *bus);
208
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209 /*
210 * A lock to ensure that only one thing can read/write
211 * the MDIO bus at a time
212 */
35b5f6b1 213 struct mutex mdio_lock;
00db8189 214
18ee49dd 215 struct device *parent;
46abc021
LB
216 enum {
217 MDIOBUS_ALLOCATED = 1,
218 MDIOBUS_REGISTERED,
219 MDIOBUS_UNREGISTERED,
220 MDIOBUS_RELEASED,
221 } state;
222 struct device dev;
00db8189
AF
223
224 /* list of all PHYs on bus */
7f854420 225 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 226
c6883996 227 /* PHY addresses to be ignored when probing */
f896424c
MP
228 u32 phy_mask;
229
922f2dd1
FF
230 /* PHY addresses to ignore the TA/read failure */
231 u32 phy_ignore_ta_mask;
232
c5e38a94 233 /*
e7f4dc35
AL
234 * An array of interrupts, each PHY's interrupt at the index
235 * matching its address
c5e38a94 236 */
e7f4dc35 237 int irq[PHY_MAX_ADDR];
69226896
RQ
238
239 /* GPIO reset pulse width in microseconds */
240 int reset_delay_us;
d396e84c
SS
241 /* RESET GPIO descriptor pointer */
242 struct gpio_desc *reset_gpiod;
00db8189 243};
46abc021 244#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 245
eb8a54a7
TT
246struct mii_bus *mdiobus_alloc_size(size_t);
247static inline struct mii_bus *mdiobus_alloc(void)
248{
249 return mdiobus_alloc_size(0);
250}
251
3e3aaf64
RK
252int __mdiobus_register(struct mii_bus *bus, struct module *owner);
253#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
2e888103
LB
254void mdiobus_unregister(struct mii_bus *bus);
255void mdiobus_free(struct mii_bus *bus);
6d48f44b
GS
256struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
257static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
258{
259 return devm_mdiobus_alloc_size(dev, 0);
260}
261
262void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 263struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 264
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HK
265#define PHY_INTERRUPT_DISABLED false
266#define PHY_INTERRUPT_ENABLED true
00db8189
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267
268/* PHY state machine states:
269 *
270 * DOWN: PHY device and driver are not ready for anything. probe
271 * should be called if and only if the PHY is in this state,
272 * given that the PHY device exists.
899a3cbb 273 * - PHY driver probe function will set the state to READY
00db8189
AF
274 *
275 * READY: PHY is ready to send and receive packets, but the
276 * controller is not. By default, PHYs which do not implement
899a3cbb 277 * probe will be set to this state by phy_probe().
00db8189
AF
278 * - start will set the state to UP
279 *
00db8189
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280 * UP: The PHY and attached device are ready to do work.
281 * Interrupts should be started here.
85a1f31d 282 * - timer moves to NOLINK or RUNNING
00db8189
AF
283 *
284 * NOLINK: PHY is up, but not currently plugged in.
8deeb630 285 * - irq or timer will set RUNNING if link comes back
00db8189
AF
286 * - phy_stop moves to HALTED
287 *
288 * FORCING: PHY is being configured with forced settings
289 * - if link is up, move to RUNNING
290 * - If link is down, we drop to the next highest setting, and
291 * retry (FORCING) after a timeout
292 * - phy_stop moves to HALTED
293 *
294 * RUNNING: PHY is currently up, running, and possibly sending
295 * and/or receiving packets
8deeb630 296 * - irq or timer will set NOLINK if link goes down
00db8189
AF
297 * - phy_stop moves to HALTED
298 *
299 * CHANGELINK: PHY experienced a change in link state
300 * - timer moves to RUNNING if link
301 * - timer moves to NOLINK if the link is down
302 * - phy_stop moves to HALTED
303 *
304 * HALTED: PHY is up, but no polling or interrupts are done. Or
305 * PHY is in an error state.
306 *
307 * - phy_start moves to RESUMING
308 *
309 * RESUMING: PHY was halted, but now wants to run again.
310 * - If we are forcing, or aneg is done, timer moves to RUNNING
311 * - If aneg is not done, timer moves to AN
312 * - phy_stop moves to HALTED
313 */
314enum phy_state {
4017b4d3 315 PHY_DOWN = 0,
00db8189 316 PHY_READY,
00db8189 317 PHY_UP,
00db8189
AF
318 PHY_RUNNING,
319 PHY_NOLINK,
320 PHY_FORCING,
321 PHY_CHANGELINK,
322 PHY_HALTED,
323 PHY_RESUMING
324};
325
ac28b9f8
DD
326/**
327 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
328 * @devices_in_package: Bit vector of devices present.
329 * @device_ids: The device identifer for each present device.
330 */
331struct phy_c45_device_ids {
332 u32 devices_in_package;
333 u32 device_ids[8];
334};
c1f19b51 335
00db8189
AF
336/* phy_device: An instance of a PHY
337 *
338 * drv: Pointer to the driver for this PHY instance
00db8189 339 * phy_id: UID for this device found during discovery
ac28b9f8
DD
340 * c45_ids: 802.3-c45 Device Identifers if is_c45.
341 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 342 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 343 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 344 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 345 * suspended: Set to true if this phy has been suspended successfully.
a3995460 346 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 347 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
348 * state: state of the PHY for management purposes
349 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
350 * link_timeout: The number of timer firings to wait before the
351 * giving up on the current attempt at acquiring a link
352 * irq: IRQ number of the PHY's interrupt (-1 if none)
353 * phy_timer: The timer for handling the state machine
00db8189
AF
354 * attached_dev: The attached enet driver's device instance ptr
355 * adjust_link: Callback for the enet controller to respond to
356 * changes in the link state.
00db8189 357 *
114002bc
FF
358 * speed, duplex, pause, supported, advertising, lp_advertising,
359 * and autoneg are used like in mii_if_info
00db8189
AF
360 *
361 * interrupts currently only supports enabled or disabled,
362 * but could be changed in the future to support enabling
363 * and disabling specific interrupts
364 *
365 * Contains some infrastructure for polling and interrupt
366 * handling, as well as handling shifts in PHY hardware state
367 */
368struct phy_device {
e5a03bfd
AL
369 struct mdio_device mdio;
370
00db8189
AF
371 /* Information about the PHY type */
372 /* And management functions */
373 struct phy_driver *drv;
374
00db8189
AF
375 u32 phy_id;
376
ac28b9f8 377 struct phy_c45_device_ids c45_ids;
87e5808d
HK
378 unsigned is_c45:1;
379 unsigned is_internal:1;
380 unsigned is_pseudo_fixed_link:1;
381 unsigned has_fixups:1;
382 unsigned suspended:1;
383 unsigned sysfs_links:1;
384 unsigned loopback_enabled:1;
385
386 unsigned autoneg:1;
387 /* The most recently read link state */
388 unsigned link:1;
ac28b9f8 389
695bce8f
HK
390 /* Interrupts are enabled */
391 unsigned interrupts:1;
392
00db8189
AF
393 enum phy_state state;
394
395 u32 dev_flags;
396
e8a2b6a4
AF
397 phy_interface_t interface;
398
c5e38a94
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399 /*
400 * forced speed & duplex (no autoneg)
00db8189
AF
401 * partner speed & duplex & pause (autoneg)
402 */
403 int speed;
404 int duplex;
405 int pause;
406 int asym_pause;
407
00db8189
AF
408 /* Union of PHY and Attached devices' supported modes */
409 /* See mii.h for more info */
410 u32 supported;
411 u32 advertising;
114002bc 412 u32 lp_advertising;
00db8189 413
d853d145 414 /* Energy efficient ethernet modes which should be prohibited */
415 u32 eee_broken_modes;
416
00db8189
AF
417 int link_timeout;
418
2e0bc452
ZB
419#ifdef CONFIG_LED_TRIGGER_PHY
420 struct phy_led_trigger *phy_led_triggers;
421 unsigned int phy_num_led_triggers;
422 struct phy_led_trigger *last_triggered;
3928ee64
MS
423
424 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
425#endif
426
c5e38a94
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427 /*
428 * Interrupt number for this PHY
429 * -1 means no interrupt
430 */
00db8189
AF
431 int irq;
432
433 /* private data pointer */
434 /* For use by PHYs to maintain extra state */
435 void *priv;
436
437 /* Interrupt and Polling infrastructure */
a390d1f3 438 struct delayed_work state_queue;
00db8189 439
35b5f6b1 440 struct mutex lock;
00db8189 441
9525ae83 442 struct phylink *phylink;
00db8189
AF
443 struct net_device *attached_dev;
444
634ec36c 445 u8 mdix;
f4ed2fe3 446 u8 mdix_ctrl;
634ec36c 447
a81497be 448 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 449 void (*adjust_link)(struct net_device *dev);
00db8189 450};
e5a03bfd
AL
451#define to_phy_device(d) container_of(to_mdio_device(d), \
452 struct phy_device, mdio)
00db8189
AF
453
454/* struct phy_driver: Driver structure for a particular PHY type
455 *
a9049e0c 456 * driver_data: static driver data
00db8189
AF
457 * phy_id: The result of reading the UID registers of this PHY
458 * type, and ANDing them with the phy_id_mask. This driver
459 * only works for PHYs with IDs which match this field
460 * name: The friendly name of this PHY type
461 * phy_id_mask: Defines the important bits of the phy_id
462 * features: A list of features (speed, duplex, etc) supported
463 * by this PHY
464 * flags: A bitfield defining certain other features this PHY
465 * supports (like interrupts)
466 *
00fde795
HK
467 * All functions are optional. If config_aneg or read_status
468 * are not implemented, the phy core uses the genphy versions.
469 * Note that none of these functions should be called from
470 * interrupt time. The goal is for the bus read/write functions
471 * to be able to block when the bus transaction is happening,
472 * and be freed up by an interrupt (The MPC85xx has this ability,
473 * though it is not currently supported in the driver).
00db8189
AF
474 */
475struct phy_driver {
a9049e0c 476 struct mdio_driver_common mdiodrv;
00db8189
AF
477 u32 phy_id;
478 char *name;
511e3036 479 u32 phy_id_mask;
719655a1 480 const unsigned long * const features;
00db8189 481 u32 flags;
860f6e9e 482 const void *driver_data;
00db8189 483
c5e38a94 484 /*
9df81dd7
FF
485 * Called to issue a PHY software reset
486 */
487 int (*soft_reset)(struct phy_device *phydev);
488
489 /*
c5e38a94
AF
490 * Called to initialize the PHY,
491 * including after a reset
492 */
00db8189
AF
493 int (*config_init)(struct phy_device *phydev);
494
c5e38a94
AF
495 /*
496 * Called during discovery. Used to set
497 * up device-specific structures, if any
498 */
00db8189
AF
499 int (*probe)(struct phy_device *phydev);
500
501 /* PHY Power Management */
502 int (*suspend)(struct phy_device *phydev);
503 int (*resume)(struct phy_device *phydev);
504
c5e38a94
AF
505 /*
506 * Configures the advertisement and resets
00db8189
AF
507 * autonegotiation if phydev->autoneg is on,
508 * forces the speed to the current settings in phydev
c5e38a94
AF
509 * if phydev->autoneg is off
510 */
00db8189
AF
511 int (*config_aneg)(struct phy_device *phydev);
512
76a423a3
FF
513 /* Determines the auto negotiation result */
514 int (*aneg_done)(struct phy_device *phydev);
515
00db8189
AF
516 /* Determines the negotiated speed and duplex */
517 int (*read_status)(struct phy_device *phydev);
518
519 /* Clears any pending interrupts */
520 int (*ack_interrupt)(struct phy_device *phydev);
521
522 /* Enables or disables interrupts */
523 int (*config_intr)(struct phy_device *phydev);
524
a8729eb3
AG
525 /*
526 * Checks if the PHY generated an interrupt.
527 * For multi-PHY devices with shared PHY interrupt pin
528 */
529 int (*did_interrupt)(struct phy_device *phydev);
530
00db8189
AF
531 /* Clears up any memory if needed */
532 void (*remove)(struct phy_device *phydev);
533
a30e2c18
DD
534 /* Returns true if this is a suitable driver for the given
535 * phydev. If NULL, matching is based on phy_id and
536 * phy_id_mask.
537 */
538 int (*match_phy_device)(struct phy_device *phydev);
539
c8f3a8c3
RC
540 /* Handles ethtool queries for hardware time stamping. */
541 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
542
c1f19b51
RC
543 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
544 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
545
546 /*
547 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
548 * the phy driver promises to deliver it using netif_rx() as
549 * soon as a timestamp becomes available. One of the
550 * PTP_CLASS_ values is passed in 'type'. The function must
551 * return true if the skb is accepted for delivery.
552 */
553 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
554
555 /*
556 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 557 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
558 * timestamp becomes available. One of the PTP_CLASS_ values
559 * is passed in 'type'.
560 */
561 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
562
42e836eb
MS
563 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
564 * enable Wake on LAN, so set_wol is provided to be called in the
565 * ethernet driver's set_wol function. */
566 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
567
568 /* See set_wol, but for checking whether Wake on LAN is enabled. */
569 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
570
2b8f2a28
DM
571 /*
572 * Called to inform a PHY device driver when the core is about to
573 * change the link state. This callback is supposed to be used as
574 * fixup hook for drivers that need to take action when the link
575 * state changes. Drivers are by no means allowed to mess with the
576 * PHY device structure in their implementations.
577 */
578 void (*link_change_notify)(struct phy_device *dev);
579
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RK
580 /*
581 * Phy specific driver override for reading a MMD register.
582 * This function is optional for PHY specific drivers. When
583 * not provided, the default MMD read function will be used
584 * by phy_read_mmd(), which will use either a direct read for
585 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
586 * devnum is the MMD device number within the PHY device,
587 * regnum is the register within the selected MMD device.
588 */
589 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
590
591 /*
592 * Phy specific driver override for writing a MMD register.
593 * This function is optional for PHY specific drivers. When
594 * not provided, the default MMD write function will be used
595 * by phy_write_mmd(), which will use either a direct write for
596 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
597 * devnum is the MMD device number within the PHY device,
598 * regnum is the register within the selected MMD device.
599 * val is the value to be written.
600 */
601 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
602 u16 val);
603
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RK
604 int (*read_page)(struct phy_device *dev);
605 int (*write_page)(struct phy_device *dev, int page);
606
2f438366
ES
607 /* Get the size and type of the eeprom contained within a plug-in
608 * module */
609 int (*module_info)(struct phy_device *dev,
610 struct ethtool_modinfo *modinfo);
611
612 /* Get the eeprom information from the plug-in module */
613 int (*module_eeprom)(struct phy_device *dev,
614 struct ethtool_eeprom *ee, u8 *data);
615
f3a40945
AL
616 /* Get statistics from the phy using ethtool */
617 int (*get_sset_count)(struct phy_device *dev);
618 void (*get_strings)(struct phy_device *dev, u8 *data);
619 void (*get_stats)(struct phy_device *dev,
620 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
621
622 /* Get and Set PHY tunables */
623 int (*get_tunable)(struct phy_device *dev,
624 struct ethtool_tunable *tuna, void *data);
625 int (*set_tunable)(struct phy_device *dev,
626 struct ethtool_tunable *tuna,
627 const void *data);
f0f9b4ed 628 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 629};
a9049e0c
AL
630#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
631 struct phy_driver, mdiodrv)
00db8189 632
f62220d3
AF
633#define PHY_ANY_ID "MATCH ANY PHY"
634#define PHY_ANY_UID 0xffffffff
635
aa2af2eb
HK
636#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
637#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
638#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
639
f62220d3
AF
640/* A Structure for boards to register fixups with the PHY Lib */
641struct phy_fixup {
642 struct list_head list;
4567d686 643 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
644 u32 phy_uid;
645 u32 phy_uid_mask;
646 int (*run)(struct phy_device *phydev);
647};
648
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RK
649const char *phy_speed_to_str(int speed);
650const char *phy_duplex_to_str(unsigned int duplex);
651
0ccb4fc6
RK
652/* A structure for mapping a particular speed and duplex
653 * combination to a particular SUPPORTED and ADVERTISED value
654 */
655struct phy_setting {
656 u32 speed;
657 u8 duplex;
658 u8 bit;
659};
660
661const struct phy_setting *
662phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
663 size_t maxbit, bool exact);
664size_t phy_speeds(unsigned int *speeds, size_t size,
665 unsigned long *mask, size_t maxbit);
666
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RK
667void phy_resolve_aneg_linkmode(struct phy_device *phydev);
668
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AF
669/**
670 * phy_read_mmd - Convenience function for reading a register
671 * from an MMD on a given PHY.
672 * @phydev: The phy_device struct
673 * @devad: The MMD to read from
674 * @regnum: The register on the MMD to read
675 *
676 * Same rules as for phy_read();
677 */
9860118b 678int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 679
2e888103
LB
680/**
681 * phy_read - Convenience function for reading a given PHY register
682 * @phydev: the phy_device struct
683 * @regnum: register number to read
684 *
685 * NOTE: MUST NOT be called from interrupt context,
686 * because the bus read/write functions may wait for an interrupt
687 * to conclude the operation.
688 */
abf35df2 689static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 690{
e5a03bfd 691 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
692}
693
788f9933
RK
694/**
695 * __phy_read - convenience function for reading a given PHY register
696 * @phydev: the phy_device struct
697 * @regnum: register number to read
698 *
699 * The caller must have taken the MDIO bus lock.
700 */
701static inline int __phy_read(struct phy_device *phydev, u32 regnum)
702{
703 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
704}
705
2e888103
LB
706/**
707 * phy_write - Convenience function for writing a given PHY register
708 * @phydev: the phy_device struct
709 * @regnum: register number to write
710 * @val: value to write to @regnum
711 *
712 * NOTE: MUST NOT be called from interrupt context,
713 * because the bus read/write functions may wait for an interrupt
714 * to conclude the operation.
715 */
abf35df2 716static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 717{
e5a03bfd 718 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
719}
720
788f9933
RK
721/**
722 * __phy_write - Convenience function for writing a given PHY register
723 * @phydev: the phy_device struct
724 * @regnum: register number to write
725 * @val: value to write to @regnum
726 *
727 * The caller must have taken the MDIO bus lock.
728 */
729static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
730{
731 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
732 val);
733}
734
735int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 736int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 737
ac8322d8
HK
738/**
739 * __phy_set_bits - Convenience function for setting bits in a PHY register
740 * @phydev: the phy_device struct
741 * @regnum: register number to write
742 * @val: bits to set
743 *
744 * The caller must have taken the MDIO bus lock.
745 */
746static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
747{
748 return __phy_modify(phydev, regnum, 0, val);
749}
750
751/**
752 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
753 * @phydev: the phy_device struct
754 * @regnum: register number to write
755 * @val: bits to clear
756 *
757 * The caller must have taken the MDIO bus lock.
758 */
759static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
760 u16 val)
761{
762 return __phy_modify(phydev, regnum, val, 0);
763}
764
765/**
766 * phy_set_bits - Convenience function for setting bits in a PHY register
767 * @phydev: the phy_device struct
768 * @regnum: register number to write
769 * @val: bits to set
770 */
771static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
772{
773 return phy_modify(phydev, regnum, 0, val);
774}
775
776/**
777 * phy_clear_bits - Convenience function for clearing bits in a PHY register
778 * @phydev: the phy_device struct
779 * @regnum: register number to write
780 * @val: bits to clear
781 */
782static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
783{
784 return phy_modify(phydev, regnum, val, 0);
785}
786
2c7b4921
FF
787/**
788 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
789 * @phydev: the phy_device struct
790 *
791 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
792 * PHY_IGNORE_INTERRUPT
793 */
794static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
795{
796 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
797}
798
3c507b8a
HK
799/**
800 * phy_polling_mode - Convenience function for testing whether polling is
801 * used to detect PHY status changes
802 * @phydev: the phy_device struct
803 */
804static inline bool phy_polling_mode(struct phy_device *phydev)
805{
806 return phydev->irq == PHY_POLL;
807}
808
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FF
809/**
810 * phy_is_internal - Convenience function for testing if a PHY is internal
811 * @phydev: the phy_device struct
812 */
813static inline bool phy_is_internal(struct phy_device *phydev)
814{
815 return phydev->is_internal;
816}
817
32d0f783
IS
818/**
819 * phy_interface_mode_is_rgmii - Convenience function for testing if a
820 * PHY interface mode is RGMII (all variants)
821 * @mode: the phy_interface_t enum
822 */
823static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
824{
825 return mode >= PHY_INTERFACE_MODE_RGMII &&
826 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
827};
828
365c1e64
RK
829/**
830 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
831 * negotiation
832 * @mode: one of &enum phy_interface_t
833 *
834 * Returns true if the phy interface mode uses the 16-bit negotiation
835 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
836 */
837static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
838{
839 return mode == PHY_INTERFACE_MODE_1000BASEX ||
840 mode == PHY_INTERFACE_MODE_2500BASEX;
841}
842
e463d88c
FF
843/**
844 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
845 * is RGMII (all variants)
846 * @phydev: the phy_device struct
847 */
848static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
849{
32d0f783 850 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
851};
852
853/*
854 * phy_is_pseudo_fixed_link - Convenience function for testing if this
855 * PHY is the CPU port facing side of an Ethernet switch, or similar.
856 * @phydev: the phy_device struct
857 */
858static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
859{
860 return phydev->is_pseudo_fixed_link;
e463d88c
FF
861}
862
efabdfb9
AF
863/**
864 * phy_write_mmd - Convenience function for writing a register
865 * on an MMD on a given PHY.
866 * @phydev: The phy_device struct
867 * @devad: The MMD to read from
868 * @regnum: The register on the MMD to read
869 * @val: value to write to @regnum
870 *
871 * Same rules as for phy_write();
872 */
9860118b 873int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 874
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RK
875int phy_save_page(struct phy_device *phydev);
876int phy_select_page(struct phy_device *phydev, int page);
877int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
878int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
879int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
880int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
881 u16 mask, u16 set);
882
ac28b9f8 883struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
884 bool is_c45,
885 struct phy_c45_device_ids *c45_ids);
90eff909 886#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 887struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 888int phy_device_register(struct phy_device *phy);
90eff909
FF
889void phy_device_free(struct phy_device *phydev);
890#else
891static inline
892struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
893{
894 return NULL;
895}
896
897static inline int phy_device_register(struct phy_device *phy)
898{
899 return 0;
900}
901
902static inline void phy_device_free(struct phy_device *phydev) { }
903#endif /* CONFIG_PHYLIB */
38737e49 904void phy_device_remove(struct phy_device *phydev);
2f5cb434 905int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
906int phy_suspend(struct phy_device *phydev);
907int phy_resume(struct phy_device *phydev);
9c2c2e62 908int __phy_resume(struct phy_device *phydev);
f0f9b4ed 909int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
910struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
911 phy_interface_t interface);
f8f76db1 912struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
913int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
914 u32 flags, phy_interface_t interface);
fa94f6d9 915int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
916 void (*handler)(struct net_device *),
917 phy_interface_t interface);
918struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
919 void (*handler)(struct net_device *),
920 phy_interface_t interface);
e1393456
AF
921void phy_disconnect(struct phy_device *phydev);
922void phy_detach(struct phy_device *phydev);
923void phy_start(struct phy_device *phydev);
924void phy_stop(struct phy_device *phydev);
925int phy_start_aneg(struct phy_device *phydev);
372788f9 926int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
927int phy_speed_down(struct phy_device *phydev, bool sync);
928int phy_speed_up(struct phy_device *phydev);
e1393456 929
e1393456 930int phy_stop_interrupts(struct phy_device *phydev);
002ba705 931int phy_restart_aneg(struct phy_device *phydev);
a9668491 932int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 933
bafbdd52
SS
934static inline void phy_device_reset(struct phy_device *phydev, int value)
935{
936 mdio_device_reset(&phydev->mdio, value);
937}
938
72ba48be 939#define phydev_err(_phydev, format, args...) \
e5a03bfd 940 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 941
c4fabb8b
AL
942#define phydev_info(_phydev, format, args...) \
943 dev_info(&_phydev->mdio.dev, format, ##args)
944
ab2a605f
AL
945#define phydev_warn(_phydev, format, args...) \
946 dev_warn(&_phydev->mdio.dev, format, ##args)
947
72ba48be 948#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 949 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 950
84eff6d1
AL
951static inline const char *phydev_name(const struct phy_device *phydev)
952{
e5a03bfd 953 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
954}
955
2220943a
AL
956void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
957 __printf(2, 3);
958void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
959
960/* Clause 22 PHY */
af6b6967 961int genphy_config_init(struct phy_device *phydev);
3fb69bca 962int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
963int genphy_restart_aneg(struct phy_device *phydev);
964int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 965int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
966int genphy_update_link(struct phy_device *phydev);
967int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
968int genphy_suspend(struct phy_device *phydev);
969int genphy_resume(struct phy_device *phydev);
f0f9b4ed 970int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 971int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
972static inline int genphy_no_soft_reset(struct phy_device *phydev)
973{
974 return 0;
975}
5df7af85
KH
976int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
977 u16 regnum);
978int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
979 u16 regnum, u16 val);
5acde34a
RK
980
981/* Clause 45 PHY */
982int genphy_c45_restart_aneg(struct phy_device *phydev);
983int genphy_c45_aneg_done(struct phy_device *phydev);
984int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
985int genphy_c45_read_lpa(struct phy_device *phydev);
986int genphy_c45_read_pma(struct phy_device *phydev);
987int genphy_c45_pma_setup_forced(struct phy_device *phydev);
988int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 989int genphy_c45_read_mdix(struct phy_device *phydev);
5acde34a 990
e8a714e0
FF
991/* The gen10g_* functions are the old Clause 45 stub */
992int gen10g_config_aneg(struct phy_device *phydev);
993int gen10g_read_status(struct phy_device *phydev);
994int gen10g_no_soft_reset(struct phy_device *phydev);
995int gen10g_config_init(struct phy_device *phydev);
996int gen10g_suspend(struct phy_device *phydev);
997int gen10g_resume(struct phy_device *phydev);
998
00fde795
HK
999static inline int phy_read_status(struct phy_device *phydev)
1000{
1001 if (!phydev->drv)
1002 return -EIO;
1003
1004 if (phydev->drv->read_status)
1005 return phydev->drv->read_status(phydev);
1006 else
1007 return genphy_read_status(phydev);
1008}
1009
00db8189 1010void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1011void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1012int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1013int phy_drivers_register(struct phy_driver *new_driver, int n,
1014 struct module *owner);
4f9c85a1 1015void phy_state_machine(struct work_struct *work);
28b2e0d2 1016void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1017void phy_start_machine(struct phy_device *phydev);
00db8189
AF
1018void phy_stop_machine(struct phy_device *phydev);
1019int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 1020void phy_ethtool_ksettings_get(struct phy_device *phydev,
1021 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1022int phy_ethtool_ksettings_set(struct phy_device *phydev,
1023 const struct ethtool_link_ksettings *cmd);
4017b4d3 1024int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
1025int phy_start_interrupts(struct phy_device *phydev);
1026void phy_print_status(struct phy_device *phydev);
f3a6bd39 1027int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1028void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
c306ad36 1029void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1030void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1031void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1032 bool autoneg);
70814e81 1033void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1034bool phy_validate_pause(struct phy_device *phydev,
1035 struct ethtool_pauseparam *pp);
00db8189 1036
f62220d3 1037int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1038 int (*run)(struct phy_device *));
f62220d3 1039int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1040 int (*run)(struct phy_device *));
f62220d3 1041int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1042 int (*run)(struct phy_device *));
f62220d3 1043
f38e7a32
WH
1044int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1045int phy_unregister_fixup_for_id(const char *bus_id);
1046int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1047
a59a4d19
GC
1048int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1049int phy_get_eee_err(struct phy_device *phydev);
1050int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1051int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1052int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1053void phy_ethtool_get_wol(struct phy_device *phydev,
1054 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1055int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1056 struct ethtool_link_ksettings *cmd);
1057int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1058 const struct ethtool_link_ksettings *cmd);
e86a8987 1059int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1060
90eff909 1061#if IS_ENABLED(CONFIG_PHYLIB)
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1062int __init mdio_bus_init(void);
1063void mdio_bus_exit(void);
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1064#endif
1065
1066/* Inline function for use within net/core/ethtool.c (built-in) */
1067static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1068{
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1069 if (!phydev->drv)
1070 return -EIO;
1071
1072 mutex_lock(&phydev->lock);
1073 phydev->drv->get_strings(phydev, data);
1074 mutex_unlock(&phydev->lock);
1075
1076 return 0;
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1077}
1078
9e8d438e 1079static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1080{
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1081 int ret;
1082
1083 if (!phydev->drv)
1084 return -EIO;
1085
1086 if (phydev->drv->get_sset_count &&
1087 phydev->drv->get_strings &&
1088 phydev->drv->get_stats) {
1089 mutex_lock(&phydev->lock);
1090 ret = phydev->drv->get_sset_count(phydev);
1091 mutex_unlock(&phydev->lock);
1092
1093 return ret;
1094 }
1095
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1096 return -EOPNOTSUPP;
1097}
1098
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1099static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1100 struct ethtool_stats *stats, u64 *data)
c59530d0 1101{
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1102 if (!phydev->drv)
1103 return -EIO;
1104
1105 mutex_lock(&phydev->lock);
1106 phydev->drv->get_stats(phydev, stats, data);
1107 mutex_unlock(&phydev->lock);
1108
1109 return 0;
c59530d0 1110}
9b9a8bfc 1111
00db8189 1112extern struct bus_type mdio_bus_type;
c31accd1 1113
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1114struct mdio_board_info {
1115 const char *bus_id;
1116 char modalias[MDIO_NAME_SIZE];
1117 int mdio_addr;
1118 const void *platform_data;
1119};
1120
90eff909 1121#if IS_ENABLED(CONFIG_MDIO_DEVICE)
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1122int mdiobus_register_board_info(const struct mdio_board_info *info,
1123 unsigned int n);
1124#else
1125static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1126 unsigned int n)
1127{
1128 return 0;
1129}
1130#endif
1131
1132
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1133/**
1134 * module_phy_driver() - Helper macro for registering PHY drivers
1135 * @__phy_drivers: array of PHY drivers to register
1136 *
1137 * Helper macro for PHY drivers which do not do anything special in module
1138 * init/exit. Each module may only use this macro once, and calling it
1139 * replaces module_init() and module_exit().
1140 */
1141#define phy_module_driver(__phy_drivers, __count) \
1142static int __init phy_module_init(void) \
1143{ \
be01da72 1144 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
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1145} \
1146module_init(phy_module_init); \
1147static void __exit phy_module_exit(void) \
1148{ \
1149 phy_drivers_unregister(__phy_drivers, __count); \
1150} \
1151module_exit(phy_module_exit)
1152
1153#define module_phy_driver(__phy_drivers) \
1154 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1155
00db8189 1156#endif /* __PHY_H */