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00db8189 | 1 | /* |
00db8189 AF |
2 | * Framework and drivers for configuring and reading different PHYs |
3 | * Based on code in sungem_phy.c and gianfar_phy.c | |
4 | * | |
5 | * Author: Andy Fleming | |
6 | * | |
7 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #ifndef __PHY_H | |
17 | #define __PHY_H | |
18 | ||
19 | #include <linux/spinlock.h> | |
13df29f6 MR |
20 | #include <linux/ethtool.h> |
21 | #include <linux/mii.h> | |
3e3aaf64 | 22 | #include <linux/module.h> |
13df29f6 MR |
23 | #include <linux/timer.h> |
24 | #include <linux/workqueue.h> | |
8626d3b4 | 25 | #include <linux/mod_devicetable.h> |
00db8189 | 26 | |
60063497 | 27 | #include <linux/atomic.h> |
0ac49527 | 28 | |
e9fbdf17 | 29 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
30 | SUPPORTED_TP | \ |
31 | SUPPORTED_MII) | |
32 | ||
e9fbdf17 FF |
33 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
34 | SUPPORTED_10baseT_Full) | |
35 | ||
36 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
37 | SUPPORTED_100baseT_Full) | |
38 | ||
39 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
40 | SUPPORTED_1000baseT_Full) |
41 | ||
e9fbdf17 FF |
42 | #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \ |
43 | PHY_100BT_FEATURES | \ | |
44 | PHY_DEFAULT_FEATURES) | |
45 | ||
46 | #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \ | |
47 | PHY_1000BT_FEATURES) | |
48 | ||
49 | ||
c5e38a94 AF |
50 | /* |
51 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
00db8189 AF |
52 | * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if |
53 | * the attached driver handles the interrupt | |
54 | */ | |
55 | #define PHY_POLL -1 | |
56 | #define PHY_IGNORE_INTERRUPT -2 | |
57 | ||
58 | #define PHY_HAS_INTERRUPT 0x00000001 | |
59 | #define PHY_HAS_MAGICANEG 0x00000002 | |
4284b6a5 | 60 | #define PHY_IS_INTERNAL 0x00000004 |
00db8189 | 61 | |
e8a2b6a4 AF |
62 | /* Interface Mode definitions */ |
63 | typedef enum { | |
4157ef1b | 64 | PHY_INTERFACE_MODE_NA, |
e8a2b6a4 AF |
65 | PHY_INTERFACE_MODE_MII, |
66 | PHY_INTERFACE_MODE_GMII, | |
67 | PHY_INTERFACE_MODE_SGMII, | |
68 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 69 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 AF |
70 | PHY_INTERFACE_MODE_RMII, |
71 | PHY_INTERFACE_MODE_RGMII, | |
a999589c | 72 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
73 | PHY_INTERFACE_MODE_RGMII_RXID, |
74 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
75 | PHY_INTERFACE_MODE_RTBI, |
76 | PHY_INTERFACE_MODE_SMII, | |
898dd0bd | 77 | PHY_INTERFACE_MODE_XGMII, |
fd70f72c | 78 | PHY_INTERFACE_MODE_MOCA, |
b9d12085 | 79 | PHY_INTERFACE_MODE_QSGMII, |
8a2fe56e | 80 | PHY_INTERFACE_MODE_MAX, |
e8a2b6a4 AF |
81 | } phy_interface_t; |
82 | ||
8a2fe56e FF |
83 | /** |
84 | * It maps 'enum phy_interface_t' found in include/linux/phy.h | |
85 | * into the device tree binding of 'phy-mode', so that Ethernet | |
86 | * device driver can get phy interface from device tree. | |
87 | */ | |
88 | static inline const char *phy_modes(phy_interface_t interface) | |
89 | { | |
90 | switch (interface) { | |
91 | case PHY_INTERFACE_MODE_NA: | |
92 | return ""; | |
93 | case PHY_INTERFACE_MODE_MII: | |
94 | return "mii"; | |
95 | case PHY_INTERFACE_MODE_GMII: | |
96 | return "gmii"; | |
97 | case PHY_INTERFACE_MODE_SGMII: | |
98 | return "sgmii"; | |
99 | case PHY_INTERFACE_MODE_TBI: | |
100 | return "tbi"; | |
101 | case PHY_INTERFACE_MODE_REVMII: | |
102 | return "rev-mii"; | |
103 | case PHY_INTERFACE_MODE_RMII: | |
104 | return "rmii"; | |
105 | case PHY_INTERFACE_MODE_RGMII: | |
106 | return "rgmii"; | |
107 | case PHY_INTERFACE_MODE_RGMII_ID: | |
108 | return "rgmii-id"; | |
109 | case PHY_INTERFACE_MODE_RGMII_RXID: | |
110 | return "rgmii-rxid"; | |
111 | case PHY_INTERFACE_MODE_RGMII_TXID: | |
112 | return "rgmii-txid"; | |
113 | case PHY_INTERFACE_MODE_RTBI: | |
114 | return "rtbi"; | |
115 | case PHY_INTERFACE_MODE_SMII: | |
116 | return "smii"; | |
117 | case PHY_INTERFACE_MODE_XGMII: | |
118 | return "xgmii"; | |
fd70f72c FF |
119 | case PHY_INTERFACE_MODE_MOCA: |
120 | return "moca"; | |
b9d12085 TP |
121 | case PHY_INTERFACE_MODE_QSGMII: |
122 | return "qsgmii"; | |
8a2fe56e FF |
123 | default: |
124 | return "unknown"; | |
125 | } | |
126 | } | |
127 | ||
00db8189 | 128 | |
e8a2b6a4 | 129 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 AF |
130 | #define PHY_STATE_TIME 1 |
131 | #define PHY_FORCE_TIMEOUT 10 | |
132 | #define PHY_AN_TIMEOUT 10 | |
133 | ||
e8a2b6a4 | 134 | #define PHY_MAX_ADDR 32 |
00db8189 | 135 | |
a4d00f17 | 136 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
137 | #define PHY_ID_FMT "%s:%02x" |
138 | ||
139 | /* | |
140 | * Need to be a little smaller than phydev->dev.bus_id to leave room | |
141 | * for the ":%02x" | |
142 | */ | |
8e401ecc | 143 | #define MII_BUS_ID_SIZE (20 - 3) |
a4d00f17 | 144 | |
abf35df2 JG |
145 | /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit |
146 | IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ | |
147 | #define MII_ADDR_C45 (1<<30) | |
148 | ||
313162d0 PG |
149 | struct device; |
150 | struct sk_buff; | |
151 | ||
c5e38a94 AF |
152 | /* |
153 | * The Bus class for PHYs. Devices which provide access to | |
154 | * PHYs should register using this structure | |
155 | */ | |
00db8189 | 156 | struct mii_bus { |
3e3aaf64 | 157 | struct module *owner; |
00db8189 | 158 | const char *name; |
9d9326d3 | 159 | char id[MII_BUS_ID_SIZE]; |
00db8189 AF |
160 | void *priv; |
161 | int (*read)(struct mii_bus *bus, int phy_id, int regnum); | |
162 | int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val); | |
163 | int (*reset)(struct mii_bus *bus); | |
164 | ||
c5e38a94 AF |
165 | /* |
166 | * A lock to ensure that only one thing can read/write | |
167 | * the MDIO bus at a time | |
168 | */ | |
35b5f6b1 | 169 | struct mutex mdio_lock; |
00db8189 | 170 | |
18ee49dd | 171 | struct device *parent; |
46abc021 LB |
172 | enum { |
173 | MDIOBUS_ALLOCATED = 1, | |
174 | MDIOBUS_REGISTERED, | |
175 | MDIOBUS_UNREGISTERED, | |
176 | MDIOBUS_RELEASED, | |
177 | } state; | |
178 | struct device dev; | |
00db8189 AF |
179 | |
180 | /* list of all PHYs on bus */ | |
181 | struct phy_device *phy_map[PHY_MAX_ADDR]; | |
182 | ||
c6883996 | 183 | /* PHY addresses to be ignored when probing */ |
f896424c MP |
184 | u32 phy_mask; |
185 | ||
922f2dd1 FF |
186 | /* PHY addresses to ignore the TA/read failure */ |
187 | u32 phy_ignore_ta_mask; | |
188 | ||
c5e38a94 AF |
189 | /* |
190 | * Pointer to an array of interrupts, each PHY's | |
191 | * interrupt at the index matching its address | |
192 | */ | |
00db8189 AF |
193 | int *irq; |
194 | }; | |
46abc021 | 195 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 196 | |
eb8a54a7 TT |
197 | struct mii_bus *mdiobus_alloc_size(size_t); |
198 | static inline struct mii_bus *mdiobus_alloc(void) | |
199 | { | |
200 | return mdiobus_alloc_size(0); | |
201 | } | |
202 | ||
3e3aaf64 RK |
203 | int __mdiobus_register(struct mii_bus *bus, struct module *owner); |
204 | #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) | |
2e888103 LB |
205 | void mdiobus_unregister(struct mii_bus *bus); |
206 | void mdiobus_free(struct mii_bus *bus); | |
6d48f44b GS |
207 | struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); |
208 | static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) | |
209 | { | |
210 | return devm_mdiobus_alloc_size(dev, 0); | |
211 | } | |
212 | ||
213 | void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); | |
2e888103 | 214 | struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); |
abf35df2 JG |
215 | int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum); |
216 | int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val); | |
2e888103 LB |
217 | |
218 | ||
e8a2b6a4 AF |
219 | #define PHY_INTERRUPT_DISABLED 0x0 |
220 | #define PHY_INTERRUPT_ENABLED 0x80000000 | |
00db8189 AF |
221 | |
222 | /* PHY state machine states: | |
223 | * | |
224 | * DOWN: PHY device and driver are not ready for anything. probe | |
225 | * should be called if and only if the PHY is in this state, | |
226 | * given that the PHY device exists. | |
227 | * - PHY driver probe function will, depending on the PHY, set | |
228 | * the state to STARTING or READY | |
229 | * | |
230 | * STARTING: PHY device is coming up, and the ethernet driver is | |
231 | * not ready. PHY drivers may set this in the probe function. | |
232 | * If they do, they are responsible for making sure the state is | |
233 | * eventually set to indicate whether the PHY is UP or READY, | |
234 | * depending on the state when the PHY is done starting up. | |
235 | * - PHY driver will set the state to READY | |
236 | * - start will set the state to PENDING | |
237 | * | |
238 | * READY: PHY is ready to send and receive packets, but the | |
239 | * controller is not. By default, PHYs which do not implement | |
240 | * probe will be set to this state by phy_probe(). If the PHY | |
241 | * driver knows the PHY is ready, and the PHY state is STARTING, | |
242 | * then it sets this STATE. | |
243 | * - start will set the state to UP | |
244 | * | |
245 | * PENDING: PHY device is coming up, but the ethernet driver is | |
246 | * ready. phy_start will set this state if the PHY state is | |
247 | * STARTING. | |
248 | * - PHY driver will set the state to UP when the PHY is ready | |
249 | * | |
250 | * UP: The PHY and attached device are ready to do work. | |
251 | * Interrupts should be started here. | |
252 | * - timer moves to AN | |
253 | * | |
254 | * AN: The PHY is currently negotiating the link state. Link is | |
255 | * therefore down for now. phy_timer will set this state when it | |
256 | * detects the state is UP. config_aneg will set this state | |
257 | * whenever called with phydev->autoneg set to AUTONEG_ENABLE. | |
258 | * - If autonegotiation finishes, but there's no link, it sets | |
259 | * the state to NOLINK. | |
260 | * - If aneg finishes with link, it sets the state to RUNNING, | |
261 | * and calls adjust_link | |
262 | * - If autonegotiation did not finish after an arbitrary amount | |
263 | * of time, autonegotiation should be tried again if the PHY | |
264 | * supports "magic" autonegotiation (back to AN) | |
265 | * - If it didn't finish, and no magic_aneg, move to FORCING. | |
266 | * | |
267 | * NOLINK: PHY is up, but not currently plugged in. | |
268 | * - If the timer notes that the link comes back, we move to RUNNING | |
269 | * - config_aneg moves to AN | |
270 | * - phy_stop moves to HALTED | |
271 | * | |
272 | * FORCING: PHY is being configured with forced settings | |
273 | * - if link is up, move to RUNNING | |
274 | * - If link is down, we drop to the next highest setting, and | |
275 | * retry (FORCING) after a timeout | |
276 | * - phy_stop moves to HALTED | |
277 | * | |
278 | * RUNNING: PHY is currently up, running, and possibly sending | |
279 | * and/or receiving packets | |
280 | * - timer will set CHANGELINK if we're polling (this ensures the | |
281 | * link state is polled every other cycle of this state machine, | |
282 | * which makes it every other second) | |
283 | * - irq will set CHANGELINK | |
284 | * - config_aneg will set AN | |
285 | * - phy_stop moves to HALTED | |
286 | * | |
287 | * CHANGELINK: PHY experienced a change in link state | |
288 | * - timer moves to RUNNING if link | |
289 | * - timer moves to NOLINK if the link is down | |
290 | * - phy_stop moves to HALTED | |
291 | * | |
292 | * HALTED: PHY is up, but no polling or interrupts are done. Or | |
293 | * PHY is in an error state. | |
294 | * | |
295 | * - phy_start moves to RESUMING | |
296 | * | |
297 | * RESUMING: PHY was halted, but now wants to run again. | |
298 | * - If we are forcing, or aneg is done, timer moves to RUNNING | |
299 | * - If aneg is not done, timer moves to AN | |
300 | * - phy_stop moves to HALTED | |
301 | */ | |
302 | enum phy_state { | |
4017b4d3 | 303 | PHY_DOWN = 0, |
00db8189 AF |
304 | PHY_STARTING, |
305 | PHY_READY, | |
306 | PHY_PENDING, | |
307 | PHY_UP, | |
308 | PHY_AN, | |
309 | PHY_RUNNING, | |
310 | PHY_NOLINK, | |
311 | PHY_FORCING, | |
312 | PHY_CHANGELINK, | |
313 | PHY_HALTED, | |
314 | PHY_RESUMING | |
315 | }; | |
316 | ||
ac28b9f8 DD |
317 | /** |
318 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
319 | * @devices_in_package: Bit vector of devices present. | |
320 | * @device_ids: The device identifer for each present device. | |
321 | */ | |
322 | struct phy_c45_device_ids { | |
323 | u32 devices_in_package; | |
324 | u32 device_ids[8]; | |
325 | }; | |
c1f19b51 | 326 | |
00db8189 AF |
327 | /* phy_device: An instance of a PHY |
328 | * | |
329 | * drv: Pointer to the driver for this PHY instance | |
330 | * bus: Pointer to the bus this PHY is on | |
331 | * dev: driver model device structure for this PHY | |
332 | * phy_id: UID for this device found during discovery | |
ac28b9f8 DD |
333 | * c45_ids: 802.3-c45 Device Identifers if is_c45. |
334 | * is_c45: Set to true if this phy uses clause 45 addressing. | |
4284b6a5 | 335 | * is_internal: Set to true if this phy is internal to a MAC. |
5a11dd7d | 336 | * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. |
aae88261 | 337 | * has_fixups: Set to true if this phy has fixups/quirks. |
8a477a6f | 338 | * suspended: Set to true if this phy has been suspended successfully. |
00db8189 AF |
339 | * state: state of the PHY for management purposes |
340 | * dev_flags: Device-specific flags used by the PHY driver. | |
341 | * addr: Bus address of PHY | |
342 | * link_timeout: The number of timer firings to wait before the | |
343 | * giving up on the current attempt at acquiring a link | |
344 | * irq: IRQ number of the PHY's interrupt (-1 if none) | |
345 | * phy_timer: The timer for handling the state machine | |
346 | * phy_queue: A work_queue for the interrupt | |
347 | * attached_dev: The attached enet driver's device instance ptr | |
348 | * adjust_link: Callback for the enet controller to respond to | |
349 | * changes in the link state. | |
00db8189 | 350 | * |
114002bc FF |
351 | * speed, duplex, pause, supported, advertising, lp_advertising, |
352 | * and autoneg are used like in mii_if_info | |
00db8189 AF |
353 | * |
354 | * interrupts currently only supports enabled or disabled, | |
355 | * but could be changed in the future to support enabling | |
356 | * and disabling specific interrupts | |
357 | * | |
358 | * Contains some infrastructure for polling and interrupt | |
359 | * handling, as well as handling shifts in PHY hardware state | |
360 | */ | |
361 | struct phy_device { | |
362 | /* Information about the PHY type */ | |
363 | /* And management functions */ | |
364 | struct phy_driver *drv; | |
365 | ||
366 | struct mii_bus *bus; | |
367 | ||
368 | struct device dev; | |
369 | ||
370 | u32 phy_id; | |
371 | ||
ac28b9f8 DD |
372 | struct phy_c45_device_ids c45_ids; |
373 | bool is_c45; | |
4284b6a5 | 374 | bool is_internal; |
5a11dd7d | 375 | bool is_pseudo_fixed_link; |
b0ae009f | 376 | bool has_fixups; |
8a477a6f | 377 | bool suspended; |
ac28b9f8 | 378 | |
00db8189 AF |
379 | enum phy_state state; |
380 | ||
381 | u32 dev_flags; | |
382 | ||
e8a2b6a4 AF |
383 | phy_interface_t interface; |
384 | ||
c6883996 | 385 | /* Bus address of the PHY (0-31) */ |
00db8189 AF |
386 | int addr; |
387 | ||
c5e38a94 AF |
388 | /* |
389 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
390 | * partner speed & duplex & pause (autoneg) |
391 | */ | |
392 | int speed; | |
393 | int duplex; | |
394 | int pause; | |
395 | int asym_pause; | |
396 | ||
397 | /* The most recently read link state */ | |
398 | int link; | |
399 | ||
400 | /* Enabled Interrupts */ | |
401 | u32 interrupts; | |
402 | ||
403 | /* Union of PHY and Attached devices' supported modes */ | |
404 | /* See mii.h for more info */ | |
405 | u32 supported; | |
406 | u32 advertising; | |
114002bc | 407 | u32 lp_advertising; |
00db8189 AF |
408 | |
409 | int autoneg; | |
410 | ||
411 | int link_timeout; | |
412 | ||
c5e38a94 AF |
413 | /* |
414 | * Interrupt number for this PHY | |
415 | * -1 means no interrupt | |
416 | */ | |
00db8189 AF |
417 | int irq; |
418 | ||
419 | /* private data pointer */ | |
420 | /* For use by PHYs to maintain extra state */ | |
421 | void *priv; | |
422 | ||
423 | /* Interrupt and Polling infrastructure */ | |
424 | struct work_struct phy_queue; | |
a390d1f3 | 425 | struct delayed_work state_queue; |
0ac49527 | 426 | atomic_t irq_disable; |
00db8189 | 427 | |
35b5f6b1 | 428 | struct mutex lock; |
00db8189 AF |
429 | |
430 | struct net_device *attached_dev; | |
431 | ||
634ec36c DT |
432 | u8 mdix; |
433 | ||
00db8189 | 434 | void (*adjust_link)(struct net_device *dev); |
00db8189 AF |
435 | }; |
436 | #define to_phy_device(d) container_of(d, struct phy_device, dev) | |
437 | ||
438 | /* struct phy_driver: Driver structure for a particular PHY type | |
439 | * | |
440 | * phy_id: The result of reading the UID registers of this PHY | |
441 | * type, and ANDing them with the phy_id_mask. This driver | |
442 | * only works for PHYs with IDs which match this field | |
443 | * name: The friendly name of this PHY type | |
444 | * phy_id_mask: Defines the important bits of the phy_id | |
445 | * features: A list of features (speed, duplex, etc) supported | |
446 | * by this PHY | |
447 | * flags: A bitfield defining certain other features this PHY | |
448 | * supports (like interrupts) | |
860f6e9e | 449 | * driver_data: static driver data |
00db8189 AF |
450 | * |
451 | * The drivers must implement config_aneg and read_status. All | |
452 | * other functions are optional. Note that none of these | |
453 | * functions should be called from interrupt time. The goal is | |
454 | * for the bus read/write functions to be able to block when the | |
455 | * bus transaction is happening, and be freed up by an interrupt | |
456 | * (The MPC85xx has this ability, though it is not currently | |
457 | * supported in the driver). | |
458 | */ | |
459 | struct phy_driver { | |
460 | u32 phy_id; | |
461 | char *name; | |
462 | unsigned int phy_id_mask; | |
463 | u32 features; | |
464 | u32 flags; | |
860f6e9e | 465 | const void *driver_data; |
00db8189 | 466 | |
c5e38a94 | 467 | /* |
9df81dd7 FF |
468 | * Called to issue a PHY software reset |
469 | */ | |
470 | int (*soft_reset)(struct phy_device *phydev); | |
471 | ||
472 | /* | |
c5e38a94 AF |
473 | * Called to initialize the PHY, |
474 | * including after a reset | |
475 | */ | |
00db8189 AF |
476 | int (*config_init)(struct phy_device *phydev); |
477 | ||
c5e38a94 AF |
478 | /* |
479 | * Called during discovery. Used to set | |
480 | * up device-specific structures, if any | |
481 | */ | |
00db8189 AF |
482 | int (*probe)(struct phy_device *phydev); |
483 | ||
484 | /* PHY Power Management */ | |
485 | int (*suspend)(struct phy_device *phydev); | |
486 | int (*resume)(struct phy_device *phydev); | |
487 | ||
c5e38a94 AF |
488 | /* |
489 | * Configures the advertisement and resets | |
00db8189 AF |
490 | * autonegotiation if phydev->autoneg is on, |
491 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
492 | * if phydev->autoneg is off |
493 | */ | |
00db8189 AF |
494 | int (*config_aneg)(struct phy_device *phydev); |
495 | ||
76a423a3 FF |
496 | /* Determines the auto negotiation result */ |
497 | int (*aneg_done)(struct phy_device *phydev); | |
498 | ||
00db8189 AF |
499 | /* Determines the negotiated speed and duplex */ |
500 | int (*read_status)(struct phy_device *phydev); | |
501 | ||
502 | /* Clears any pending interrupts */ | |
503 | int (*ack_interrupt)(struct phy_device *phydev); | |
504 | ||
505 | /* Enables or disables interrupts */ | |
506 | int (*config_intr)(struct phy_device *phydev); | |
507 | ||
a8729eb3 AG |
508 | /* |
509 | * Checks if the PHY generated an interrupt. | |
510 | * For multi-PHY devices with shared PHY interrupt pin | |
511 | */ | |
512 | int (*did_interrupt)(struct phy_device *phydev); | |
513 | ||
00db8189 AF |
514 | /* Clears up any memory if needed */ |
515 | void (*remove)(struct phy_device *phydev); | |
516 | ||
a30e2c18 DD |
517 | /* Returns true if this is a suitable driver for the given |
518 | * phydev. If NULL, matching is based on phy_id and | |
519 | * phy_id_mask. | |
520 | */ | |
521 | int (*match_phy_device)(struct phy_device *phydev); | |
522 | ||
c8f3a8c3 RC |
523 | /* Handles ethtool queries for hardware time stamping. */ |
524 | int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); | |
525 | ||
c1f19b51 RC |
526 | /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ |
527 | int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); | |
528 | ||
529 | /* | |
530 | * Requests a Rx timestamp for 'skb'. If the skb is accepted, | |
531 | * the phy driver promises to deliver it using netif_rx() as | |
532 | * soon as a timestamp becomes available. One of the | |
533 | * PTP_CLASS_ values is passed in 'type'. The function must | |
534 | * return true if the skb is accepted for delivery. | |
535 | */ | |
536 | bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
537 | ||
538 | /* | |
539 | * Requests a Tx timestamp for 'skb'. The phy driver promises | |
da92b194 | 540 | * to deliver it using skb_complete_tx_timestamp() as soon as a |
c1f19b51 RC |
541 | * timestamp becomes available. One of the PTP_CLASS_ values |
542 | * is passed in 'type'. | |
543 | */ | |
544 | void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
545 | ||
42e836eb MS |
546 | /* Some devices (e.g. qnap TS-119P II) require PHY register changes to |
547 | * enable Wake on LAN, so set_wol is provided to be called in the | |
548 | * ethernet driver's set_wol function. */ | |
549 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
550 | ||
551 | /* See set_wol, but for checking whether Wake on LAN is enabled. */ | |
552 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
553 | ||
2b8f2a28 DM |
554 | /* |
555 | * Called to inform a PHY device driver when the core is about to | |
556 | * change the link state. This callback is supposed to be used as | |
557 | * fixup hook for drivers that need to take action when the link | |
558 | * state changes. Drivers are by no means allowed to mess with the | |
559 | * PHY device structure in their implementations. | |
560 | */ | |
561 | void (*link_change_notify)(struct phy_device *dev); | |
562 | ||
0c1d77df VB |
563 | /* A function provided by a phy specific driver to override the |
564 | * the PHY driver framework support for reading a MMD register | |
565 | * from the PHY. If not supported, return -1. This function is | |
566 | * optional for PHY specific drivers, if not provided then the | |
567 | * default MMD read function is used by the PHY framework. | |
568 | */ | |
569 | int (*read_mmd_indirect)(struct phy_device *dev, int ptrad, | |
570 | int devnum, int regnum); | |
571 | ||
572 | /* A function provided by a phy specific driver to override the | |
573 | * the PHY driver framework support for writing a MMD register | |
574 | * from the PHY. This function is optional for PHY specific drivers, | |
575 | * if not provided then the default MMD read function is used by | |
576 | * the PHY framework. | |
577 | */ | |
578 | void (*write_mmd_indirect)(struct phy_device *dev, int ptrad, | |
579 | int devnum, int regnum, u32 val); | |
580 | ||
2f438366 ES |
581 | /* Get the size and type of the eeprom contained within a plug-in |
582 | * module */ | |
583 | int (*module_info)(struct phy_device *dev, | |
584 | struct ethtool_modinfo *modinfo); | |
585 | ||
586 | /* Get the eeprom information from the plug-in module */ | |
587 | int (*module_eeprom)(struct phy_device *dev, | |
588 | struct ethtool_eeprom *ee, u8 *data); | |
589 | ||
00db8189 AF |
590 | struct device_driver driver; |
591 | }; | |
592 | #define to_phy_driver(d) container_of(d, struct phy_driver, driver) | |
593 | ||
f62220d3 AF |
594 | #define PHY_ANY_ID "MATCH ANY PHY" |
595 | #define PHY_ANY_UID 0xffffffff | |
596 | ||
597 | /* A Structure for boards to register fixups with the PHY Lib */ | |
598 | struct phy_fixup { | |
599 | struct list_head list; | |
8e401ecc | 600 | char bus_id[20]; |
f62220d3 AF |
601 | u32 phy_uid; |
602 | u32 phy_uid_mask; | |
603 | int (*run)(struct phy_device *phydev); | |
604 | }; | |
605 | ||
efabdfb9 AF |
606 | /** |
607 | * phy_read_mmd - Convenience function for reading a register | |
608 | * from an MMD on a given PHY. | |
609 | * @phydev: The phy_device struct | |
610 | * @devad: The MMD to read from | |
611 | * @regnum: The register on the MMD to read | |
612 | * | |
613 | * Same rules as for phy_read(); | |
614 | */ | |
615 | static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) | |
616 | { | |
617 | if (!phydev->is_c45) | |
618 | return -EOPNOTSUPP; | |
619 | ||
620 | return mdiobus_read(phydev->bus, phydev->addr, | |
621 | MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff)); | |
622 | } | |
623 | ||
66ce7fb9 FF |
624 | /** |
625 | * phy_read_mmd_indirect - reads data from the MMD registers | |
626 | * @phydev: The PHY device bus | |
627 | * @prtad: MMD Address | |
628 | * @devad: MMD DEVAD | |
629 | * @addr: PHY address on the MII bus | |
630 | * | |
631 | * Description: it reads data from the MMD registers (clause 22 to access to | |
632 | * clause 45) of the specified phy address. | |
633 | */ | |
634 | int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, | |
635 | int devad, int addr); | |
636 | ||
2e888103 LB |
637 | /** |
638 | * phy_read - Convenience function for reading a given PHY register | |
639 | * @phydev: the phy_device struct | |
640 | * @regnum: register number to read | |
641 | * | |
642 | * NOTE: MUST NOT be called from interrupt context, | |
643 | * because the bus read/write functions may wait for an interrupt | |
644 | * to conclude the operation. | |
645 | */ | |
abf35df2 | 646 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 LB |
647 | { |
648 | return mdiobus_read(phydev->bus, phydev->addr, regnum); | |
649 | } | |
650 | ||
651 | /** | |
652 | * phy_write - Convenience function for writing a given PHY register | |
653 | * @phydev: the phy_device struct | |
654 | * @regnum: register number to write | |
655 | * @val: value to write to @regnum | |
656 | * | |
657 | * NOTE: MUST NOT be called from interrupt context, | |
658 | * because the bus read/write functions may wait for an interrupt | |
659 | * to conclude the operation. | |
660 | */ | |
abf35df2 | 661 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 LB |
662 | { |
663 | return mdiobus_write(phydev->bus, phydev->addr, regnum, val); | |
664 | } | |
665 | ||
2c7b4921 FF |
666 | /** |
667 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
668 | * @phydev: the phy_device struct | |
669 | * | |
670 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
671 | * PHY_IGNORE_INTERRUPT | |
672 | */ | |
673 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
674 | { | |
675 | return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; | |
676 | } | |
677 | ||
4284b6a5 FF |
678 | /** |
679 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
680 | * @phydev: the phy_device struct | |
681 | */ | |
682 | static inline bool phy_is_internal(struct phy_device *phydev) | |
683 | { | |
684 | return phydev->is_internal; | |
685 | } | |
686 | ||
e463d88c FF |
687 | /** |
688 | * phy_interface_is_rgmii - Convenience function for testing if a PHY interface | |
689 | * is RGMII (all variants) | |
690 | * @phydev: the phy_device struct | |
691 | */ | |
692 | static inline bool phy_interface_is_rgmii(struct phy_device *phydev) | |
693 | { | |
694 | return phydev->interface >= PHY_INTERFACE_MODE_RGMII && | |
695 | phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID; | |
5a11dd7d FF |
696 | }; |
697 | ||
698 | /* | |
699 | * phy_is_pseudo_fixed_link - Convenience function for testing if this | |
700 | * PHY is the CPU port facing side of an Ethernet switch, or similar. | |
701 | * @phydev: the phy_device struct | |
702 | */ | |
703 | static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) | |
704 | { | |
705 | return phydev->is_pseudo_fixed_link; | |
e463d88c FF |
706 | } |
707 | ||
efabdfb9 AF |
708 | /** |
709 | * phy_write_mmd - Convenience function for writing a register | |
710 | * on an MMD on a given PHY. | |
711 | * @phydev: The phy_device struct | |
712 | * @devad: The MMD to read from | |
713 | * @regnum: The register on the MMD to read | |
714 | * @val: value to write to @regnum | |
715 | * | |
716 | * Same rules as for phy_write(); | |
717 | */ | |
718 | static inline int phy_write_mmd(struct phy_device *phydev, int devad, | |
719 | u32 regnum, u16 val) | |
720 | { | |
721 | if (!phydev->is_c45) | |
722 | return -EOPNOTSUPP; | |
723 | ||
724 | regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff); | |
725 | ||
726 | return mdiobus_write(phydev->bus, phydev->addr, regnum, val); | |
727 | } | |
728 | ||
66ce7fb9 FF |
729 | /** |
730 | * phy_write_mmd_indirect - writes data to the MMD registers | |
731 | * @phydev: The PHY device | |
732 | * @prtad: MMD Address | |
733 | * @devad: MMD DEVAD | |
734 | * @addr: PHY address on the MII bus | |
735 | * @data: data to write in the MMD register | |
736 | * | |
737 | * Description: Write data from the MMD registers of the specified | |
738 | * phy address. | |
739 | */ | |
740 | void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, | |
741 | int devad, int addr, u32 data); | |
742 | ||
ac28b9f8 | 743 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, |
4017b4d3 SS |
744 | bool is_c45, |
745 | struct phy_c45_device_ids *c45_ids); | |
ac28b9f8 | 746 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 747 | int phy_device_register(struct phy_device *phy); |
2f5cb434 | 748 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
749 | int phy_suspend(struct phy_device *phydev); |
750 | int phy_resume(struct phy_device *phydev); | |
4017b4d3 SS |
751 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
752 | phy_interface_t interface); | |
f8f76db1 | 753 | struct phy_device *phy_find_first(struct mii_bus *bus); |
257184d7 AF |
754 | int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, |
755 | u32 flags, phy_interface_t interface); | |
fa94f6d9 | 756 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
757 | void (*handler)(struct net_device *), |
758 | phy_interface_t interface); | |
759 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
760 | void (*handler)(struct net_device *), | |
761 | phy_interface_t interface); | |
e1393456 AF |
762 | void phy_disconnect(struct phy_device *phydev); |
763 | void phy_detach(struct phy_device *phydev); | |
764 | void phy_start(struct phy_device *phydev); | |
765 | void phy_stop(struct phy_device *phydev); | |
766 | int phy_start_aneg(struct phy_device *phydev); | |
767 | ||
e1393456 | 768 | int phy_stop_interrupts(struct phy_device *phydev); |
00db8189 | 769 | |
4017b4d3 SS |
770 | static inline int phy_read_status(struct phy_device *phydev) |
771 | { | |
00db8189 AF |
772 | return phydev->drv->read_status(phydev); |
773 | } | |
774 | ||
af6b6967 | 775 | int genphy_config_init(struct phy_device *phydev); |
3fb69bca | 776 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 AF |
777 | int genphy_restart_aneg(struct phy_device *phydev); |
778 | int genphy_config_aneg(struct phy_device *phydev); | |
a9fa6e6a | 779 | int genphy_aneg_done(struct phy_device *phydev); |
00db8189 AF |
780 | int genphy_update_link(struct phy_device *phydev); |
781 | int genphy_read_status(struct phy_device *phydev); | |
0f0ca340 GC |
782 | int genphy_suspend(struct phy_device *phydev); |
783 | int genphy_resume(struct phy_device *phydev); | |
797ac071 | 784 | int genphy_soft_reset(struct phy_device *phydev); |
00db8189 | 785 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 786 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
00db8189 | 787 | int phy_driver_register(struct phy_driver *new_driver); |
d5bf9071 | 788 | int phy_drivers_register(struct phy_driver *new_driver, int n); |
4f9c85a1 | 789 | void phy_state_machine(struct work_struct *work); |
5ea94e76 FF |
790 | void phy_change(struct work_struct *work); |
791 | void phy_mac_interrupt(struct phy_device *phydev, int new_link); | |
29935aeb | 792 | void phy_start_machine(struct phy_device *phydev); |
00db8189 AF |
793 | void phy_stop_machine(struct phy_device *phydev); |
794 | int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
795 | int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
4017b4d3 | 796 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
e1393456 AF |
797 | int phy_start_interrupts(struct phy_device *phydev); |
798 | void phy_print_status(struct phy_device *phydev); | |
6f4a7f41 | 799 | void phy_device_free(struct phy_device *phydev); |
00db8189 | 800 | |
f62220d3 | 801 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 802 | int (*run)(struct phy_device *)); |
f62220d3 | 803 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 804 | int (*run)(struct phy_device *)); |
f62220d3 | 805 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 806 | int (*run)(struct phy_device *)); |
f62220d3 | 807 | |
a59a4d19 GC |
808 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
809 | int phy_get_eee_err(struct phy_device *phydev); | |
810 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
811 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
42e836eb | 812 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
813 | void phy_ethtool_get_wol(struct phy_device *phydev, |
814 | struct ethtool_wolinfo *wol); | |
a59a4d19 | 815 | |
9b9a8bfc AF |
816 | int __init mdio_bus_init(void); |
817 | void mdio_bus_exit(void); | |
818 | ||
00db8189 | 819 | extern struct bus_type mdio_bus_type; |
c31accd1 JH |
820 | |
821 | /** | |
822 | * module_phy_driver() - Helper macro for registering PHY drivers | |
823 | * @__phy_drivers: array of PHY drivers to register | |
824 | * | |
825 | * Helper macro for PHY drivers which do not do anything special in module | |
826 | * init/exit. Each module may only use this macro once, and calling it | |
827 | * replaces module_init() and module_exit(). | |
828 | */ | |
829 | #define phy_module_driver(__phy_drivers, __count) \ | |
830 | static int __init phy_module_init(void) \ | |
831 | { \ | |
832 | return phy_drivers_register(__phy_drivers, __count); \ | |
833 | } \ | |
834 | module_init(phy_module_init); \ | |
835 | static void __exit phy_module_exit(void) \ | |
836 | { \ | |
837 | phy_drivers_unregister(__phy_drivers, __count); \ | |
838 | } \ | |
839 | module_exit(phy_module_exit) | |
840 | ||
841 | #define module_phy_driver(__phy_drivers) \ | |
842 | phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) | |
843 | ||
00db8189 | 844 | #endif /* __PHY_H */ |