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00db8189 | 1 | /* |
00db8189 AF |
2 | * Framework and drivers for configuring and reading different PHYs |
3 | * Based on code in sungem_phy.c and gianfar_phy.c | |
4 | * | |
5 | * Author: Andy Fleming | |
6 | * | |
7 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #ifndef __PHY_H | |
17 | #define __PHY_H | |
18 | ||
19 | #include <linux/spinlock.h> | |
13df29f6 MR |
20 | #include <linux/ethtool.h> |
21 | #include <linux/mii.h> | |
22 | #include <linux/timer.h> | |
23 | #include <linux/workqueue.h> | |
8626d3b4 | 24 | #include <linux/mod_devicetable.h> |
00db8189 | 25 | |
60063497 | 26 | #include <linux/atomic.h> |
0ac49527 | 27 | |
e9fbdf17 | 28 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
29 | SUPPORTED_TP | \ |
30 | SUPPORTED_MII) | |
31 | ||
e9fbdf17 FF |
32 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
33 | SUPPORTED_10baseT_Full) | |
34 | ||
35 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
36 | SUPPORTED_100baseT_Full) | |
37 | ||
38 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
39 | SUPPORTED_1000baseT_Full) |
40 | ||
e9fbdf17 FF |
41 | #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \ |
42 | PHY_100BT_FEATURES | \ | |
43 | PHY_DEFAULT_FEATURES) | |
44 | ||
45 | #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \ | |
46 | PHY_1000BT_FEATURES) | |
47 | ||
48 | ||
c5e38a94 AF |
49 | /* |
50 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
00db8189 AF |
51 | * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if |
52 | * the attached driver handles the interrupt | |
53 | */ | |
54 | #define PHY_POLL -1 | |
55 | #define PHY_IGNORE_INTERRUPT -2 | |
56 | ||
57 | #define PHY_HAS_INTERRUPT 0x00000001 | |
58 | #define PHY_HAS_MAGICANEG 0x00000002 | |
4284b6a5 | 59 | #define PHY_IS_INTERNAL 0x00000004 |
00db8189 | 60 | |
e8a2b6a4 AF |
61 | /* Interface Mode definitions */ |
62 | typedef enum { | |
4157ef1b | 63 | PHY_INTERFACE_MODE_NA, |
e8a2b6a4 AF |
64 | PHY_INTERFACE_MODE_MII, |
65 | PHY_INTERFACE_MODE_GMII, | |
66 | PHY_INTERFACE_MODE_SGMII, | |
67 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 68 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 AF |
69 | PHY_INTERFACE_MODE_RMII, |
70 | PHY_INTERFACE_MODE_RGMII, | |
a999589c | 71 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
72 | PHY_INTERFACE_MODE_RGMII_RXID, |
73 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
74 | PHY_INTERFACE_MODE_RTBI, |
75 | PHY_INTERFACE_MODE_SMII, | |
e8a2b6a4 AF |
76 | } phy_interface_t; |
77 | ||
00db8189 | 78 | |
e8a2b6a4 | 79 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 AF |
80 | #define PHY_STATE_TIME 1 |
81 | #define PHY_FORCE_TIMEOUT 10 | |
82 | #define PHY_AN_TIMEOUT 10 | |
83 | ||
e8a2b6a4 | 84 | #define PHY_MAX_ADDR 32 |
00db8189 | 85 | |
a4d00f17 | 86 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
87 | #define PHY_ID_FMT "%s:%02x" |
88 | ||
89 | /* | |
90 | * Need to be a little smaller than phydev->dev.bus_id to leave room | |
91 | * for the ":%02x" | |
92 | */ | |
8e401ecc | 93 | #define MII_BUS_ID_SIZE (20 - 3) |
a4d00f17 | 94 | |
abf35df2 JG |
95 | /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit |
96 | IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ | |
97 | #define MII_ADDR_C45 (1<<30) | |
98 | ||
313162d0 PG |
99 | struct device; |
100 | struct sk_buff; | |
101 | ||
c5e38a94 AF |
102 | /* |
103 | * The Bus class for PHYs. Devices which provide access to | |
104 | * PHYs should register using this structure | |
105 | */ | |
00db8189 AF |
106 | struct mii_bus { |
107 | const char *name; | |
9d9326d3 | 108 | char id[MII_BUS_ID_SIZE]; |
00db8189 AF |
109 | void *priv; |
110 | int (*read)(struct mii_bus *bus, int phy_id, int regnum); | |
111 | int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val); | |
112 | int (*reset)(struct mii_bus *bus); | |
113 | ||
c5e38a94 AF |
114 | /* |
115 | * A lock to ensure that only one thing can read/write | |
116 | * the MDIO bus at a time | |
117 | */ | |
35b5f6b1 | 118 | struct mutex mdio_lock; |
00db8189 | 119 | |
18ee49dd | 120 | struct device *parent; |
46abc021 LB |
121 | enum { |
122 | MDIOBUS_ALLOCATED = 1, | |
123 | MDIOBUS_REGISTERED, | |
124 | MDIOBUS_UNREGISTERED, | |
125 | MDIOBUS_RELEASED, | |
126 | } state; | |
127 | struct device dev; | |
00db8189 AF |
128 | |
129 | /* list of all PHYs on bus */ | |
130 | struct phy_device *phy_map[PHY_MAX_ADDR]; | |
131 | ||
c6883996 | 132 | /* PHY addresses to be ignored when probing */ |
f896424c MP |
133 | u32 phy_mask; |
134 | ||
c5e38a94 AF |
135 | /* |
136 | * Pointer to an array of interrupts, each PHY's | |
137 | * interrupt at the index matching its address | |
138 | */ | |
00db8189 AF |
139 | int *irq; |
140 | }; | |
46abc021 | 141 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 142 | |
eb8a54a7 TT |
143 | struct mii_bus *mdiobus_alloc_size(size_t); |
144 | static inline struct mii_bus *mdiobus_alloc(void) | |
145 | { | |
146 | return mdiobus_alloc_size(0); | |
147 | } | |
148 | ||
2e888103 LB |
149 | int mdiobus_register(struct mii_bus *bus); |
150 | void mdiobus_unregister(struct mii_bus *bus); | |
151 | void mdiobus_free(struct mii_bus *bus); | |
152 | struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); | |
abf35df2 JG |
153 | int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum); |
154 | int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val); | |
2e888103 LB |
155 | |
156 | ||
e8a2b6a4 AF |
157 | #define PHY_INTERRUPT_DISABLED 0x0 |
158 | #define PHY_INTERRUPT_ENABLED 0x80000000 | |
00db8189 AF |
159 | |
160 | /* PHY state machine states: | |
161 | * | |
162 | * DOWN: PHY device and driver are not ready for anything. probe | |
163 | * should be called if and only if the PHY is in this state, | |
164 | * given that the PHY device exists. | |
165 | * - PHY driver probe function will, depending on the PHY, set | |
166 | * the state to STARTING or READY | |
167 | * | |
168 | * STARTING: PHY device is coming up, and the ethernet driver is | |
169 | * not ready. PHY drivers may set this in the probe function. | |
170 | * If they do, they are responsible for making sure the state is | |
171 | * eventually set to indicate whether the PHY is UP or READY, | |
172 | * depending on the state when the PHY is done starting up. | |
173 | * - PHY driver will set the state to READY | |
174 | * - start will set the state to PENDING | |
175 | * | |
176 | * READY: PHY is ready to send and receive packets, but the | |
177 | * controller is not. By default, PHYs which do not implement | |
178 | * probe will be set to this state by phy_probe(). If the PHY | |
179 | * driver knows the PHY is ready, and the PHY state is STARTING, | |
180 | * then it sets this STATE. | |
181 | * - start will set the state to UP | |
182 | * | |
183 | * PENDING: PHY device is coming up, but the ethernet driver is | |
184 | * ready. phy_start will set this state if the PHY state is | |
185 | * STARTING. | |
186 | * - PHY driver will set the state to UP when the PHY is ready | |
187 | * | |
188 | * UP: The PHY and attached device are ready to do work. | |
189 | * Interrupts should be started here. | |
190 | * - timer moves to AN | |
191 | * | |
192 | * AN: The PHY is currently negotiating the link state. Link is | |
193 | * therefore down for now. phy_timer will set this state when it | |
194 | * detects the state is UP. config_aneg will set this state | |
195 | * whenever called with phydev->autoneg set to AUTONEG_ENABLE. | |
196 | * - If autonegotiation finishes, but there's no link, it sets | |
197 | * the state to NOLINK. | |
198 | * - If aneg finishes with link, it sets the state to RUNNING, | |
199 | * and calls adjust_link | |
200 | * - If autonegotiation did not finish after an arbitrary amount | |
201 | * of time, autonegotiation should be tried again if the PHY | |
202 | * supports "magic" autonegotiation (back to AN) | |
203 | * - If it didn't finish, and no magic_aneg, move to FORCING. | |
204 | * | |
205 | * NOLINK: PHY is up, but not currently plugged in. | |
206 | * - If the timer notes that the link comes back, we move to RUNNING | |
207 | * - config_aneg moves to AN | |
208 | * - phy_stop moves to HALTED | |
209 | * | |
210 | * FORCING: PHY is being configured with forced settings | |
211 | * - if link is up, move to RUNNING | |
212 | * - If link is down, we drop to the next highest setting, and | |
213 | * retry (FORCING) after a timeout | |
214 | * - phy_stop moves to HALTED | |
215 | * | |
216 | * RUNNING: PHY is currently up, running, and possibly sending | |
217 | * and/or receiving packets | |
218 | * - timer will set CHANGELINK if we're polling (this ensures the | |
219 | * link state is polled every other cycle of this state machine, | |
220 | * which makes it every other second) | |
221 | * - irq will set CHANGELINK | |
222 | * - config_aneg will set AN | |
223 | * - phy_stop moves to HALTED | |
224 | * | |
225 | * CHANGELINK: PHY experienced a change in link state | |
226 | * - timer moves to RUNNING if link | |
227 | * - timer moves to NOLINK if the link is down | |
228 | * - phy_stop moves to HALTED | |
229 | * | |
230 | * HALTED: PHY is up, but no polling or interrupts are done. Or | |
231 | * PHY is in an error state. | |
232 | * | |
233 | * - phy_start moves to RESUMING | |
234 | * | |
235 | * RESUMING: PHY was halted, but now wants to run again. | |
236 | * - If we are forcing, or aneg is done, timer moves to RUNNING | |
237 | * - If aneg is not done, timer moves to AN | |
238 | * - phy_stop moves to HALTED | |
239 | */ | |
240 | enum phy_state { | |
4017b4d3 | 241 | PHY_DOWN = 0, |
00db8189 AF |
242 | PHY_STARTING, |
243 | PHY_READY, | |
244 | PHY_PENDING, | |
245 | PHY_UP, | |
246 | PHY_AN, | |
247 | PHY_RUNNING, | |
248 | PHY_NOLINK, | |
249 | PHY_FORCING, | |
250 | PHY_CHANGELINK, | |
251 | PHY_HALTED, | |
252 | PHY_RESUMING | |
253 | }; | |
254 | ||
ac28b9f8 DD |
255 | /** |
256 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
257 | * @devices_in_package: Bit vector of devices present. | |
258 | * @device_ids: The device identifer for each present device. | |
259 | */ | |
260 | struct phy_c45_device_ids { | |
261 | u32 devices_in_package; | |
262 | u32 device_ids[8]; | |
263 | }; | |
c1f19b51 | 264 | |
00db8189 AF |
265 | /* phy_device: An instance of a PHY |
266 | * | |
267 | * drv: Pointer to the driver for this PHY instance | |
268 | * bus: Pointer to the bus this PHY is on | |
269 | * dev: driver model device structure for this PHY | |
270 | * phy_id: UID for this device found during discovery | |
ac28b9f8 DD |
271 | * c45_ids: 802.3-c45 Device Identifers if is_c45. |
272 | * is_c45: Set to true if this phy uses clause 45 addressing. | |
4284b6a5 | 273 | * is_internal: Set to true if this phy is internal to a MAC. |
00db8189 AF |
274 | * state: state of the PHY for management purposes |
275 | * dev_flags: Device-specific flags used by the PHY driver. | |
276 | * addr: Bus address of PHY | |
277 | * link_timeout: The number of timer firings to wait before the | |
278 | * giving up on the current attempt at acquiring a link | |
279 | * irq: IRQ number of the PHY's interrupt (-1 if none) | |
280 | * phy_timer: The timer for handling the state machine | |
281 | * phy_queue: A work_queue for the interrupt | |
282 | * attached_dev: The attached enet driver's device instance ptr | |
283 | * adjust_link: Callback for the enet controller to respond to | |
284 | * changes in the link state. | |
00db8189 | 285 | * |
114002bc FF |
286 | * speed, duplex, pause, supported, advertising, lp_advertising, |
287 | * and autoneg are used like in mii_if_info | |
00db8189 AF |
288 | * |
289 | * interrupts currently only supports enabled or disabled, | |
290 | * but could be changed in the future to support enabling | |
291 | * and disabling specific interrupts | |
292 | * | |
293 | * Contains some infrastructure for polling and interrupt | |
294 | * handling, as well as handling shifts in PHY hardware state | |
295 | */ | |
296 | struct phy_device { | |
297 | /* Information about the PHY type */ | |
298 | /* And management functions */ | |
299 | struct phy_driver *drv; | |
300 | ||
301 | struct mii_bus *bus; | |
302 | ||
303 | struct device dev; | |
304 | ||
305 | u32 phy_id; | |
306 | ||
ac28b9f8 DD |
307 | struct phy_c45_device_ids c45_ids; |
308 | bool is_c45; | |
4284b6a5 | 309 | bool is_internal; |
ac28b9f8 | 310 | |
00db8189 AF |
311 | enum phy_state state; |
312 | ||
313 | u32 dev_flags; | |
314 | ||
e8a2b6a4 AF |
315 | phy_interface_t interface; |
316 | ||
c6883996 | 317 | /* Bus address of the PHY (0-31) */ |
00db8189 AF |
318 | int addr; |
319 | ||
c5e38a94 AF |
320 | /* |
321 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
322 | * partner speed & duplex & pause (autoneg) |
323 | */ | |
324 | int speed; | |
325 | int duplex; | |
326 | int pause; | |
327 | int asym_pause; | |
328 | ||
329 | /* The most recently read link state */ | |
330 | int link; | |
331 | ||
332 | /* Enabled Interrupts */ | |
333 | u32 interrupts; | |
334 | ||
335 | /* Union of PHY and Attached devices' supported modes */ | |
336 | /* See mii.h for more info */ | |
337 | u32 supported; | |
338 | u32 advertising; | |
114002bc | 339 | u32 lp_advertising; |
00db8189 AF |
340 | |
341 | int autoneg; | |
342 | ||
343 | int link_timeout; | |
344 | ||
c5e38a94 AF |
345 | /* |
346 | * Interrupt number for this PHY | |
347 | * -1 means no interrupt | |
348 | */ | |
00db8189 AF |
349 | int irq; |
350 | ||
351 | /* private data pointer */ | |
352 | /* For use by PHYs to maintain extra state */ | |
353 | void *priv; | |
354 | ||
355 | /* Interrupt and Polling infrastructure */ | |
356 | struct work_struct phy_queue; | |
a390d1f3 | 357 | struct delayed_work state_queue; |
0ac49527 | 358 | atomic_t irq_disable; |
00db8189 | 359 | |
35b5f6b1 | 360 | struct mutex lock; |
00db8189 AF |
361 | |
362 | struct net_device *attached_dev; | |
363 | ||
364 | void (*adjust_link)(struct net_device *dev); | |
00db8189 AF |
365 | }; |
366 | #define to_phy_device(d) container_of(d, struct phy_device, dev) | |
367 | ||
368 | /* struct phy_driver: Driver structure for a particular PHY type | |
369 | * | |
370 | * phy_id: The result of reading the UID registers of this PHY | |
371 | * type, and ANDing them with the phy_id_mask. This driver | |
372 | * only works for PHYs with IDs which match this field | |
373 | * name: The friendly name of this PHY type | |
374 | * phy_id_mask: Defines the important bits of the phy_id | |
375 | * features: A list of features (speed, duplex, etc) supported | |
376 | * by this PHY | |
377 | * flags: A bitfield defining certain other features this PHY | |
378 | * supports (like interrupts) | |
379 | * | |
380 | * The drivers must implement config_aneg and read_status. All | |
381 | * other functions are optional. Note that none of these | |
382 | * functions should be called from interrupt time. The goal is | |
383 | * for the bus read/write functions to be able to block when the | |
384 | * bus transaction is happening, and be freed up by an interrupt | |
385 | * (The MPC85xx has this ability, though it is not currently | |
386 | * supported in the driver). | |
387 | */ | |
388 | struct phy_driver { | |
389 | u32 phy_id; | |
390 | char *name; | |
391 | unsigned int phy_id_mask; | |
392 | u32 features; | |
393 | u32 flags; | |
394 | ||
c5e38a94 AF |
395 | /* |
396 | * Called to initialize the PHY, | |
397 | * including after a reset | |
398 | */ | |
00db8189 AF |
399 | int (*config_init)(struct phy_device *phydev); |
400 | ||
c5e38a94 AF |
401 | /* |
402 | * Called during discovery. Used to set | |
403 | * up device-specific structures, if any | |
404 | */ | |
00db8189 AF |
405 | int (*probe)(struct phy_device *phydev); |
406 | ||
407 | /* PHY Power Management */ | |
408 | int (*suspend)(struct phy_device *phydev); | |
409 | int (*resume)(struct phy_device *phydev); | |
410 | ||
c5e38a94 AF |
411 | /* |
412 | * Configures the advertisement and resets | |
00db8189 AF |
413 | * autonegotiation if phydev->autoneg is on, |
414 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
415 | * if phydev->autoneg is off |
416 | */ | |
00db8189 AF |
417 | int (*config_aneg)(struct phy_device *phydev); |
418 | ||
419 | /* Determines the negotiated speed and duplex */ | |
420 | int (*read_status)(struct phy_device *phydev); | |
421 | ||
422 | /* Clears any pending interrupts */ | |
423 | int (*ack_interrupt)(struct phy_device *phydev); | |
424 | ||
425 | /* Enables or disables interrupts */ | |
426 | int (*config_intr)(struct phy_device *phydev); | |
427 | ||
a8729eb3 AG |
428 | /* |
429 | * Checks if the PHY generated an interrupt. | |
430 | * For multi-PHY devices with shared PHY interrupt pin | |
431 | */ | |
432 | int (*did_interrupt)(struct phy_device *phydev); | |
433 | ||
00db8189 AF |
434 | /* Clears up any memory if needed */ |
435 | void (*remove)(struct phy_device *phydev); | |
436 | ||
a30e2c18 DD |
437 | /* Returns true if this is a suitable driver for the given |
438 | * phydev. If NULL, matching is based on phy_id and | |
439 | * phy_id_mask. | |
440 | */ | |
441 | int (*match_phy_device)(struct phy_device *phydev); | |
442 | ||
c8f3a8c3 RC |
443 | /* Handles ethtool queries for hardware time stamping. */ |
444 | int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); | |
445 | ||
c1f19b51 RC |
446 | /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ |
447 | int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); | |
448 | ||
449 | /* | |
450 | * Requests a Rx timestamp for 'skb'. If the skb is accepted, | |
451 | * the phy driver promises to deliver it using netif_rx() as | |
452 | * soon as a timestamp becomes available. One of the | |
453 | * PTP_CLASS_ values is passed in 'type'. The function must | |
454 | * return true if the skb is accepted for delivery. | |
455 | */ | |
456 | bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
457 | ||
458 | /* | |
459 | * Requests a Tx timestamp for 'skb'. The phy driver promises | |
da92b194 | 460 | * to deliver it using skb_complete_tx_timestamp() as soon as a |
c1f19b51 RC |
461 | * timestamp becomes available. One of the PTP_CLASS_ values |
462 | * is passed in 'type'. | |
463 | */ | |
464 | void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
465 | ||
42e836eb MS |
466 | /* Some devices (e.g. qnap TS-119P II) require PHY register changes to |
467 | * enable Wake on LAN, so set_wol is provided to be called in the | |
468 | * ethernet driver's set_wol function. */ | |
469 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
470 | ||
471 | /* See set_wol, but for checking whether Wake on LAN is enabled. */ | |
472 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
473 | ||
00db8189 AF |
474 | struct device_driver driver; |
475 | }; | |
476 | #define to_phy_driver(d) container_of(d, struct phy_driver, driver) | |
477 | ||
f62220d3 AF |
478 | #define PHY_ANY_ID "MATCH ANY PHY" |
479 | #define PHY_ANY_UID 0xffffffff | |
480 | ||
481 | /* A Structure for boards to register fixups with the PHY Lib */ | |
482 | struct phy_fixup { | |
483 | struct list_head list; | |
8e401ecc | 484 | char bus_id[20]; |
f62220d3 AF |
485 | u32 phy_uid; |
486 | u32 phy_uid_mask; | |
487 | int (*run)(struct phy_device *phydev); | |
488 | }; | |
489 | ||
efabdfb9 AF |
490 | /** |
491 | * phy_read_mmd - Convenience function for reading a register | |
492 | * from an MMD on a given PHY. | |
493 | * @phydev: The phy_device struct | |
494 | * @devad: The MMD to read from | |
495 | * @regnum: The register on the MMD to read | |
496 | * | |
497 | * Same rules as for phy_read(); | |
498 | */ | |
499 | static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) | |
500 | { | |
501 | if (!phydev->is_c45) | |
502 | return -EOPNOTSUPP; | |
503 | ||
504 | return mdiobus_read(phydev->bus, phydev->addr, | |
505 | MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff)); | |
506 | } | |
507 | ||
2e888103 LB |
508 | /** |
509 | * phy_read - Convenience function for reading a given PHY register | |
510 | * @phydev: the phy_device struct | |
511 | * @regnum: register number to read | |
512 | * | |
513 | * NOTE: MUST NOT be called from interrupt context, | |
514 | * because the bus read/write functions may wait for an interrupt | |
515 | * to conclude the operation. | |
516 | */ | |
abf35df2 | 517 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 LB |
518 | { |
519 | return mdiobus_read(phydev->bus, phydev->addr, regnum); | |
520 | } | |
521 | ||
522 | /** | |
523 | * phy_write - Convenience function for writing a given PHY register | |
524 | * @phydev: the phy_device struct | |
525 | * @regnum: register number to write | |
526 | * @val: value to write to @regnum | |
527 | * | |
528 | * NOTE: MUST NOT be called from interrupt context, | |
529 | * because the bus read/write functions may wait for an interrupt | |
530 | * to conclude the operation. | |
531 | */ | |
abf35df2 | 532 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 LB |
533 | { |
534 | return mdiobus_write(phydev->bus, phydev->addr, regnum, val); | |
535 | } | |
536 | ||
2c7b4921 FF |
537 | /** |
538 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
539 | * @phydev: the phy_device struct | |
540 | * | |
541 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
542 | * PHY_IGNORE_INTERRUPT | |
543 | */ | |
544 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
545 | { | |
546 | return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; | |
547 | } | |
548 | ||
4284b6a5 FF |
549 | /** |
550 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
551 | * @phydev: the phy_device struct | |
552 | */ | |
553 | static inline bool phy_is_internal(struct phy_device *phydev) | |
554 | { | |
555 | return phydev->is_internal; | |
556 | } | |
557 | ||
efabdfb9 AF |
558 | /** |
559 | * phy_write_mmd - Convenience function for writing a register | |
560 | * on an MMD on a given PHY. | |
561 | * @phydev: The phy_device struct | |
562 | * @devad: The MMD to read from | |
563 | * @regnum: The register on the MMD to read | |
564 | * @val: value to write to @regnum | |
565 | * | |
566 | * Same rules as for phy_write(); | |
567 | */ | |
568 | static inline int phy_write_mmd(struct phy_device *phydev, int devad, | |
569 | u32 regnum, u16 val) | |
570 | { | |
571 | if (!phydev->is_c45) | |
572 | return -EOPNOTSUPP; | |
573 | ||
574 | regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff); | |
575 | ||
576 | return mdiobus_write(phydev->bus, phydev->addr, regnum, val); | |
577 | } | |
578 | ||
ac28b9f8 | 579 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, |
4017b4d3 SS |
580 | bool is_c45, |
581 | struct phy_c45_device_ids *c45_ids); | |
ac28b9f8 | 582 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 583 | int phy_device_register(struct phy_device *phy); |
2f5cb434 | 584 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
585 | int phy_suspend(struct phy_device *phydev); |
586 | int phy_resume(struct phy_device *phydev); | |
4017b4d3 SS |
587 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
588 | phy_interface_t interface); | |
f8f76db1 | 589 | struct phy_device *phy_find_first(struct mii_bus *bus); |
fa94f6d9 | 590 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
591 | void (*handler)(struct net_device *), |
592 | phy_interface_t interface); | |
593 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
594 | void (*handler)(struct net_device *), | |
595 | phy_interface_t interface); | |
e1393456 AF |
596 | void phy_disconnect(struct phy_device *phydev); |
597 | void phy_detach(struct phy_device *phydev); | |
598 | void phy_start(struct phy_device *phydev); | |
599 | void phy_stop(struct phy_device *phydev); | |
600 | int phy_start_aneg(struct phy_device *phydev); | |
601 | ||
e1393456 | 602 | int phy_stop_interrupts(struct phy_device *phydev); |
00db8189 | 603 | |
4017b4d3 SS |
604 | static inline int phy_read_status(struct phy_device *phydev) |
605 | { | |
00db8189 AF |
606 | return phydev->drv->read_status(phydev); |
607 | } | |
608 | ||
3fb69bca | 609 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 AF |
610 | int genphy_restart_aneg(struct phy_device *phydev); |
611 | int genphy_config_aneg(struct phy_device *phydev); | |
612 | int genphy_update_link(struct phy_device *phydev); | |
613 | int genphy_read_status(struct phy_device *phydev); | |
0f0ca340 GC |
614 | int genphy_suspend(struct phy_device *phydev); |
615 | int genphy_resume(struct phy_device *phydev); | |
00db8189 | 616 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 617 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
00db8189 | 618 | int phy_driver_register(struct phy_driver *new_driver); |
d5bf9071 | 619 | int phy_drivers_register(struct phy_driver *new_driver, int n); |
4f9c85a1 | 620 | void phy_state_machine(struct work_struct *work); |
5ea94e76 FF |
621 | void phy_change(struct work_struct *work); |
622 | void phy_mac_interrupt(struct phy_device *phydev, int new_link); | |
29935aeb | 623 | void phy_start_machine(struct phy_device *phydev); |
00db8189 AF |
624 | void phy_stop_machine(struct phy_device *phydev); |
625 | int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
626 | int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
4017b4d3 | 627 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
e1393456 AF |
628 | int phy_start_interrupts(struct phy_device *phydev); |
629 | void phy_print_status(struct phy_device *phydev); | |
6f4a7f41 | 630 | void phy_device_free(struct phy_device *phydev); |
00db8189 | 631 | |
f62220d3 | 632 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 633 | int (*run)(struct phy_device *)); |
f62220d3 | 634 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 635 | int (*run)(struct phy_device *)); |
f62220d3 | 636 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 637 | int (*run)(struct phy_device *)); |
f62220d3 | 638 | |
a59a4d19 GC |
639 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
640 | int phy_get_eee_err(struct phy_device *phydev); | |
641 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
642 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
42e836eb | 643 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
644 | void phy_ethtool_get_wol(struct phy_device *phydev, |
645 | struct ethtool_wolinfo *wol); | |
a59a4d19 | 646 | |
9b9a8bfc AF |
647 | int __init mdio_bus_init(void); |
648 | void mdio_bus_exit(void); | |
649 | ||
00db8189 | 650 | extern struct bus_type mdio_bus_type; |
00db8189 | 651 | #endif /* __PHY_H */ |