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394349f7 LW |
1 | /* |
2 | * Interface the generic pinconfig portions of the pinctrl subsystem | |
3 | * | |
4 | * Copyright (C) 2011 ST-Ericsson SA | |
5 | * Written on behalf of Linaro for ST-Ericsson | |
6 | * This interface is used in the core to keep track of pins. | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
10 | * License terms: GNU General Public License (GPL) version 2 | |
11 | */ | |
12 | #ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H | |
13 | #define __LINUX_PINCTRL_PINCONF_GENERIC_H | |
14 | ||
394349f7 LW |
15 | /** |
16 | * enum pin_config_param - possible pin configuration parameters | |
3c4b23dd MY |
17 | * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it |
18 | * weakly drives the last value on a tristate bus, also known as a "bus | |
19 | * holder", "bus keeper" or "repeater". This allows another device on the | |
20 | * bus to change the value by driving the bus high or low and switching to | |
21 | * tristate. The argument is ignored. | |
394349f7 LW |
22 | * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a |
23 | * transition from say pull-up to pull-down implies that you disable | |
24 | * pull-up in the process, this setting disables all biasing. | |
25 | * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance | |
26 | * mode, also know as "third-state" (tristate) or "high-Z" or "floating". | |
27 | * On output pins this effectively disconnects the pin, which is useful | |
28 | * if for example some other pin is going to drive the signal connected | |
29 | * to it for a while. Pins used for input are usually always high | |
30 | * impedance. | |
394349f7 LW |
31 | * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high |
32 | * impedance to GROUND). If the argument is != 0 pull-down is enabled, | |
5ca3353b | 33 | * if it is 0, pull-down is total, i.e. the pin is connected to GROUND. |
7970cb77 | 34 | * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based |
70637a6d HS |
35 | * on embedded knowledge of the controller hardware, like current mux |
36 | * function. The pull direction and possibly strength too will normally | |
37 | * be decided completely inside the hardware block and not be readable | |
38 | * from the kernel side. | |
5ca3353b LW |
39 | * If the argument is != 0 pull up/down is enabled, if it is 0, the |
40 | * configuration is ignored. The proper way to disable it is to use | |
41 | * @PIN_CONFIG_BIAS_DISABLE. | |
3c4b23dd MY |
42 | * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high |
43 | * impedance to VDD). If the argument is != 0 pull-up is enabled, | |
44 | * if it is 0, pull-up is total, i.e. the pin is connected to VDD. | |
394349f7 LW |
45 | * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open |
46 | * collector) which means it is usually wired with other output ports | |
63ad9cbf LP |
47 | * which are then pulled up with an external resistor. Setting this |
48 | * config will enable open drain mode, the argument is ignored. | |
394349f7 | 49 | * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source |
0d378993 | 50 | * (open emitter). Setting this config will enable open source mode, the |
394349f7 | 51 | * argument is ignored. |
3c4b23dd MY |
52 | * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and |
53 | * low, this is the most typical case and is typically achieved with two | |
54 | * active transistors on the output. Setting this config will enable | |
55 | * push-pull mode, the argument is ignored. | |
63ad9cbf LP |
56 | * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current |
57 | * passed as argument. The argument is in mA. | |
3c4b23dd MY |
58 | * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode, |
59 | * which means it will wait for signals to settle when reading inputs. The | |
60 | * argument gives the debounce time in usecs. Setting the | |
61 | * argument to zero turns debouncing off. | |
8ba3f4d0 SY |
62 | * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input. Note that this does not |
63 | * affect the pin's ability to drive output. 1 enables input, 0 disables | |
64 | * input. | |
394349f7 LW |
65 | * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in |
66 | * schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis, | |
67 | * the threshold value is given on a custom format as argument when | |
2ccb0bcf | 68 | * setting pins to this mode. |
3c4b23dd MY |
69 | * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin. |
70 | * If the argument != 0, schmitt-trigger mode is enabled. If it's 0, | |
71 | * schmitt-trigger mode is disabled. | |
394349f7 LW |
72 | * @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power |
73 | * operation, if several modes of operation are supported these can be | |
74 | * passed in the argument on a custom form, else just use argument 1 | |
75 | * to indicate low power mode, argument 0 turns low power mode off. | |
42556242 JM |
76 | * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode |
77 | * without driving a value there. For most platforms this reduces to | |
78 | * enable the output buffers and then let the pin controller current | |
79 | * configuration (eg. the currently selected mux function) drive values on | |
80 | * the line. Use argument 1 to enable output mode, argument 0 to disable | |
81 | * it. | |
82 | * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a | |
83 | * value on the line. Use argument 1 to indicate high level, argument 0 to | |
0cca6c89 LD |
84 | * indicate low level. (Please see Documentation/driver-api/pinctl.rst, |
85 | * section "GPIO mode pitfalls" for a discussion around this parameter.) | |
3c4b23dd MY |
86 | * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power |
87 | * supplies, the argument to this parameter (on a custom format) tells | |
88 | * the driver which alternative power source to use. | |
6606bc9d | 89 | * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state. |
3c4b23dd MY |
90 | * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to |
91 | * this parameter (on a custom format) tells the driver which alternative | |
92 | * slew rate to use. | |
e0e1e39d LW |
93 | * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs) |
94 | * or latch delay (on outputs) this parameter (in a custom format) | |
95 | * specifies the clock skew or latch delay. It typically controls how | |
96 | * many double inverters are put in front of the line. | |
394349f7 LW |
97 | * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if |
98 | * you need to pass in custom configurations to the pin controller, use | |
99 | * PIN_CONFIG_END+1 as the base offset. | |
58957d2e MW |
100 | * @PIN_CONFIG_MAX: this is the maximum configuration value that can be |
101 | * presented using the packed format. | |
394349f7 LW |
102 | */ |
103 | enum pin_config_param { | |
3c4b23dd | 104 | PIN_CONFIG_BIAS_BUS_HOLD, |
394349f7 LW |
105 | PIN_CONFIG_BIAS_DISABLE, |
106 | PIN_CONFIG_BIAS_HIGH_IMPEDANCE, | |
394349f7 | 107 | PIN_CONFIG_BIAS_PULL_DOWN, |
7970cb77 | 108 | PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, |
3c4b23dd | 109 | PIN_CONFIG_BIAS_PULL_UP, |
394349f7 LW |
110 | PIN_CONFIG_DRIVE_OPEN_DRAIN, |
111 | PIN_CONFIG_DRIVE_OPEN_SOURCE, | |
3c4b23dd | 112 | PIN_CONFIG_DRIVE_PUSH_PULL, |
f868ef99 | 113 | PIN_CONFIG_DRIVE_STRENGTH, |
3c4b23dd | 114 | PIN_CONFIG_INPUT_DEBOUNCE, |
8ba3f4d0 | 115 | PIN_CONFIG_INPUT_ENABLE, |
394349f7 | 116 | PIN_CONFIG_INPUT_SCHMITT, |
3c4b23dd | 117 | PIN_CONFIG_INPUT_SCHMITT_ENABLE, |
394349f7 | 118 | PIN_CONFIG_LOW_POWER_MODE, |
42556242 | 119 | PIN_CONFIG_OUTPUT_ENABLE, |
483f33f6 | 120 | PIN_CONFIG_OUTPUT, |
3c4b23dd | 121 | PIN_CONFIG_POWER_SOURCE, |
6606bc9d | 122 | PIN_CONFIG_SLEEP_HARDWARE_STATE, |
3c4b23dd | 123 | PIN_CONFIG_SLEW_RATE, |
e0e1e39d | 124 | PIN_CONFIG_SKEW_DELAY, |
58957d2e MW |
125 | PIN_CONFIG_END = 0x7F, |
126 | PIN_CONFIG_MAX = 0xFF, | |
394349f7 LW |
127 | }; |
128 | ||
129 | /* | |
130 | * Helpful configuration macro to be used in tables etc. | |
131 | */ | |
58957d2e | 132 | #define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL)) |
394349f7 LW |
133 | |
134 | /* | |
135 | * The following inlines stuffs a configuration parameter and data value | |
136 | * into and out of an unsigned long argument, as used by the generic pin config | |
58957d2e MW |
137 | * system. We put the parameter in the lower 8 bits and the argument in the |
138 | * upper 24 bits. | |
394349f7 LW |
139 | */ |
140 | ||
141 | static inline enum pin_config_param pinconf_to_config_param(unsigned long config) | |
142 | { | |
58957d2e | 143 | return (enum pin_config_param) (config & 0xffUL); |
394349f7 LW |
144 | } |
145 | ||
58957d2e | 146 | static inline u32 pinconf_to_config_argument(unsigned long config) |
394349f7 | 147 | { |
58957d2e | 148 | return (u32) ((config >> 8) & 0xffffffUL); |
394349f7 LW |
149 | } |
150 | ||
151 | static inline unsigned long pinconf_to_config_packed(enum pin_config_param param, | |
58957d2e | 152 | u32 argument) |
394349f7 LW |
153 | { |
154 | return PIN_CONF_PACKED(param, argument); | |
155 | } | |
156 | ||
2956b5d9 MW |
157 | #ifdef CONFIG_GENERIC_PINCONF |
158 | ||
159 | #ifdef CONFIG_DEBUG_FS | |
160 | #define PCONFDUMP(a, b, c, d) { \ | |
161 | .param = a, .display = b, .format = c, .has_arg = d \ | |
162 | } | |
163 | ||
164 | struct pin_config_item { | |
165 | const enum pin_config_param param; | |
166 | const char * const display; | |
167 | const char * const format; | |
168 | bool has_arg; | |
169 | }; | |
170 | #endif /* CONFIG_DEBUG_FS */ | |
171 | ||
0d74d4a1 LW |
172 | #ifdef CONFIG_OF |
173 | ||
174 | #include <linux/device.h> | |
3287c240 | 175 | #include <linux/pinctrl/machine.h> |
0d74d4a1 LW |
176 | struct pinctrl_dev; |
177 | struct pinctrl_map; | |
178 | ||
f684e4ac | 179 | struct pinconf_generic_params { |
dd4d01f7 SB |
180 | const char * const property; |
181 | enum pin_config_param param; | |
182 | u32 default_value; | |
183 | }; | |
184 | ||
e81c8f18 LD |
185 | int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev, |
186 | struct device_node *np, struct pinctrl_map **map, | |
3287c240 LD |
187 | unsigned *reserved_maps, unsigned *num_maps, |
188 | enum pinctrl_map_type type); | |
e81c8f18 LD |
189 | int pinconf_generic_dt_node_to_map(struct pinctrl_dev *pctldev, |
190 | struct device_node *np_config, struct pinctrl_map **map, | |
3287c240 | 191 | unsigned *num_maps, enum pinctrl_map_type type); |
8dfebf57 JH |
192 | void pinconf_generic_dt_free_map(struct pinctrl_dev *pctldev, |
193 | struct pinctrl_map *map, unsigned num_maps); | |
3287c240 LD |
194 | |
195 | static inline int pinconf_generic_dt_node_to_map_group( | |
196 | struct pinctrl_dev *pctldev, struct device_node *np_config, | |
197 | struct pinctrl_map **map, unsigned *num_maps) | |
198 | { | |
199 | return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, | |
200 | PIN_MAP_TYPE_CONFIGS_GROUP); | |
201 | } | |
202 | ||
203 | static inline int pinconf_generic_dt_node_to_map_pin( | |
204 | struct pinctrl_dev *pctldev, struct device_node *np_config, | |
205 | struct pinctrl_map **map, unsigned *num_maps) | |
206 | { | |
207 | return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, | |
208 | PIN_MAP_TYPE_CONFIGS_PIN); | |
209 | } | |
0d74d4a1 | 210 | |
31c89c95 SB |
211 | static inline int pinconf_generic_dt_node_to_map_all( |
212 | struct pinctrl_dev *pctldev, struct device_node *np_config, | |
213 | struct pinctrl_map **map, unsigned *num_maps) | |
214 | { | |
215 | /* | |
216 | * passing the type as PIN_MAP_TYPE_INVALID causes the underlying parser | |
217 | * to infer the map type from the DT properties used. | |
218 | */ | |
219 | return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, | |
220 | PIN_MAP_TYPE_INVALID); | |
221 | } | |
0d74d4a1 LW |
222 | #endif |
223 | ||
394349f7 LW |
224 | #endif /* CONFIG_GENERIC_PINCONF */ |
225 | ||
226 | #endif /* __LINUX_PINCTRL_PINCONF_GENERIC_H */ |