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pinctrl: replace list_*() with get_*_count()
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1/*
2 * Interface the pinctrl subsystem
3 *
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 * This interface is used in the core to keep track of pins.
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
10 * License terms: GNU General Public License (GPL) version 2
11 */
12#ifndef __LINUX_PINCTRL_PINCTRL_H
13#define __LINUX_PINCTRL_PINCTRL_H
14
15#ifdef CONFIG_PINCTRL
16
17#include <linux/radix-tree.h>
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18#include <linux/list.h>
19#include <linux/seq_file.h>
9a01be17 20#include "pinctrl-state.h"
46919ae6 21
0acfb076 22struct device;
2744e8af 23struct pinctrl_dev;
57291ce2 24struct pinctrl_map;
2744e8af 25struct pinmux_ops;
ae6b4d85 26struct pinconf_ops;
2744e8af 27struct gpio_chip;
57291ce2 28struct device_node;
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29
30/**
31 * struct pinctrl_pin_desc - boards/machines provide information on their
32 * pins, pads or other muxable units in this struct
33 * @number: unique pin number from the global pin number space
34 * @name: a name for this pin
35 */
36struct pinctrl_pin_desc {
37 unsigned number;
38 const char *name;
39};
40
41/* Convenience macro to define a single named or anonymous pin descriptor */
42#define PINCTRL_PIN(a, b) { .number = a, .name = b }
43#define PINCTRL_PIN_ANON(a) { .number = a }
44
45/**
46 * struct pinctrl_gpio_range - each pin controller can provide subranges of
47 * the GPIO number space to be handled by the controller
48 * @node: list node for internal use
49 * @name: a name for the chip in this range
50 * @id: an ID number for the chip in this range
51 * @base: base offset of the GPIO range
3c739ad0 52 * @pin_base: base pin number of the GPIO range
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53 * @npins: number of pins in the GPIO range, including the base number
54 * @gc: an optional pointer to a gpio_chip
55 */
56struct pinctrl_gpio_range {
57 struct list_head node;
58 const char *name;
59 unsigned int id;
60 unsigned int base;
3c739ad0 61 unsigned int pin_base;
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62 unsigned int npins;
63 struct gpio_chip *gc;
64};
65
66/**
67 * struct pinctrl_ops - global pin control operations, to be implemented by
68 * pin controller drivers.
d1e90e9e 69 * @get_groups_count: Returns the count of total number of groups registered.
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70 * @get_group_name: return the group name of the pin group
71 * @get_group_pins: return an array of pins corresponding to a certain
72 * group selector @pins, and the size of the array in @num_pins
73 * @pin_dbg_show: optional debugfs display hook that will provide per-device
74 * info for a certain pin in debugfs
75 */
76struct pinctrl_ops {
d1e90e9e 77 int (*get_groups_count) (struct pinctrl_dev *pctldev);
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78 const char *(*get_group_name) (struct pinctrl_dev *pctldev,
79 unsigned selector);
80 int (*get_group_pins) (struct pinctrl_dev *pctldev,
81 unsigned selector,
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82 const unsigned **pins,
83 unsigned *num_pins);
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84 void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
85 unsigned offset);
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86 int (*dt_node_to_map) (struct pinctrl_dev *pctldev,
87 struct device_node *np_config,
88 struct pinctrl_map **map, unsigned *num_maps);
89 void (*dt_free_map) (struct pinctrl_dev *pctldev,
90 struct pinctrl_map *map, unsigned num_maps);
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91};
92
93/**
94 * struct pinctrl_desc - pin controller descriptor, register this to pin
95 * control subsystem
96 * @name: name for the pin controller
97 * @pins: an array of pin descriptors describing all the pins handled by
98 * this pin controller
99 * @npins: number of descriptors in the array, usually just ARRAY_SIZE()
100 * of the pins field above
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101 * @pctlops: pin control operation vtable, to support global concepts like
102 * grouping of pins, this is optional.
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103 * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
104 * @confops: pin config operations vtable, if you support pin configuration in
105 * your driver
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106 * @owner: module providing the pin controller, used for refcounting
107 */
108struct pinctrl_desc {
109 const char *name;
110 struct pinctrl_pin_desc const *pins;
111 unsigned int npins;
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112 struct pinctrl_ops *pctlops;
113 struct pinmux_ops *pmxops;
ae6b4d85 114 struct pinconf_ops *confops;
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115 struct module *owner;
116};
117
118/* External interface to pin controller */
119extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
120 struct device *dev, void *driver_data);
121extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
122extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
123extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
124 struct pinctrl_gpio_range *range);
125extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
126 struct pinctrl_gpio_range *range);
127extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
128extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
129#else
130
e0e20753 131struct pinctrl_dev;
2744e8af 132
ae6b4d85 133/* Sufficiently stupid default functions when pinctrl is not in use */
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134static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
135{
136 return pin >= 0;
137}
138
139#endif /* !CONFIG_PINCTRL */
140
141#endif /* __LINUX_PINCTRL_PINCTRL_H */