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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
6d831c65 RM |
2 | #ifndef __ASM_ARCH_DMA_H |
3 | #define __ASM_ARCH_DMA_H | |
4 | ||
6d831c65 | 5 | #include <linux/types.h> |
760ee1c4 MW |
6 | #include <linux/dmaengine.h> |
7 | #include <linux/dma-mapping.h> | |
6d831c65 | 8 | |
760ee1c4 MW |
9 | /* |
10 | * M2P channels. | |
11 | * | |
12 | * Note that these values are also directly used for setting the PPALLOC | |
13 | * register. | |
14 | */ | |
15 | #define EP93XX_DMA_I2S1 0 | |
16 | #define EP93XX_DMA_I2S2 1 | |
17 | #define EP93XX_DMA_AAC1 2 | |
18 | #define EP93XX_DMA_AAC2 3 | |
19 | #define EP93XX_DMA_AAC3 4 | |
20 | #define EP93XX_DMA_I2S3 5 | |
21 | #define EP93XX_DMA_UART1 6 | |
22 | #define EP93XX_DMA_UART2 7 | |
23 | #define EP93XX_DMA_UART3 8 | |
24 | #define EP93XX_DMA_IRDA 9 | |
25 | /* M2M channels */ | |
26 | #define EP93XX_DMA_SSP 10 | |
27 | #define EP93XX_DMA_IDE 11 | |
28 | ||
29 | /** | |
30 | * struct ep93xx_dma_data - configuration data for the EP93xx dmaengine | |
31 | * @port: peripheral which is requesting the channel | |
32 | * @direction: TX/RX channel | |
33 | * @name: optional name for the channel, this is displayed in /proc/interrupts | |
34 | * | |
35 | * This information is passed as private channel parameter in a filter | |
36 | * function. Note that this is only needed for slave/cyclic channels. For | |
37 | * memcpy channels %NULL data should be passed. | |
38 | */ | |
39 | struct ep93xx_dma_data { | |
40 | int port; | |
db8196df | 41 | enum dma_transfer_direction direction; |
760ee1c4 MW |
42 | const char *name; |
43 | }; | |
44 | ||
45 | /** | |
46 | * struct ep93xx_dma_chan_data - platform specific data for a DMA channel | |
47 | * @name: name of the channel, used for getting the right clock for the channel | |
48 | * @base: mapped registers | |
49 | * @irq: interrupt number used by this channel | |
50 | */ | |
51 | struct ep93xx_dma_chan_data { | |
52 | const char *name; | |
53 | void __iomem *base; | |
54 | int irq; | |
55 | }; | |
56 | ||
57 | /** | |
58 | * struct ep93xx_dma_platform_data - platform data for the dmaengine driver | |
59 | * @channels: array of channels which are passed to the driver | |
60 | * @num_channels: number of channels in the array | |
61 | * | |
62 | * This structure is passed to the DMA engine driver via platform data. For | |
63 | * M2P channels, contract is that even channels are for TX and odd for RX. | |
64 | * There is no requirement for the M2M channels. | |
65 | */ | |
66 | struct ep93xx_dma_platform_data { | |
67 | struct ep93xx_dma_chan_data *channels; | |
68 | size_t num_channels; | |
69 | }; | |
70 | ||
71 | static inline bool ep93xx_dma_chan_is_m2p(struct dma_chan *chan) | |
72 | { | |
73 | return !strcmp(dev_name(chan->device->dev), "ep93xx-dma-m2p"); | |
74 | } | |
75 | ||
76 | /** | |
77 | * ep93xx_dma_chan_direction - returns direction the channel can be used | |
78 | * @chan: channel | |
79 | * | |
80 | * This function can be used in filter functions to find out whether the | |
81 | * channel supports given DMA direction. Only M2P channels have such | |
82 | * limitation, for M2M channels the direction is configurable. | |
83 | */ | |
db8196df | 84 | static inline enum dma_transfer_direction |
760ee1c4 MW |
85 | ep93xx_dma_chan_direction(struct dma_chan *chan) |
86 | { | |
87 | if (!ep93xx_dma_chan_is_m2p(chan)) | |
88 | return DMA_NONE; | |
89 | ||
90 | /* even channels are for TX, odd for RX */ | |
db8196df | 91 | return (chan->chan_id % 2 == 0) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; |
760ee1c4 MW |
92 | } |
93 | ||
6d831c65 | 94 | #endif /* __ASM_ARCH_DMA_H */ |