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3bbef1b9 | 1 | /* |
65214a86 | 2 | * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd. |
3bbef1b9 | 3 | * |
09ff0340 | 4 | * Samsung S5P/Exynos SoC series MIPI CSIS device support |
3bbef1b9 SN |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
e90a0f3c KK |
11 | #ifndef __PLAT_SAMSUNG_MIPI_CSIS_H_ |
12 | #define __PLAT_SAMSUNG_MIPI_CSIS_H_ __FILE__ | |
3bbef1b9 SN |
13 | |
14 | /** | |
03c4cd39 | 15 | * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver |
09ff0340 | 16 | * @clk_rate: bus clock frequency |
65214a86 | 17 | * @wclk_source: CSI wrapper clock selection: 0 - bus clock, 1 - ext. SCLK_CAM |
09ff0340 SN |
18 | * @lanes: number of data lanes used |
19 | * @hs_settle: HS-RX settle time | |
3bbef1b9 SN |
20 | */ |
21 | struct s5p_platform_mipi_csis { | |
22 | unsigned long clk_rate; | |
65214a86 | 23 | u8 wclk_source; |
3bbef1b9 | 24 | u8 lanes; |
3bbef1b9 SN |
25 | u8 hs_settle; |
26 | }; | |
27 | ||
e24d208d SN |
28 | /** |
29 | * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control | |
ccbfd1d4 SN |
30 | * @id: MIPI-CSIS harware instance index (0...1) |
31 | * @on: true to enable D-PHY and deassert its reset | |
32 | * false to disable D-PHY | |
33 | * @return: 0 on success, or negative error code on failure | |
e24d208d | 34 | */ |
ccbfd1d4 | 35 | int s5p_csis_phy_enable(int id, bool on); |
e24d208d | 36 | |
e90a0f3c | 37 | #endif /* __PLAT_SAMSUNG_MIPI_CSIS_H_ */ |