projects / mirror_ubuntu-jammy-kernel.git / blame
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| 78b5d705 AS |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | ||
| 963eb4b8 | 3 | /* |
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4 | * Copyright (C) 2009 Samsung Electronics Ltd. |
| 5 | * Jaswinder Singh <jassi.brar@samsung.com> | |
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6 | */ |
| 7 | ||
| 963eb4b8 SK |
8 | #ifndef __SPI_S3C64XX_H |
| 9 | #define __SPI_S3C64XX_H | |
| 398ccccb | 10 | |
| 78843727 AB |
11 | #include <linux/dmaengine.h> |
| 12 | ||
| 5b0b34ea MB |
13 | struct platform_device; |
| 14 | ||
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15 | /** |
| 16 | * struct s3c64xx_spi_csinfo - ChipSelect description | |
| 17 | * @fb_delay: Slave specific feedback delay. | |
| 18 | * Refer to FB_CLK_SEL register definition in SPI chapter. | |
| 19 | * @line: Custom 'identity' of the CS line. | |
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20 | * |
| 21 | * This is per SPI-Slave Chipselect information. | |
| 22 | * Allocate and initialize one in machine init code and make the | |
| 23 | * spi_board_info.controller_data point to it. | |
| 24 | */ | |
| 25 | struct s3c64xx_spi_csinfo { | |
| 26 | u8 fb_delay; | |
| 27 | unsigned line; | |
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28 | }; |
| 29 | ||
| 30 | /** | |
| 31 | * struct s3c64xx_spi_info - SPI Controller defining structure | |
| 32 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. | |
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33 | * @num_cs: Number of CS this controller emulates. |
| 34 | * @cfg_gpio: Configure pins for this SPI controller. | |
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35 | */ |
| 36 | struct s3c64xx_spi_info { | |
| 37 | int src_clk_nr; | |
| 398ccccb | 38 | int num_cs; |
| a92e7c3d | 39 | bool no_cs; |
| 868dee91 | 40 | int (*cfg_gpio)(void); |
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41 | }; |
| 42 | ||
| 43 | /** | |
| 875a5937 | 44 | * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board |
| 398ccccb | 45 | * initialization code. |
| 4d0efdd5 | 46 | * @cfg_gpio: Pointer to gpio setup function. |
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47 | * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. |
| 48 | * @num_cs: Number of elements in the 'cs' array. | |
| 49 | * | |
| 50 | * Call this from machine init code for each SPI Controller that | |
| 51 | * has some chips attached to it. | |
| 52 | */ | |
| 4d0efdd5 TA |
53 | extern void s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
| 54 | int num_cs); | |
| 55 | extern void s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |
| 56 | int num_cs); | |
| 57 | extern void s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |
| 58 | int num_cs); | |
| 4566c7f7 PV |
59 | |
| 60 | /* defined by architecture to configure gpio */ | |
| 868dee91 TA |
61 | extern int s3c64xx_spi0_cfg_gpio(void); |
| 62 | extern int s3c64xx_spi1_cfg_gpio(void); | |
| 63 | extern int s3c64xx_spi2_cfg_gpio(void); | |
| 4566c7f7 PV |
64 | |
| 65 | extern struct s3c64xx_spi_info s3c64xx_spi0_pdata; | |
| 66 | extern struct s3c64xx_spi_info s3c64xx_spi1_pdata; | |
| 323d7717 | 67 | extern struct s3c64xx_spi_info s3c64xx_spi2_pdata; |
| 963eb4b8 | 68 | #endif /*__SPI_S3C64XX_H */ |