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1 | #ifndef __LINUX_REGMAP_H |
2 | #define __LINUX_REGMAP_H | |
3 | ||
4 | /* | |
5 | * Register map access API | |
6 | * | |
7 | * Copyright 2011 Wolfson Microelectronics plc | |
8 | * | |
9 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
b83a313b | 16 | #include <linux/list.h> |
6863ca62 | 17 | #include <linux/rbtree.h> |
49ccc142 | 18 | #include <linux/err.h> |
3f0fa9a8 | 19 | #include <linux/bug.h> |
b83a313b | 20 | |
de477254 | 21 | struct module; |
313162d0 | 22 | struct device; |
9943fa30 | 23 | struct i2c_client; |
90f790d2 | 24 | struct irq_domain; |
a676f083 | 25 | struct spi_device; |
a01779f8 | 26 | struct spmi_device; |
b83d2ff0 | 27 | struct regmap; |
6863ca62 | 28 | struct regmap_range_cfg; |
67252287 | 29 | struct regmap_field; |
22853223 | 30 | struct snd_ac97; |
9943fa30 | 31 | |
9fabe24e DP |
32 | /* An enum of all the supported cache types */ |
33 | enum regcache_type { | |
34 | REGCACHE_NONE, | |
28644c80 | 35 | REGCACHE_RBTREE, |
2ac902ce MB |
36 | REGCACHE_COMPRESSED, |
37 | REGCACHE_FLAT, | |
9fabe24e DP |
38 | }; |
39 | ||
bd20eb54 MB |
40 | /** |
41 | * Default value for a register. We use an array of structs rather | |
42 | * than a simple array as many modern devices have very sparse | |
43 | * register maps. | |
44 | * | |
45 | * @reg: Register address. | |
46 | * @def: Register default value. | |
47 | */ | |
48 | struct reg_default { | |
49 | unsigned int reg; | |
50 | unsigned int def; | |
51 | }; | |
52 | ||
b83d2ff0 MB |
53 | #ifdef CONFIG_REGMAP |
54 | ||
141eba2e SW |
55 | enum regmap_endian { |
56 | /* Unspecified -> 0 -> Backwards compatible default */ | |
57 | REGMAP_ENDIAN_DEFAULT = 0, | |
58 | REGMAP_ENDIAN_BIG, | |
59 | REGMAP_ENDIAN_LITTLE, | |
60 | REGMAP_ENDIAN_NATIVE, | |
61 | }; | |
62 | ||
76aad392 DC |
63 | /** |
64 | * A register range, used for access related checks | |
65 | * (readable/writeable/volatile/precious checks) | |
66 | * | |
67 | * @range_min: address of first register | |
68 | * @range_max: address of last register | |
69 | */ | |
70 | struct regmap_range { | |
71 | unsigned int range_min; | |
72 | unsigned int range_max; | |
73 | }; | |
74 | ||
6112fe60 LD |
75 | #define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } |
76 | ||
76aad392 DC |
77 | /* |
78 | * A table of ranges including some yes ranges and some no ranges. | |
79 | * If a register belongs to a no_range, the corresponding check function | |
80 | * will return false. If a register belongs to a yes range, the corresponding | |
81 | * check function will return true. "no_ranges" are searched first. | |
82 | * | |
83 | * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" | |
84 | * @n_yes_ranges: size of the above array | |
85 | * @no_ranges: pointer to an array of regmap ranges used as "no ranges" | |
86 | * @n_no_ranges: size of the above array | |
87 | */ | |
88 | struct regmap_access_table { | |
89 | const struct regmap_range *yes_ranges; | |
90 | unsigned int n_yes_ranges; | |
91 | const struct regmap_range *no_ranges; | |
92 | unsigned int n_no_ranges; | |
93 | }; | |
94 | ||
0d4529c5 DC |
95 | typedef void (*regmap_lock)(void *); |
96 | typedef void (*regmap_unlock)(void *); | |
97 | ||
dd898b20 MB |
98 | /** |
99 | * Configuration for the register map of a device. | |
100 | * | |
d3c242e1 SW |
101 | * @name: Optional name of the regmap. Useful when a device has multiple |
102 | * register regions. | |
103 | * | |
dd898b20 | 104 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
105 | * @reg_stride: The register address stride. Valid register addresses are a |
106 | * multiple of this value. If set to 0, a value of 1 will be | |
107 | * used. | |
82159ba8 | 108 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 109 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 110 | * |
3566cc9d | 111 | * @writeable_reg: Optional callback returning true if the register |
76aad392 DC |
112 | * can be written to. If this field is NULL but wr_table |
113 | * (see below) is not, the check is performed on such table | |
114 | * (a register is writeable if it belongs to one of the ranges | |
115 | * specified by wr_table). | |
3566cc9d | 116 | * @readable_reg: Optional callback returning true if the register |
76aad392 DC |
117 | * can be read from. If this field is NULL but rd_table |
118 | * (see below) is not, the check is performed on such table | |
119 | * (a register is readable if it belongs to one of the ranges | |
120 | * specified by rd_table). | |
3566cc9d | 121 | * @volatile_reg: Optional callback returning true if the register |
76aad392 DC |
122 | * value can't be cached. If this field is NULL but |
123 | * volatile_table (see below) is not, the check is performed on | |
124 | * such table (a register is volatile if it belongs to one of | |
125 | * the ranges specified by volatile_table). | |
bdc39644 | 126 | * @precious_reg: Optional callback returning true if the register |
76aad392 | 127 | * should not be read outside of a call from the driver |
bdc39644 | 128 | * (e.g., a clear on read interrupt status register). If this |
76aad392 DC |
129 | * field is NULL but precious_table (see below) is not, the |
130 | * check is performed on such table (a register is precious if | |
131 | * it belongs to one of the ranges specified by precious_table). | |
132 | * @lock: Optional lock callback (overrides regmap's default lock | |
133 | * function, based on spinlock or mutex). | |
134 | * @unlock: As above for unlocking. | |
135 | * @lock_arg: this field is passed as the only argument of lock/unlock | |
136 | * functions (ignored in case regular lock/unlock functions | |
137 | * are not overridden). | |
d2a5884a AS |
138 | * @reg_read: Optional callback that if filled will be used to perform |
139 | * all the reads from the registers. Should only be provided for | |
bdc39644 LP |
140 | * devices whose read operation cannot be represented as a simple |
141 | * read operation on a bus such as SPI, I2C, etc. Most of the | |
142 | * devices do not need this. | |
d2a5884a AS |
143 | * @reg_write: Same as above for writing. |
144 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex | |
145 | * to perform locking. This field is ignored if custom lock/unlock | |
146 | * functions are used (see fields lock/unlock of struct regmap_config). | |
147 | * This field is a duplicate of a similar file in | |
148 | * 'struct regmap_bus' and serves exact same purpose. | |
149 | * Use it only for "no-bus" cases. | |
bd20eb54 | 150 | * @max_register: Optional, specifies the maximum valid register index. |
76aad392 DC |
151 | * @wr_table: Optional, points to a struct regmap_access_table specifying |
152 | * valid ranges for write access. | |
153 | * @rd_table: As above, for read access. | |
154 | * @volatile_table: As above, for volatile registers. | |
155 | * @precious_table: As above, for precious registers. | |
bd20eb54 MB |
156 | * @reg_defaults: Power on reset values for registers (for use with |
157 | * register cache support). | |
158 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 LPC |
159 | * |
160 | * @read_flag_mask: Mask to be set in the top byte of the register when doing | |
161 | * a read. | |
162 | * @write_flag_mask: Mask to be set in the top byte of the register when doing | |
163 | * a write. If both read_flag_mask and write_flag_mask are | |
164 | * empty the regmap_bus default masks are used. | |
2e33caf1 AJ |
165 | * @use_single_rw: If set, converts the bulk read and write operations into |
166 | * a series of single read and write operations. This is useful | |
167 | * for device that does not support bulk read and write. | |
e894c3f4 OAO |
168 | * @can_multi_write: If set, the device supports the multi write mode of bulk |
169 | * write operations, if clear multi write requests will be | |
170 | * split into individual write operations | |
9fabe24e DP |
171 | * |
172 | * @cache_type: The actual cache type. | |
173 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
174 | * register cache support). | |
175 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
176 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
177 | * DEFAULT, the @reg_format_endian_default value from the | |
178 | * regmap bus is used. | |
179 | * @val_format_endian: Endianness for formatted register values. If this is | |
180 | * DEFAULT, the @reg_format_endian_default value from the | |
181 | * regmap bus is used. | |
6863ca62 KG |
182 | * |
183 | * @ranges: Array of configuration entries for virtual address ranges. | |
184 | * @num_ranges: Number of range configuration entries. | |
dd898b20 | 185 | */ |
b83a313b | 186 | struct regmap_config { |
d3c242e1 SW |
187 | const char *name; |
188 | ||
b83a313b | 189 | int reg_bits; |
f01ee60f | 190 | int reg_stride; |
82159ba8 | 191 | int pad_bits; |
b83a313b | 192 | int val_bits; |
2e2ae66d | 193 | |
2e2ae66d MB |
194 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
195 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
196 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 197 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
0d4529c5 DC |
198 | regmap_lock lock; |
199 | regmap_unlock unlock; | |
200 | void *lock_arg; | |
bd20eb54 | 201 | |
d2a5884a AS |
202 | int (*reg_read)(void *context, unsigned int reg, unsigned int *val); |
203 | int (*reg_write)(void *context, unsigned int reg, unsigned int val); | |
204 | ||
205 | bool fast_io; | |
206 | ||
bd20eb54 | 207 | unsigned int max_register; |
76aad392 DC |
208 | const struct regmap_access_table *wr_table; |
209 | const struct regmap_access_table *rd_table; | |
210 | const struct regmap_access_table *volatile_table; | |
211 | const struct regmap_access_table *precious_table; | |
720e4616 | 212 | const struct reg_default *reg_defaults; |
9fabe24e DP |
213 | unsigned int num_reg_defaults; |
214 | enum regcache_type cache_type; | |
215 | const void *reg_defaults_raw; | |
216 | unsigned int num_reg_defaults_raw; | |
6f306441 LPC |
217 | |
218 | u8 read_flag_mask; | |
219 | u8 write_flag_mask; | |
2e33caf1 AJ |
220 | |
221 | bool use_single_rw; | |
e894c3f4 | 222 | bool can_multi_write; |
141eba2e SW |
223 | |
224 | enum regmap_endian reg_format_endian; | |
225 | enum regmap_endian val_format_endian; | |
38e23194 | 226 | |
6863ca62 | 227 | const struct regmap_range_cfg *ranges; |
e3549cd0 | 228 | unsigned int num_ranges; |
6863ca62 KG |
229 | }; |
230 | ||
231 | /** | |
232 | * Configuration for indirectly accessed or paged registers. | |
233 | * Registers, mapped to this virtual range, are accessed in two steps: | |
234 | * 1. page selector register update; | |
235 | * 2. access through data window registers. | |
236 | * | |
d058bb49 MB |
237 | * @name: Descriptive name for diagnostics |
238 | * | |
6863ca62 KG |
239 | * @range_min: Address of the lowest register address in virtual range. |
240 | * @range_max: Address of the highest register in virtual range. | |
241 | * | |
242 | * @page_sel_reg: Register with selector field. | |
243 | * @page_sel_mask: Bit shift for selector value. | |
244 | * @page_sel_shift: Bit mask for selector value. | |
245 | * | |
246 | * @window_start: Address of first (lowest) register in data window. | |
247 | * @window_len: Number of registers in data window. | |
248 | */ | |
249 | struct regmap_range_cfg { | |
d058bb49 MB |
250 | const char *name; |
251 | ||
6863ca62 KG |
252 | /* Registers of virtual address range */ |
253 | unsigned int range_min; | |
254 | unsigned int range_max; | |
255 | ||
256 | /* Page selector for indirect addressing */ | |
257 | unsigned int selector_reg; | |
258 | unsigned int selector_mask; | |
259 | int selector_shift; | |
260 | ||
261 | /* Data window (per each page) */ | |
262 | unsigned int window_start; | |
263 | unsigned int window_len; | |
b83a313b MB |
264 | }; |
265 | ||
0d509f2b MB |
266 | struct regmap_async; |
267 | ||
0135bbcc | 268 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 269 | size_t count); |
0135bbcc | 270 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
271 | const void *reg, size_t reg_len, |
272 | const void *val, size_t val_len); | |
0d509f2b MB |
273 | typedef int (*regmap_hw_async_write)(void *context, |
274 | const void *reg, size_t reg_len, | |
275 | const void *val, size_t val_len, | |
276 | struct regmap_async *async); | |
0135bbcc | 277 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
278 | const void *reg_buf, size_t reg_size, |
279 | void *val_buf, size_t val_size); | |
3ac17037 BB |
280 | typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg, |
281 | unsigned int *val); | |
282 | typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg, | |
283 | unsigned int val); | |
0d509f2b | 284 | typedef struct regmap_async *(*regmap_hw_async_alloc)(void); |
0135bbcc | 285 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
286 | |
287 | /** | |
288 | * Description of a hardware bus for the register map infrastructure. | |
289 | * | |
bacdbe07 | 290 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
0d4529c5 DC |
291 | * to perform locking. This field is ignored if custom lock/unlock |
292 | * functions are used (see fields lock/unlock of | |
293 | * struct regmap_config). | |
b83a313b MB |
294 | * @write: Write operation. |
295 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
296 | * if not implemented on a given device. | |
0d509f2b MB |
297 | * @async_write: Write operation which completes asynchronously, optional and |
298 | * must serialise with respect to non-async I/O. | |
c5f58f2d MP |
299 | * @reg_write: Write a single register value to the given register address. This |
300 | * write operation has to complete when returning from the function. | |
b83a313b MB |
301 | * @read: Read operation. Data is returned in the buffer used to transmit |
302 | * data. | |
c5f58f2d MP |
303 | * @reg_read: Read a single register value from a given register address. |
304 | * @free_context: Free context. | |
0d509f2b | 305 | * @async_alloc: Allocate a regmap_async() structure. |
b83a313b MB |
306 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
307 | * a read. | |
141eba2e SW |
308 | * @reg_format_endian_default: Default endianness for formatted register |
309 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
310 | * DEFAULT, BIG is assumed. | |
311 | * @val_format_endian_default: Default endianness for formatted register | |
312 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
313 | * DEFAULT, BIG is assumed. | |
b83a313b MB |
314 | */ |
315 | struct regmap_bus { | |
bacdbe07 | 316 | bool fast_io; |
b83a313b MB |
317 | regmap_hw_write write; |
318 | regmap_hw_gather_write gather_write; | |
0d509f2b | 319 | regmap_hw_async_write async_write; |
3ac17037 | 320 | regmap_hw_reg_write reg_write; |
b83a313b | 321 | regmap_hw_read read; |
3ac17037 | 322 | regmap_hw_reg_read reg_read; |
0135bbcc | 323 | regmap_hw_free_context free_context; |
0d509f2b | 324 | regmap_hw_async_alloc async_alloc; |
b83a313b | 325 | u8 read_flag_mask; |
141eba2e SW |
326 | enum regmap_endian reg_format_endian_default; |
327 | enum regmap_endian val_format_endian_default; | |
b83a313b MB |
328 | }; |
329 | ||
330 | struct regmap *regmap_init(struct device *dev, | |
331 | const struct regmap_bus *bus, | |
0135bbcc | 332 | void *bus_context, |
b83a313b | 333 | const struct regmap_config *config); |
6cfec04b MS |
334 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
335 | const struct regmap_config *config); | |
9943fa30 MB |
336 | struct regmap *regmap_init_i2c(struct i2c_client *i2c, |
337 | const struct regmap_config *config); | |
a676f083 MB |
338 | struct regmap *regmap_init_spi(struct spi_device *dev, |
339 | const struct regmap_config *config); | |
c9afbb05 JC |
340 | struct regmap *regmap_init_spmi_base(struct spmi_device *dev, |
341 | const struct regmap_config *config); | |
342 | struct regmap *regmap_init_spmi_ext(struct spmi_device *dev, | |
343 | const struct regmap_config *config); | |
878ec67b PZ |
344 | struct regmap *regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
345 | void __iomem *regs, | |
346 | const struct regmap_config *config); | |
22853223 MB |
347 | struct regmap *regmap_init_ac97(struct snd_ac97 *ac97, |
348 | const struct regmap_config *config); | |
a676f083 | 349 | |
c0eb4676 MB |
350 | struct regmap *devm_regmap_init(struct device *dev, |
351 | const struct regmap_bus *bus, | |
0135bbcc | 352 | void *bus_context, |
c0eb4676 MB |
353 | const struct regmap_config *config); |
354 | struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c, | |
355 | const struct regmap_config *config); | |
356 | struct regmap *devm_regmap_init_spi(struct spi_device *dev, | |
357 | const struct regmap_config *config); | |
c9afbb05 JC |
358 | struct regmap *devm_regmap_init_spmi_base(struct spmi_device *dev, |
359 | const struct regmap_config *config); | |
360 | struct regmap *devm_regmap_init_spmi_ext(struct spmi_device *dev, | |
361 | const struct regmap_config *config); | |
878ec67b PZ |
362 | struct regmap *devm_regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
363 | void __iomem *regs, | |
364 | const struct regmap_config *config); | |
22853223 MB |
365 | struct regmap *devm_regmap_init_ac97(struct snd_ac97 *ac97, |
366 | const struct regmap_config *config); | |
367 | ||
368 | bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg); | |
878ec67b PZ |
369 | |
370 | /** | |
371 | * regmap_init_mmio(): Initialise register map | |
372 | * | |
373 | * @dev: Device that will be interacted with | |
374 | * @regs: Pointer to memory-mapped IO region | |
375 | * @config: Configuration for register map | |
376 | * | |
377 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
378 | * a struct regmap. | |
379 | */ | |
380 | static inline struct regmap *regmap_init_mmio(struct device *dev, | |
381 | void __iomem *regs, | |
382 | const struct regmap_config *config) | |
383 | { | |
384 | return regmap_init_mmio_clk(dev, NULL, regs, config); | |
385 | } | |
386 | ||
387 | /** | |
388 | * devm_regmap_init_mmio(): Initialise managed register map | |
389 | * | |
390 | * @dev: Device that will be interacted with | |
391 | * @regs: Pointer to memory-mapped IO region | |
392 | * @config: Configuration for register map | |
393 | * | |
394 | * The return value will be an ERR_PTR() on error or a valid pointer | |
395 | * to a struct regmap. The regmap will be automatically freed by the | |
396 | * device management code. | |
397 | */ | |
398 | static inline struct regmap *devm_regmap_init_mmio(struct device *dev, | |
399 | void __iomem *regs, | |
400 | const struct regmap_config *config) | |
401 | { | |
402 | return devm_regmap_init_mmio_clk(dev, NULL, regs, config); | |
403 | } | |
c0eb4676 | 404 | |
b83a313b | 405 | void regmap_exit(struct regmap *map); |
bf315173 MB |
406 | int regmap_reinit_cache(struct regmap *map, |
407 | const struct regmap_config *config); | |
72b39f6f | 408 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
8d7d3972 | 409 | struct device *regmap_get_device(struct regmap *map); |
b83a313b | 410 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
915f441b | 411 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); |
b83a313b MB |
412 | int regmap_raw_write(struct regmap *map, unsigned int reg, |
413 | const void *val, size_t val_len); | |
8eaeb219 LD |
414 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
415 | size_t val_count); | |
f7e2cec0 | 416 | int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, |
e33fabd3 | 417 | int num_regs); |
1d5b40bc CK |
418 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
419 | const struct reg_default *regs, | |
420 | int num_regs); | |
0d509f2b MB |
421 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
422 | const void *val, size_t val_len); | |
b83a313b MB |
423 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
424 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
425 | void *val, size_t val_len); | |
426 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
427 | size_t val_count); | |
428 | int regmap_update_bits(struct regmap *map, unsigned int reg, | |
429 | unsigned int mask, unsigned int val); | |
915f441b MB |
430 | int regmap_update_bits_async(struct regmap *map, unsigned int reg, |
431 | unsigned int mask, unsigned int val); | |
018690d3 MB |
432 | int regmap_update_bits_check(struct regmap *map, unsigned int reg, |
433 | unsigned int mask, unsigned int val, | |
434 | bool *change); | |
915f441b MB |
435 | int regmap_update_bits_check_async(struct regmap *map, unsigned int reg, |
436 | unsigned int mask, unsigned int val, | |
437 | bool *change); | |
a6539c32 | 438 | int regmap_get_val_bytes(struct regmap *map); |
668abc72 | 439 | int regmap_get_max_register(struct regmap *map); |
a2f776cb | 440 | int regmap_get_reg_stride(struct regmap *map); |
0d509f2b | 441 | int regmap_async_complete(struct regmap *map); |
221ad7f2 | 442 | bool regmap_can_raw_write(struct regmap *map); |
b83a313b | 443 | |
39a58439 | 444 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
445 | int regcache_sync_region(struct regmap *map, unsigned int min, |
446 | unsigned int max); | |
697e85bc MB |
447 | int regcache_drop_region(struct regmap *map, unsigned int min, |
448 | unsigned int max); | |
92afb286 | 449 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 450 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 451 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 452 | |
154881e5 MB |
453 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
454 | const struct regmap_access_table *table); | |
455 | ||
22f0d90a MB |
456 | int regmap_register_patch(struct regmap *map, const struct reg_default *regs, |
457 | int num_regs); | |
13ff50c8 NC |
458 | int regmap_parse_val(struct regmap *map, const void *buf, |
459 | unsigned int *val); | |
22f0d90a | 460 | |
76aad392 DC |
461 | static inline bool regmap_reg_in_range(unsigned int reg, |
462 | const struct regmap_range *range) | |
463 | { | |
464 | return reg >= range->range_min && reg <= range->range_max; | |
465 | } | |
466 | ||
467 | bool regmap_reg_in_ranges(unsigned int reg, | |
468 | const struct regmap_range *ranges, | |
469 | unsigned int nranges); | |
470 | ||
67252287 SK |
471 | /** |
472 | * Description of an register field | |
473 | * | |
474 | * @reg: Offset of the register within the regmap bank | |
475 | * @lsb: lsb of the register field. | |
f27b37f5 | 476 | * @msb: msb of the register field. |
a0102375 KM |
477 | * @id_size: port size if it has some ports |
478 | * @id_offset: address offset for each ports | |
67252287 SK |
479 | */ |
480 | struct reg_field { | |
481 | unsigned int reg; | |
482 | unsigned int lsb; | |
483 | unsigned int msb; | |
a0102375 KM |
484 | unsigned int id_size; |
485 | unsigned int id_offset; | |
67252287 SK |
486 | }; |
487 | ||
488 | #define REG_FIELD(_reg, _lsb, _msb) { \ | |
489 | .reg = _reg, \ | |
490 | .lsb = _lsb, \ | |
491 | .msb = _msb, \ | |
492 | } | |
493 | ||
494 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, | |
495 | struct reg_field reg_field); | |
496 | void regmap_field_free(struct regmap_field *field); | |
497 | ||
498 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
499 | struct regmap *regmap, struct reg_field reg_field); | |
500 | void devm_regmap_field_free(struct device *dev, struct regmap_field *field); | |
501 | ||
502 | int regmap_field_read(struct regmap_field *field, unsigned int *val); | |
503 | int regmap_field_write(struct regmap_field *field, unsigned int val); | |
fdf20029 KM |
504 | int regmap_field_update_bits(struct regmap_field *field, |
505 | unsigned int mask, unsigned int val); | |
76aad392 | 506 | |
a0102375 KM |
507 | int regmap_fields_write(struct regmap_field *field, unsigned int id, |
508 | unsigned int val); | |
509 | int regmap_fields_read(struct regmap_field *field, unsigned int id, | |
510 | unsigned int *val); | |
511 | int regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
512 | unsigned int mask, unsigned int val); | |
76aad392 | 513 | |
f8beab2b MB |
514 | /** |
515 | * Description of an IRQ for the generic regmap irq_chip. | |
516 | * | |
517 | * @reg_offset: Offset of the status/mask register within the bank | |
518 | * @mask: Mask used to flag/control the register. | |
519 | */ | |
520 | struct regmap_irq { | |
521 | unsigned int reg_offset; | |
522 | unsigned int mask; | |
523 | }; | |
524 | ||
525 | /** | |
526 | * Description of a generic regmap irq_chip. This is not intended to | |
527 | * handle every possible interrupt controller, but it should handle a | |
528 | * substantial proportion of those that are found in the wild. | |
529 | * | |
530 | * @name: Descriptive name for IRQ controller. | |
531 | * | |
532 | * @status_base: Base status register address. | |
533 | * @mask_base: Base mask register address. | |
d3233433 AS |
534 | * @ack_base: Base ack address. If zero then the chip is clear on read. |
535 | * Using zero value is possible with @use_ack bit. | |
a43fd50d | 536 | * @wake_base: Base address for wake enables. If zero unsupported. |
022f926a | 537 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
2753e6f8 | 538 | * @init_ack_masked: Ack all masked interrupts once during initalization. |
68622bdf | 539 | * @mask_invert: Inverted mask register: cleared bits are masked out. |
d3233433 | 540 | * @use_ack: Use @ack register even if it is zero. |
68622bdf | 541 | * @wake_invert: Inverted wake register: cleared bits are wake enabled. |
0c00c50b | 542 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
f8beab2b MB |
543 | * |
544 | * @num_regs: Number of registers in each control bank. | |
545 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are | |
546 | * assigned based on the index in the array of the interrupt. | |
547 | * @num_irqs: Number of descriptors. | |
548 | */ | |
549 | struct regmap_irq_chip { | |
550 | const char *name; | |
551 | ||
552 | unsigned int status_base; | |
553 | unsigned int mask_base; | |
554 | unsigned int ack_base; | |
a43fd50d | 555 | unsigned int wake_base; |
022f926a | 556 | unsigned int irq_reg_stride; |
f484f7a6 PZ |
557 | bool init_ack_masked:1; |
558 | bool mask_invert:1; | |
d3233433 | 559 | bool use_ack:1; |
f484f7a6 PZ |
560 | bool wake_invert:1; |
561 | bool runtime_pm:1; | |
f8beab2b MB |
562 | |
563 | int num_regs; | |
564 | ||
565 | const struct regmap_irq *irqs; | |
566 | int num_irqs; | |
567 | }; | |
568 | ||
569 | struct regmap_irq_chip_data; | |
570 | ||
571 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |
b026ddbb | 572 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b MB |
573 | struct regmap_irq_chip_data **data); |
574 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); | |
209a6006 | 575 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 576 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
90f790d2 | 577 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); |
92afb286 | 578 | |
9cde5fcd MB |
579 | #else |
580 | ||
581 | /* | |
582 | * These stubs should only ever be called by generic code which has | |
583 | * regmap based facilities, if they ever get called at runtime | |
584 | * something is going wrong and something probably needs to select | |
585 | * REGMAP. | |
586 | */ | |
587 | ||
588 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
589 | unsigned int val) | |
590 | { | |
591 | WARN_ONCE(1, "regmap API is disabled"); | |
592 | return -EINVAL; | |
593 | } | |
594 | ||
915f441b MB |
595 | static inline int regmap_write_async(struct regmap *map, unsigned int reg, |
596 | unsigned int val) | |
597 | { | |
598 | WARN_ONCE(1, "regmap API is disabled"); | |
599 | return -EINVAL; | |
600 | } | |
601 | ||
9cde5fcd MB |
602 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, |
603 | const void *val, size_t val_len) | |
604 | { | |
605 | WARN_ONCE(1, "regmap API is disabled"); | |
606 | return -EINVAL; | |
607 | } | |
608 | ||
0d509f2b MB |
609 | static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
610 | const void *val, size_t val_len) | |
611 | { | |
612 | WARN_ONCE(1, "regmap API is disabled"); | |
613 | return -EINVAL; | |
614 | } | |
615 | ||
9cde5fcd MB |
616 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, |
617 | const void *val, size_t val_count) | |
618 | { | |
619 | WARN_ONCE(1, "regmap API is disabled"); | |
620 | return -EINVAL; | |
621 | } | |
622 | ||
623 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
624 | unsigned int *val) | |
625 | { | |
626 | WARN_ONCE(1, "regmap API is disabled"); | |
627 | return -EINVAL; | |
628 | } | |
629 | ||
630 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
631 | void *val, size_t val_len) | |
632 | { | |
633 | WARN_ONCE(1, "regmap API is disabled"); | |
634 | return -EINVAL; | |
635 | } | |
636 | ||
637 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, | |
638 | void *val, size_t val_count) | |
639 | { | |
640 | WARN_ONCE(1, "regmap API is disabled"); | |
641 | return -EINVAL; | |
642 | } | |
643 | ||
644 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, | |
645 | unsigned int mask, unsigned int val) | |
646 | { | |
647 | WARN_ONCE(1, "regmap API is disabled"); | |
648 | return -EINVAL; | |
649 | } | |
650 | ||
915f441b MB |
651 | static inline int regmap_update_bits_async(struct regmap *map, |
652 | unsigned int reg, | |
653 | unsigned int mask, unsigned int val) | |
654 | { | |
655 | WARN_ONCE(1, "regmap API is disabled"); | |
656 | return -EINVAL; | |
657 | } | |
658 | ||
9cde5fcd MB |
659 | static inline int regmap_update_bits_check(struct regmap *map, |
660 | unsigned int reg, | |
661 | unsigned int mask, unsigned int val, | |
662 | bool *change) | |
663 | { | |
664 | WARN_ONCE(1, "regmap API is disabled"); | |
665 | return -EINVAL; | |
666 | } | |
667 | ||
915f441b MB |
668 | static inline int regmap_update_bits_check_async(struct regmap *map, |
669 | unsigned int reg, | |
670 | unsigned int mask, | |
671 | unsigned int val, | |
672 | bool *change) | |
673 | { | |
674 | WARN_ONCE(1, "regmap API is disabled"); | |
675 | return -EINVAL; | |
676 | } | |
677 | ||
9cde5fcd MB |
678 | static inline int regmap_get_val_bytes(struct regmap *map) |
679 | { | |
680 | WARN_ONCE(1, "regmap API is disabled"); | |
681 | return -EINVAL; | |
682 | } | |
683 | ||
668abc72 SK |
684 | static inline int regmap_get_max_register(struct regmap *map) |
685 | { | |
686 | WARN_ONCE(1, "regmap API is disabled"); | |
687 | return -EINVAL; | |
688 | } | |
689 | ||
a2f776cb SK |
690 | static inline int regmap_get_reg_stride(struct regmap *map) |
691 | { | |
692 | WARN_ONCE(1, "regmap API is disabled"); | |
693 | return -EINVAL; | |
694 | } | |
695 | ||
9cde5fcd MB |
696 | static inline int regcache_sync(struct regmap *map) |
697 | { | |
698 | WARN_ONCE(1, "regmap API is disabled"); | |
699 | return -EINVAL; | |
700 | } | |
701 | ||
a313f9f5 MB |
702 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
703 | unsigned int max) | |
704 | { | |
705 | WARN_ONCE(1, "regmap API is disabled"); | |
706 | return -EINVAL; | |
707 | } | |
708 | ||
697e85bc MB |
709 | static inline int regcache_drop_region(struct regmap *map, unsigned int min, |
710 | unsigned int max) | |
711 | { | |
712 | WARN_ONCE(1, "regmap API is disabled"); | |
713 | return -EINVAL; | |
714 | } | |
715 | ||
9cde5fcd MB |
716 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
717 | { | |
718 | WARN_ONCE(1, "regmap API is disabled"); | |
719 | } | |
720 | ||
721 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
722 | { | |
723 | WARN_ONCE(1, "regmap API is disabled"); | |
724 | } | |
725 | ||
726 | static inline void regcache_mark_dirty(struct regmap *map) | |
727 | { | |
728 | WARN_ONCE(1, "regmap API is disabled"); | |
729 | } | |
730 | ||
0d509f2b MB |
731 | static inline void regmap_async_complete(struct regmap *map) |
732 | { | |
733 | WARN_ONCE(1, "regmap API is disabled"); | |
734 | } | |
735 | ||
9cde5fcd MB |
736 | static inline int regmap_register_patch(struct regmap *map, |
737 | const struct reg_default *regs, | |
738 | int num_regs) | |
739 | { | |
740 | WARN_ONCE(1, "regmap API is disabled"); | |
741 | return -EINVAL; | |
742 | } | |
743 | ||
13ff50c8 NC |
744 | static inline int regmap_parse_val(struct regmap *map, const void *buf, |
745 | unsigned int *val) | |
746 | { | |
747 | WARN_ONCE(1, "regmap API is disabled"); | |
748 | return -EINVAL; | |
749 | } | |
750 | ||
72b39f6f MB |
751 | static inline struct regmap *dev_get_regmap(struct device *dev, |
752 | const char *name) | |
753 | { | |
72b39f6f MB |
754 | return NULL; |
755 | } | |
756 | ||
8d7d3972 TT |
757 | static inline struct device *regmap_get_device(struct regmap *map) |
758 | { | |
759 | WARN_ONCE(1, "regmap API is disabled"); | |
1d33dc6b | 760 | return NULL; |
8d7d3972 TT |
761 | } |
762 | ||
9cde5fcd MB |
763 | #endif |
764 | ||
b83a313b | 765 | #endif |