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1#ifndef __LINUX_REGMAP_H
2#define __LINUX_REGMAP_H
3
4/*
5 * Register map access API
6 *
7 * Copyright 2011 Wolfson Microelectronics plc
8 *
9 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
b83a313b 16#include <linux/list.h>
6863ca62 17#include <linux/rbtree.h>
b83a313b 18
de477254 19struct module;
313162d0 20struct device;
9943fa30 21struct i2c_client;
a676f083 22struct spi_device;
b83d2ff0 23struct regmap;
6863ca62 24struct regmap_range_cfg;
9943fa30 25
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26/* An enum of all the supported cache types */
27enum regcache_type {
28 REGCACHE_NONE,
28644c80 29 REGCACHE_RBTREE,
50b776fc 30 REGCACHE_COMPRESSED
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31};
32
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33/**
34 * Default value for a register. We use an array of structs rather
35 * than a simple array as many modern devices have very sparse
36 * register maps.
37 *
38 * @reg: Register address.
39 * @def: Register default value.
40 */
41struct reg_default {
42 unsigned int reg;
43 unsigned int def;
44};
45
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46#ifdef CONFIG_REGMAP
47
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48enum regmap_endian {
49 /* Unspecified -> 0 -> Backwards compatible default */
50 REGMAP_ENDIAN_DEFAULT = 0,
51 REGMAP_ENDIAN_BIG,
52 REGMAP_ENDIAN_LITTLE,
53 REGMAP_ENDIAN_NATIVE,
54};
55
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56typedef void (*regmap_lock)(void *);
57typedef void (*regmap_unlock)(void *);
58
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59/**
60 * Configuration for the register map of a device.
61 *
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62 * @name: Optional name of the regmap. Useful when a device has multiple
63 * register regions.
64 *
dd898b20 65 * @reg_bits: Number of bits in a register address, mandatory.
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66 * @reg_stride: The register address stride. Valid register addresses are a
67 * multiple of this value. If set to 0, a value of 1 will be
68 * used.
82159ba8 69 * @pad_bits: Number of bits of padding between register and value.
dd898b20 70 * @val_bits: Number of bits in a register value, mandatory.
2e2ae66d 71 *
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72 * @writeable_reg: Optional callback returning true if the register
73 * can be written to.
74 * @readable_reg: Optional callback returning true if the register
75 * can be read from.
76 * @volatile_reg: Optional callback returning true if the register
77 * value can't be cached.
78 * @precious_reg: Optional callback returning true if the rgister
79 * should not be read outside of a call from the driver
80 * (eg, a clear on read interrupt status register).
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81 * @lock: Optional lock callback (overrides regmap's default lock
82 * function, based on spinlock or mutex).
83 * @unlock: As above for unlocking.
84 * @lock_arg: this field is passed as the only argument of lock/unlock
85 * functions (ignored in case regular lock/unlock functions
86 * are not overridden).
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87 *
88 * @max_register: Optional, specifies the maximum valid register index.
89 * @reg_defaults: Power on reset values for registers (for use with
90 * register cache support).
91 * @num_reg_defaults: Number of elements in reg_defaults.
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92 *
93 * @read_flag_mask: Mask to be set in the top byte of the register when doing
94 * a read.
95 * @write_flag_mask: Mask to be set in the top byte of the register when doing
96 * a write. If both read_flag_mask and write_flag_mask are
97 * empty the regmap_bus default masks are used.
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98 * @use_single_rw: If set, converts the bulk read and write operations into
99 * a series of single read and write operations. This is useful
100 * for device that does not support bulk read and write.
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101 *
102 * @cache_type: The actual cache type.
103 * @reg_defaults_raw: Power on reset values for registers (for use with
104 * register cache support).
105 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
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106 * @reg_format_endian: Endianness for formatted register addresses. If this is
107 * DEFAULT, the @reg_format_endian_default value from the
108 * regmap bus is used.
109 * @val_format_endian: Endianness for formatted register values. If this is
110 * DEFAULT, the @reg_format_endian_default value from the
111 * regmap bus is used.
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112 *
113 * @ranges: Array of configuration entries for virtual address ranges.
114 * @num_ranges: Number of range configuration entries.
dd898b20 115 */
b83a313b 116struct regmap_config {
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117 const char *name;
118
b83a313b 119 int reg_bits;
f01ee60f 120 int reg_stride;
82159ba8 121 int pad_bits;
b83a313b 122 int val_bits;
2e2ae66d 123
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124 bool (*writeable_reg)(struct device *dev, unsigned int reg);
125 bool (*readable_reg)(struct device *dev, unsigned int reg);
126 bool (*volatile_reg)(struct device *dev, unsigned int reg);
18694886 127 bool (*precious_reg)(struct device *dev, unsigned int reg);
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128 regmap_lock lock;
129 regmap_unlock unlock;
130 void *lock_arg;
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131
132 unsigned int max_register;
720e4616 133 const struct reg_default *reg_defaults;
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134 unsigned int num_reg_defaults;
135 enum regcache_type cache_type;
136 const void *reg_defaults_raw;
137 unsigned int num_reg_defaults_raw;
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138
139 u8 read_flag_mask;
140 u8 write_flag_mask;
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141
142 bool use_single_rw;
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143
144 enum regmap_endian reg_format_endian;
145 enum regmap_endian val_format_endian;
38e23194 146
6863ca62 147 const struct regmap_range_cfg *ranges;
e3549cd0 148 unsigned int num_ranges;
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149};
150
151/**
152 * Configuration for indirectly accessed or paged registers.
153 * Registers, mapped to this virtual range, are accessed in two steps:
154 * 1. page selector register update;
155 * 2. access through data window registers.
156 *
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157 * @name: Descriptive name for diagnostics
158 *
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159 * @range_min: Address of the lowest register address in virtual range.
160 * @range_max: Address of the highest register in virtual range.
161 *
162 * @page_sel_reg: Register with selector field.
163 * @page_sel_mask: Bit shift for selector value.
164 * @page_sel_shift: Bit mask for selector value.
165 *
166 * @window_start: Address of first (lowest) register in data window.
167 * @window_len: Number of registers in data window.
168 */
169struct regmap_range_cfg {
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170 const char *name;
171
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172 /* Registers of virtual address range */
173 unsigned int range_min;
174 unsigned int range_max;
175
176 /* Page selector for indirect addressing */
177 unsigned int selector_reg;
178 unsigned int selector_mask;
179 int selector_shift;
180
181 /* Data window (per each page) */
182 unsigned int window_start;
183 unsigned int window_len;
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184};
185
0135bbcc 186typedef int (*regmap_hw_write)(void *context, const void *data,
b83a313b 187 size_t count);
0135bbcc 188typedef int (*regmap_hw_gather_write)(void *context,
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189 const void *reg, size_t reg_len,
190 const void *val, size_t val_len);
0135bbcc 191typedef int (*regmap_hw_read)(void *context,
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192 const void *reg_buf, size_t reg_size,
193 void *val_buf, size_t val_size);
0135bbcc 194typedef void (*regmap_hw_free_context)(void *context);
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195
196/**
197 * Description of a hardware bus for the register map infrastructure.
198 *
bacdbe07 199 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
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200 * to perform locking. This field is ignored if custom lock/unlock
201 * functions are used (see fields lock/unlock of
202 * struct regmap_config).
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203 * @write: Write operation.
204 * @gather_write: Write operation with split register/value, return -ENOTSUPP
205 * if not implemented on a given device.
206 * @read: Read operation. Data is returned in the buffer used to transmit
207 * data.
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208 * @read_flag_mask: Mask to be set in the top byte of the register when doing
209 * a read.
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210 * @reg_format_endian_default: Default endianness for formatted register
211 * addresses. Used when the regmap_config specifies DEFAULT. If this is
212 * DEFAULT, BIG is assumed.
213 * @val_format_endian_default: Default endianness for formatted register
214 * values. Used when the regmap_config specifies DEFAULT. If this is
215 * DEFAULT, BIG is assumed.
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216 */
217struct regmap_bus {
bacdbe07 218 bool fast_io;
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219 regmap_hw_write write;
220 regmap_hw_gather_write gather_write;
221 regmap_hw_read read;
0135bbcc 222 regmap_hw_free_context free_context;
b83a313b 223 u8 read_flag_mask;
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224 enum regmap_endian reg_format_endian_default;
225 enum regmap_endian val_format_endian_default;
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226};
227
228struct regmap *regmap_init(struct device *dev,
229 const struct regmap_bus *bus,
0135bbcc 230 void *bus_context,
b83a313b 231 const struct regmap_config *config);
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232struct regmap *regmap_init_i2c(struct i2c_client *i2c,
233 const struct regmap_config *config);
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234struct regmap *regmap_init_spi(struct spi_device *dev,
235 const struct regmap_config *config);
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236struct regmap *regmap_init_mmio(struct device *dev,
237 void __iomem *regs,
238 const struct regmap_config *config);
a676f083 239
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240struct regmap *devm_regmap_init(struct device *dev,
241 const struct regmap_bus *bus,
0135bbcc 242 void *bus_context,
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243 const struct regmap_config *config);
244struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c,
245 const struct regmap_config *config);
246struct regmap *devm_regmap_init_spi(struct spi_device *dev,
247 const struct regmap_config *config);
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248struct regmap *devm_regmap_init_mmio(struct device *dev,
249 void __iomem *regs,
250 const struct regmap_config *config);
c0eb4676 251
b83a313b 252void regmap_exit(struct regmap *map);
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253int regmap_reinit_cache(struct regmap *map,
254 const struct regmap_config *config);
72b39f6f 255struct regmap *dev_get_regmap(struct device *dev, const char *name);
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256int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
257int regmap_raw_write(struct regmap *map, unsigned int reg,
258 const void *val, size_t val_len);
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259int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
260 size_t val_count);
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261int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
262int regmap_raw_read(struct regmap *map, unsigned int reg,
263 void *val, size_t val_len);
264int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
265 size_t val_count);
266int regmap_update_bits(struct regmap *map, unsigned int reg,
267 unsigned int mask, unsigned int val);
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268int regmap_update_bits_check(struct regmap *map, unsigned int reg,
269 unsigned int mask, unsigned int val,
270 bool *change);
a6539c32 271int regmap_get_val_bytes(struct regmap *map);
b83a313b 272
39a58439 273int regcache_sync(struct regmap *map);
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274int regcache_sync_region(struct regmap *map, unsigned int min,
275 unsigned int max);
92afb286 276void regcache_cache_only(struct regmap *map, bool enable);
6eb0f5e0 277void regcache_cache_bypass(struct regmap *map, bool enable);
8ae0d7e8 278void regcache_mark_dirty(struct regmap *map);
92afb286 279
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280int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
281 int num_regs);
282
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283/**
284 * Description of an IRQ for the generic regmap irq_chip.
285 *
286 * @reg_offset: Offset of the status/mask register within the bank
287 * @mask: Mask used to flag/control the register.
288 */
289struct regmap_irq {
290 unsigned int reg_offset;
291 unsigned int mask;
292};
293
294/**
295 * Description of a generic regmap irq_chip. This is not intended to
296 * handle every possible interrupt controller, but it should handle a
297 * substantial proportion of those that are found in the wild.
298 *
299 * @name: Descriptive name for IRQ controller.
300 *
301 * @status_base: Base status register address.
302 * @mask_base: Base mask register address.
303 * @ack_base: Base ack address. If zero then the chip is clear on read.
a43fd50d 304 * @wake_base: Base address for wake enables. If zero unsupported.
022f926a 305 * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
0c00c50b 306 * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
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307 *
308 * @num_regs: Number of registers in each control bank.
309 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
310 * assigned based on the index in the array of the interrupt.
311 * @num_irqs: Number of descriptors.
312 */
313struct regmap_irq_chip {
314 const char *name;
315
316 unsigned int status_base;
317 unsigned int mask_base;
318 unsigned int ack_base;
a43fd50d 319 unsigned int wake_base;
022f926a 320 unsigned int irq_reg_stride;
36ac914b 321 unsigned int mask_invert;
0c00c50b 322 bool runtime_pm;
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323
324 int num_regs;
325
326 const struct regmap_irq *irqs;
327 int num_irqs;
328};
329
330struct regmap_irq_chip_data;
331
332int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
b026ddbb 333 int irq_base, const struct regmap_irq_chip *chip,
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334 struct regmap_irq_chip_data **data);
335void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
209a6006 336int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
4af8be67 337int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
92afb286 338
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339#else
340
341/*
342 * These stubs should only ever be called by generic code which has
343 * regmap based facilities, if they ever get called at runtime
344 * something is going wrong and something probably needs to select
345 * REGMAP.
346 */
347
348static inline int regmap_write(struct regmap *map, unsigned int reg,
349 unsigned int val)
350{
351 WARN_ONCE(1, "regmap API is disabled");
352 return -EINVAL;
353}
354
355static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
356 const void *val, size_t val_len)
357{
358 WARN_ONCE(1, "regmap API is disabled");
359 return -EINVAL;
360}
361
362static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
363 const void *val, size_t val_count)
364{
365 WARN_ONCE(1, "regmap API is disabled");
366 return -EINVAL;
367}
368
369static inline int regmap_read(struct regmap *map, unsigned int reg,
370 unsigned int *val)
371{
372 WARN_ONCE(1, "regmap API is disabled");
373 return -EINVAL;
374}
375
376static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
377 void *val, size_t val_len)
378{
379 WARN_ONCE(1, "regmap API is disabled");
380 return -EINVAL;
381}
382
383static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
384 void *val, size_t val_count)
385{
386 WARN_ONCE(1, "regmap API is disabled");
387 return -EINVAL;
388}
389
390static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
391 unsigned int mask, unsigned int val)
392{
393 WARN_ONCE(1, "regmap API is disabled");
394 return -EINVAL;
395}
396
397static inline int regmap_update_bits_check(struct regmap *map,
398 unsigned int reg,
399 unsigned int mask, unsigned int val,
400 bool *change)
401{
402 WARN_ONCE(1, "regmap API is disabled");
403 return -EINVAL;
404}
405
406static inline int regmap_get_val_bytes(struct regmap *map)
407{
408 WARN_ONCE(1, "regmap API is disabled");
409 return -EINVAL;
410}
411
412static inline int regcache_sync(struct regmap *map)
413{
414 WARN_ONCE(1, "regmap API is disabled");
415 return -EINVAL;
416}
417
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418static inline int regcache_sync_region(struct regmap *map, unsigned int min,
419 unsigned int max)
420{
421 WARN_ONCE(1, "regmap API is disabled");
422 return -EINVAL;
423}
424
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425static inline void regcache_cache_only(struct regmap *map, bool enable)
426{
427 WARN_ONCE(1, "regmap API is disabled");
428}
429
430static inline void regcache_cache_bypass(struct regmap *map, bool enable)
431{
432 WARN_ONCE(1, "regmap API is disabled");
433}
434
435static inline void regcache_mark_dirty(struct regmap *map)
436{
437 WARN_ONCE(1, "regmap API is disabled");
438}
439
440static inline int regmap_register_patch(struct regmap *map,
441 const struct reg_default *regs,
442 int num_regs)
443{
444 WARN_ONCE(1, "regmap API is disabled");
445 return -EINVAL;
446}
447
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448static inline struct regmap *dev_get_regmap(struct device *dev,
449 const char *name)
450{
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451 return NULL;
452}
453
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454#endif
455
b83a313b 456#endif