]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - include/linux/regmap.h
Linux 3.18-rc1
[mirror_ubuntu-bionic-kernel.git] / include / linux / regmap.h
CommitLineData
b83a313b
MB
1#ifndef __LINUX_REGMAP_H
2#define __LINUX_REGMAP_H
3
4/*
5 * Register map access API
6 *
7 * Copyright 2011 Wolfson Microelectronics plc
8 *
9 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
b83a313b 16#include <linux/list.h>
6863ca62 17#include <linux/rbtree.h>
49ccc142 18#include <linux/err.h>
3f0fa9a8 19#include <linux/bug.h>
b83a313b 20
de477254 21struct module;
313162d0 22struct device;
9943fa30 23struct i2c_client;
90f790d2 24struct irq_domain;
a676f083 25struct spi_device;
a01779f8 26struct spmi_device;
b83d2ff0 27struct regmap;
6863ca62 28struct regmap_range_cfg;
67252287 29struct regmap_field;
9943fa30 30
9fabe24e
DP
31/* An enum of all the supported cache types */
32enum regcache_type {
33 REGCACHE_NONE,
28644c80 34 REGCACHE_RBTREE,
2ac902ce
MB
35 REGCACHE_COMPRESSED,
36 REGCACHE_FLAT,
9fabe24e
DP
37};
38
bd20eb54
MB
39/**
40 * Default value for a register. We use an array of structs rather
41 * than a simple array as many modern devices have very sparse
42 * register maps.
43 *
44 * @reg: Register address.
45 * @def: Register default value.
46 */
47struct reg_default {
48 unsigned int reg;
49 unsigned int def;
50};
51
b83d2ff0
MB
52#ifdef CONFIG_REGMAP
53
141eba2e
SW
54enum regmap_endian {
55 /* Unspecified -> 0 -> Backwards compatible default */
56 REGMAP_ENDIAN_DEFAULT = 0,
57 REGMAP_ENDIAN_BIG,
58 REGMAP_ENDIAN_LITTLE,
59 REGMAP_ENDIAN_NATIVE,
60};
61
76aad392
DC
62/**
63 * A register range, used for access related checks
64 * (readable/writeable/volatile/precious checks)
65 *
66 * @range_min: address of first register
67 * @range_max: address of last register
68 */
69struct regmap_range {
70 unsigned int range_min;
71 unsigned int range_max;
72};
73
6112fe60
LD
74#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, }
75
76aad392
DC
76/*
77 * A table of ranges including some yes ranges and some no ranges.
78 * If a register belongs to a no_range, the corresponding check function
79 * will return false. If a register belongs to a yes range, the corresponding
80 * check function will return true. "no_ranges" are searched first.
81 *
82 * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges"
83 * @n_yes_ranges: size of the above array
84 * @no_ranges: pointer to an array of regmap ranges used as "no ranges"
85 * @n_no_ranges: size of the above array
86 */
87struct regmap_access_table {
88 const struct regmap_range *yes_ranges;
89 unsigned int n_yes_ranges;
90 const struct regmap_range *no_ranges;
91 unsigned int n_no_ranges;
92};
93
0d4529c5
DC
94typedef void (*regmap_lock)(void *);
95typedef void (*regmap_unlock)(void *);
96
dd898b20
MB
97/**
98 * Configuration for the register map of a device.
99 *
d3c242e1
SW
100 * @name: Optional name of the regmap. Useful when a device has multiple
101 * register regions.
102 *
dd898b20 103 * @reg_bits: Number of bits in a register address, mandatory.
f01ee60f
SW
104 * @reg_stride: The register address stride. Valid register addresses are a
105 * multiple of this value. If set to 0, a value of 1 will be
106 * used.
82159ba8 107 * @pad_bits: Number of bits of padding between register and value.
dd898b20 108 * @val_bits: Number of bits in a register value, mandatory.
2e2ae66d 109 *
3566cc9d 110 * @writeable_reg: Optional callback returning true if the register
76aad392
DC
111 * can be written to. If this field is NULL but wr_table
112 * (see below) is not, the check is performed on such table
113 * (a register is writeable if it belongs to one of the ranges
114 * specified by wr_table).
3566cc9d 115 * @readable_reg: Optional callback returning true if the register
76aad392
DC
116 * can be read from. If this field is NULL but rd_table
117 * (see below) is not, the check is performed on such table
118 * (a register is readable if it belongs to one of the ranges
119 * specified by rd_table).
3566cc9d 120 * @volatile_reg: Optional callback returning true if the register
76aad392
DC
121 * value can't be cached. If this field is NULL but
122 * volatile_table (see below) is not, the check is performed on
123 * such table (a register is volatile if it belongs to one of
124 * the ranges specified by volatile_table).
bdc39644 125 * @precious_reg: Optional callback returning true if the register
76aad392 126 * should not be read outside of a call from the driver
bdc39644 127 * (e.g., a clear on read interrupt status register). If this
76aad392
DC
128 * field is NULL but precious_table (see below) is not, the
129 * check is performed on such table (a register is precious if
130 * it belongs to one of the ranges specified by precious_table).
131 * @lock: Optional lock callback (overrides regmap's default lock
132 * function, based on spinlock or mutex).
133 * @unlock: As above for unlocking.
134 * @lock_arg: this field is passed as the only argument of lock/unlock
135 * functions (ignored in case regular lock/unlock functions
136 * are not overridden).
d2a5884a
AS
137 * @reg_read: Optional callback that if filled will be used to perform
138 * all the reads from the registers. Should only be provided for
bdc39644
LP
139 * devices whose read operation cannot be represented as a simple
140 * read operation on a bus such as SPI, I2C, etc. Most of the
141 * devices do not need this.
d2a5884a
AS
142 * @reg_write: Same as above for writing.
143 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
144 * to perform locking. This field is ignored if custom lock/unlock
145 * functions are used (see fields lock/unlock of struct regmap_config).
146 * This field is a duplicate of a similar file in
147 * 'struct regmap_bus' and serves exact same purpose.
148 * Use it only for "no-bus" cases.
bd20eb54 149 * @max_register: Optional, specifies the maximum valid register index.
76aad392
DC
150 * @wr_table: Optional, points to a struct regmap_access_table specifying
151 * valid ranges for write access.
152 * @rd_table: As above, for read access.
153 * @volatile_table: As above, for volatile registers.
154 * @precious_table: As above, for precious registers.
bd20eb54
MB
155 * @reg_defaults: Power on reset values for registers (for use with
156 * register cache support).
157 * @num_reg_defaults: Number of elements in reg_defaults.
6f306441
LPC
158 *
159 * @read_flag_mask: Mask to be set in the top byte of the register when doing
160 * a read.
161 * @write_flag_mask: Mask to be set in the top byte of the register when doing
162 * a write. If both read_flag_mask and write_flag_mask are
163 * empty the regmap_bus default masks are used.
2e33caf1
AJ
164 * @use_single_rw: If set, converts the bulk read and write operations into
165 * a series of single read and write operations. This is useful
166 * for device that does not support bulk read and write.
e894c3f4
OAO
167 * @can_multi_write: If set, the device supports the multi write mode of bulk
168 * write operations, if clear multi write requests will be
169 * split into individual write operations
9fabe24e
DP
170 *
171 * @cache_type: The actual cache type.
172 * @reg_defaults_raw: Power on reset values for registers (for use with
173 * register cache support).
174 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
141eba2e
SW
175 * @reg_format_endian: Endianness for formatted register addresses. If this is
176 * DEFAULT, the @reg_format_endian_default value from the
177 * regmap bus is used.
178 * @val_format_endian: Endianness for formatted register values. If this is
179 * DEFAULT, the @reg_format_endian_default value from the
180 * regmap bus is used.
6863ca62
KG
181 *
182 * @ranges: Array of configuration entries for virtual address ranges.
183 * @num_ranges: Number of range configuration entries.
dd898b20 184 */
b83a313b 185struct regmap_config {
d3c242e1
SW
186 const char *name;
187
b83a313b 188 int reg_bits;
f01ee60f 189 int reg_stride;
82159ba8 190 int pad_bits;
b83a313b 191 int val_bits;
2e2ae66d 192
2e2ae66d
MB
193 bool (*writeable_reg)(struct device *dev, unsigned int reg);
194 bool (*readable_reg)(struct device *dev, unsigned int reg);
195 bool (*volatile_reg)(struct device *dev, unsigned int reg);
18694886 196 bool (*precious_reg)(struct device *dev, unsigned int reg);
0d4529c5
DC
197 regmap_lock lock;
198 regmap_unlock unlock;
199 void *lock_arg;
bd20eb54 200
d2a5884a
AS
201 int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
202 int (*reg_write)(void *context, unsigned int reg, unsigned int val);
203
204 bool fast_io;
205
bd20eb54 206 unsigned int max_register;
76aad392
DC
207 const struct regmap_access_table *wr_table;
208 const struct regmap_access_table *rd_table;
209 const struct regmap_access_table *volatile_table;
210 const struct regmap_access_table *precious_table;
720e4616 211 const struct reg_default *reg_defaults;
9fabe24e
DP
212 unsigned int num_reg_defaults;
213 enum regcache_type cache_type;
214 const void *reg_defaults_raw;
215 unsigned int num_reg_defaults_raw;
6f306441
LPC
216
217 u8 read_flag_mask;
218 u8 write_flag_mask;
2e33caf1
AJ
219
220 bool use_single_rw;
e894c3f4 221 bool can_multi_write;
141eba2e
SW
222
223 enum regmap_endian reg_format_endian;
224 enum regmap_endian val_format_endian;
38e23194 225
6863ca62 226 const struct regmap_range_cfg *ranges;
e3549cd0 227 unsigned int num_ranges;
6863ca62
KG
228};
229
230/**
231 * Configuration for indirectly accessed or paged registers.
232 * Registers, mapped to this virtual range, are accessed in two steps:
233 * 1. page selector register update;
234 * 2. access through data window registers.
235 *
d058bb49
MB
236 * @name: Descriptive name for diagnostics
237 *
6863ca62
KG
238 * @range_min: Address of the lowest register address in virtual range.
239 * @range_max: Address of the highest register in virtual range.
240 *
241 * @page_sel_reg: Register with selector field.
242 * @page_sel_mask: Bit shift for selector value.
243 * @page_sel_shift: Bit mask for selector value.
244 *
245 * @window_start: Address of first (lowest) register in data window.
246 * @window_len: Number of registers in data window.
247 */
248struct regmap_range_cfg {
d058bb49
MB
249 const char *name;
250
6863ca62
KG
251 /* Registers of virtual address range */
252 unsigned int range_min;
253 unsigned int range_max;
254
255 /* Page selector for indirect addressing */
256 unsigned int selector_reg;
257 unsigned int selector_mask;
258 int selector_shift;
259
260 /* Data window (per each page) */
261 unsigned int window_start;
262 unsigned int window_len;
b83a313b
MB
263};
264
0d509f2b
MB
265struct regmap_async;
266
0135bbcc 267typedef int (*regmap_hw_write)(void *context, const void *data,
b83a313b 268 size_t count);
0135bbcc 269typedef int (*regmap_hw_gather_write)(void *context,
b83a313b
MB
270 const void *reg, size_t reg_len,
271 const void *val, size_t val_len);
0d509f2b
MB
272typedef int (*regmap_hw_async_write)(void *context,
273 const void *reg, size_t reg_len,
274 const void *val, size_t val_len,
275 struct regmap_async *async);
0135bbcc 276typedef int (*regmap_hw_read)(void *context,
b83a313b
MB
277 const void *reg_buf, size_t reg_size,
278 void *val_buf, size_t val_size);
3ac17037
BB
279typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
280 unsigned int *val);
281typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
282 unsigned int val);
0d509f2b 283typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
0135bbcc 284typedef void (*regmap_hw_free_context)(void *context);
b83a313b
MB
285
286/**
287 * Description of a hardware bus for the register map infrastructure.
288 *
bacdbe07 289 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
0d4529c5
DC
290 * to perform locking. This field is ignored if custom lock/unlock
291 * functions are used (see fields lock/unlock of
292 * struct regmap_config).
b83a313b
MB
293 * @write: Write operation.
294 * @gather_write: Write operation with split register/value, return -ENOTSUPP
295 * if not implemented on a given device.
0d509f2b
MB
296 * @async_write: Write operation which completes asynchronously, optional and
297 * must serialise with respect to non-async I/O.
b83a313b
MB
298 * @read: Read operation. Data is returned in the buffer used to transmit
299 * data.
0d509f2b 300 * @async_alloc: Allocate a regmap_async() structure.
b83a313b
MB
301 * @read_flag_mask: Mask to be set in the top byte of the register when doing
302 * a read.
141eba2e
SW
303 * @reg_format_endian_default: Default endianness for formatted register
304 * addresses. Used when the regmap_config specifies DEFAULT. If this is
305 * DEFAULT, BIG is assumed.
306 * @val_format_endian_default: Default endianness for formatted register
307 * values. Used when the regmap_config specifies DEFAULT. If this is
308 * DEFAULT, BIG is assumed.
0d509f2b 309 * @async_size: Size of struct used for async work.
b83a313b
MB
310 */
311struct regmap_bus {
bacdbe07 312 bool fast_io;
b83a313b
MB
313 regmap_hw_write write;
314 regmap_hw_gather_write gather_write;
0d509f2b 315 regmap_hw_async_write async_write;
3ac17037 316 regmap_hw_reg_write reg_write;
b83a313b 317 regmap_hw_read read;
3ac17037 318 regmap_hw_reg_read reg_read;
0135bbcc 319 regmap_hw_free_context free_context;
0d509f2b 320 regmap_hw_async_alloc async_alloc;
b83a313b 321 u8 read_flag_mask;
141eba2e
SW
322 enum regmap_endian reg_format_endian_default;
323 enum regmap_endian val_format_endian_default;
b83a313b
MB
324};
325
326struct regmap *regmap_init(struct device *dev,
327 const struct regmap_bus *bus,
0135bbcc 328 void *bus_context,
b83a313b 329 const struct regmap_config *config);
6cfec04b
MS
330int regmap_attach_dev(struct device *dev, struct regmap *map,
331 const struct regmap_config *config);
9943fa30
MB
332struct regmap *regmap_init_i2c(struct i2c_client *i2c,
333 const struct regmap_config *config);
a676f083
MB
334struct regmap *regmap_init_spi(struct spi_device *dev,
335 const struct regmap_config *config);
c9afbb05
JC
336struct regmap *regmap_init_spmi_base(struct spmi_device *dev,
337 const struct regmap_config *config);
338struct regmap *regmap_init_spmi_ext(struct spmi_device *dev,
339 const struct regmap_config *config);
878ec67b
PZ
340struct regmap *regmap_init_mmio_clk(struct device *dev, const char *clk_id,
341 void __iomem *regs,
342 const struct regmap_config *config);
a676f083 343
c0eb4676
MB
344struct regmap *devm_regmap_init(struct device *dev,
345 const struct regmap_bus *bus,
0135bbcc 346 void *bus_context,
c0eb4676
MB
347 const struct regmap_config *config);
348struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c,
349 const struct regmap_config *config);
350struct regmap *devm_regmap_init_spi(struct spi_device *dev,
351 const struct regmap_config *config);
c9afbb05
JC
352struct regmap *devm_regmap_init_spmi_base(struct spmi_device *dev,
353 const struct regmap_config *config);
354struct regmap *devm_regmap_init_spmi_ext(struct spmi_device *dev,
355 const struct regmap_config *config);
878ec67b
PZ
356struct regmap *devm_regmap_init_mmio_clk(struct device *dev, const char *clk_id,
357 void __iomem *regs,
358 const struct regmap_config *config);
359
360/**
361 * regmap_init_mmio(): Initialise register map
362 *
363 * @dev: Device that will be interacted with
364 * @regs: Pointer to memory-mapped IO region
365 * @config: Configuration for register map
366 *
367 * The return value will be an ERR_PTR() on error or a valid pointer to
368 * a struct regmap.
369 */
370static inline struct regmap *regmap_init_mmio(struct device *dev,
371 void __iomem *regs,
372 const struct regmap_config *config)
373{
374 return regmap_init_mmio_clk(dev, NULL, regs, config);
375}
376
377/**
378 * devm_regmap_init_mmio(): Initialise managed register map
379 *
380 * @dev: Device that will be interacted with
381 * @regs: Pointer to memory-mapped IO region
382 * @config: Configuration for register map
383 *
384 * The return value will be an ERR_PTR() on error or a valid pointer
385 * to a struct regmap. The regmap will be automatically freed by the
386 * device management code.
387 */
388static inline struct regmap *devm_regmap_init_mmio(struct device *dev,
389 void __iomem *regs,
390 const struct regmap_config *config)
391{
392 return devm_regmap_init_mmio_clk(dev, NULL, regs, config);
393}
c0eb4676 394
b83a313b 395void regmap_exit(struct regmap *map);
bf315173
MB
396int regmap_reinit_cache(struct regmap *map,
397 const struct regmap_config *config);
72b39f6f 398struct regmap *dev_get_regmap(struct device *dev, const char *name);
8d7d3972 399struct device *regmap_get_device(struct regmap *map);
b83a313b 400int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
915f441b 401int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
b83a313b
MB
402int regmap_raw_write(struct regmap *map, unsigned int reg,
403 const void *val, size_t val_len);
8eaeb219
LD
404int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
405 size_t val_count);
f7e2cec0 406int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
e33fabd3 407 int num_regs);
1d5b40bc
CK
408int regmap_multi_reg_write_bypassed(struct regmap *map,
409 const struct reg_default *regs,
410 int num_regs);
0d509f2b
MB
411int regmap_raw_write_async(struct regmap *map, unsigned int reg,
412 const void *val, size_t val_len);
b83a313b
MB
413int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
414int regmap_raw_read(struct regmap *map, unsigned int reg,
415 void *val, size_t val_len);
416int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
417 size_t val_count);
418int regmap_update_bits(struct regmap *map, unsigned int reg,
419 unsigned int mask, unsigned int val);
915f441b
MB
420int regmap_update_bits_async(struct regmap *map, unsigned int reg,
421 unsigned int mask, unsigned int val);
018690d3
MB
422int regmap_update_bits_check(struct regmap *map, unsigned int reg,
423 unsigned int mask, unsigned int val,
424 bool *change);
915f441b
MB
425int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
426 unsigned int mask, unsigned int val,
427 bool *change);
a6539c32 428int regmap_get_val_bytes(struct regmap *map);
0d509f2b 429int regmap_async_complete(struct regmap *map);
221ad7f2 430bool regmap_can_raw_write(struct regmap *map);
b83a313b 431
39a58439 432int regcache_sync(struct regmap *map);
4d4cfd16
MB
433int regcache_sync_region(struct regmap *map, unsigned int min,
434 unsigned int max);
697e85bc
MB
435int regcache_drop_region(struct regmap *map, unsigned int min,
436 unsigned int max);
92afb286 437void regcache_cache_only(struct regmap *map, bool enable);
6eb0f5e0 438void regcache_cache_bypass(struct regmap *map, bool enable);
8ae0d7e8 439void regcache_mark_dirty(struct regmap *map);
92afb286 440
154881e5
MB
441bool regmap_check_range_table(struct regmap *map, unsigned int reg,
442 const struct regmap_access_table *table);
443
22f0d90a
MB
444int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
445 int num_regs);
13ff50c8
NC
446int regmap_parse_val(struct regmap *map, const void *buf,
447 unsigned int *val);
22f0d90a 448
76aad392
DC
449static inline bool regmap_reg_in_range(unsigned int reg,
450 const struct regmap_range *range)
451{
452 return reg >= range->range_min && reg <= range->range_max;
453}
454
455bool regmap_reg_in_ranges(unsigned int reg,
456 const struct regmap_range *ranges,
457 unsigned int nranges);
458
67252287
SK
459/**
460 * Description of an register field
461 *
462 * @reg: Offset of the register within the regmap bank
463 * @lsb: lsb of the register field.
464 * @reg: msb of the register field.
a0102375
KM
465 * @id_size: port size if it has some ports
466 * @id_offset: address offset for each ports
67252287
SK
467 */
468struct reg_field {
469 unsigned int reg;
470 unsigned int lsb;
471 unsigned int msb;
a0102375
KM
472 unsigned int id_size;
473 unsigned int id_offset;
67252287
SK
474};
475
476#define REG_FIELD(_reg, _lsb, _msb) { \
477 .reg = _reg, \
478 .lsb = _lsb, \
479 .msb = _msb, \
480 }
481
482struct regmap_field *regmap_field_alloc(struct regmap *regmap,
483 struct reg_field reg_field);
484void regmap_field_free(struct regmap_field *field);
485
486struct regmap_field *devm_regmap_field_alloc(struct device *dev,
487 struct regmap *regmap, struct reg_field reg_field);
488void devm_regmap_field_free(struct device *dev, struct regmap_field *field);
489
490int regmap_field_read(struct regmap_field *field, unsigned int *val);
491int regmap_field_write(struct regmap_field *field, unsigned int val);
fdf20029
KM
492int regmap_field_update_bits(struct regmap_field *field,
493 unsigned int mask, unsigned int val);
76aad392 494
a0102375
KM
495int regmap_fields_write(struct regmap_field *field, unsigned int id,
496 unsigned int val);
497int regmap_fields_read(struct regmap_field *field, unsigned int id,
498 unsigned int *val);
499int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
500 unsigned int mask, unsigned int val);
76aad392 501
f8beab2b
MB
502/**
503 * Description of an IRQ for the generic regmap irq_chip.
504 *
505 * @reg_offset: Offset of the status/mask register within the bank
506 * @mask: Mask used to flag/control the register.
507 */
508struct regmap_irq {
509 unsigned int reg_offset;
510 unsigned int mask;
511};
512
513/**
514 * Description of a generic regmap irq_chip. This is not intended to
515 * handle every possible interrupt controller, but it should handle a
516 * substantial proportion of those that are found in the wild.
517 *
518 * @name: Descriptive name for IRQ controller.
519 *
520 * @status_base: Base status register address.
521 * @mask_base: Base mask register address.
d3233433
AS
522 * @ack_base: Base ack address. If zero then the chip is clear on read.
523 * Using zero value is possible with @use_ack bit.
a43fd50d 524 * @wake_base: Base address for wake enables. If zero unsupported.
022f926a 525 * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
2753e6f8 526 * @init_ack_masked: Ack all masked interrupts once during initalization.
68622bdf 527 * @mask_invert: Inverted mask register: cleared bits are masked out.
d3233433 528 * @use_ack: Use @ack register even if it is zero.
68622bdf 529 * @wake_invert: Inverted wake register: cleared bits are wake enabled.
0c00c50b 530 * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
f8beab2b
MB
531 *
532 * @num_regs: Number of registers in each control bank.
533 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
534 * assigned based on the index in the array of the interrupt.
535 * @num_irqs: Number of descriptors.
536 */
537struct regmap_irq_chip {
538 const char *name;
539
540 unsigned int status_base;
541 unsigned int mask_base;
542 unsigned int ack_base;
a43fd50d 543 unsigned int wake_base;
022f926a 544 unsigned int irq_reg_stride;
f484f7a6
PZ
545 bool init_ack_masked:1;
546 bool mask_invert:1;
d3233433 547 bool use_ack:1;
f484f7a6
PZ
548 bool wake_invert:1;
549 bool runtime_pm:1;
f8beab2b
MB
550
551 int num_regs;
552
553 const struct regmap_irq *irqs;
554 int num_irqs;
555};
556
557struct regmap_irq_chip_data;
558
559int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
b026ddbb 560 int irq_base, const struct regmap_irq_chip *chip,
f8beab2b
MB
561 struct regmap_irq_chip_data **data);
562void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
209a6006 563int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
4af8be67 564int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
90f790d2 565struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
92afb286 566
9cde5fcd
MB
567#else
568
569/*
570 * These stubs should only ever be called by generic code which has
571 * regmap based facilities, if they ever get called at runtime
572 * something is going wrong and something probably needs to select
573 * REGMAP.
574 */
575
576static inline int regmap_write(struct regmap *map, unsigned int reg,
577 unsigned int val)
578{
579 WARN_ONCE(1, "regmap API is disabled");
580 return -EINVAL;
581}
582
915f441b
MB
583static inline int regmap_write_async(struct regmap *map, unsigned int reg,
584 unsigned int val)
585{
586 WARN_ONCE(1, "regmap API is disabled");
587 return -EINVAL;
588}
589
9cde5fcd
MB
590static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
591 const void *val, size_t val_len)
592{
593 WARN_ONCE(1, "regmap API is disabled");
594 return -EINVAL;
595}
596
0d509f2b
MB
597static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
598 const void *val, size_t val_len)
599{
600 WARN_ONCE(1, "regmap API is disabled");
601 return -EINVAL;
602}
603
9cde5fcd
MB
604static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
605 const void *val, size_t val_count)
606{
607 WARN_ONCE(1, "regmap API is disabled");
608 return -EINVAL;
609}
610
611static inline int regmap_read(struct regmap *map, unsigned int reg,
612 unsigned int *val)
613{
614 WARN_ONCE(1, "regmap API is disabled");
615 return -EINVAL;
616}
617
618static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
619 void *val, size_t val_len)
620{
621 WARN_ONCE(1, "regmap API is disabled");
622 return -EINVAL;
623}
624
625static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
626 void *val, size_t val_count)
627{
628 WARN_ONCE(1, "regmap API is disabled");
629 return -EINVAL;
630}
631
632static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
633 unsigned int mask, unsigned int val)
634{
635 WARN_ONCE(1, "regmap API is disabled");
636 return -EINVAL;
637}
638
915f441b
MB
639static inline int regmap_update_bits_async(struct regmap *map,
640 unsigned int reg,
641 unsigned int mask, unsigned int val)
642{
643 WARN_ONCE(1, "regmap API is disabled");
644 return -EINVAL;
645}
646
9cde5fcd
MB
647static inline int regmap_update_bits_check(struct regmap *map,
648 unsigned int reg,
649 unsigned int mask, unsigned int val,
650 bool *change)
651{
652 WARN_ONCE(1, "regmap API is disabled");
653 return -EINVAL;
654}
655
915f441b
MB
656static inline int regmap_update_bits_check_async(struct regmap *map,
657 unsigned int reg,
658 unsigned int mask,
659 unsigned int val,
660 bool *change)
661{
662 WARN_ONCE(1, "regmap API is disabled");
663 return -EINVAL;
664}
665
9cde5fcd
MB
666static inline int regmap_get_val_bytes(struct regmap *map)
667{
668 WARN_ONCE(1, "regmap API is disabled");
669 return -EINVAL;
670}
671
672static inline int regcache_sync(struct regmap *map)
673{
674 WARN_ONCE(1, "regmap API is disabled");
675 return -EINVAL;
676}
677
a313f9f5
MB
678static inline int regcache_sync_region(struct regmap *map, unsigned int min,
679 unsigned int max)
680{
681 WARN_ONCE(1, "regmap API is disabled");
682 return -EINVAL;
683}
684
697e85bc
MB
685static inline int regcache_drop_region(struct regmap *map, unsigned int min,
686 unsigned int max)
687{
688 WARN_ONCE(1, "regmap API is disabled");
689 return -EINVAL;
690}
691
9cde5fcd
MB
692static inline void regcache_cache_only(struct regmap *map, bool enable)
693{
694 WARN_ONCE(1, "regmap API is disabled");
695}
696
697static inline void regcache_cache_bypass(struct regmap *map, bool enable)
698{
699 WARN_ONCE(1, "regmap API is disabled");
700}
701
702static inline void regcache_mark_dirty(struct regmap *map)
703{
704 WARN_ONCE(1, "regmap API is disabled");
705}
706
0d509f2b
MB
707static inline void regmap_async_complete(struct regmap *map)
708{
709 WARN_ONCE(1, "regmap API is disabled");
710}
711
9cde5fcd
MB
712static inline int regmap_register_patch(struct regmap *map,
713 const struct reg_default *regs,
714 int num_regs)
715{
716 WARN_ONCE(1, "regmap API is disabled");
717 return -EINVAL;
718}
719
13ff50c8
NC
720static inline int regmap_parse_val(struct regmap *map, const void *buf,
721 unsigned int *val)
722{
723 WARN_ONCE(1, "regmap API is disabled");
724 return -EINVAL;
725}
726
72b39f6f
MB
727static inline struct regmap *dev_get_regmap(struct device *dev,
728 const char *name)
729{
72b39f6f
MB
730 return NULL;
731}
732
8d7d3972
TT
733static inline struct device *regmap_get_device(struct regmap *map)
734{
735 WARN_ONCE(1, "regmap API is disabled");
1d33dc6b 736 return NULL;
8d7d3972
TT
737}
738
9cde5fcd
MB
739#endif
740
b83a313b 741#endif