[mirror_ubuntu-jammy-kernel.git] / include / linux / sdla.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * INET		An implementation of the TCP/IP protocol suite for the LINUX
 *		operating system.  INET is implemented using the  BSD Socket
 *		interface as the means of communication with the user level.
 *
 *		Global definitions for the Frame relay interface.
 *
 * Version:	@(#)if_ifrad.h	0.20	13 Apr 96
 *
 * Author:	Mike McLagan <mike.mclagan@linux.org>
 *
 * Changes:
 *		0.15	Mike McLagan	Structure packing
 *
 *		0.20	Mike McLagan	New flags for S508 buffer handling
 */
#ifndef SDLA_H
#define SDLA_H

#include <uapi/linux/sdla.h>


/* important Z80 window addresses */
#define SDLA_CONTROL_WND		0xE000

#define SDLA_502_CMD_BUF		0xEF60
#define SDLA_502_RCV_BUF		0xA900
#define	SDLA_502_TXN_AVAIL		0xFFF1
#define SDLA_502_RCV_AVAIL		0xFFF2
#define SDLA_502_EVENT_FLAGS		0xFFF3
#define SDLA_502_MDM_STATUS		0xFFF4
#define SDLA_502_IRQ_INTERFACE		0xFFFD
#define SDLA_502_IRQ_PERMISSION		0xFFFE
#define SDLA_502_DATA_OFS		0x0010

#define SDLA_508_CMD_BUF		0xE000
#define SDLA_508_TXBUF_INFO		0xF100
#define SDLA_508_RXBUF_INFO		0xF120
#define SDLA_508_EVENT_FLAGS		0xF003
#define SDLA_508_MDM_STATUS		0xF004
#define SDLA_508_IRQ_INTERFACE		0xF010
#define SDLA_508_IRQ_PERMISSION		0xF011
#define SDLA_508_TSE_OFFSET		0xF012

/* Event flags */
#define SDLA_EVENT_STATUS		0x01
#define SDLA_EVENT_DLCI_STATUS		0x02
#define SDLA_EVENT_BAD_DLCI		0x04
#define SDLA_EVENT_LINK_DOWN		0x40

/* IRQ Trigger flags */
#define SDLA_INTR_RX			0x01
#define SDLA_INTR_TX			0x02
#define SDLA_INTR_MODEM			0x04
#define SDLA_INTR_COMPLETE		0x08
#define SDLA_INTR_STATUS		0x10
#define SDLA_INTR_TIMER			0x20

/* DLCI status bits */
#define SDLA_DLCI_DELETED		0x01
#define SDLA_DLCI_ACTIVE		0x02
#define SDLA_DLCI_WAITING		0x04
#define SDLA_DLCI_NEW			0x08
#define SDLA_DLCI_INCLUDED		0x40

/* valid command codes */
#define	SDLA_INFORMATION_WRITE		0x01
#define	SDLA_INFORMATION_READ		0x02
#define SDLA_ISSUE_IN_CHANNEL_SIGNAL	0x03
#define	SDLA_SET_DLCI_CONFIGURATION	0x10
#define	SDLA_READ_DLCI_CONFIGURATION	0x11
#define	SDLA_DISABLE_COMMUNICATIONS	0x12
#define	SDLA_ENABLE_COMMUNICATIONS	0x13
#define	SDLA_READ_DLC_STATUS		0x14
#define	SDLA_READ_DLC_STATISTICS	0x15
#define	SDLA_FLUSH_DLC_STATISTICS	0x16
#define	SDLA_LIST_ACTIVE_DLCI		0x17
#define	SDLA_FLUSH_INFORMATION_BUFFERS	0x18
#define	SDLA_ADD_DLCI			0x20
#define	SDLA_DELETE_DLCI		0x21
#define	SDLA_ACTIVATE_DLCI		0x22
#define	SDLA_DEACTIVATE_DLCI		0x23
#define	SDLA_READ_MODEM_STATUS		0x30
#define	SDLA_SET_MODEM_STATUS		0x31
#define	SDLA_READ_COMMS_ERR_STATS	0x32
#define SDLA_FLUSH_COMMS_ERR_STATS	0x33
#define	SDLA_READ_CODE_VERSION		0x40
#define SDLA_SET_IRQ_TRIGGER		0x50
#define SDLA_GET_IRQ_TRIGGER		0x51

/* In channel signal types */
#define SDLA_ICS_LINK_VERIFY		0x02
#define SDLA_ICS_STATUS_ENQ		0x03

/* modem status flags */
#define SDLA_MODEM_DTR_HIGH		0x01
#define SDLA_MODEM_RTS_HIGH		0x02
#define SDLA_MODEM_DCD_HIGH		0x08
#define SDLA_MODEM_CTS_HIGH		0x20

/* used for RET_MODEM interpretation */
#define SDLA_MODEM_DCD_LOW		0x01
#define SDLA_MODEM_CTS_LOW		0x02

/* return codes */
#define SDLA_RET_OK			0x00
#define SDLA_RET_COMMUNICATIONS		0x01
#define SDLA_RET_CHANNEL_INACTIVE	0x02
#define SDLA_RET_DLCI_INACTIVE		0x03
#define SDLA_RET_DLCI_CONFIG		0x04
#define SDLA_RET_BUF_TOO_BIG		0x05
#define SDLA_RET_NO_DATA		0x05
#define SDLA_RET_BUF_OVERSIZE		0x06
#define SDLA_RET_CIR_OVERFLOW		0x07
#define SDLA_RET_NO_BUFS		0x08
#define SDLA_RET_TIMEOUT		0x0A
#define SDLA_RET_MODEM			0x10
#define SDLA_RET_CHANNEL_OFF		0x11
#define SDLA_RET_CHANNEL_ON		0x12
#define SDLA_RET_DLCI_STATUS		0x13
#define SDLA_RET_DLCI_UNKNOWN       	0x14
#define SDLA_RET_COMMAND_INVALID    	0x1F

/* Configuration flags */
#define SDLA_DIRECT_RECV		0x0080
#define SDLA_TX_NO_EXCEPT		0x0020
#define SDLA_NO_ICF_MSGS		0x1000
#define SDLA_TX50_RX50			0x0000
#define SDLA_TX70_RX30			0x2000
#define SDLA_TX30_RX70			0x4000

/* IRQ selection flags */
#define SDLA_IRQ_RECEIVE		0x01
#define SDLA_IRQ_TRANSMIT		0x02
#define SDLA_IRQ_MODEM_STAT		0x04
#define SDLA_IRQ_COMMAND		0x08
#define SDLA_IRQ_CHANNEL		0x10
#define SDLA_IRQ_TIMER			0x20

/* definitions for PC memory mapping */
#define SDLA_8K_WINDOW			0x01
#define SDLA_S502_SEG_A			0x10
#define SDLA_S502_SEG_C			0x20
#define SDLA_S502_SEG_D			0x00
#define SDLA_S502_SEG_E			0x30
#define SDLA_S507_SEG_A			0x00
#define SDLA_S507_SEG_B			0x40
#define SDLA_S507_SEG_C			0x80
#define SDLA_S507_SEG_E			0xC0
#define SDLA_S508_SEG_A			0x00
#define SDLA_S508_SEG_C			0x10
#define SDLA_S508_SEG_D			0x08
#define SDLA_S508_SEG_E			0x18

/* SDLA adapter port constants */
#define SDLA_IO_EXTENTS			0x04
	
#define SDLA_REG_CONTROL		0x00
#define SDLA_REG_PC_WINDOW		0x01	/* offset for PC window select latch */
#define SDLA_REG_Z80_WINDOW 		0x02	/* offset for Z80 window select latch */
#define SDLA_REG_Z80_CONTROL		0x03	/* offset for Z80 control latch */
	
#define SDLA_S502_STS			0x00	/* status reg for 502, 502E, 507 */
#define SDLA_S508_GNRL			0x00	/* general purp. reg for 508 */
#define SDLA_S508_STS			0x01	/* status reg for 508 */
#define SDLA_S508_IDR			0x02	/* ID reg for 508 */
	
/* control register flags */
#define SDLA_S502A_START		0x00	/* start the CPU */
#define SDLA_S502A_INTREQ		0x02
#define SDLA_S502A_INTEN		0x04
#define SDLA_S502A_HALT			0x08	/* halt the CPU */	
#define SDLA_S502A_NMI			0x10	/* issue an NMI to the CPU */

#define SDLA_S502E_CPUEN		0x01
#define SDLA_S502E_ENABLE		0x02
#define SDLA_S502E_INTACK		0x04
	
#define SDLA_S507_ENABLE		0x01
#define SDLA_S507_IRQ3			0x00
#define SDLA_S507_IRQ4			0x20
#define SDLA_S507_IRQ5			0x40
#define SDLA_S507_IRQ7			0x60
#define SDLA_S507_IRQ10			0x80
#define SDLA_S507_IRQ11			0xA0
#define SDLA_S507_IRQ12			0xC0
#define SDLA_S507_IRQ15			0xE0
	
#define SDLA_HALT			0x00
#define SDLA_CPUEN			0x02
#define SDLA_MEMEN			0x04
#define SDLA_S507_EPROMWR		0x08
#define SDLA_S507_EPROMCLK		0x10
#define SDLA_S508_INTRQ			0x08
#define SDLA_S508_INTEN			0x10

struct sdla_cmd {
   char  opp_flag;
   char  cmd;
   short length;
   char  retval;
   short dlci;
   char  flags;
   short rxlost_int;
   long  rxlost_app;
   char  reserve[2];
   char  data[SDLA_MAX_DATA];	/* transfer data buffer */
} __attribute__((packed));

struct intr_info {
   char  flags;
   short txlen;
   char  irq;
   char  flags2;
   short timeout;
} __attribute__((packed));

/* found in the 508's control window at RXBUF_INFO */
struct buf_info {
   unsigned short rse_num;
   unsigned long  rse_base;
   unsigned long  rse_next;
   unsigned long  buf_base;
   unsigned short reserved;
   unsigned long  buf_top;
} __attribute__((packed));

/* structure pointed to by rse_base in RXBUF_INFO struct */
struct buf_entry {
   char  opp_flag;
   short length;
   short dlci;
   char  flags;
   short timestamp;
   short reserved[2];
   long  buf_addr;
} __attribute__((packed));

#endif
Commit	Line	Data
2874c5fd	1	/* SPDX-License-Identifier: GPL-2.0-or-later */
1da177e4 LT	2	/*
	3	* INET An implementation of the TCP/IP protocol suite for the LINUX
	4	* operating system. INET is implemented using the BSD Socket
	5	* interface as the means of communication with the user level.
	6	*
	7	* Global definitions for the Frame relay interface.
	8	*
	9	* Version: @(#)if_ifrad.h 0.20 13 Apr 96
	10	*
	11	* Author: Mike McLagan <mike.mclagan@linux.org>
	12	*
	13	* Changes:
	14	* 0.15 Mike McLagan Structure packing
	15	*
	16	* 0.20 Mike McLagan New flags for S508 buffer handling
1da177e4	17	*/
1da177e4 LT	18	#ifndef SDLA_H
	19	#define SDLA_H
	20
607ca46e	21	#include <uapi/linux/sdla.h>
1da177e4	22
1da177e4 LT	23
	24	/* important Z80 window addresses */
	25	#define SDLA_CONTROL_WND 0xE000
	26
	27	#define SDLA_502_CMD_BUF 0xEF60
	28	#define SDLA_502_RCV_BUF 0xA900
	29	#define SDLA_502_TXN_AVAIL 0xFFF1
	30	#define SDLA_502_RCV_AVAIL 0xFFF2
	31	#define SDLA_502_EVENT_FLAGS 0xFFF3
	32	#define SDLA_502_MDM_STATUS 0xFFF4
	33	#define SDLA_502_IRQ_INTERFACE 0xFFFD
	34	#define SDLA_502_IRQ_PERMISSION 0xFFFE
	35	#define SDLA_502_DATA_OFS 0x0010
	36
	37	#define SDLA_508_CMD_BUF 0xE000
	38	#define SDLA_508_TXBUF_INFO 0xF100
	39	#define SDLA_508_RXBUF_INFO 0xF120
	40	#define SDLA_508_EVENT_FLAGS 0xF003
	41	#define SDLA_508_MDM_STATUS 0xF004
	42	#define SDLA_508_IRQ_INTERFACE 0xF010
	43	#define SDLA_508_IRQ_PERMISSION 0xF011
	44	#define SDLA_508_TSE_OFFSET 0xF012
	45
	46	/* Event flags */
	47	#define SDLA_EVENT_STATUS 0x01
	48	#define SDLA_EVENT_DLCI_STATUS 0x02
	49	#define SDLA_EVENT_BAD_DLCI 0x04
	50	#define SDLA_EVENT_LINK_DOWN 0x40
	51
	52	/* IRQ Trigger flags */
	53	#define SDLA_INTR_RX 0x01
	54	#define SDLA_INTR_TX 0x02
	55	#define SDLA_INTR_MODEM 0x04
	56	#define SDLA_INTR_COMPLETE 0x08
	57	#define SDLA_INTR_STATUS 0x10
	58	#define SDLA_INTR_TIMER 0x20
	59
	60	/* DLCI status bits */
	61	#define SDLA_DLCI_DELETED 0x01
	62	#define SDLA_DLCI_ACTIVE 0x02
	63	#define SDLA_DLCI_WAITING 0x04
	64	#define SDLA_DLCI_NEW 0x08
	65	#define SDLA_DLCI_INCLUDED 0x40
	66
	67	/* valid command codes */
	68	#define SDLA_INFORMATION_WRITE 0x01
	69	#define SDLA_INFORMATION_READ 0x02
	70	#define SDLA_ISSUE_IN_CHANNEL_SIGNAL 0x03
	71	#define SDLA_SET_DLCI_CONFIGURATION 0x10
	72	#define SDLA_READ_DLCI_CONFIGURATION 0x11
	73	#define SDLA_DISABLE_COMMUNICATIONS 0x12
	74	#define SDLA_ENABLE_COMMUNICATIONS 0x13
	75	#define SDLA_READ_DLC_STATUS 0x14
	76	#define SDLA_READ_DLC_STATISTICS 0x15
	77	#define SDLA_FLUSH_DLC_STATISTICS 0x16
	78	#define SDLA_LIST_ACTIVE_DLCI 0x17
	79	#define SDLA_FLUSH_INFORMATION_BUFFERS 0x18
	80	#define SDLA_ADD_DLCI 0x20
	81	#define SDLA_DELETE_DLCI 0x21
	82	#define SDLA_ACTIVATE_DLCI 0x22
	83	#define SDLA_DEACTIVATE_DLCI 0x23
	84	#define SDLA_READ_MODEM_STATUS 0x30
	85	#define SDLA_SET_MODEM_STATUS 0x31
	86	#define SDLA_READ_COMMS_ERR_STATS 0x32
87	#define SDLA_FLUSH_COMMS_ERR_STATS 0x33
88	#define SDLA_READ_CODE_VERSION 0x40
89	#define SDLA_SET_IRQ_TRIGGER 0x50
90	#define SDLA_GET_IRQ_TRIGGER 0x51
91
92	/* In channel signal types */
93	#define SDLA_ICS_LINK_VERIFY 0x02
94	#define SDLA_ICS_STATUS_ENQ 0x03
95
96	/* modem status flags */
97	#define SDLA_MODEM_DTR_HIGH 0x01
98	#define SDLA_MODEM_RTS_HIGH 0x02
99	#define SDLA_MODEM_DCD_HIGH 0x08
100	#define SDLA_MODEM_CTS_HIGH 0x20
101
102	/* used for RET_MODEM interpretation */
103	#define SDLA_MODEM_DCD_LOW 0x01
104	#define SDLA_MODEM_CTS_LOW 0x02
105
106	/* return codes */
107	#define SDLA_RET_OK 0x00
108	#define SDLA_RET_COMMUNICATIONS 0x01
109	#define SDLA_RET_CHANNEL_INACTIVE 0x02
110	#define SDLA_RET_DLCI_INACTIVE 0x03
111	#define SDLA_RET_DLCI_CONFIG 0x04
112	#define SDLA_RET_BUF_TOO_BIG 0x05
113	#define SDLA_RET_NO_DATA 0x05
114	#define SDLA_RET_BUF_OVERSIZE 0x06
115	#define SDLA_RET_CIR_OVERFLOW 0x07
116	#define SDLA_RET_NO_BUFS 0x08
117	#define SDLA_RET_TIMEOUT 0x0A
118	#define SDLA_RET_MODEM 0x10
119	#define SDLA_RET_CHANNEL_OFF 0x11
120	#define SDLA_RET_CHANNEL_ON 0x12
121	#define SDLA_RET_DLCI_STATUS 0x13
122	#define SDLA_RET_DLCI_UNKNOWN 0x14
123	#define SDLA_RET_COMMAND_INVALID 0x1F
124
125	/* Configuration flags */
126	#define SDLA_DIRECT_RECV 0x0080
127	#define SDLA_TX_NO_EXCEPT 0x0020
128	#define SDLA_NO_ICF_MSGS 0x1000
129	#define SDLA_TX50_RX50 0x0000
130	#define SDLA_TX70_RX30 0x2000
131	#define SDLA_TX30_RX70 0x4000
132
133	/* IRQ selection flags */
134	#define SDLA_IRQ_RECEIVE 0x01
135	#define SDLA_IRQ_TRANSMIT 0x02
136	#define SDLA_IRQ_MODEM_STAT 0x04
137	#define SDLA_IRQ_COMMAND 0x08
138	#define SDLA_IRQ_CHANNEL 0x10
139	#define SDLA_IRQ_TIMER 0x20
140
141	/* definitions for PC memory mapping */
142	#define SDLA_8K_WINDOW 0x01
143	#define SDLA_S502_SEG_A 0x10
144	#define SDLA_S502_SEG_C 0x20
145	#define SDLA_S502_SEG_D 0x00
146	#define SDLA_S502_SEG_E 0x30
147	#define SDLA_S507_SEG_A 0x00
148	#define SDLA_S507_SEG_B 0x40
149	#define SDLA_S507_SEG_C 0x80
150	#define SDLA_S507_SEG_E 0xC0
151	#define SDLA_S508_SEG_A 0x00
152	#define SDLA_S508_SEG_C 0x10
153	#define SDLA_S508_SEG_D 0x08
154	#define SDLA_S508_SEG_E 0x18
155
156	/* SDLA adapter port constants */
157	#define SDLA_IO_EXTENTS 0x04
158
159	#define SDLA_REG_CONTROL 0x00
160	#define SDLA_REG_PC_WINDOW 0x01 /* offset for PC window select latch */
161	#define SDLA_REG_Z80_WINDOW 0x02 /* offset for Z80 window select latch */
162	#define SDLA_REG_Z80_CONTROL 0x03 /* offset for Z80 control latch */
163
164	#define SDLA_S502_STS 0x00 /* status reg for 502, 502E, 507 */
165	#define SDLA_S508_GNRL 0x00 /* general purp. reg for 508 */
166	#define SDLA_S508_STS 0x01 /* status reg for 508 */
167	#define SDLA_S508_IDR 0x02 /* ID reg for 508 */
168
169	/* control register flags */
170	#define SDLA_S502A_START 0x00 /* start the CPU */
171	#define SDLA_S502A_INTREQ 0x02
172	#define SDLA_S502A_INTEN 0x04
173	#define SDLA_S502A_HALT 0x08 /* halt the CPU */
174	#define SDLA_S502A_NMI 0x10 /* issue an NMI to the CPU */
175
176	#define SDLA_S502E_CPUEN 0x01
177	#define SDLA_S502E_ENABLE 0x02
178	#define SDLA_S502E_INTACK 0x04
179
180	#define SDLA_S507_ENABLE 0x01
181	#define SDLA_S507_IRQ3 0x00
182	#define SDLA_S507_IRQ4 0x20
183	#define SDLA_S507_IRQ5 0x40
184	#define SDLA_S507_IRQ7 0x60
185	#define SDLA_S507_IRQ10 0x80
186	#define SDLA_S507_IRQ11 0xA0
187	#define SDLA_S507_IRQ12 0xC0
188	#define SDLA_S507_IRQ15 0xE0
189
190	#define SDLA_HALT 0x00
191	#define SDLA_CPUEN 0x02
192	#define SDLA_MEMEN 0x04
193	#define SDLA_S507_EPROMWR 0x08
194	#define SDLA_S507_EPROMCLK 0x10
195	#define SDLA_S508_INTRQ 0x08
196	#define SDLA_S508_INTEN 0x10
197
198	struct sdla_cmd {
6a878184 JB	199	char opp_flag;
	200	char cmd;
	201	short length;
	202	char retval;
	203	short dlci;
	204	char flags;
	205	short rxlost_int;
	206	long rxlost_app;
	207	char reserve[2];
	208	char data[SDLA_MAX_DATA]; /* transfer data buffer */
	209	} __attribute__((packed));
1da177e4 LT	210
1da177e4 LT	211	struct intr_info {
6a878184 JB	212	char flags;
	213	short txlen;
	214	char irq;
	215	char flags2;
	216	short timeout;
	217	} __attribute__((packed));
1da177e4 LT	218
	219	/* found in the 508's control window at RXBUF_INFO */
	220	struct buf_info {
6a878184 JB	221	unsigned short rse_num;
	222	unsigned long rse_base;
	223	unsigned long rse_next;
	224	unsigned long buf_base;
	225	unsigned short reserved;
	226	unsigned long buf_top;
	227	} __attribute__((packed));
1da177e4 LT	228
	229	/* structure pointed to by rse_base in RXBUF_INFO struct */
	230	struct buf_entry {
6a878184 JB	231	char opp_flag;
	232	short length;
	233	short dlci;
	234	char flags;
	235	short timestamp;
	236	short reserved[2];
	237	long buf_addr;
	238	} __attribute__((packed));
1da177e4 LT	239
1da177e4 LT	240	#endif