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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * serial167.h | |
3 | * | |
4 | * Richard Hirst [richard@sleepie.demon.co.uk] | |
5 | * | |
6 | * Based on cyclades.h | |
7 | */ | |
8 | ||
9 | struct cyclades_monitor { | |
10 | unsigned long int_count; | |
11 | unsigned long char_count; | |
12 | unsigned long char_max; | |
13 | unsigned long char_last; | |
14 | }; | |
15 | ||
16 | /* | |
17 | * This is our internal structure for each serial port's state. | |
18 | * | |
19 | * Many fields are paralleled by the structure used by the serial_struct | |
20 | * structure. | |
21 | * | |
22 | * For definitions of the flags field, see tty.h | |
23 | */ | |
24 | ||
25 | struct cyclades_port { | |
26 | int magic; | |
27 | int type; | |
28 | int card; | |
29 | int line; | |
30 | int flags; /* defined in tty.h */ | |
31 | struct tty_struct *tty; | |
32 | int read_status_mask; | |
33 | int timeout; | |
34 | int xmit_fifo_size; | |
35 | int cor1,cor2,cor3,cor4,cor5,cor6,cor7; | |
36 | int tbpr,tco,rbpr,rco; | |
37 | int ignore_status_mask; | |
38 | int close_delay; | |
39 | int IER; /* Interrupt Enable Register */ | |
1da177e4 LT |
40 | unsigned long last_active; |
41 | int count; /* # of fd on device */ | |
42 | int x_char; /* to be pushed out ASAP */ | |
43 | int x_break; | |
44 | int blocked_open; /* # of blocked opens */ | |
45 | unsigned char *xmit_buf; | |
46 | int xmit_head; | |
47 | int xmit_tail; | |
48 | int xmit_cnt; | |
49 | int default_threshold; | |
50 | int default_timeout; | |
1da177e4 LT |
51 | wait_queue_head_t open_wait; |
52 | wait_queue_head_t close_wait; | |
53 | struct cyclades_monitor mon; | |
54 | }; | |
55 | ||
56 | #define CYCLADES_MAGIC 0x4359 | |
57 | ||
58 | #define CYGETMON 0x435901 | |
59 | #define CYGETTHRESH 0x435902 | |
60 | #define CYSETTHRESH 0x435903 | |
61 | #define CYGETDEFTHRESH 0x435904 | |
62 | #define CYSETDEFTHRESH 0x435905 | |
63 | #define CYGETTIMEOUT 0x435906 | |
64 | #define CYSETTIMEOUT 0x435907 | |
65 | #define CYGETDEFTIMEOUT 0x435908 | |
66 | #define CYSETDEFTIMEOUT 0x435909 | |
67 | ||
1da177e4 LT |
68 | #define CyMaxChipsPerCard 1 |
69 | ||
70 | /**** cd2401 registers ****/ | |
71 | ||
72 | #define CyGFRCR (0x81) | |
73 | #define CyCCR (0x13) | |
74 | #define CyCLR_CHAN (0x40) | |
75 | #define CyINIT_CHAN (0x20) | |
76 | #define CyCHIP_RESET (0x10) | |
77 | #define CyENB_XMTR (0x08) | |
78 | #define CyDIS_XMTR (0x04) | |
79 | #define CyENB_RCVR (0x02) | |
80 | #define CyDIS_RCVR (0x01) | |
81 | #define CyCAR (0xee) | |
82 | #define CyIER (0x11) | |
83 | #define CyMdmCh (0x80) | |
84 | #define CyRxExc (0x20) | |
85 | #define CyRxData (0x08) | |
86 | #define CyTxMpty (0x02) | |
87 | #define CyTxRdy (0x01) | |
88 | #define CyLICR (0x26) | |
89 | #define CyRISR (0x89) | |
90 | #define CyTIMEOUT (0x80) | |
91 | #define CySPECHAR (0x70) | |
92 | #define CyOVERRUN (0x08) | |
93 | #define CyPARITY (0x04) | |
94 | #define CyFRAME (0x02) | |
95 | #define CyBREAK (0x01) | |
96 | #define CyREOIR (0x84) | |
97 | #define CyTEOIR (0x85) | |
98 | #define CyMEOIR (0x86) | |
99 | #define CyNOTRANS (0x08) | |
100 | #define CyRFOC (0x30) | |
101 | #define CyRDR (0xf8) | |
102 | #define CyTDR (0xf8) | |
103 | #define CyMISR (0x8b) | |
104 | #define CyRISR (0x89) | |
105 | #define CyTISR (0x8a) | |
106 | #define CyMSVR1 (0xde) | |
107 | #define CyMSVR2 (0xdf) | |
108 | #define CyDSR (0x80) | |
109 | #define CyDCD (0x40) | |
110 | #define CyCTS (0x20) | |
111 | #define CyDTR (0x02) | |
112 | #define CyRTS (0x01) | |
113 | #define CyRTPRL (0x25) | |
114 | #define CyRTPRH (0x24) | |
115 | #define CyCOR1 (0x10) | |
116 | #define CyPARITY_NONE (0x00) | |
117 | #define CyPARITY_E (0x40) | |
118 | #define CyPARITY_O (0xC0) | |
119 | #define Cy_5_BITS (0x04) | |
120 | #define Cy_6_BITS (0x05) | |
121 | #define Cy_7_BITS (0x06) | |
122 | #define Cy_8_BITS (0x07) | |
123 | #define CyCOR2 (0x17) | |
124 | #define CyETC (0x20) | |
125 | #define CyCtsAE (0x02) | |
126 | #define CyCOR3 (0x16) | |
127 | #define Cy_1_STOP (0x02) | |
128 | #define Cy_2_STOP (0x04) | |
129 | #define CyCOR4 (0x15) | |
130 | #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */ | |
131 | #define CyCOR5 (0x14) | |
132 | #define CyCOR6 (0x18) | |
133 | #define CyCOR7 (0x07) | |
134 | #define CyRBPR (0xcb) | |
135 | #define CyRCOR (0xc8) | |
136 | #define CyTBPR (0xc3) | |
137 | #define CyTCOR (0xc0) | |
138 | #define CySCHR1 (0x1f) | |
139 | #define CySCHR2 (0x1e) | |
140 | #define CyTPR (0xda) | |
141 | #define CyPILR1 (0xe3) | |
142 | #define CyPILR2 (0xe0) | |
143 | #define CyPILR3 (0xe1) | |
144 | #define CyCMR (0x1b) | |
145 | #define CyASYNC (0x02) | |
146 | #define CyLICR (0x26) | |
147 | #define CyLIVR (0x09) | |
148 | #define CySCRL (0x23) | |
149 | #define CySCRH (0x22) | |
150 | #define CyTFTC (0x80) | |
151 | ||
152 | ||
153 | /* max number of chars in the FIFO */ | |
154 | ||
155 | #define CyMAX_CHAR_FIFO 12 | |
156 | ||
157 | /***************************************************************************/ |