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Commit | Line | Data |
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1a59d1b8 | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
1da177e4 LT |
2 | /* |
3 | * linux/drivers/char/serial_core.h | |
4 | * | |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | |
1da177e4 LT |
6 | */ |
7 | #ifndef LINUX_SERIAL_CORE_H | |
8 | #define LINUX_SERIAL_CORE_H | |
9 | ||
c7ac15ce | 10 | #include <linux/bitops.h> |
661f83a6 | 11 | #include <linux/compiler.h> |
3e6f8806 | 12 | #include <linux/console.h> |
1da177e4 LT |
13 | #include <linux/interrupt.h> |
14 | #include <linux/circ_buf.h> | |
15 | #include <linux/spinlock.h> | |
16 | #include <linux/sched.h> | |
17 | #include <linux/tty.h> | |
e2862f6a | 18 | #include <linux/mutex.h> |
b11115c1 | 19 | #include <linux/sysrq.h> |
607ca46e | 20 | #include <uapi/linux/serial_core.h> |
1da177e4 | 21 | |
cf0ebee0 SP |
22 | #ifdef CONFIG_SERIAL_CORE_CONSOLE |
23 | #define uart_console(port) \ | |
24 | ((port)->cons && (port)->cons->index == (port)->line) | |
25 | #else | |
6b3cddcc | 26 | #define uart_console(port) ({ (void)port; 0; }) |
cf0ebee0 SP |
27 | #endif |
28 | ||
1da177e4 | 29 | struct uart_port; |
1da177e4 LT |
30 | struct serial_struct; |
31 | struct device; | |
167cbce2 | 32 | struct gpio_desc; |
1da177e4 LT |
33 | |
34 | /* | |
e759d7c5 | 35 | * This structure describes all the operations that can be done on the |
65388dad | 36 | * physical hardware. See Documentation/driver-api/serial/driver.rst for details. |
1da177e4 LT |
37 | */ |
38 | struct uart_ops { | |
39 | unsigned int (*tx_empty)(struct uart_port *); | |
40 | void (*set_mctrl)(struct uart_port *, unsigned int mctrl); | |
41 | unsigned int (*get_mctrl)(struct uart_port *); | |
b129a8cc RK |
42 | void (*stop_tx)(struct uart_port *); |
43 | void (*start_tx)(struct uart_port *); | |
9aba8d5b RK |
44 | void (*throttle)(struct uart_port *); |
45 | void (*unthrottle)(struct uart_port *); | |
1da177e4 LT |
46 | void (*send_xchar)(struct uart_port *, char ch); |
47 | void (*stop_rx)(struct uart_port *); | |
48 | void (*enable_ms)(struct uart_port *); | |
49 | void (*break_ctl)(struct uart_port *, int ctl); | |
50 | int (*startup)(struct uart_port *); | |
51 | void (*shutdown)(struct uart_port *); | |
6bb0e3a5 | 52 | void (*flush_buffer)(struct uart_port *); |
606d099c AC |
53 | void (*set_termios)(struct uart_port *, struct ktermios *new, |
54 | struct ktermios *old); | |
732a84a0 | 55 | void (*set_ldisc)(struct uart_port *, struct ktermios *); |
1da177e4 LT |
56 | void (*pm)(struct uart_port *, unsigned int state, |
57 | unsigned int oldstate); | |
1da177e4 LT |
58 | |
59 | /* | |
60 | * Return a string describing the type of the port | |
61 | */ | |
e759d7c5 | 62 | const char *(*type)(struct uart_port *); |
1da177e4 LT |
63 | |
64 | /* | |
65 | * Release IO and memory resources used by the port. | |
66 | * This includes iounmap if necessary. | |
67 | */ | |
68 | void (*release_port)(struct uart_port *); | |
69 | ||
70 | /* | |
71 | * Request IO and memory resources used by the port. | |
72 | * This includes iomapping the port if necessary. | |
73 | */ | |
74 | int (*request_port)(struct uart_port *); | |
75 | void (*config_port)(struct uart_port *, int); | |
76 | int (*verify_port)(struct uart_port *, struct serial_struct *); | |
77 | int (*ioctl)(struct uart_port *, unsigned int, unsigned long); | |
f2d937f3 | 78 | #ifdef CONFIG_CONSOLE_POLL |
c7f3e708 | 79 | int (*poll_init)(struct uart_port *); |
e759d7c5 | 80 | void (*poll_put_char)(struct uart_port *, unsigned char); |
f2d937f3 JW |
81 | int (*poll_get_char)(struct uart_port *); |
82 | #endif | |
1da177e4 LT |
83 | }; |
84 | ||
f5316b4a | 85 | #define NO_POLL_CHAR 0x00ff0000 |
1da177e4 LT |
86 | #define UART_CONFIG_TYPE (1 << 0) |
87 | #define UART_CONFIG_IRQ (1 << 1) | |
88 | ||
89 | struct uart_icount { | |
90 | __u32 cts; | |
91 | __u32 dsr; | |
92 | __u32 rng; | |
93 | __u32 dcd; | |
94 | __u32 rx; | |
95 | __u32 tx; | |
96 | __u32 frame; | |
97 | __u32 overrun; | |
98 | __u32 parity; | |
99 | __u32 brk; | |
100 | __u32 buf_overrun; | |
101 | }; | |
102 | ||
9efeccac MT |
103 | typedef unsigned int __bitwise upf_t; |
104 | typedef unsigned int __bitwise upstat_t; | |
0077d45e | 105 | |
1da177e4 LT |
106 | struct uart_port { |
107 | spinlock_t lock; /* port lock */ | |
0c8946d9 | 108 | unsigned long iobase; /* in/out[bwl] */ |
1da177e4 | 109 | unsigned char __iomem *membase; /* read/write[bwl] */ |
7d6a07d1 DD |
110 | unsigned int (*serial_in)(struct uart_port *, int); |
111 | void (*serial_out)(struct uart_port *, int, int); | |
235dae5d PL |
112 | void (*set_termios)(struct uart_port *, |
113 | struct ktermios *new, | |
114 | struct ktermios *old); | |
db405a8f EB |
115 | void (*set_ldisc)(struct uart_port *, |
116 | struct ktermios *); | |
144ef5c2 | 117 | unsigned int (*get_mctrl)(struct uart_port *); |
4bf4ea9d | 118 | void (*set_mctrl)(struct uart_port *, unsigned int); |
0238d2b4 JZ |
119 | unsigned int (*get_divisor)(struct uart_port *, |
120 | unsigned int baud, | |
121 | unsigned int *frac); | |
122 | void (*set_divisor)(struct uart_port *, | |
123 | unsigned int baud, | |
124 | unsigned int quot, | |
125 | unsigned int quot_frac); | |
b99b121b SAS |
126 | int (*startup)(struct uart_port *port); |
127 | void (*shutdown)(struct uart_port *port); | |
234abab1 SAS |
128 | void (*throttle)(struct uart_port *port); |
129 | void (*unthrottle)(struct uart_port *port); | |
a74036f5 | 130 | int (*handle_irq)(struct uart_port *); |
c161afe9 ML |
131 | void (*pm)(struct uart_port *, unsigned int state, |
132 | unsigned int old); | |
bf03f65b | 133 | void (*handle_break)(struct uart_port *); |
a5f276f1 RR |
134 | int (*rs485_config)(struct uart_port *, |
135 | struct serial_rs485 *rs485); | |
ad8c0eaa NF |
136 | int (*iso7816_config)(struct uart_port *, |
137 | struct serial_iso7816 *iso7816); | |
1da177e4 | 138 | unsigned int irq; /* irq number */ |
1c2f0493 | 139 | unsigned long irqflags; /* irq flags */ |
1da177e4 | 140 | unsigned int uartclk; /* base uart clock */ |
947deee8 | 141 | unsigned int fifosize; /* tx fifo size */ |
1da177e4 LT |
142 | unsigned char x_char; /* xon/xoff char */ |
143 | unsigned char regshift; /* reg offset shift */ | |
144 | unsigned char iotype; /* io access style */ | |
c7ac15ce | 145 | unsigned char quirks; /* internal quirks */ |
1da177e4 | 146 | |
647f162b PH |
147 | #define UPIO_PORT (SERIAL_IO_PORT) /* 8b I/O port access */ |
148 | #define UPIO_HUB6 (SERIAL_IO_HUB6) /* Hub6 ISA card */ | |
858965d9 | 149 | #define UPIO_MEM (SERIAL_IO_MEM) /* driver-specific */ |
647f162b PH |
150 | #define UPIO_MEM32 (SERIAL_IO_MEM32) /* 32b little endian */ |
151 | #define UPIO_AU (SERIAL_IO_AU) /* Au1x00 and RT288x type IO */ | |
152 | #define UPIO_TSI (SERIAL_IO_TSI) /* Tsi108/109 type IO */ | |
153 | #define UPIO_MEM32BE (SERIAL_IO_MEM32BE) /* 32b big endian */ | |
bd94c407 | 154 | #define UPIO_MEM16 (SERIAL_IO_MEM16) /* 16b little endian */ |
1da177e4 | 155 | |
c7ac15ce AS |
156 | /* quirks must be updated while holding port mutex */ |
157 | #define UPQ_NO_TXEN_TEST BIT(0) | |
158 | ||
1da177e4 LT |
159 | unsigned int read_status_mask; /* driver specific */ |
160 | unsigned int ignore_status_mask; /* driver specific */ | |
ebd2c8f6 | 161 | struct uart_state *state; /* pointer to parent state */ |
1da177e4 LT |
162 | struct uart_icount icount; /* statistics */ |
163 | ||
164 | struct console *cons; /* struct console, if any */ | |
8a949b07 | 165 | /* flags must be updated while holding port mutex */ |
0077d45e RK |
166 | upf_t flags; |
167 | ||
904326ec PH |
168 | /* |
169 | * These flags must be equivalent to the flags defined in | |
170 | * include/uapi/linux/tty_flags.h which are the userspace definitions | |
171 | * assigned from the serial_struct flags in uart_set_info() | |
172 | * [for bit definitions in the UPF_CHANGE_MASK] | |
173 | * | |
174 | * Bits [0..UPF_LAST_USER] are userspace defined/visible/changeable | |
904326ec PH |
175 | * The remaining bits are serial-core specific and not modifiable by |
176 | * userspace. | |
177 | */ | |
178 | #define UPF_FOURPORT ((__force upf_t) ASYNC_FOURPORT /* 1 */ ) | |
179 | #define UPF_SAK ((__force upf_t) ASYNC_SAK /* 2 */ ) | |
180 | #define UPF_SPD_HI ((__force upf_t) ASYNC_SPD_HI /* 4 */ ) | |
181 | #define UPF_SPD_VHI ((__force upf_t) ASYNC_SPD_VHI /* 5 */ ) | |
182 | #define UPF_SPD_CUST ((__force upf_t) ASYNC_SPD_CUST /* 0x0030 */ ) | |
183 | #define UPF_SPD_WARP ((__force upf_t) ASYNC_SPD_WARP /* 0x1010 */ ) | |
184 | #define UPF_SPD_MASK ((__force upf_t) ASYNC_SPD_MASK /* 0x1030 */ ) | |
185 | #define UPF_SKIP_TEST ((__force upf_t) ASYNC_SKIP_TEST /* 6 */ ) | |
186 | #define UPF_AUTO_IRQ ((__force upf_t) ASYNC_AUTO_IRQ /* 7 */ ) | |
187 | #define UPF_HARDPPS_CD ((__force upf_t) ASYNC_HARDPPS_CD /* 11 */ ) | |
188 | #define UPF_SPD_SHI ((__force upf_t) ASYNC_SPD_SHI /* 12 */ ) | |
189 | #define UPF_LOW_LATENCY ((__force upf_t) ASYNC_LOW_LATENCY /* 13 */ ) | |
190 | #define UPF_BUGGY_UART ((__force upf_t) ASYNC_BUGGY_UART /* 14 */ ) | |
904326ec PH |
191 | #define UPF_MAGIC_MULTIPLIER ((__force upf_t) ASYNC_MAGIC_MULTIPLIER /* 16 */ ) |
192 | ||
ea5244e2 | 193 | #define UPF_NO_THRE_TEST ((__force upf_t) (1 << 19)) |
391f93f2 PH |
194 | /* Port has hardware-assisted h/w flow control */ |
195 | #define UPF_AUTO_CTS ((__force upf_t) (1 << 20)) | |
196 | #define UPF_AUTO_RTS ((__force upf_t) (1 << 21)) | |
197 | #define UPF_HARD_FLOW ((__force upf_t) (UPF_AUTO_CTS | UPF_AUTO_RTS)) | |
2cbacafd RK |
198 | /* Port has hardware-assisted s/w flow control */ |
199 | #define UPF_SOFT_FLOW ((__force upf_t) (1 << 22)) | |
0077d45e RK |
200 | #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) |
201 | #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) | |
06315348 | 202 | #define UPF_EXAR_EFR ((__force upf_t) (1 << 25)) |
bc02d15a | 203 | #define UPF_BUG_THRE ((__force upf_t) (1 << 26)) |
8e23fcc8 DD |
204 | /* The exact UART type is known and should not be probed. */ |
205 | #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) | |
0077d45e | 206 | #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) |
abb4a239 | 207 | #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) |
68ac64cd | 208 | #define UPF_DEAD ((__force upf_t) (1 << 30)) |
0077d45e RK |
209 | #define UPF_IOREMAP ((__force upf_t) (1 << 31)) |
210 | ||
904326ec PH |
211 | #define __UPF_CHANGE_MASK 0x17fff |
212 | #define UPF_CHANGE_MASK ((__force upf_t) __UPF_CHANGE_MASK) | |
0077d45e | 213 | #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) |
1da177e4 | 214 | |
904326ec PH |
215 | #if __UPF_CHANGE_MASK > ASYNC_FLAGS |
216 | #error Change mask not equivalent to userspace-visible bit defines | |
217 | #endif | |
218 | ||
391f93f2 PH |
219 | /* |
220 | * Must hold termios_rwsem, port mutex and port lock to change; | |
221 | * can hold any one lock to read. | |
222 | */ | |
299245a1 PH |
223 | upstat_t status; |
224 | ||
225 | #define UPSTAT_CTS_ENABLE ((__force upstat_t) (1 << 0)) | |
226 | #define UPSTAT_DCD_ENABLE ((__force upstat_t) (1 << 1)) | |
391f93f2 PH |
227 | #define UPSTAT_AUTORTS ((__force upstat_t) (1 << 2)) |
228 | #define UPSTAT_AUTOCTS ((__force upstat_t) (1 << 3)) | |
229 | #define UPSTAT_AUTOXOFF ((__force upstat_t) (1 << 4)) | |
c5f78b1f | 230 | #define UPSTAT_SYNC_FIFO ((__force upstat_t) (1 << 5)) |
299245a1 | 231 | |
d01f4d18 | 232 | int hw_stopped; /* sw-assisted CTS flow state */ |
1da177e4 LT |
233 | unsigned int mctrl; /* current modem ctrl settings */ |
234 | unsigned int timeout; /* character-based timeout */ | |
235 | unsigned int type; /* port type */ | |
ba899dbc | 236 | const struct uart_ops *ops; |
1da177e4 LT |
237 | unsigned int custom_divisor; |
238 | unsigned int line; /* port index */ | |
959801fe | 239 | unsigned int minor; |
4f640efb | 240 | resource_size_t mapbase; /* for ioremap */ |
ee97d0e3 | 241 | resource_size_t mapsize; |
1da177e4 | 242 | struct device *dev; /* parent device */ |
7e5ed9f5 | 243 | |
7e5ed9f5 DS |
244 | unsigned long sysrq; /* sysrq timeout */ |
245 | unsigned int sysrq_ch; /* char for sysrq */ | |
1997e9df | 246 | unsigned char has_sysrq; |
68af4317 | 247 | unsigned char sysrq_seq; /* index in sysrq_toggle_seq */ |
7e5ed9f5 | 248 | |
1da177e4 | 249 | unsigned char hub6; /* this should be in the 8250 driver */ |
b3b708fa | 250 | unsigned char suspended; |
e0830dbf | 251 | unsigned char console_reinit; |
2e94d5ae | 252 | const char *name; /* port name */ |
266dcff0 GKH |
253 | struct attribute_group *attr_group; /* port specific attributes */ |
254 | const struct attribute_group **tty_groups; /* all attributes (serial core use only) */ | |
a5f276f1 | 255 | struct serial_rs485 rs485; |
d58a2df3 | 256 | struct gpio_desc *rs485_term_gpio; /* enable RS485 bus termination */ |
ad8c0eaa | 257 | struct serial_iso7816 iso7816; |
beab697a | 258 | void *private_data; /* generic platform data pointer */ |
1da177e4 LT |
259 | }; |
260 | ||
927353a7 PG |
261 | static inline int serial_port_in(struct uart_port *up, int offset) |
262 | { | |
263 | return up->serial_in(up, offset); | |
264 | } | |
265 | ||
266 | static inline void serial_port_out(struct uart_port *up, int offset, int value) | |
267 | { | |
268 | up->serial_out(up, offset, value); | |
269 | } | |
270 | ||
6f538fe3 LW |
271 | /** |
272 | * enum uart_pm_state - power states for UARTs | |
273 | * @UART_PM_STATE_ON: UART is powered, up and operational | |
274 | * @UART_PM_STATE_OFF: UART is powered off | |
275 | * @UART_PM_STATE_UNDEFINED: sentinel | |
276 | */ | |
277 | enum uart_pm_state { | |
278 | UART_PM_STATE_ON = 0, | |
279 | UART_PM_STATE_OFF = 3, /* number taken from ACPI */ | |
280 | UART_PM_STATE_UNDEFINED, | |
281 | }; | |
282 | ||
ebd2c8f6 AC |
283 | /* |
284 | * This is the state information which is persistent across opens. | |
ebd2c8f6 AC |
285 | */ |
286 | struct uart_state { | |
df4f4dd4 | 287 | struct tty_port port; |
ebd2c8f6 | 288 | |
6f538fe3 | 289 | enum uart_pm_state pm_state; |
1da177e4 | 290 | struct circ_buf xmit; |
1da177e4 | 291 | |
9ed19428 PH |
292 | atomic_t refcount; |
293 | wait_queue_head_t remove_wait; | |
ebd2c8f6 | 294 | struct uart_port *uart_port; |
f751928e AC |
295 | }; |
296 | ||
297 | #define UART_XMIT_SIZE PAGE_SIZE | |
298 | ||
299 | ||
1da177e4 LT |
300 | /* number of characters left in xmit buffer before we ask for more */ |
301 | #define WAKEUP_CHARS 256 | |
302 | ||
303 | struct module; | |
304 | struct tty_driver; | |
305 | ||
306 | struct uart_driver { | |
307 | struct module *owner; | |
308 | const char *driver_name; | |
309 | const char *dev_name; | |
1da177e4 LT |
310 | int major; |
311 | int minor; | |
312 | int nr; | |
313 | struct console *cons; | |
314 | ||
315 | /* | |
316 | * these are private; the low level driver should not | |
317 | * touch these; they should be initialised to NULL | |
318 | */ | |
319 | struct uart_state *state; | |
320 | struct tty_driver *tty_driver; | |
321 | }; | |
322 | ||
323 | void uart_write_wakeup(struct uart_port *port); | |
324 | ||
325 | /* | |
326 | * Baud rate helpers. | |
327 | */ | |
328 | void uart_update_timeout(struct uart_port *port, unsigned int cflag, | |
329 | unsigned int baud); | |
606d099c AC |
330 | unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, |
331 | struct ktermios *old, unsigned int min, | |
1da177e4 LT |
332 | unsigned int max); |
333 | unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); | |
334 | ||
54381067 AV |
335 | /* Base timer interval for polling */ |
336 | static inline int uart_poll_timeout(struct uart_port *port) | |
337 | { | |
338 | int timeout = port->timeout; | |
339 | ||
340 | return timeout > 6 ? (timeout / 2 - 2) : 1; | |
341 | } | |
342 | ||
1da177e4 LT |
343 | /* |
344 | * Console helpers. | |
345 | */ | |
9aac5887 RH |
346 | struct earlycon_device { |
347 | struct console *con; | |
348 | struct uart_port port; | |
349 | char options[16]; /* e.g., 115200n8 */ | |
350 | unsigned int baud; | |
351 | }; | |
9aac5887 | 352 | |
470ca0de | 353 | struct earlycon_id { |
c1c734cb DA |
354 | char name[15]; |
355 | char name_term; /* In case compiler didn't '\0' term name */ | |
2eaa7909 | 356 | char compatible[128]; |
470ca0de | 357 | int (*setup)(struct earlycon_device *, const char *options); |
dd709e72 | 358 | }; |
470ca0de | 359 | |
62dcd9c5 JH |
360 | extern const struct earlycon_id __earlycon_table[]; |
361 | extern const struct earlycon_id __earlycon_table_end[]; | |
2eaa7909 | 362 | |
f8ba3647 MY |
363 | #if defined(CONFIG_SERIAL_EARLYCON) && !defined(MODULE) |
364 | #define EARLYCON_USED_OR_UNUSED __used | |
365 | #else | |
366 | #define EARLYCON_USED_OR_UNUSED __maybe_unused | |
367 | #endif | |
368 | ||
62dcd9c5 JH |
369 | #define OF_EARLYCON_DECLARE(_name, compat, fn) \ |
370 | static const struct earlycon_id __UNIQUE_ID(__earlycon_##_name) \ | |
371 | EARLYCON_USED_OR_UNUSED __section("__earlycon_table") \ | |
372 | __aligned(__alignof__(struct earlycon_id)) \ | |
2eaa7909 PH |
373 | = { .name = __stringify(_name), \ |
374 | .compatible = compat, \ | |
76437b34 | 375 | .setup = fn } |
2eaa7909 PH |
376 | |
377 | #define EARLYCON_DECLARE(_name, fn) OF_EARLYCON_DECLARE(_name, "", fn) | |
378 | ||
c90fe9c0 | 379 | extern int of_setup_earlycon(const struct earlycon_id *match, |
088da2a1 | 380 | unsigned long node, |
4d118c9a | 381 | const char *options); |
b0b6abd3 | 382 | |
ad1696f6 | 383 | #ifdef CONFIG_SERIAL_EARLYCON |
0231d000 | 384 | extern bool earlycon_acpi_spcr_enable __initdata; |
ad1696f6 AM |
385 | int setup_earlycon(char *buf); |
386 | #else | |
219c7b06 | 387 | static const bool earlycon_acpi_spcr_enable EARLYCON_USED_OR_UNUSED; |
ad1696f6 AM |
388 | static inline int setup_earlycon(char *buf) { return 0; } |
389 | #endif | |
390 | ||
1da177e4 LT |
391 | struct uart_port *uart_get_console(struct uart_port *ports, int nr, |
392 | struct console *c); | |
46e36683 | 393 | int uart_parse_earlycon(char *p, unsigned char *iotype, resource_size_t *addr, |
73abaf87 | 394 | char **options); |
0f646b63 | 395 | void uart_parse_options(const char *options, int *baud, int *parity, int *bits, |
1da177e4 LT |
396 | int *flow); |
397 | int uart_set_options(struct uart_port *port, struct console *co, int baud, | |
398 | int parity, int bits, int flow); | |
399 | struct tty_driver *uart_console_device(struct console *co, int *index); | |
d358788f RK |
400 | void uart_console_write(struct uart_port *port, const char *s, |
401 | unsigned int count, | |
402 | void (*putchar)(struct uart_port *, int)); | |
1da177e4 LT |
403 | |
404 | /* | |
405 | * Port/driver registration/removal | |
406 | */ | |
407 | int uart_register_driver(struct uart_driver *uart); | |
408 | void uart_unregister_driver(struct uart_driver *uart); | |
1da177e4 LT |
409 | int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); |
410 | int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); | |
411 | int uart_match_port(struct uart_port *port1, struct uart_port *port2); | |
412 | ||
413 | /* | |
414 | * Power Management | |
415 | */ | |
416 | int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); | |
417 | int uart_resume_port(struct uart_driver *reg, struct uart_port *port); | |
418 | ||
419 | #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) | |
420 | #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) | |
421 | ||
422 | #define uart_circ_chars_pending(circ) \ | |
423 | (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) | |
424 | ||
425 | #define uart_circ_chars_free(circ) \ | |
426 | (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) | |
427 | ||
f751928e AC |
428 | static inline int uart_tx_stopped(struct uart_port *port) |
429 | { | |
ebd2c8f6 | 430 | struct tty_struct *tty = port->state->port.tty; |
a727b025 | 431 | if ((tty && tty->stopped) || port->hw_stopped) |
f751928e AC |
432 | return 1; |
433 | return 0; | |
434 | } | |
1da177e4 | 435 | |
299245a1 PH |
436 | static inline bool uart_cts_enabled(struct uart_port *uport) |
437 | { | |
d4260b51 | 438 | return !!(uport->status & UPSTAT_CTS_ENABLE); |
299245a1 PH |
439 | } |
440 | ||
391f93f2 PH |
441 | static inline bool uart_softcts_mode(struct uart_port *uport) |
442 | { | |
443 | upstat_t mask = UPSTAT_CTS_ENABLE | UPSTAT_AUTOCTS; | |
444 | ||
445 | return ((uport->status & mask) == UPSTAT_CTS_ENABLE); | |
446 | } | |
447 | ||
1da177e4 LT |
448 | /* |
449 | * The following are helper functions for the low level drivers. | |
450 | */ | |
027d7dac JS |
451 | |
452 | extern void uart_handle_dcd_change(struct uart_port *uport, | |
453 | unsigned int status); | |
454 | extern void uart_handle_cts_change(struct uart_port *uport, | |
455 | unsigned int status); | |
456 | ||
457 | extern void uart_insert_char(struct uart_port *port, unsigned int status, | |
458 | unsigned int overrun, unsigned int ch, unsigned int flag); | |
459 | ||
08d54703 JH |
460 | #ifdef CONFIG_MAGIC_SYSRQ_SERIAL |
461 | #define SYSRQ_TIMEOUT (HZ * 5) | |
462 | ||
463 | bool uart_try_toggle_sysrq(struct uart_port *port, unsigned int ch); | |
464 | ||
465 | static inline int uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) | |
466 | { | |
22538565 | 467 | if (!port->sysrq) |
08d54703 JH |
468 | return 0; |
469 | ||
470 | if (ch && time_before(jiffies, port->sysrq)) { | |
471 | if (sysrq_mask()) { | |
472 | handle_sysrq(ch); | |
473 | port->sysrq = 0; | |
474 | return 1; | |
475 | } | |
476 | if (uart_try_toggle_sysrq(port, ch)) | |
477 | return 1; | |
478 | } | |
479 | port->sysrq = 0; | |
480 | ||
481 | return 0; | |
482 | } | |
483 | ||
484 | static inline int uart_prepare_sysrq_char(struct uart_port *port, unsigned int ch) | |
485 | { | |
22538565 | 486 | if (!port->sysrq) |
08d54703 JH |
487 | return 0; |
488 | ||
489 | if (ch && time_before(jiffies, port->sysrq)) { | |
490 | if (sysrq_mask()) { | |
491 | port->sysrq_ch = ch; | |
492 | port->sysrq = 0; | |
493 | return 1; | |
494 | } | |
495 | if (uart_try_toggle_sysrq(port, ch)) | |
496 | return 1; | |
497 | } | |
498 | port->sysrq = 0; | |
499 | ||
500 | return 0; | |
501 | } | |
502 | ||
75f4e830 | 503 | static inline void uart_unlock_and_check_sysrq(struct uart_port *port) |
08d54703 JH |
504 | { |
505 | int sysrq_ch; | |
506 | ||
507 | if (!port->has_sysrq) { | |
75f4e830 | 508 | spin_unlock(&port->lock); |
08d54703 JH |
509 | return; |
510 | } | |
511 | ||
512 | sysrq_ch = port->sysrq_ch; | |
513 | port->sysrq_ch = 0; | |
514 | ||
75f4e830 | 515 | spin_unlock(&port->lock); |
08d54703 JH |
516 | |
517 | if (sysrq_ch) | |
518 | handle_sysrq(sysrq_ch); | |
519 | } | |
520 | #else /* CONFIG_MAGIC_SYSRQ_SERIAL */ | |
521 | static inline int uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) | |
522 | { | |
523 | return 0; | |
524 | } | |
525 | static inline int uart_prepare_sysrq_char(struct uart_port *port, unsigned int ch) | |
526 | { | |
527 | return 0; | |
528 | } | |
75f4e830 | 529 | static inline void uart_unlock_and_check_sysrq(struct uart_port *port) |
08d54703 | 530 | { |
75f4e830 | 531 | spin_unlock(&port->lock); |
08d54703 JH |
532 | } |
533 | #endif /* CONFIG_MAGIC_SYSRQ_SERIAL */ | |
534 | ||
535 | /* | |
536 | * We do the SysRQ and SAK checking like this... | |
537 | */ | |
538 | static inline int uart_handle_break(struct uart_port *port) | |
539 | { | |
540 | struct uart_state *state = port->state; | |
541 | ||
542 | if (port->handle_break) | |
543 | port->handle_break(port); | |
544 | ||
545 | #ifdef CONFIG_MAGIC_SYSRQ_SERIAL | |
546 | if (port->has_sysrq && uart_console(port)) { | |
547 | if (!port->sysrq) { | |
548 | port->sysrq = jiffies + SYSRQ_TIMEOUT; | |
549 | return 1; | |
550 | } | |
551 | port->sysrq = 0; | |
552 | } | |
553 | #endif | |
554 | if (port->flags & UPF_SAK) | |
555 | do_SAK(state->port.tty); | |
556 | return 0; | |
557 | } | |
1da177e4 | 558 | |
1da177e4 LT |
559 | /* |
560 | * UART_ENABLE_MS - determine if port should enable modem status irqs | |
561 | */ | |
562 | #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ | |
563 | (cflag) & CRTSCTS || \ | |
564 | !((cflag) & CLOCAL)) | |
565 | ||
c150c0f3 | 566 | int uart_get_rs485_mode(struct uart_port *port); |
1da177e4 | 567 | #endif /* LINUX_SERIAL_CORE_H */ |